[{"id":3669583,"web_url":"http://patchwork.ozlabs.org/comment/3669583/","msgid":"","list_archive_url":null,"date":"2026-03-26T09:37:11","subject":"Re: [PATCH v2 3/7] pwm: tegra: Modify read/write accessors for\n multi-register channel","submitter":{"id":92481,"url":"http://patchwork.ozlabs.org/api/people/92481/","name":"Thierry Reding","email":"thierry.reding@kernel.org"},"content":"On Wed, Mar 25, 2026 at 07:17:01PM +0900, Mikko Perttunen wrote:\n> On Tegra264, each PWM instance has two registers (per channel, of which\n> there is one). Update the pwm_readl/pwm_writel helper functions to\n> take channel (as struct pwm_device *) and offset separately.\n> \n> Signed-off-by: Mikko Perttunen \n> ---\n> drivers/pwm/pwm-tegra.c | 26 +++++++++++++++-----------\n> 1 file changed, 15 insertions(+), 11 deletions(-)\n\nMakes sense:\n\nReviewed-by: Thierry Reding ","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-tegra@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=cjJ1yeg/;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=104.64.211.4; helo=sin.lore.kernel.org;\n envelope-from=linux-tegra+bounces-13272-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=\"cjJ1yeg/\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=10.30.226.201"],"Received":["from sin.lore.kernel.org (sin.lore.kernel.org [104.64.211.4])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fhJsk4DWdz1yGD\n\tfor ; Thu, 26 Mar 2026 20:50:02 +1100 (AEDT)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sin.lore.kernel.org (Postfix) with ESMTP id B134630771E5\n\tfor ; Thu, 26 Mar 2026 09:37:14 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 51F6A343D9D;\n\tThu, 26 Mar 2026 09:37:14 +0000 (UTC)","from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org\n [10.30.226.201])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 12D352D948D;\n\tThu, 26 Mar 2026 09:37:14 +0000 (UTC)","by smtp.kernel.org (Postfix) with ESMTPSA id 6697AC116C6;\n\tThu, 26 Mar 2026 09:37:13 +0000 (UTC)"],"ARC-Seal":"i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1774517834; cv=none;\n b=iCQIUk7eor1wi9msMVm1Zb0VFUhRFZniHFS4d3SPXc3G9PKIA/Mahr1UFgLJeZyVQgpx3MMBbbCutQvOoOX6LYjKPwKN606vek9RsrOdqF028B/8W9g3/IO/3XXF/rXwwc8LL46x0pVXRmYpZURWoj2GgtrOhjfbmT+xkDq4czQ=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1774517834; c=relaxed/simple;\n\tbh=WPzA71zM6El021U0QwiRy2QqNDBMxQE+GytSBn3TSe0=;\n\th=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version:\n\t Content-Type:Content-Disposition:In-Reply-To;\n b=tO0U/5s1vCbHNFPSdcvUX8vFqGmhFRdgJF1q61Eq1Yqd+HoRLkt/EHTGUORoE2i5vtKmzGTd/RGaji66HVQsyHqE0KRh47aSYfGs7wymErTVK5vrm9mmrH6T3xFW0zEiCLxPTcctyHRBdjUmBqiUnD9vDFLXZzvRajWmxALK9RM=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=cjJ1yeg/; arc=none smtp.client-ip=10.30.226.201","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n\ts=k20201202; t=1774517834;\n\tbh=WPzA71zM6El021U0QwiRy2QqNDBMxQE+GytSBn3TSe0=;\n\th=Date:From:To:Cc:Subject:References:In-Reply-To:From;\n\tb=cjJ1yeg/aJXWscBf+XAhj/sr2ABGhGpZ8AJwATmehfMhyNZmcPCtLYoSDm5+RaOZl\n\t alHSgBotc2AnPX0Rw7w6FVKNEkrLT6CswMzB3/+G0/kwMTq7qGAdI3lqAeCZU1U6fy\n\t GrRyqqSyo6og/XPqPx+puZOQHHrqwi4dXGpO8btVpqXy3lhWcOnghsSGX/yiXherF2\n\t sFJsiQjBwjyJrpGW25wf/jqED6sJXBdwLWFuusoisJaYK14/OcWgArex8GRRcB2JAy\n\t YqxIA7gTw/Zw1XTkcu7AUYbwUHr4gma/ElK+dFHcQ92hP3NhWpmji+Mapxvlot6JVK\n\t GBAHWTcFFxqsg==","Date":"Thu, 26 Mar 2026 10:37:11 +0100","From":"Thierry Reding ","To":"Mikko Perttunen ","Cc":"Thierry Reding , Uwe =?utf-8?q?Kleine-K=C3=B6?=\n\t=?utf-8?q?nig?= ,\n Jonathan Hunter , Rob Herring ,\n Krzysztof Kozlowski ,\n Conor Dooley , linux-pwm@vger.kernel.org,\n linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org,\n devicetree@vger.kernel.org","Subject":"Re: [PATCH v2 3/7] pwm: tegra: Modify read/write accessors for\n multi-register channel","Message-ID":"","References":"<20260325-t264-pwm-v2-0-998d885984b3@nvidia.com>\n <20260325-t264-pwm-v2-3-998d885984b3@nvidia.com>","Precedence":"bulk","X-Mailing-List":"linux-tegra@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha512;\n\tprotocol=\"application/pgp-signature\"; boundary=\"euf4mk6lravh2zzx\"","Content-Disposition":"inline","In-Reply-To":"<20260325-t264-pwm-v2-3-998d885984b3@nvidia.com>"}}]