[{"id":3669062,"web_url":"http://patchwork.ozlabs.org/comment/3669062/","msgid":"<3a51ad39-558f-860d-4920-9f757b7d5131@linux.intel.com>","list_archive_url":null,"date":"2026-03-25T12:04:03","subject":"Re: [PATCH 09/10] PCI: Align head space better","submitter":{"id":83553,"url":"http://patchwork.ozlabs.org/api/people/83553/","name":"Ilpo Järvinen","email":"ilpo.jarvinen@linux.intel.com"},"content":"On Tue, 24 Mar 2026, Ilpo Järvinen wrote:\n\n> When a bridge window contains big and small resource(s), the small\n> resource(s) may not amount to the half of the size of the big resource\n> which would allow calculate_head_align() to shrink the head alignment.\n> This results in always placing the small resource(s) after the big\n> resource.\n> \n> In general, it would be good to be able to place the small resource(s)\n> before the big resource to achieve better utilization of the address\n> space. In the cases where the large resource can only fit at the end\n> of the window, it is even required.\n> \n> However, carrying the information over from pbus_size_mem() and\n> calculate_head_align() to __pci_assign_resource() and\n> pcibios_align_resource() is not easy with the current data structures.\n> \n> A somewhat hacky way to move the non-aligning tail part to the head is\n> possible within pcibios_align_resource(). The free space between the\n> start of the free space span and the aligned start address can be\n> compared with the non-aligning remainder of the size. If the free space\n> is larger than the remainder, placing the remainder before the start\n> address is possible. This relocation should generally work, because PCI\n> resources consist only power-of-2 atoms.\n> \n> Various arch requirements may still need to override the relocation, so\n> the relocation is only applied selectively in such cases.\n> \n> Closes: https://bugzilla.kernel.org/show_bug.cgi?id=221205\n> Signed-off-by: Ilpo Järvinen \n> ---\n> arch/arm/kernel/bios32.c | 3 +++\n> arch/m68k/kernel/pcibios.c | 4 ++++\n> arch/mips/pci/pci-generic.c | 3 +++\n> arch/mips/pci/pci-legacy.c | 2 ++\n> arch/parisc/kernel/pci.c | 3 +++\n> arch/powerpc/kernel/pci-common.c | 2 ++\n> arch/sh/drivers/pci/pci.c | 2 ++\n> arch/x86/pci/i386.c | 2 ++\n> arch/xtensa/kernel/pci.c | 2 ++\n> drivers/pci/setup-res.c | 39 +++++++++++++++++++++++++++++++-\n> include/linux/pci.h | 5 ++++\n> kernel/resource.c | 2 +-\n> 12 files changed, 67 insertions(+), 2 deletions(-)\n\n> diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c\n> index 7a0522316ee3..994c3bd36ef2 100644\n> --- a/arch/sh/drivers/pci/pci.c\n> +++ b/arch/sh/drivers/pci/pci.c\n> @@ -185,6 +185,8 @@ resource_size_t pcibios_align_resource(void *data, const struct resource *res,\n> \t\t */\n> \t\tif (start & 0x300)\n> \t\t\tstart = (start + 0x3ff) & ~0x3ff;\n> +\t} else (res->flags & IORESOURCE_MEM) {\n\nI'll be adding the missing if into this in v2 (found by sashiko). It seems \nlkp didn't test this so it was not caught earlier.\n\n> +\t\tstart = pci_align_resource(dev, res, empty_res, size, align);\n> \t}\n> \n> \treturn start;","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=J7tmz/ea;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; helo=sea.lore.kernel.org;\n envelope-from=linux-pci+bounces-51063-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com\n header.b=\"J7tmz/ea\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=192.198.163.12","smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=linux.intel.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=linux.intel.com"],"Received":["from sea.lore.kernel.org (sea.lore.kernel.org\n [IPv6:2600:3c0a:e001:db::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fgmj36tgtz1xy3\n\tfor ; Wed, 25 Mar 2026 23:40:39 +1100 (AEDT)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sea.lore.kernel.org (Postfix) with ESMTP id 32C0431BA786\n\tfor ; Wed, 25 Mar 2026 12:04:28 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 996673D330D;\n\tWed, 25 Mar 2026 12:04:18 +0000 (UTC)","from mgamail.intel.com (mgamail.intel.com [192.198.163.12])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id C41FA3D1CC5;\n\tWed, 25 Mar 2026 12:04:16 +0000 (UTC)","from orviesa002.jf.intel.com ([10.64.159.142])\n by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 25 Mar 2026 05:04:15 -0700","from ijarvine-mobl1.ger.corp.intel.com (HELO localhost)\n ([10.245.245.125])\n by orviesa002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 25 Mar 2026 05:04:07 -0700"],"ARC-Seal":"i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1774440258; cv=none;\n b=P2v1fyuvHYZEgeEF45LZM8trlPVOlnCrNUogC1rZR+1eJxH0WfTmpD6QIsG9kB9ra2utXZFv9aueys4pav7LpjR4Tm/JTToldnAWj4JnF6XAzA9AMbEFlu7waJ5Dxt/oeBpZE7i6g4d7Mjiex+ymRGJ1KsASSrNB3i/9c74GDl0=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1774440258; c=relaxed/simple;\n\tbh=pthnvpb4bRgKrgjRM/7gqeUF0giUw3hMBAx3mtd0Tfk=;\n\th=From:Date:To:cc:Subject:In-Reply-To:Message-ID:References:\n\t MIME-Version:Content-Type;\n b=FG/JBs0B+p2xp2vzHKLH5azwwM13MkXQQNND2K7ovQQiD4P8F2jYoHTByHSg9y20vt07ha5eTrHldBCv738CnXdVnzz1NOD+NJ12y7W5FbKHdW46Uhw0TjQaNbbNuizIXaymwXOQXw6u0Ju3/Hohxg0+KwBRFJ3mRhE9jHYBaYk=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=linux.intel.com;\n spf=pass smtp.mailfrom=linux.intel.com;\n dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com\n header.b=J7tmz/ea; arc=none smtp.client-ip=192.198.163.12","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1774440257; x=1805976257;\n h=from:date:to:cc:subject:in-reply-to:message-id:\n references:mime-version;\n bh=pthnvpb4bRgKrgjRM/7gqeUF0giUw3hMBAx3mtd0Tfk=;\n b=J7tmz/eaTd05OL5Uk7c6f1Kz8pD8vJdRkgQWOqDIGV0pFDBcdRBCkn5L\n CHF0T6xDxbbPlkkMcFQ5srdSF3zl6wg/kncaLmsQAOzReECtzOOSn9tHA\n inEXGYEhqWoW7sxM7rBars5x1z7pJHS9y2ujTi3YG6RW47526m7HdSFNK\n uc0J5+6qPA05S8bFz5l0rUjFhsYQD3Q+EHHd1TdX9Z5/Rrb4XBiLBqEu/\n u5yJRH0WjjoSCRThOZjnWjA2bPXqdVGwbajeUIsS5WETRkPM/TElJxRS3\n 1xKJJYjeyEjD9TvZy6SnkpcjaF94s7DRIOuUW23s462znQhMdhy7V+6hw\n g==;","X-CSE-ConnectionGUID":["+a+RKR8dQuelGRD2RspvTQ==","GDVCGG5yQPG4XMQBFBjvAw=="],"X-CSE-MsgGUID":["x8N4ddhjS82VENnpV3ctWw==","2mzDZ70tTHGJhYkLqZAkRA=="],"X-IronPort-AV":["E=McAfee;i=\"6800,10657,11739\"; a=\"79381329\"","E=Sophos;i=\"6.23,140,1770624000\";\n d=\"scan'208\";a=\"79381329\"","E=Sophos;i=\"6.23,140,1770624000\";\n d=\"scan'208\";a=\"255160046\""],"X-ExtLoop1":"1","From":"=?utf-8?q?Ilpo_J=C3=A4rvinen?= ","Date":"Wed, 25 Mar 2026 14:04:03 +0200 (EET)","To":"linux-pci@vger.kernel.org","cc":"Bjorn Helgaas , Guenter Roeck ,\n linux-alpha@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n linux-m68k@lists.linux-m68k.org, linux-mips@vger.kernel.org,\n linux-parisc@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,\n linux-s390@vger.kernel.org, linux-sh@vger.kernel.org,\n Russell King ,\n Geert Uytterhoeven ,\n Thomas Bogendoerfer ,\n \"James E.J. Bottomley\" ,\n Helge Deller , Michael Ellerman ,\n Thomas Gleixner , Ingo Molnar ,\n Borislav Petkov , Dave Hansen ,\n \"H. Peter Anvin\" , Chris Zankel ,\n Max Filippov ,\n Madhavan Srinivasan ,\n Yoshinori Sato ,\n Rich Felker ,\n John Paul Adrian Glaubitz ,\n Nicholas Piggin ,\n \"Christophe Leroy (CS GROUP)\" , x86@kernel.org,\n LKML ","Subject":"Re: [PATCH 09/10] PCI: Align head space better","In-Reply-To":"<20260324165633.4583-10-ilpo.jarvinen@linux.intel.com>","Message-ID":"<3a51ad39-558f-860d-4920-9f757b7d5131@linux.intel.com>","References":"<20260324165633.4583-1-ilpo.jarvinen@linux.intel.com>\n <20260324165633.4583-10-ilpo.jarvinen@linux.intel.com>","Precedence":"bulk","X-Mailing-List":"linux-pci@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","Content-Type":"multipart/mixed; boundary=\"8323328-1062646629-1774440243=:976\""}}]