[{"id":3670778,"web_url":"http://patchwork.ozlabs.org/comment/3670778/","msgid":"","list_archive_url":null,"date":"2026-03-29T17:50:21","subject":"Re: [PATCH GCC17-stage1] RISC-V: Synthesize FP constants via integer\n instructions + fmv","submitter":{"id":92310,"url":"http://patchwork.ozlabs.org/api/people/92310/","name":"Jeffrey Law","email":"jeffrey.law@oss.qualcomm.com"},"content":"On 3/24/2026 9:18 AM, Philipp Tomsich wrote:\n> From: Konstantinos Eleftheriou \n>\n> Non-zero floating-point constants that are not Zfa FLI candidates are\n> currently always loaded from the constant pool (lui + flw/fld), even\n> when the IEEE 754 bit pattern can be cheaply built in a GP register\n> and transferred via fmv.s.x/fmv.d.x with no memory access.\n>\n> Add expand-time synthesis in riscv_legitimize_move: decompose the\n> CONST_DOUBLE into an integer build (riscv_move_integer) followed by\n> a GP-to-FP transfer. The constant is synthesized when the integer\n> build cost is < 3 instructions, keeping the total (including fmv)\n> at <= 3 — competitive with the 2-instruction + memory-access\n> constant pool alternative.\n>\n> For SFmode (RV32 and RV64 with F), every float constant qualifies\n> since any 32-bit value can be built in at most 2 instructions.\n> For DFmode (RV64 with D), constants whose bit pattern can be built\n> in 1-2 instructions are covered: all powers of 2, simple fractions,\n> small integers, and many common engineering constants. Transcendental\n> constants like pi and e still use the constant pool.\n>\n> Examples (RV64GC, -O2):\n> 1.0f: lui+flw (2 insns + mem) -> li+fmv.s.x (2 insns)\n> 1.0: lui+fld (2 insns + mem) -> li+slli+fmv.d.x (3 insns)\n> pi: unchanged (constant pool, integer build too expensive)\n>\n> gcc/ChangeLog:\n>\n> \t* config/riscv/riscv.cc (riscv_reinterpret_float_as_int): New\n> \tfunction to extract IEEE 754 bit pattern from CONST_DOUBLE.\n> \t(riscv_float_const_rtx_p): New function to decide if integer\n> \tsynthesis is profitable; returns the sign-extended integer\n> \tvalue through an output parameter.\n> \t(riscv_cannot_force_const_mem): Return true for synthesizable\n> \tFP constants to prevent constant pool spilling.\n> \t(riscv_const_insns): Return synthesis cost for eligible FP\n> \tconstants so they are treated as legitimate constants.\n> \t(riscv_legitimize_move): Add synthesis of FP constants via\n> \tinteger instructions and fmv.[sd].x.\n>\n> gcc/testsuite/ChangeLog:\n>\n> \t* gcc.dg/fold-overflow-1.c: Expect 2139095040 three times on\n> \tRISC-V due to FP constant synthesis of FLT_MAX.\n> \t* gcc.target/riscv/pr105666.c: Remove scan-assembler-not for\n> \tfmv.d.x since it now appears for FP constant synthesis. Keep\n> \tthe fmv.x.d check for GP-to-FP spill avoidance.\n> \t* gcc.target/riscv/fp-const-synth-df-boundary.c: New test.\n> \t* gcc.target/riscv/fp-const-synth-df-rv32.c: New test.\n> \t* gcc.target/riscv/fp-const-synth-df.c: New test.\n> \t* gcc.target/riscv/fp-const-synth-run.c: New test.\n> \t* gcc.target/riscv/fp-const-synth-sf-rv32.c: New test.\n> \t* gcc.target/riscv/fp-const-synth-sf.c: New test.\n> \t* gcc.target/riscv/fp-const-synth-special-sf.c: New test.\n> \t* gcc.target/riscv/fp-const-synth-zfa.c: New test.\nNot a review, but a note that I believe this will resolve the remaining \nissues with 110748 as -0.0 is just a bset dst, x0, 31/63 when ZBB is \navailable.  More importantly I think as-written it should silently \"just \nwork\" for any constant we can easily synthesize.  So I'm definitely \nsupportive of basic idea.  Just need to get inside the implementation \ndetails now.\n\n\nJeff","headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","gcc-patches@gcc.gnu.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","gcc-patches@gcc.gnu.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=UQr27Jtb;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=dxijBDuK;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=temperror (SPF Temporary Error: DNS Timeout) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; 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No fmv.d.x or fmv.s.x.\nThe synthesis patch correctly avoids synthesizing 0.0 via integer\ninstructions since storing integer zero is cheaper.\n\nWith this patch, I get the following assembly for the function from PR110748:\n> .attribute arch, \"rv64i2p1_m2p0_a2p1_f2p2_d2p2_zicsr2p0_zifencei2p0_zmmul1p0\"\n> .attribute unaligned_access, 0\n> .attribute stack_align, 16\n> .text\n> .align 2\n> .globl zd\n> .type zd, @function\n> zd:\n> .LFB0:\n> .cfi_startproc\n> sd zero,0(a0)\n> ret\n> .cfi_endproc\n> .LFE0:\n> .size zd, .-zd\n> .ident \"GCC: (GNU) 16.0.1 20260227 (experimental)\"\n\nThanks,\nPhilipp\n\n\nOn Sun, 29 Mar 2026 at 19:50, Jeffrey Law wrote:\n>\n>\n>\n> On 3/24/2026 9:18 AM, Philipp Tomsich wrote:\n> > From: Konstantinos Eleftheriou \n> >\n> > Non-zero floating-point constants that are not Zfa FLI candidates are\n> > currently always loaded from the constant pool (lui + flw/fld), even\n> > when the IEEE 754 bit pattern can be cheaply built in a GP register\n> > and transferred via fmv.s.x/fmv.d.x with no memory access.\n> >\n> > Add expand-time synthesis in riscv_legitimize_move: decompose the\n> > CONST_DOUBLE into an integer build (riscv_move_integer) followed by\n> > a GP-to-FP transfer. The constant is synthesized when the integer\n> > build cost is < 3 instructions, keeping the total (including fmv)\n> > at <= 3 — competitive with the 2-instruction + memory-access\n> > constant pool alternative.\n> >\n> > For SFmode (RV32 and RV64 with F), every float constant qualifies\n> > since any 32-bit value can be built in at most 2 instructions.\n> > For DFmode (RV64 with D), constants whose bit pattern can be built\n> > in 1-2 instructions are covered: all powers of 2, simple fractions,\n> > small integers, and many common engineering constants. Transcendental\n> > constants like pi and e still use the constant pool.\n> >\n> > Examples (RV64GC, -O2):\n> > 1.0f: lui+flw (2 insns + mem) -> li+fmv.s.x (2 insns)\n> > 1.0: lui+fld (2 insns + mem) -> li+slli+fmv.d.x (3 insns)\n> > pi: unchanged (constant pool, integer build too expensive)\n> >\n> > gcc/ChangeLog:\n> >\n> > * config/riscv/riscv.cc (riscv_reinterpret_float_as_int): New\n> > function to extract IEEE 754 bit pattern from CONST_DOUBLE.\n> > (riscv_float_const_rtx_p): New function to decide if integer\n> > synthesis is profitable; returns the sign-extended integer\n> > value through an output parameter.\n> > (riscv_cannot_force_const_mem): Return true for synthesizable\n> > FP constants to prevent constant pool spilling.\n> > (riscv_const_insns): Return synthesis cost for eligible FP\n> > constants so they are treated as legitimate constants.\n> > (riscv_legitimize_move): Add synthesis of FP constants via\n> > integer instructions and fmv.[sd].x.\n> >\n> > gcc/testsuite/ChangeLog:\n> >\n> > * gcc.dg/fold-overflow-1.c: Expect 2139095040 three times on\n> > RISC-V due to FP constant synthesis of FLT_MAX.\n> > * gcc.target/riscv/pr105666.c: Remove scan-assembler-not for\n> > fmv.d.x since it now appears for FP constant synthesis. Keep\n> > the fmv.x.d check for GP-to-FP spill avoidance.\n> > * gcc.target/riscv/fp-const-synth-df-boundary.c: New test.\n> > * gcc.target/riscv/fp-const-synth-df-rv32.c: New test.\n> > * gcc.target/riscv/fp-const-synth-df.c: New test.\n> > * gcc.target/riscv/fp-const-synth-run.c: New test.\n> > * gcc.target/riscv/fp-const-synth-sf-rv32.c: New test.\n> > * gcc.target/riscv/fp-const-synth-sf.c: New test.\n> > * gcc.target/riscv/fp-const-synth-special-sf.c: New test.\n> > * gcc.target/riscv/fp-const-synth-zfa.c: New test.\n> Not a review, but a note that I believe this will resolve the remaining\n> issues with 110748 as -0.0 is just a bset dst, x0, 31/63 when ZBB is\n> available. More importantly I think as-written it should silently \"just\n> work\" for any constant we can easily synthesize. So I'm definitely\n> supportive of basic idea. Just need to get inside the implementation\n> details now.\n>\n>\n> Jeff","headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","gcc-patches@gcc.gnu.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","gcc-patches@gcc.gnu.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=vrull.eu header.i=@vrull.eu header.a=rsa-sha256\n header.s=google header.b=W7mXJzPl;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; helo=vm01.sourceware.org;\n envelope-from=gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org;\n receiver=patchwork.ozlabs.org)","sourceware.org;\n\tdkim=pass (2048-bit key,\n unprotected) header.d=vrull.eu header.i=@vrull.eu header.a=rsa-sha256\n header.s=google header.b=W7mXJzPl","sourceware.org;\n dmarc=none (p=none dis=none) header.from=vrull.eu","sourceware.org; spf=pass smtp.mailfrom=vrull.eu","server2.sourceware.org;\n arc=pass smtp.remote-ip=209.85.218.50"],"Received":["from vm01.sourceware.org (vm01.sourceware.org\n [IPv6:2620:52:6:3111::32])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fkPCg5r5Yz1xrn\n\tfor ; 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Sun, 29 Mar 2026\n 12:12:11 -0700 (PDT)","MIME-Version":"1.0","References":"<20260324151840.3671675-1-philipp.tomsich@vrull.eu>\n ","In-Reply-To":"","From":"Philipp Tomsich ","Date":"Sun, 29 Mar 2026 21:12:01 +0200","X-Gm-Features":"AQROBzB_eyL6f9Uz45xJr5z77d78fk2U72cb0lt0ngKPi8taN8tgTMB0XzMMF6M","Message-ID":"\n ","Subject":"Re: [PATCH GCC17-stage1] RISC-V: Synthesize FP constants via integer\n instructions + fmv","To":"Jeffrey Law ","Cc":"gcc-patches@gcc.gnu.org,\n Konstantinos Eleftheriou ","Content-Type":"text/plain; charset=\"UTF-8\"","Content-Transfer-Encoding":"quoted-printable","X-BeenThere":"gcc-patches@gcc.gnu.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Gcc-patches mailing list ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org"}}]