[{"id":3668448,"web_url":"http://patchwork.ozlabs.org/comment/3668448/","msgid":"","list_archive_url":null,"date":"2026-03-24T14:10:42","subject":"Re: [PATCH v9 2/5] i2c: mux: add support for per channel bus\n frequency","submitter":{"id":46495,"url":"http://patchwork.ozlabs.org/api/people/46495/","name":"Andy Shevchenko","email":"andriy.shevchenko@intel.com"},"content":"On Tue, Mar 24, 2026 at 02:54:16PM +0100, Marcus Folkesson wrote:\n> There may be several reasons why you may need to use a certain speed\n> on an I2C bus. E.g.\n> \n> - When several devices are attached to the bus, the speed must be\n> selected according to the slowest device.\n> \n> - Electrical conditions may limit the usable speed on the bus for\n> different reasons.\n> \n> With an I2C multiplexer, it is possible to group the attached devices\n> after their preferred speed by e.g. putting all \"slow\" devices on a\n> separate channel on the multiplexer.\n> \n> Consider the following topology:\n> \n> .----------. 100kHz .--------.\n> .--------. 400kHz | |--------| dev D1 |\n> | root |--+-----| I2C MUX | '--------'\n> '--------' | | |--. 400kHz .--------.\n> | '----------' '-------| dev D2 |\n> | .--------. '--------'\n> '--| dev D3 |\n> '--------'\n> \n> One requirement with this design is that a multiplexer may only use the\n> same or lower bus speed as its parent.\n> Otherwise, if the multiplexer would have to increase the bus frequency,\n> then all siblings (D3 in this case) would run into a clock speed it may\n> not support.\n> \n> The bus frequency for each channel is set in the devicetree. As the\n> i2c-mux bindings import the i2c-controller schema, the clock-frequency\n> property is already allowed.\n> If no clock-frequency property is set, the channel inherits their parent\n> bus speed.\n\n...\n\n> +\t\tof_property_read_u32(child, \"clock-frequency\", &priv->adap.clock_hz);\n\nWondering if we may use existing API to get i2c timings from fw description?\ni2c_parse_fw_timings() (it might be that it needs to be split for pure fwnode\none and device wrapped).\n\n> +\n> +\t\t/* If the mux adapter has no clock-frequency property, inherit from parent */\n> +\t\tif (!priv->adap.clock_hz)\n> +\t\t\tpriv->adap.clock_hz = parent->clock_hz;\n> +\n> +\t\t/*\n> +\t\t * Warn if the mux adapter is not parent-locked as\n> +\t\t * this may cause issues for some hardware topologies.\n> +\t\t */\n> +\t\tif ((priv->adap.clock_hz < parent->clock_hz) && muxc->mux_locked)\n> +\t\t\tdev_warn(muxc->dev,\n> +\t\t\t\t \"channel %u is slower than parent on a non parent-locked mux\\n\",\n> +\t\t\t\t chan_id);\n> +\n> +\t\t/* We don't support mux adapters faster than their parent */\n> +\t\tif (priv->adap.clock_hz > parent->clock_hz) {\n> +\t\t\tdev_err(muxc->dev,\n> +\t\t\t\t\"channel (%u) is faster (%u) than parent (%u)\\n\",\n> +\t\t\t\tchan_id, priv->adap.clock_hz, parent->clock_hz);\n> +\n> +\t\t\tof_node_put(mux_node);\n> +\t\t\tret = -EINVAL;\n> +\t\t\tgoto err_free_priv;\n> +\t\t}","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-i2c@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=XjBt1M2O;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c09:e001:a7::12fc:5321; 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a=\"78974106\"","E=Sophos;i=\"6.23,138,1770624000\";\n d=\"scan'208\";a=\"78974106\"","E=Sophos;i=\"6.23,138,1770624000\";\n d=\"scan'208\";a=\"247970109\""],"X-ExtLoop1":"1","Date":"Tue, 24 Mar 2026 16:10:42 +0200","From":"Andy Shevchenko ","To":"Marcus Folkesson ","Cc":"Wolfram Sang ,\n\tPeter Rosin ,\n\tMichael Hennerich ,\n\tBartosz Golaszewski ,\n\tAndi Shyti ,\n\tBartosz Golaszewski , linux-i2c@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org","Subject":"Re: [PATCH v9 2/5] i2c: mux: add support for per channel bus\n frequency","Message-ID":"","References":"<20260324-i2c-mux-v9-0-5292b0608243@gmail.com>\n <20260324-i2c-mux-v9-2-5292b0608243@gmail.com>","Precedence":"bulk","X-Mailing-List":"linux-i2c@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20260324-i2c-mux-v9-2-5292b0608243@gmail.com>","Organization":"Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6\n krs, Bertel Jungin Aukio 5, 02600 Espoo"}},{"id":3669662,"web_url":"http://patchwork.ozlabs.org/comment/3669662/","msgid":"","list_archive_url":null,"date":"2026-03-26T11:39:23","subject":"Re: [PATCH v9 2/5] i2c: mux: add support for per channel bus\n frequency","submitter":{"id":46679,"url":"http://patchwork.ozlabs.org/api/people/46679/","name":"Marcus Folkesson","email":"marcus.folkesson@gmail.com"},"content":"On Tue, Mar 24, 2026 at 04:10:42PM +0200, Andy Shevchenko wrote:\n\n[...]\n> \n> ...\n> \n> > +\t\tof_property_read_u32(child, \"clock-frequency\", &priv->adap.clock_hz);\n> \n> Wondering if we may use existing API to get i2c timings from fw description?\n> i2c_parse_fw_timings() (it might be that it needs to be split for pure fwnode\n> one and device wrapped).\n\nI like the idea, even if I don't see that many other parts of the\nkernel will be using it.\n\nAfter this patchset, I intend to make all other bus drivers use\ni2c_parse_fw_timings() for fetching their clock frequency. I will\ninvestigate the splitup in the scope of that series.\n\n> \n> -- \n> With Best Regards,\n> Andy Shevchenko\n> \n\nBest regards,\nMarcus Folkesson","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-i2c@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=FxlPVJc2;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.234.253.10; helo=sea.lore.kernel.org;\n envelope-from=linux-i2c+bounces-16798-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com\n header.b=\"FxlPVJc2\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=209.85.167.49","smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=gmail.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=gmail.com"],"Received":["from sea.lore.kernel.org (sea.lore.kernel.org [172.234.253.10])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fhMRL03kjz1yGD\n\tfor ; Thu, 26 Mar 2026 22:45:49 +1100 (AEDT)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sea.lore.kernel.org (Postfix) with ESMTP id BE148308F3F1\n\tfor ; Thu, 26 Mar 2026 11:39:43 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 6A9883EB806;\n\tThu, 26 Mar 2026 11:39:39 +0000 (UTC)","from mail-lf1-f49.google.com (mail-lf1-f49.google.com\n [209.85.167.49])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id AF0893ECBDA\n\tfor ; Thu, 26 Mar 2026 11:39:30 +0000 (UTC)","by mail-lf1-f49.google.com with SMTP id\n 2adb3069b0e04-5a12c310e8aso1038217e87.3\n for ; Thu, 26 Mar 2026 04:39:30 -0700 (PDT)","from gmail.com (83-233-6-197.cust.bredband2.com. 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