[{"id":3584534,"web_url":"http://patchwork.ozlabs.org/comment/3584534/","msgid":"<175847725338.4354.4145979844570539358@lazor>","list_archive_url":null,"date":"2025-09-21T17:54:13","subject":"Re: [PATCH v3 06/11] clk: tegra: remove EMC to MC clock mux in\n Tegra114","submitter":{"id":73546,"url":"http://patchwork.ozlabs.org/api/people/73546/","name":"Stephen Boyd","email":"sboyd@kernel.org"},"content":"Quoting Svyatoslav Ryhel (2025-09-15 01:01:52)\n> diff --git a/drivers/clk/tegra/clk-tegra114.c b/drivers/clk/tegra/clk-tegra114.c\n> index 8bde72aa5e68..6b3a140772c2 100644\n> --- a/drivers/clk/tegra/clk-tegra114.c\n> +++ b/drivers/clk/tegra/clk-tegra114.c\n> @@ -1321,6 +1309,28 @@ static int tegra114_reset_deassert(unsigned long id)\n>         return 0;\n>  }\n>  \n> +#ifdef CONFIG_TEGRA124_CLK_EMC\n> +static struct clk *tegra114_clk_src_onecell_get(struct of_phandle_args *clkspec,\n> +                                               void *data)\n> +{\n> +       struct clk_hw *hw;\n> +       struct clk *clk;\n> +\n> +       clk = of_clk_src_onecell_get(clkspec, data);\n> +       if (IS_ERR(clk))\n> +               return clk;\n> +\n> +       hw = __clk_get_hw(clk);\n\nCan you just use of_clk_hw_onecell_get() instead? Then we don't need to\nuse __clk_get_hw(). Or is this whole function used to return a clk\npointer to something that isn't the clk framework?\n\n> +\n> +       if (clkspec->args[0] == TEGRA114_CLK_EMC) {\n> +               if (!tegra124_clk_emc_driver_available(hw))\n> +                       return ERR_PTR(-EPROBE_DEFER);\n> +       }\n> +\n> +       return clk;","headers":{"Return-Path":"\n <linux-tegra+bounces-9380-incoming=patchwork.ozlabs.org@vger.kernel.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-tegra@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=dN9EP4k7;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=139.178.88.99; helo=sv.mirrors.kernel.org;\n envelope-from=linux-tegra+bounces-9380-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=\"dN9EP4k7\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=10.30.226.201"],"Received":["from sv.mirrors.kernel.org (sv.mirrors.kernel.org [139.178.88.99])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4cVDQM32g2z1y1p\n\tfor <incoming@patchwork.ozlabs.org>; Mon, 22 Sep 2025 03:54:19 +1000 (AEST)","from smtp.subspace.kernel.org (relay.kernel.org [52.25.139.140])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby sv.mirrors.kernel.org (Postfix) with ESMTPS id 043C93B71DA\n\tfor <incoming@patchwork.ozlabs.org>; Sun, 21 Sep 2025 17:54:18 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 0AEE8274669;\n\tSun, 21 Sep 2025 17:54:16 +0000 (UTC)","from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org\n [10.30.226.201])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id A30122AE6A;\n\tSun, 21 Sep 2025 17:54:15 +0000 (UTC)","by smtp.kernel.org (Postfix) with ESMTPSA id D94BDC4CEE7;\n\tSun, 21 Sep 2025 17:54:14 +0000 (UTC)"],"ARC-Seal":"i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1758477255; cv=none;\n b=EVL4u0/U+EDIXd73QteSmZ9ZvL/u/5dcxCglyGWsAlaphSQvulpq2M7ta/KvPar6Q3LBdngVPB9x8bG/A4ysse4QlZyDaRiZFcKqI5ImR01IJa2KOWESOd0oxRHf8/fPlSzsxuAdsFmooSNrqMJh9UmJ3zIlyhhrgs1OEJVFy5U=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1758477255; c=relaxed/simple;\n\tbh=ypzo+3PMu9bLzVVOUbp8LKYZ7ZW06X9TJgzOBqby/8g=;\n\th=Content-Type:MIME-Version:In-Reply-To:References:Subject:From:Cc:\n\t To:Date:Message-ID;\n b=jbbrDtI/o+1ytNXvTKtOGcDjYmJwDycFgYJuvELuybtYAL/l2kV0BRMvQlLGdIUbiSErESe75RtWyKmOMZcywqGYW59/S9vCOq8JQ2GYnjA36GFe5PBH+UqbCXp4nidbYzo9lDe+yJpp9qC7DPNDHwV8ucFA05/s5TMs9rp+GZA=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=dN9EP4k7; arc=none smtp.client-ip=10.30.226.201","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n\ts=k20201202; t=1758477255;\n\tbh=ypzo+3PMu9bLzVVOUbp8LKYZ7ZW06X9TJgzOBqby/8g=;\n\th=In-Reply-To:References:Subject:From:Cc:To:Date:From;\n\tb=dN9EP4k7trHibwCBzzsM5veaTrH/dC46AzdFdMJxejZ0CV7NFya1PlK9k2f2XyZZJ\n\t fJ4CVcifA1piF6s5izpji5JiuljVxrDNagoAdmgXOo59QMS+xGapjHZytK37J7t7uh\n\t sMdkt5rj5djJhVMEpvwxScYO5KxNxmei4ADIrdHSmc9PbWEme8pnnd0UXLEWJPEHVQ\n\t d+523Yz1Xz0T7YCPct3W/+aDi81G3x/fDAEBZjOB8modZt5DOTy6XvgPDsDjZ8+G/b\n\t nBxd/88YbYKmdMKDPMigyhLfbQBC0EXuRNr6Jn1zNiCqBp5QtXBTpqvIVDtrpkdxDZ\n\t 1xh2xEgAWsxVA==","Content-Type":"text/plain; charset=\"utf-8\"","Precedence":"bulk","X-Mailing-List":"linux-tegra@vger.kernel.org","List-Id":"<linux-tegra.vger.kernel.org>","List-Subscribe":"<mailto:linux-tegra+subscribe@vger.kernel.org>","List-Unsubscribe":"<mailto:linux-tegra+unsubscribe@vger.kernel.org>","MIME-Version":"1.0","Content-Transfer-Encoding":"quoted-printable","In-Reply-To":"<20250915080157.28195-7-clamor95@gmail.com>","References":"<20250915080157.28195-1-clamor95@gmail.com>\n <20250915080157.28195-7-clamor95@gmail.com>","Subject":"Re: [PATCH v3 06/11] clk: tegra: remove EMC to MC clock mux in\n Tegra114","From":"Stephen Boyd <sboyd@kernel.org>","Cc":"linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,\n linux-tegra@vger.kernel.org, linux-clk@vger.kernel.org,\n linux-pm@vger.kernel.org","To":"Chanwoo Choi <cw00.choi@samsung.com>, Conor Dooley <conor+dt@kernel.org>,\n Dmitry Osipenko <digetx@gmail.com>, Jonathan Hunter <jonathanh@nvidia.com>,\n Krzysztof Kozlowski <krzk@kernel.org>,\n Kyungmin Park <kyungmin.park@samsung.com>,\n Michael Turquette <mturquette@baylibre.com>,\n Mikko Perttunen <mperttunen@nvidia.com>,\n MyungJoo Ham <myungjoo.ham@samsung.com>,\n Prashant Gaikwad <pgaikwad@nvidia.com>, Rob Herring <robh@kernel.org>,\n Svyatoslav Ryhel <clamor95@gmail.com>,\n Thierry Reding <thierry.reding@gmail.com>,\n Thierry Reding <treding@nvidia.com>","Date":"Sun, 21 Sep 2025 10:54:13 -0700","Message-ID":"<175847725338.4354.4145979844570539358@lazor>","User-Agent":"alot/0.11"}},{"id":3614519,"web_url":"http://patchwork.ozlabs.org/comment/3614519/","msgid":"<6112196.aeNJFYEL58@senjougahara>","list_archive_url":null,"date":"2025-11-13T05:05:21","subject":"\n Re: [PATCH v3 06/11] clk: tegra: remove EMC to MC clock mux in Tegra114","submitter":{"id":26499,"url":"http://patchwork.ozlabs.org/api/people/26499/","name":"Mikko Perttunen","email":"mperttunen@nvidia.com"},"content":"On Monday, September 15, 2025 5:01 PM Svyatoslav Ryhel wrote:\n> Configure EMC without mux for correct EMC driver support.\n\nRather than just 'removing EMC to MC clock mux in Tegra114', I would say this patch removes current emc and emc_mux clocks and replaces them with the proper EMC clock implementation. I would edit the commit subject and commit message along those lines.\n\n> \n> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>\n> ---\n>  drivers/clk/tegra/clk-tegra114.c | 48 ++++++++++++++++++++++----------\n>  1 file changed, 33 insertions(+), 15 deletions(-)\n> \n> diff --git a/drivers/clk/tegra/clk-tegra114.c b/drivers/clk/tegra/clk-tegra114.c\n> index 8bde72aa5e68..6b3a140772c2 100644\n> --- a/drivers/clk/tegra/clk-tegra114.c\n> +++ b/drivers/clk/tegra/clk-tegra114.c\n> @@ -622,10 +622,6 @@ static const char *mux_plld_out0_plld2_out0[] = {\n>  };\n>  #define mux_plld_out0_plld2_out0_idx NULL\n>  \n> -static const char *mux_pllmcp_clkm[] = {\n> -\t\"pll_m_out0\", \"pll_c_out0\", \"pll_p_out0\", \"clk_m\", \"pll_m_ud\",\n> -};\n> -\n>  static const struct clk_div_table pll_re_div_table[] = {\n>  \t{ .val = 0, .div = 1 },\n>  \t{ .val = 1, .div = 2 },\n> @@ -672,7 +668,6 @@ static struct tegra_clk tegra114_clks[tegra_clk_max] __initdata = {\n>  \t[tegra_clk_csi] = { .dt_id = TEGRA114_CLK_CSI, .present = true },\n>  \t[tegra_clk_i2c2] = { .dt_id = TEGRA114_CLK_I2C2, .present = true },\n>  \t[tegra_clk_uartc] = { .dt_id = TEGRA114_CLK_UARTC, .present = true },\n> -\t[tegra_clk_emc] = { .dt_id = TEGRA114_CLK_EMC, .present = true },\n>  \t[tegra_clk_usb2] = { .dt_id = TEGRA114_CLK_USB2, .present = true },\n>  \t[tegra_clk_usb3] = { .dt_id = TEGRA114_CLK_USB3, .present = true },\n>  \t[tegra_clk_vde_8] = { .dt_id = TEGRA114_CLK_VDE, .present = true },\n> @@ -1048,14 +1043,7 @@ static __init void tegra114_periph_clk_init(void __iomem *clk_base,\n>  \t\t\t\t\t     0, 82, periph_clk_enb_refcnt);\n>  \tclks[TEGRA114_CLK_DSIB] = clk;\n>  \n> -\t/* emc mux */\n> -\tclk = clk_register_mux(NULL, \"emc_mux\", mux_pllmcp_clkm,\n> -\t\t\t       ARRAY_SIZE(mux_pllmcp_clkm),\n> -\t\t\t       CLK_SET_RATE_NO_REPARENT,\n> -\t\t\t       clk_base + CLK_SOURCE_EMC,\n> -\t\t\t       29, 3, 0, &emc_lock);\n> -\n> -\tclk = tegra_clk_register_mc(\"mc\", \"emc_mux\", clk_base + CLK_SOURCE_EMC,\n> +\tclk = tegra_clk_register_mc(\"mc\", \"emc\", clk_base + CLK_SOURCE_EMC,\n>  \t\t\t\t    &emc_lock);\n>  \tclks[TEGRA114_CLK_MC] = clk;\n>  \n> @@ -1321,6 +1309,28 @@ static int tegra114_reset_deassert(unsigned long id)\n>  \treturn 0;\n>  }\n>  \n> +#ifdef CONFIG_TEGRA124_CLK_EMC\n> +static struct clk *tegra114_clk_src_onecell_get(struct of_phandle_args *clkspec,\n> +\t\t\t\t\t\tvoid *data)\n> +{\n> +\tstruct clk_hw *hw;\n> +\tstruct clk *clk;\n> +\n> +\tclk = of_clk_src_onecell_get(clkspec, data);\n> +\tif (IS_ERR(clk))\n> +\t\treturn clk;\n> +\n> +\thw = __clk_get_hw(clk);\n> +\n> +\tif (clkspec->args[0] == TEGRA114_CLK_EMC) {\n> +\t\tif (!tegra124_clk_emc_driver_available(hw))\n> +\t\t\treturn ERR_PTR(-EPROBE_DEFER);\n> +\t}\n> +\n> +\treturn clk;\n> +}\n> +#endif\n> +\n>  static void __init tegra114_clock_init(struct device_node *np)\n>  {\n>  \tstruct device_node *node;\n> @@ -1362,16 +1372,24 @@ static void __init tegra114_clock_init(struct device_node *np)\n>  \ttegra_audio_clk_init(clk_base, pmc_base, tegra114_clks,\n>  \t\t\t     tegra114_audio_plls,\n>  \t\t\t     ARRAY_SIZE(tegra114_audio_plls), 24000000);\n> +\n> +\ttegra_clk_apply_init_table = tegra114_clock_apply_init_table;\n> +\n\nIs there any particular reason for moving this here? If not, omitting the change would simplify the patch a bit.\n\n>  \ttegra_super_clk_gen4_init(clk_base, pmc_base, tegra114_clks,\n>  \t\t\t\t\t&pll_x_params);\n>  \n>  \ttegra_init_special_resets(1, tegra114_reset_assert,\n>  \t\t\t\t  tegra114_reset_deassert);\n>  \n> +#ifdef CONFIG_TEGRA124_CLK_EMC\n> +\ttegra_add_of_provider(np, tegra114_clk_src_onecell_get);\n> +\tclks[TEGRA114_CLK_EMC] = tegra124_clk_register_emc(clk_base, np,\n> +\t\t\t\t\t\t\t   &emc_lock);\n> +#else\n>  \ttegra_add_of_provider(np, of_clk_src_onecell_get);\n> -\ttegra_register_devclks(devclks, ARRAY_SIZE(devclks));\n> +#endif\n\ntegra124_clk_register_emc and tegra124_clk_emc_driver_available have stub implementations when CONFIG_TEGRA124_CLK_EMC is not enabled, so it would be cleaner to just call them always.\n\n>  \n> -\ttegra_clk_apply_init_table = tegra114_clock_apply_init_table;\n> +\ttegra_register_devclks(devclks, ARRAY_SIZE(devclks));\n>  \n>  \ttegra_cpu_car_ops = &tegra114_cpu_car_ops;\n>  }\n>","headers":{"Return-Path":"\n <linux-tegra+bounces-10400-incoming=patchwork.ozlabs.org@vger.kernel.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-tegra@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=Nvidia.com header.i=@Nvidia.com header.a=rsa-sha256\n header.s=selector2 header.b=gSCfUDcn;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2605:f480:58:1:0:1994:3:14; helo=dfw.mirrors.kernel.org;\n envelope-from=linux-tegra+bounces-10400-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com\n header.b=\"gSCfUDcn\"","smtp.subspace.kernel.org;\n arc=fail smtp.client-ip=52.101.46.44","smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=nvidia.com","smtp.subspace.kernel.org;\n spf=fail smtp.mailfrom=nvidia.com","dkim=none (message not signed)\n header.d=none;dmarc=none action=none header.from=nvidia.com;"],"Received":["from dfw.mirrors.kernel.org (dfw.mirrors.kernel.org\n [IPv6:2605:f480:58:1:0:1994:3:14])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4d6Srq6X70z1yKf\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 13 Nov 2025 16:05:31 +1100 (AEDT)","from smtp.subspace.kernel.org (relay.kernel.org [52.25.139.140])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby dfw.mirrors.kernel.org (Postfix) with ESMTPS id 2B5B84E17A5\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 13 Nov 2025 05:05:29 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 37FC12C0F71;\n\tThu, 13 Nov 2025 05:05:28 +0000 (UTC)","from CO1PR03CU002.outbound.protection.outlook.com\n (mail-westus2azon11010044.outbound.protection.outlook.com [52.101.46.44])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 6644E35CBC3;\n\tThu, 13 Nov 2025 05:05:26 +0000 (UTC)","from DM4PR12MB6494.namprd12.prod.outlook.com (2603:10b6:8:ba::19) by\n LV9PR12MB9831.namprd12.prod.outlook.com (2603:10b6:408:2e7::8) with Microsoft\n SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.20.9298.16; Thu, 13 Nov 2025 05:05:24 +0000","from DM4PR12MB6494.namprd12.prod.outlook.com\n ([fe80::346b:2daf:d648:2e11]) by DM4PR12MB6494.namprd12.prod.outlook.com\n ([fe80::346b:2daf:d648:2e11%6]) with mapi id 15.20.9298.015; Thu, 13 Nov 2025\n 05:05:24 +0000"],"ARC-Seal":["i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1763010328; cv=fail;\n b=qK+oLTLsnGJt9tya2vj04wFedln3/fIVPytFn0bjIvDXCsr1gwk+hqZ1HGZB1xFsDVaDdnzFnn3d0kjmBpijpoCEeJsvVAmsHHJiN7UO4sXIf8EWliNLt2w2DwvzESSXkzPfpdo+jziQzCCzqdjyUuPU7Xq556dRVEMExIPkB6c=","i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none;\n b=UjTEConIyR7/+3gxPgauIdyKvt1rTUbgX4BdZ08KevqrmdId53T9ejcE8HmuSSYjvZFU8ejW8xRXgukKC5v5vLBSecPkpdIH8hUpdoUcwqZockpmehTuci2BdBXrj1lynYMx5YCj8+4PPPCWaSfIyeec1d5VBUA9LsDB4JrFf4QbRMGpDxOja4aF3MKTshEV5c5U/G00JYNJ52sl9ofBRZD5VFwJsftoanxgAcLieOGSIVhaIC+kQDPljKGLIEgP0hUa9J2jeFymLikWhYubjCswORWmVds0SPBXjqi+MtZK6ePK5rZjaaxT12KmC55fLAAqQdzhUkimR0eYWWsneg=="],"ARC-Message-Signature":["i=2; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1763010328; c=relaxed/simple;\n\tbh=DQ0SuFa21exJVFVe8l+1CuA7S0xSE7otryqs8Xa1f5Y=;\n\th=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:\n\t Content-Type:MIME-Version;\n b=sOlocUgLdD7nJXvM6yznOYozieWYE/eCSyak1iEteimsQkpZIoq/ifyD34gJV2h/GfHn+WJsWCCVcI9n+XgWrTwpi3p6xThI2uTGe8fa4hj4h+upVx20Mq0h/US/fikFadWQMPWdtJ1Q+3F3x2+e4RT5AbppSTvpAYIbFwetiSY=","i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n s=arcselector10001;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;\n bh=pfigttYfUV0Low99waBmevRWY/1LoxZavJtViP/dpAQ=;\n b=tGPudqLBB3k8WXMwN35wBS9EwOKzUr+2Vc6EqlI8EQTUQADScsM3vXmreOj3caM6zueQEUf/smlvi5gO97SJSZM4+Mnt4bPpX+Vbxt8GX9H76D0xlyJ3iH6UD18kjDWWOT+iBLg6cFVnZ2ghM+TaL6JKrBqykyxH0Mv0eU1pWG15DAfJnVBwPMMCjrypIQm+WqljG7ggAAq5giX4B0ud1oN3sOk2/N1GEYQ2NUq18CLmqPUqCCIW54/WM5MwdZ6GPwbQyuhc1a8RHFITxKH+9uc1mvsB2DgP/J6Atl8Fpyw4x3ukQcx9anhswLleHWl58N/V48tLuLF+9Dgl3+WTwA=="],"ARC-Authentication-Results":["i=2; smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=nvidia.com;\n spf=fail smtp.mailfrom=nvidia.com;\n dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com\n header.b=gSCfUDcn; arc=fail smtp.client-ip=52.101.46.44","i=1; mx.microsoft.com 1; spf=pass\n smtp.mailfrom=nvidia.com; dmarc=pass action=none header.from=nvidia.com;\n dkim=pass header.d=nvidia.com; arc=none"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com;\n s=selector2;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=pfigttYfUV0Low99waBmevRWY/1LoxZavJtViP/dpAQ=;\n b=gSCfUDcnwT4jqodxv734LqDbKpVW4Pk9npXrqUo87nlzPzyalo6PQDG0sq3G0lVm1MN7Ndoq+V79i3r+ZJhuC08YLPs1A/luWLgvFEmj48/7q8Jw6rRgU2JfMkv5fSl37kyUid3ogjdfv3RNonzgh00Ogye9M6ckI2uZmJ8HNjSvMrPe2eP3/UmocljKEUZ9nhc9pQ8nPOPI3/Yiy2JflrJugektYMKYzlFsPbNMchNNI3Sq/afTS70MNicDu0HR/jCx6KtdlgL+3CDoDilPBAKYROMPDGqOgMk3DhjMfjbalmcwDj/GvqsjVpiFszB4573HmRfcna5WnwEa2IzuSg==","From":"Mikko Perttunen <mperttunen@nvidia.com>","To":"Krzysztof Kozlowski <krzk@kernel.org>, Rob Herring <robh@kernel.org>,\n Conor Dooley <conor+dt@kernel.org>, Thierry Reding <treding@nvidia.com>,\n Thierry Reding <thierry.reding@gmail.com>,\n Jonathan Hunter <jonathanh@nvidia.com>,\n Prashant Gaikwad <pgaikwad@nvidia.com>,\n Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>,\n Dmitry Osipenko <digetx@gmail.com>, MyungJoo Ham <myungjoo.ham@samsung.com>,\n Kyungmin Park <kyungmin.park@samsung.com>,\n Chanwoo Choi <cw00.choi@samsung.com>, Svyatoslav Ryhel <clamor95@gmail.com>,\n Svyatoslav Ryhel <clamor95@gmail.com>","Cc":"linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,\n linux-tegra@vger.kernel.org, linux-clk@vger.kernel.org,\n linux-pm@vger.kernel.org","Subject":"\n Re: [PATCH v3 06/11] clk: tegra: remove EMC to MC clock mux in Tegra114","Date":"Thu, 13 Nov 2025 14:05:21 +0900","Message-ID":"<6112196.aeNJFYEL58@senjougahara>","In-Reply-To":"<20250915080157.28195-7-clamor95@gmail.com>","References":"\n <20250915080157.28195-1-clamor95@gmail.com>\n <20250915080157.28195-7-clamor95@gmail.com>","Content-Transfer-Encoding":"quoted-printable","Content-Type":"text/plain; charset=\"utf-8\"","X-ClientProxiedBy":"TYCP286CA0316.JPNP286.PROD.OUTLOOK.COM\n (2603:1096:400:3b7::9) To DM4PR12MB6494.namprd12.prod.outlook.com\n (2603:10b6:8:ba::19)","Precedence":"bulk","X-Mailing-List":"linux-tegra@vger.kernel.org","List-Id":"<linux-tegra.vger.kernel.org>","List-Subscribe":"<mailto:linux-tegra+subscribe@vger.kernel.org>","List-Unsubscribe":"<mailto:linux-tegra+unsubscribe@vger.kernel.org>","MIME-Version":"1.0","X-MS-PublicTrafficType":"Email","X-MS-TrafficTypeDiagnostic":"DM4PR12MB6494:EE_|LV9PR12MB9831:EE_","X-MS-Office365-Filtering-Correlation-Id":"c9005c09-c588-45c8-f979-08de227240b3","X-MS-Exchange-SenderADCheck":"1","X-MS-Exchange-AntiSpam-Relay":"0","X-Microsoft-Antispam":"\n\tBCL:0;ARA:13230040|376014|10070799003|7416014|1800799024|366016|921020;","X-Microsoft-Antispam-Message-Info":"=?utf-8?q?Wu2Udkh07GextN4AZ3AQZClkrzahEVQ?=\n\t=?utf-8?q?Rgf1wJK3LzyrWxLs3M7GvWSZrJk9kp3K5EL+OxM3r+SiVpzHgeuY4KORAThmTX3jz?=\n\t=?utf-8?q?FYo3rDJ+Sq7NQIde+cXjJra+uLaFA+uw6gQceOTB1nR4RDQIN+ObgjatVcwmyMP6e?=\n\t=?utf-8?q?dzZjb/wI3pP6OpEWAGoh8DQk6EzbIjZRM++JkQ2J4VbUvCo1yF1QgRFyFzW69wXKS?=\n\t=?utf-8?q?9rTDyGknHlihP5XxmQonMdx84vlSAxGCK1F1Xu3892mquAHnkX8XmDC9r2E2zEPuC?=\n\t=?utf-8?q?SLGpvh1aMrk+2I99uy9ulCEDTxGIzB0gfxptHT2xyggCNqLWmrszLd2AbqWb99udp?=\n\t=?utf-8?q?NSsUTcRPEyADi1uiDVQ20dgPPgex3g9DNVnuYLMdI/KPaVvfyF57T72Vdw+zY4kCl?=\n\t=?utf-8?q?xHnLTaUTufZ566WwdWkyeqevJD1KlwQuNVpnZol6hzhN7voOwq0sdJ0jVcBWACj4M?=\n\t=?utf-8?q?T8coGNLrwhtta19oHr+UhhxKD/Wt5+C3cWuWaKl8a3Lvbej2CV/fgUBKcIjOKXkak?=\n\t=?utf-8?q?0oKdqwwHLFC6qyegkuv2i3SHRzeKfpgjhx5EAUyOZ5zWANQHaul3duRJ3h6S/aoVL?=\n\t=?utf-8?q?TrHWVWVoMcjy5pluz4TFXi6u7Kv7K+BhviToc25QSHYHpL6RmnpG5fIj8bFnSuDdN?=\n\t=?utf-8?q?xq5X6rY+eYgFLpA9atuBS0oi/ZX/8YlTv57CrmD5oNSuwl2UdXtAxLdrBPNvbBhJA?=\n\t=?utf-8?q?7Ciir28gH4KGIipKIophfjqk26jKb8NZ8K9yYdGIpvxftRxcJGUM+NdP/tUKFWnwm?=\n\t=?utf-8?q?phXl4HJciD2biPNXgbYDRfc/rpPM6E9M84EmU4Jk5p36RTCHwYccskJybbdXi54Br?=\n\t=?utf-8?q?14/SjJcffPfQcUYgyrGRTxUoKK7xA9Yh4z821EQFXTBhiMd78E6GDLj/bLMRI6iBo?=\n\t=?utf-8?q?zOnOZKRzshi1ZYrfvuvzcC4muTYNdpaSrw+QqT72KW+yKcCxhCscDMobZ4wZCD3xN?=\n\t=?utf-8?q?wdKcbA0/mmMogpNYFK+i432oNSriOG2ipa5K8T5YLFoWGei+6S3CwYKNEe9AYtnfP?=\n\t=?utf-8?q?QTlDkv3u0zWJN/XVDdt0yFqWRd9bjbwPvNHW7xt/2PmVQeG3aQtpfAck2aNF3Fh/7?=\n\t=?utf-8?q?Cp+EBeyK1NA0YaX3QPD3CanuOtj8uWVkvF01BLSQ9OOkjcGSwih+A6uPNFKo0x1i8?=\n\t=?utf-8?q?+vTKH1zJr3joX/FleJWqBG18zXcyG4Lq1oZ3VsrHw9bAKzQF55GhuPc7nuovnsXo3?=\n\t=?utf-8?q?Ne8MrZbqJhXyJrAlVBlh8BnU9KsClwYxwvir1I9GjOKvYnZWGo+QBnJAButVxUZHP?=\n\t=?utf-8?q?42NRFsMNBQpHOyHY6Q+T1+OLc/rz9hWKc+2VPrivlCWH2wQTlev5dtwA0pHIbjFdJ?=\n\t=?utf-8?q?UlInbfvRRP/9uE+hxeEMzUu8/yTveDNZWRWy6bVrsnbaFJa+/ns3rGttjnlSY/vsB?=\n\t=?utf-8?q?YYTe87ommEvb4UpNqfTbF/Sym+JTAHlFV2DlFWljoh59dj3XfaqnFc=3D?=","X-Forefront-Antispam-Report":"\n\tCIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DM4PR12MB6494.namprd12.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(376014)(10070799003)(7416014)(1800799024)(366016)(921020);DIR:OUT;SFP:1101;","X-MS-Exchange-AntiSpam-MessageData-ChunkCount":"1","X-MS-Exchange-AntiSpam-MessageData-0":"=?utf-8?q?WU+bceVfEJPSva7r2D3FR2ml7cyz?=\n\t=?utf-8?q?c8Cg9aG1nZzufGzlU10qn8KUGRiPhWK/8lAHW0p5ttk80vIHKupQBMwxtJ7L4I/g6?=\n\t=?utf-8?q?Xss3+jkIN+unNsZG+ZTcZxj88QrDW4gzA9Fzmw4EQ+pkIMKWv9lrWePBkDN8o/zbk?=\n\t=?utf-8?q?5XaWywpGNI5+7J3RlQupMWcvCVMyemsISjQ8AC0yOg9qQqE+blTrQggjaiUnxt6Dx?=\n\t=?utf-8?q?ZmZ/GBHGkBP8FZ9pT4SzOea0vUCUFwaWVaubHTs9RnEg06d1mvqEhUOI1nzAsyKIW?=\n\t=?utf-8?q?/ndkQhZ2jodqrw5u+D0HhVwFWTyqXHFIqphcTJBwjJYHi8IG3JezikgtMyLpD/g8k?=\n\t=?utf-8?q?TK0TKt7a2cIgCXbCJuGvsd/ioOAfizBN+gRFwf1C/sNN2qlWVklcdwDwH3FISi3c/?=\n\t=?utf-8?q?AW7zTmlthn7UZNUGxff/Iha+FRqfy0+EOabUZh0I3xCKtzbg6VajnscJ8BfaRtwYV?=\n\t=?utf-8?q?kVzXJ/sOg2hudUPotNyjDzHy4ICW1hW+GR6IPjQdr7Coy0k+35Ogv+EvmJvRZ9Kf1?=\n\t=?utf-8?q?CIiETt6BLe8PuTINJ5TRRpY31F7mPpxTpJ/HklHxE3O4zYJij+4cu26V6uSn29CKQ?=\n\t=?utf-8?q?iLtNBxfEodixvLd2Acr71jpEh6M5pYMhiYpNMwieVH06ZemP1PBPb/zEwZhQa5kak?=\n\t=?utf-8?q?KMX0TpKCe79nFiKsbW2sDG2Q2kFwsR8mwPCaAe2ASIEEuERK+O0F2zYSNCRdOcG/w?=\n\t=?utf-8?q?4OvdNwQoB9RGncc7FvypMBqitc9mfBGZwyXEyM3I8myNiyXbZAiI1AT8lxpmktRnv?=\n\t=?utf-8?q?s4yJctMso2cFcmb78UMmSABL3YBMYc9zr/3K3efBU+V9BJjyT2KiXqwX+qBbK2cud?=\n\t=?utf-8?q?p7ZZphXTJXc9STRN73BJvi58WjIvX7yy1PXQa0ALWN7/CLXjWPqiLb6unancX4qsJ?=\n\t=?utf-8?q?WWlqowO6tXK+Sr6zkYKk8KvwLMKJad0VnJn9YdxduZ1i6/hAq0CxEV2nPL9rKrq49?=\n\t=?utf-8?q?62uBGC2LmQcW8VmQXNqEKaQFTEjurzhS60sVNdfm/itJjCanPmSaqdh2FWIws0WeI?=\n\t=?utf-8?q?GyHFrrBsROnIy131HLtUilCoqmldybTWccDTz3aKZcOBzQysUyEj4TUqAX7s8lFOm?=\n\t=?utf-8?q?MI/b3ViNpjqLRfDsWJIZvh9ycjhRKlPoP9ZnH94GRJFJV2XyRL4ZKhZpSAMbCMXhW?=\n\t=?utf-8?q?ycaROVdyfZ7NSYlYqd4+txs58nAbgzmpRGaDB8btjohUEN+e0O2SbwDsG6H5F3V2Y?=\n\t=?utf-8?q?P0cz4tVxXo34TEIoe+JQV9vI9JwZS30+So9Z8kFm8S44uCSGp7XoZiwgooMi81Ubo?=\n\t=?utf-8?q?POm7wHs+uFc/BcN6GBdS8DHCZe1gvzuXp9WOcycaxu1RIPP7IdfL7eJbtb7WQLkiB?=\n\t=?utf-8?q?x1+wsR46DrSgK9/ZOE/opYpjG4pHoD9btwgCbuAa/5Ns9wPfQf8vv/GrPn22uW48g?=\n\t=?utf-8?q?G12BvdWfEtKu1ncfSVaBmR2BXiTGNFdRf1EPSNH/k6o/YsJ/9LG1vDdcyWPWKOrnq?=\n\t=?utf-8?q?mvEaSWYhxH55+y59DEy+K6VBm0M5C1zKzqfybJjPn21h1qONdPpmr0R5uYu7mdQ2V?=\n\t=?utf-8?q?/f0lmZEKeuRgv8DyC1Fyto6zvunvKrCr3auesx35nBhQR7nsOW9KaSu/dSFovX4b+?=\n\t=?utf-8?q?aeGk9JiXiFAkM0ELaP6r/GOHsQ+0CVInA=3D=3D?=","X-OriginatorOrg":"Nvidia.com","X-MS-Exchange-CrossTenant-Network-Message-Id":"\n c9005c09-c588-45c8-f979-08de227240b3","X-MS-Exchange-CrossTenant-AuthSource":"DM4PR12MB6494.namprd12.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Internal","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"13 Nov 2025 05:05:24.2145\n (UTC)","X-MS-Exchange-CrossTenant-FromEntityHeader":"Hosted","X-MS-Exchange-CrossTenant-Id":"43083d15-7273-40c1-b7db-39efd9ccc17a","X-MS-Exchange-CrossTenant-MailboxType":"HOSTED","X-MS-Exchange-CrossTenant-UserPrincipalName":"\n unjMhUJO6SgN73XyeDmqzMvlE8GfbCy66uNEiQ2FKilVfiHLm6Ern6ySBfCa7193651EwsbvBAqAZTu0LtW+uw==","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"LV9PR12MB9831"}},{"id":3614779,"web_url":"http://patchwork.ozlabs.org/comment/3614779/","msgid":"<CAPVz0n2gUT5aOT3S05Up+vAiMBf5jmthRV_7z_fpj9RsPWEg_w@mail.gmail.com>","list_archive_url":null,"date":"2025-11-13T14:21:24","subject":"Re: [PATCH v3 06/11] clk: tegra: remove EMC to MC clock mux in\n Tegra114","submitter":{"id":84146,"url":"http://patchwork.ozlabs.org/api/people/84146/","name":"Svyatoslav Ryhel","email":"clamor95@gmail.com"},"content":"нд, 21 вер. 2025 р. о 20:54 Stephen Boyd <sboyd@kernel.org> пише:\n>\n> Quoting Svyatoslav Ryhel (2025-09-15 01:01:52)\n> > diff --git a/drivers/clk/tegra/clk-tegra114.c b/drivers/clk/tegra/clk-tegra114.c\n> > index 8bde72aa5e68..6b3a140772c2 100644\n> > --- a/drivers/clk/tegra/clk-tegra114.c\n> > +++ b/drivers/clk/tegra/clk-tegra114.c\n> > @@ -1321,6 +1309,28 @@ static int tegra114_reset_deassert(unsigned long id)\n> >         return 0;\n> >  }\n> >\n> > +#ifdef CONFIG_TEGRA124_CLK_EMC\n> > +static struct clk *tegra114_clk_src_onecell_get(struct of_phandle_args *clkspec,\n> > +                                               void *data)\n> > +{\n> > +       struct clk_hw *hw;\n> > +       struct clk *clk;\n> > +\n> > +       clk = of_clk_src_onecell_get(clkspec, data);\n> > +       if (IS_ERR(clk))\n> > +               return clk;\n> > +\n> > +       hw = __clk_get_hw(clk);\n>\n> Can you just use of_clk_hw_onecell_get() instead? Then we don't need to\n> use __clk_get_hw(). Or is this whole function used to return a clk\n> pointer to something that isn't the clk framework?\n>\n\nThis logic was adopted from Tegra124 driver, but of_clk_hw_onecell_get\nmight be applicable. I will adjust to use it and if all works as\nexpected, I will apply it in v4. Thank you.\n\n> > +\n> > +       if (clkspec->args[0] == TEGRA114_CLK_EMC) {\n> > +               if (!tegra124_clk_emc_driver_available(hw))\n> > +                       return ERR_PTR(-EPROBE_DEFER);\n> > +       }\n> > +\n> > +       return clk;","headers":{"Return-Path":"\n <linux-tegra+bounces-10406-incoming=patchwork.ozlabs.org@vger.kernel.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-tegra@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20230601 header.b=haoMfR6B;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=213.196.21.55; helo=ams.mirrors.kernel.org;\n envelope-from=linux-tegra+bounces-10406-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com\n header.b=\"haoMfR6B\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=209.85.221.47","smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=gmail.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=gmail.com"],"Received":["from ams.mirrors.kernel.org (ams.mirrors.kernel.org [213.196.21.55])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange X25519 server-signature ECDSA (secp384r1))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4d6jCW5LXRz1yLP\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 14 Nov 2025 01:22:31 +1100 (AEDT)","from smtp.subspace.kernel.org (relay.kernel.org [52.25.139.140])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ams.mirrors.kernel.org (Postfix) with ESMTPS id E91CF3452D0\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 13 Nov 2025 14:21:41 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 3D8262877D9;\n\tThu, 13 Nov 2025 14:21:39 +0000 (UTC)","from mail-wr1-f47.google.com (mail-wr1-f47.google.com\n [209.85.221.47])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 68BDE283FF9\n\tfor <linux-tegra@vger.kernel.org>; Thu, 13 Nov 2025 14:21:37 +0000 (UTC)","by mail-wr1-f47.google.com with SMTP id\n ffacd0b85a97d-42b387483bbso729409f8f.1\n        for <linux-tegra@vger.kernel.org>;\n Thu, 13 Nov 2025 06:21:37 -0800 (PST)"],"ARC-Seal":"i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1763043699; cv=none;\n b=oKCGoCfHHy40vVO+PzPmW6v1Ftqi7QS8T8MgCf4szTyKlePNWaJtkCbWtSpw+RabLoOtyD/Ad4ZLfpGDUjmzTJnxws5BokVSJk4mpgZtJCRaTvN4Ef17cl9b4C7CcC2XWUjHuvpac8/JSETWhyp0S8Le1mBsiYUo0T9fbQvoyC8=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1763043699; c=relaxed/simple;\n\tbh=Xe7Ea1AD5sUFo6oXsT+qD/kgt+3KXcnBspVGZoedp+I=;\n\th=MIME-Version:References:In-Reply-To:From:Date:Message-ID:Subject:\n\t To:Cc:Content-Type;\n b=GnJYXbwLqmqTtr0VEafdwz4jlBJnUAOYIUKkkwiAuFHL09w0c43N7u/73vT58Wct7Qo6JcEY4S9L/+QqQkivyWw+qzv5YLCbW6HoKAo9myIdstdFCym01KcPiY/IIbl/AthzHcqUiMpkUhfJGpxqNZGQueuZ0qFmF53iFXKr6ZI=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=gmail.com;\n spf=pass smtp.mailfrom=gmail.com;\n dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com\n header.b=haoMfR6B; arc=none smtp.client-ip=209.85.221.47","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n        d=gmail.com; s=20230601; t=1763043696; x=1763648496;\n darn=vger.kernel.org;\n        h=content-transfer-encoding:cc:to:subject:message-id:date:from\n         :in-reply-to:references:mime-version:from:to:cc:subject:date\n         :message-id:reply-to;\n        bh=PVTH3OodIWn9qSwlGdTpQLDwP01tYh5/+5JVhlUv+nY=;\n        b=haoMfR6BOBTWSk33QievBrW0k/VGkRlaKureVuWz+EWYvTVVkZkFCMS6eUUnmQYSAw\n         vR00hPMIblDxs46XHig8ocQyFTYfG0mPmuOK11AFrGYZs57O3apL4OpumSJgqFigVh36\n         lyVMQdtFw3YH4m+hcIbCk3o2FezKLi4XqOV58JZ2kJkkNQ1WX0Sif7s9Hx0Tt3siIYBg\n         jDvH4kP6ALOvxN8Y29K9hs/n8oC+sunAquEbV+d1ez384R0covO6b3Kc2mg9vhSHDpWe\n         AgdmA1cioKdK4YcHP25oSF/2Y4YsemfW6erNdywEyN0rKnW0Bm31/95VA0jms1JTGL7A\n         45Zg==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n        d=1e100.net; s=20230601; t=1763043696; x=1763648496;\n        h=content-transfer-encoding:cc:to:subject:message-id:date:from\n         :in-reply-to:references:mime-version:x-gm-gg:x-gm-message-state:from\n         :to:cc:subject:date:message-id:reply-to;\n        bh=PVTH3OodIWn9qSwlGdTpQLDwP01tYh5/+5JVhlUv+nY=;\n        b=Ft4JxbYGk3SoTYd9Q90uOVH7jQRafdbYGXR7/ZvDsS6UElMm14UTLuhRB3KWNKwdXo\n         NLe0HtMnbCkw6j0Ce8tRDHI376ioFW6gSRBRmOJ0Ki9YHXbetSYq4kG3L/X/cGzwOCQj\n         4uD+xcd/84CBSMtuLZ+3YLHp2otHM8oAjbmeSZ4D4mWd4qM/Qzqlf9GKC0dOBiYJ5M21\n         +RgkMFGb1YDypwMyMBegQKzW0DYeT7SIEaPgoIUl9SiwtzyqUXTUp1hxODhiF/+kfecq\n         Aq/kT61QDQeJLYBtyHwP//BwzOO3h4HYI1KTtR1CzJRhtK2M1OcKid7Obs8zvRPbhZkM\n         iSrw==","X-Forwarded-Encrypted":"i=1;\n AJvYcCU05I/za568YdwYJpENqW7zxqaIYy8nuIHM/83ont4POvnV/GZfswqBxjLsaz5ITQgB692T8J+4dC/aiw==@vger.kernel.org","X-Gm-Message-State":"AOJu0YymBmkQSmjJLMyZq+eJKhGDzbq5n9Kd93JBjRyUf21eIayKgj+/\n\tpFGTfjbI2Y7PIttShcZ5bhAaasQLXEJZGoDUG+0fa5q9JnoYEEUyAsi9M2FRRnS6QmaLTbJn87i\n\tNt3MH4na6wLtM0XOK1WmdhbtknfnJ+38=","X-Gm-Gg":"ASbGncs+vLI11+njmWMa4WmbP01Xz5I7oxQGp7x40ufzQIa9FMrjK2HdNAT5I5T6zeV\n\todTTRlyr87XnNRsteNKKb/pxu3abPP+Leq1eAMz6z/o/AWY5Ld6YjgLsoiyaav/s2rVAYBwCTzq\n\tTk6+vx3nU3icYJsvoMJWsoWiRyKtdYMPQDR/xDQCYKEkaGqr8oYwhzTIzRJ6wQYppievjXt98Cs\n\tqpVnKUZURmycNV0XWH9JmDw1dT9ou3nK8ZLXbrZ5wGhJP65enepD4MpIuy8NbgYl4Gza3W9","X-Google-Smtp-Source":"\n AGHT+IHpKdVN83TCm20YE3t1L1lDlWwYUNuksMEsa3ToWtEDthhiiFsiCO+R+2diKHhI8EC3wUv5l0WKP1xsWN52j2s=","X-Received":"by 2002:a05:6000:4210:b0:42b:3ed2:c079 with SMTP id\n ffacd0b85a97d-42b4bdb3157mr6520095f8f.48.1763043695648; Thu, 13 Nov 2025\n 06:21:35 -0800 (PST)","Precedence":"bulk","X-Mailing-List":"linux-tegra@vger.kernel.org","List-Id":"<linux-tegra.vger.kernel.org>","List-Subscribe":"<mailto:linux-tegra+subscribe@vger.kernel.org>","List-Unsubscribe":"<mailto:linux-tegra+unsubscribe@vger.kernel.org>","MIME-Version":"1.0","References":"<20250915080157.28195-1-clamor95@gmail.com>\n <20250915080157.28195-7-clamor95@gmail.com>\n <175847725338.4354.4145979844570539358@lazor>","In-Reply-To":"<175847725338.4354.4145979844570539358@lazor>","From":"Svyatoslav Ryhel <clamor95@gmail.com>","Date":"Thu, 13 Nov 2025 16:21:24 +0200","X-Gm-Features":"AWmQ_blflchRXgqVJi0za8JR5StKpVBhyxQTDb1Y4F00r9nuMPcYEvgT9Q0wdNU","Message-ID":"\n <CAPVz0n2gUT5aOT3S05Up+vAiMBf5jmthRV_7z_fpj9RsPWEg_w@mail.gmail.com>","Subject":"Re: [PATCH v3 06/11] clk: tegra: remove EMC to MC clock mux in\n Tegra114","To":"Stephen Boyd <sboyd@kernel.org>","Cc":"Chanwoo Choi <cw00.choi@samsung.com>, Conor Dooley <conor+dt@kernel.org>,\n\tDmitry Osipenko <digetx@gmail.com>, Jonathan Hunter <jonathanh@nvidia.com>,\n\tKrzysztof Kozlowski <krzk@kernel.org>,\n Kyungmin Park <kyungmin.park@samsung.com>,\n\tMichael Turquette <mturquette@baylibre.com>,\n Mikko Perttunen <mperttunen@nvidia.com>,\n\tMyungJoo Ham <myungjoo.ham@samsung.com>,\n Prashant Gaikwad <pgaikwad@nvidia.com>,\n\tRob Herring <robh@kernel.org>, Thierry Reding <thierry.reding@gmail.com>,\n\tThierry Reding <treding@nvidia.com>, linux-kernel@vger.kernel.org,\n\tdevicetree@vger.kernel.org, linux-tegra@vger.kernel.org,\n\tlinux-clk@vger.kernel.org, linux-pm@vger.kernel.org","Content-Type":"text/plain; charset=\"UTF-8\"","Content-Transfer-Encoding":"quoted-printable"}},{"id":3614795,"web_url":"http://patchwork.ozlabs.org/comment/3614795/","msgid":"<CAPVz0n12YKGfjvYZZOkMaB18gk74xiprB7=XbcSpPvi9=Jtt4A@mail.gmail.com>","list_archive_url":null,"date":"2025-11-13T14:29:08","subject":"Re: [PATCH v3 06/11] clk: tegra: remove EMC to MC clock mux in\n Tegra114","submitter":{"id":84146,"url":"http://patchwork.ozlabs.org/api/people/84146/","name":"Svyatoslav Ryhel","email":"clamor95@gmail.com"},"content":"чт, 13 лист. 2025 р. о 07:05 Mikko Perttunen <mperttunen@nvidia.com> пише:\n>\n> On Monday, September 15, 2025 5:01 PM Svyatoslav Ryhel wrote:\n> > Configure EMC without mux for correct EMC driver support.\n>\n> Rather than just 'removing EMC to MC clock mux in Tegra114', I would say this patch removes current emc and emc_mux clocks and replaces them with the proper EMC clock implementation. I would edit the commit subject and commit message along those lines.\n>\n\nNoted\n\n> >\n> > Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>\n> > ---\n> >  drivers/clk/tegra/clk-tegra114.c | 48 ++++++++++++++++++++++----------\n> >  1 file changed, 33 insertions(+), 15 deletions(-)\n> >\n> > diff --git a/drivers/clk/tegra/clk-tegra114.c b/drivers/clk/tegra/clk-tegra114.c\n> > index 8bde72aa5e68..6b3a140772c2 100644\n> > --- a/drivers/clk/tegra/clk-tegra114.c\n> > +++ b/drivers/clk/tegra/clk-tegra114.c\n> > @@ -622,10 +622,6 @@ static const char *mux_plld_out0_plld2_out0[] = {\n> >  };\n> >  #define mux_plld_out0_plld2_out0_idx NULL\n> >\n> > -static const char *mux_pllmcp_clkm[] = {\n> > -     \"pll_m_out0\", \"pll_c_out0\", \"pll_p_out0\", \"clk_m\", \"pll_m_ud\",\n> > -};\n> > -\n> >  static const struct clk_div_table pll_re_div_table[] = {\n> >       { .val = 0, .div = 1 },\n> >       { .val = 1, .div = 2 },\n> > @@ -672,7 +668,6 @@ static struct tegra_clk tegra114_clks[tegra_clk_max] __initdata = {\n> >       [tegra_clk_csi] = { .dt_id = TEGRA114_CLK_CSI, .present = true },\n> >       [tegra_clk_i2c2] = { .dt_id = TEGRA114_CLK_I2C2, .present = true },\n> >       [tegra_clk_uartc] = { .dt_id = TEGRA114_CLK_UARTC, .present = true },\n> > -     [tegra_clk_emc] = { .dt_id = TEGRA114_CLK_EMC, .present = true },\n> >       [tegra_clk_usb2] = { .dt_id = TEGRA114_CLK_USB2, .present = true },\n> >       [tegra_clk_usb3] = { .dt_id = TEGRA114_CLK_USB3, .present = true },\n> >       [tegra_clk_vde_8] = { .dt_id = TEGRA114_CLK_VDE, .present = true },\n> > @@ -1048,14 +1043,7 @@ static __init void tegra114_periph_clk_init(void __iomem *clk_base,\n> >                                            0, 82, periph_clk_enb_refcnt);\n> >       clks[TEGRA114_CLK_DSIB] = clk;\n> >\n> > -     /* emc mux */\n> > -     clk = clk_register_mux(NULL, \"emc_mux\", mux_pllmcp_clkm,\n> > -                            ARRAY_SIZE(mux_pllmcp_clkm),\n> > -                            CLK_SET_RATE_NO_REPARENT,\n> > -                            clk_base + CLK_SOURCE_EMC,\n> > -                            29, 3, 0, &emc_lock);\n> > -\n> > -     clk = tegra_clk_register_mc(\"mc\", \"emc_mux\", clk_base + CLK_SOURCE_EMC,\n> > +     clk = tegra_clk_register_mc(\"mc\", \"emc\", clk_base + CLK_SOURCE_EMC,\n> >                                   &emc_lock);\n> >       clks[TEGRA114_CLK_MC] = clk;\n> >\n> > @@ -1321,6 +1309,28 @@ static int tegra114_reset_deassert(unsigned long id)\n> >       return 0;\n> >  }\n> >\n> > +#ifdef CONFIG_TEGRA124_CLK_EMC\n> > +static struct clk *tegra114_clk_src_onecell_get(struct of_phandle_args *clkspec,\n> > +                                             void *data)\n> > +{\n> > +     struct clk_hw *hw;\n> > +     struct clk *clk;\n> > +\n> > +     clk = of_clk_src_onecell_get(clkspec, data);\n> > +     if (IS_ERR(clk))\n> > +             return clk;\n> > +\n> > +     hw = __clk_get_hw(clk);\n> > +\n> > +     if (clkspec->args[0] == TEGRA114_CLK_EMC) {\n> > +             if (!tegra124_clk_emc_driver_available(hw))\n> > +                     return ERR_PTR(-EPROBE_DEFER);\n> > +     }\n> > +\n> > +     return clk;\n> > +}\n> > +#endif\n> > +\n> >  static void __init tegra114_clock_init(struct device_node *np)\n> >  {\n> >       struct device_node *node;\n> > @@ -1362,16 +1372,24 @@ static void __init tegra114_clock_init(struct device_node *np)\n> >       tegra_audio_clk_init(clk_base, pmc_base, tegra114_clks,\n> >                            tegra114_audio_plls,\n> >                            ARRAY_SIZE(tegra114_audio_plls), 24000000);\n> > +\n> > +     tegra_clk_apply_init_table = tegra114_clock_apply_init_table;\n> > +\n>\n> Is there any particular reason for moving this here? If not, omitting the change would simplify the patch a bit.\n>\n\nIIRC, I tried to align with Tegra124 EMC clk driver, I will try to\ndrop this change and check if all works as expected.\n\n> >       tegra_super_clk_gen4_init(clk_base, pmc_base, tegra114_clks,\n> >                                       &pll_x_params);\n> >\n> >       tegra_init_special_resets(1, tegra114_reset_assert,\n> >                                 tegra114_reset_deassert);\n> >\n> > +#ifdef CONFIG_TEGRA124_CLK_EMC\n> > +     tegra_add_of_provider(np, tegra114_clk_src_onecell_get);\n> > +     clks[TEGRA114_CLK_EMC] = tegra124_clk_register_emc(clk_base, np,\n> > +                                                        &emc_lock);\n> > +#else\n> >       tegra_add_of_provider(np, of_clk_src_onecell_get);\n> > -     tegra_register_devclks(devclks, ARRAY_SIZE(devclks));\n> > +#endif\n>\n> tegra124_clk_register_emc and tegra124_clk_emc_driver_available have stub implementations when CONFIG_TEGRA124_CLK_EMC is not enabled, so it would be cleaner to just call them always.\n>\n\nYes, I will adjust this in v4. Thank you.\n\n> >\n> > -     tegra_clk_apply_init_table = tegra114_clock_apply_init_table;\n> > +     tegra_register_devclks(devclks, ARRAY_SIZE(devclks));\n> >\n> >       tegra_cpu_car_ops = &tegra114_cpu_car_ops;\n> >  }\n> >\n>\n>\n>\n>","headers":{"Return-Path":"\n <linux-tegra+bounces-10407-incoming=patchwork.ozlabs.org@vger.kernel.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-tegra@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20230601 header.b=MTsXoWdL;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2604:1380:45e3:2400::1; helo=sv.mirrors.kernel.org;\n envelope-from=linux-tegra+bounces-10407-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com\n header.b=\"MTsXoWdL\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=209.85.221.48","smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=gmail.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=gmail.com"],"Received":["from sv.mirrors.kernel.org (sv.mirrors.kernel.org\n [IPv6:2604:1380:45e3:2400::1])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange X25519 server-signature ECDSA (secp384r1))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4d6jbc17Qbz1yLP\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 14 Nov 2025 01:39:56 +1100 (AEDT)","from smtp.subspace.kernel.org (relay.kernel.org [52.25.139.140])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby sv.mirrors.kernel.org (Postfix) with ESMTPS id F36753A453B\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 13 Nov 2025 14:29:23 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 4A7332C15B7;\n\tThu, 13 Nov 2025 14:29:23 +0000 (UTC)","from mail-wr1-f48.google.com (mail-wr1-f48.google.com\n [209.85.221.48])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 458F129993A\n\tfor <linux-tegra@vger.kernel.org>; Thu, 13 Nov 2025 14:29:21 +0000 (UTC)","by mail-wr1-f48.google.com with SMTP id\n ffacd0b85a97d-42b3c965cc4so471311f8f.0\n        for <linux-tegra@vger.kernel.org>;\n Thu, 13 Nov 2025 06:29:21 -0800 (PST)"],"ARC-Seal":"i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1763044163; cv=none;\n b=KXjnAhu8b2aYRHSx7NVYAR6TmcvqNQhDvAh8mBkEO1jh0CZJ5Q+W9U/a6UFIILQrLz+3JYlbj2C1VtzkKQL2Ij/L9FfKEorGBwBC2pvIoEqPBpItdpX6S2xif9JALcFrjMLmA/ZRJeSLDEIXhoD/u2I8xF+Zx+u48Aq4+I2TWho=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1763044163; c=relaxed/simple;\n\tbh=enukvQUkWp5qWLLQJutYEr5eHCre8gtyCfegyL8aecU=;\n\th=MIME-Version:References:In-Reply-To:From:Date:Message-ID:Subject:\n\t To:Cc:Content-Type;\n b=dALwQZzyYEKiaPFDja78Svp20tbVNHG27Pbr6maDteY0QeqN6x7a47lw7gHvFM+bL8AT+uxFpr0amiXrtt0mKg+rkJiaun9T6FJjG51YtllRAsugRxo24sxC/mXQ9DiV1AqbIJXeJu/wVFqW2XROF187cAmnhwySBispO/zFiQQ=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=gmail.com;\n spf=pass smtp.mailfrom=gmail.com;\n dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com\n header.b=MTsXoWdL; arc=none smtp.client-ip=209.85.221.48","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n        d=gmail.com; s=20230601; t=1763044160; x=1763648960;\n darn=vger.kernel.org;\n        h=content-transfer-encoding:cc:to:subject:message-id:date:from\n         :in-reply-to:references:mime-version:from:to:cc:subject:date\n         :message-id:reply-to;\n        bh=UNomNoVs3/3wdBsUcq9EZSvX1zLpw+oNIAvlqkMmZEs=;\n        b=MTsXoWdL5q+SKlKFYuluPzOD01u5Un9K0DErqJEcgs6WiRpSbbI5NNZX3gSvFhXKR6\n         QY5Kza6huPV0tgxIbLxCwu1+wExP9MxfVJmtk/5yd1zvprODuYXu1RHE5/b5gCI2lyXe\n         E7vm1+iNcnvO5ULiHvudpmhjgiMXsf0tLRZTL8hu7aTAPyZBOrzazrR8oynNh9FAF9Mh\n         M1qixhxtDwJa+ZIF/HMxw6f8uWUrsiAvWwAMrLz29PO8EChBw4JXcZRqbwXZsERb1tSH\n         0MORytgRr3WbRHs8FX42JeDkoiwqk/im9aMBRG7CmwRK62YZDsl1rlJJXJ24Gt8pjuak\n         vz/Q==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n        d=1e100.net; s=20230601; t=1763044160; x=1763648960;\n        h=content-transfer-encoding:cc:to:subject:message-id:date:from\n         :in-reply-to:references:mime-version:x-gm-gg:x-gm-message-state:from\n         :to:cc:subject:date:message-id:reply-to;\n        bh=UNomNoVs3/3wdBsUcq9EZSvX1zLpw+oNIAvlqkMmZEs=;\n        b=O0gJN7O/FmsiX/+ZtQE+tglF/GW2JIxD2xJmFVZUMJJP9eygbd28oqywODLixLAu6E\n         sBS9KFQhKzkbEnX40tG8MeDWpaTmFcLfjXmVKfz6JUJHPXcFHjdiT5i35EigPrAl2dDa\n         hp8XxdrdAY5gFtzddePCcQHbZVq0aZHS5aRpOptYfKYMhaVevfjc9lADVbLa/sScTOhM\n         JIgI0qkChOogmx04Uizko/MaO15bWYvsEKs8WV2cBiNDnES2A+4ZJbmoNFqfZVmFuhAl\n         utoUOBEaZpzadD4eh/iG2kAY/Jn2eloRivnlhX9sgmUJeQRVSJPa8UmWxjvuetXmRvey\n         pKlQ==","X-Forwarded-Encrypted":"i=1;\n AJvYcCWdHEeAlJ/mOGDfTWKuI0LHqT9WA03jM9/Z0KzqdxT7Z13n3uzrHw9ngrwgRn41b0RSVsGEVd3ktl7d1g==@vger.kernel.org","X-Gm-Message-State":"AOJu0YwGuXFxqN02U52NUgwx+TYFEn/Cl37oHBArj8QEm4in2W9jwSdt\n\tQUMph15584oOpmXgTB1btxqjBTS8LWvI5oHjGnLBw3/deKAkUqpfa1cH5nWZL21OoYNtVl2JbHK\n\t5WjwEmO7C+eEzNpKPQAYFE9h/2yxLlxE=","X-Gm-Gg":"ASbGncuhtpQIHj523Eh2/a6ol5/ALKHR3N+VAU7nMAFTgAwZgeKm/QgFwysLuQBgvuN\n\tSWhqeNeIZC5kuR+qcrP0OOuw6wJWjHFQz6zVokYRYnuLaT/asVweBg17eqmatNq6HykbcymzsV6\n\tNqK5Er1U0Xj6P63pNgHnmApjrpMbbWzV7kvvCENW8qtrG643Htvj9JunZlm/quE8v/0Ia9dixH5\n\tI0JqId4ij9Mt9yN3sy611+brb41Qexi7qH49/eHTfC7mlitNB+WKRTEJY9Qwt1MKpeOiTH8SUb4\n\txLznsvU=","X-Google-Smtp-Source":"\n AGHT+IEjZesfWe6UAJr9rfneLrz6LT9ITsEcvC5EG+9+SI64dIq/3Wyqp3hO3mKXfLSgOhg9/PSLnT/sN+ozMuJc6zU=","X-Received":"by 2002:a05:6000:230b:b0:429:d253:8619 with SMTP id\n ffacd0b85a97d-42b52795624mr3292848f8f.5.1763044159375; Thu, 13 Nov 2025\n 06:29:19 -0800 (PST)","Precedence":"bulk","X-Mailing-List":"linux-tegra@vger.kernel.org","List-Id":"<linux-tegra.vger.kernel.org>","List-Subscribe":"<mailto:linux-tegra+subscribe@vger.kernel.org>","List-Unsubscribe":"<mailto:linux-tegra+unsubscribe@vger.kernel.org>","MIME-Version":"1.0","References":"<20250915080157.28195-1-clamor95@gmail.com>\n <20250915080157.28195-7-clamor95@gmail.com>\n <6112196.aeNJFYEL58@senjougahara>","In-Reply-To":"<6112196.aeNJFYEL58@senjougahara>","From":"Svyatoslav Ryhel <clamor95@gmail.com>","Date":"Thu, 13 Nov 2025 16:29:08 +0200","X-Gm-Features":"AWmQ_bn3skm8vRUEdsGZ0nnCIIDUv9P1uoNNzH9ij76xxg0XWrgAcalJ4Vq9gRI","Message-ID":"\n <CAPVz0n12YKGfjvYZZOkMaB18gk74xiprB7=XbcSpPvi9=Jtt4A@mail.gmail.com>","Subject":"Re: [PATCH v3 06/11] clk: tegra: remove EMC to MC clock mux in\n Tegra114","To":"Mikko Perttunen <mperttunen@nvidia.com>","Cc":"Krzysztof Kozlowski <krzk@kernel.org>, Rob Herring <robh@kernel.org>,\n Conor Dooley <conor+dt@kernel.org>,\n\tThierry Reding <treding@nvidia.com>,\n Thierry Reding <thierry.reding@gmail.com>,\n\tJonathan Hunter <jonathanh@nvidia.com>,\n Prashant Gaikwad <pgaikwad@nvidia.com>,\n\tMichael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>,\n\tDmitry Osipenko <digetx@gmail.com>, MyungJoo Ham <myungjoo.ham@samsung.com>,\n\tKyungmin Park <kyungmin.park@samsung.com>,\n Chanwoo Choi <cw00.choi@samsung.com>,\n\tlinux-kernel@vger.kernel.org, devicetree@vger.kernel.org,\n\tlinux-tegra@vger.kernel.org, linux-clk@vger.kernel.org,\n\tlinux-pm@vger.kernel.org","Content-Type":"text/plain; charset=\"UTF-8\"","Content-Transfer-Encoding":"quoted-printable"}},{"id":3619443,"web_url":"http://patchwork.ozlabs.org/comment/3619443/","msgid":"<CAPVz0n2xtmNRvawkvWD7FJbfTU0y2bD+qsFoJ4VLmivaz=K7aA@mail.gmail.com>","list_archive_url":null,"date":"2025-11-25T10:21:30","subject":"Re: [PATCH v3 06/11] clk: tegra: remove EMC to MC clock mux in\n Tegra114","submitter":{"id":84146,"url":"http://patchwork.ozlabs.org/api/people/84146/","name":"Svyatoslav Ryhel","email":"clamor95@gmail.com"},"content":"нд, 21 вер. 2025 р. о 20:54 Stephen Boyd <sboyd@kernel.org> пише:\n>\n> Quoting Svyatoslav Ryhel (2025-09-15 01:01:52)\n> > diff --git a/drivers/clk/tegra/clk-tegra114.c b/drivers/clk/tegra/clk-tegra114.c\n> > index 8bde72aa5e68..6b3a140772c2 100644\n> > --- a/drivers/clk/tegra/clk-tegra114.c\n> > +++ b/drivers/clk/tegra/clk-tegra114.c\n> > @@ -1321,6 +1309,28 @@ static int tegra114_reset_deassert(unsigned long id)\n> >         return 0;\n> >  }\n> >\n> > +#ifdef CONFIG_TEGRA124_CLK_EMC\n> > +static struct clk *tegra114_clk_src_onecell_get(struct of_phandle_args *clkspec,\n> > +                                               void *data)\n> > +{\n> > +       struct clk_hw *hw;\n> > +       struct clk *clk;\n> > +\n> > +       clk = of_clk_src_onecell_get(clkspec, data);\n> > +       if (IS_ERR(clk))\n> > +               return clk;\n> > +\n> > +       hw = __clk_get_hw(clk);\n>\n> Can you just use of_clk_hw_onecell_get() instead? Then we don't need to\n> use __clk_get_hw(). Or is this whole function used to return a clk\n> pointer to something that isn't the clk framework?\n>\n\nI have tried to switch __clk_get_hw to of_clk_hw_onecell_get but it\ndid not work, tegra124_clk_emc_driver_available fails and I get\nEPROBE_DEFER cascade. I will keep __clk_get_hw like Tegra124 driver\ndoes since of_clk_hw_onecell_get did not worked in this case.\n\n> > +\n> > +       if (clkspec->args[0] == TEGRA114_CLK_EMC) {\n> > +               if (!tegra124_clk_emc_driver_available(hw))\n> > +                       return ERR_PTR(-EPROBE_DEFER);\n> > +       }\n> > +\n> > +       return clk;","headers":{"Return-Path":"\n <linux-tegra+bounces-10583-incoming=patchwork.ozlabs.org@vger.kernel.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-tegra@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20230601 header.b=GLc0uZz2;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=139.178.88.99; helo=sv.mirrors.kernel.org;\n envelope-from=linux-tegra+bounces-10583-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com\n header.b=\"GLc0uZz2\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=209.85.221.52","smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=gmail.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=gmail.com"],"Received":["from sv.mirrors.kernel.org (sv.mirrors.kernel.org [139.178.88.99])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange X25519 server-signature ECDSA (secp384r1))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4dFzJp2yP4z1xwc\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 25 Nov 2025 21:22:18 +1100 (AEDT)","from smtp.subspace.kernel.org (relay.kernel.org [52.25.139.140])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby sv.mirrors.kernel.org (Postfix) with ESMTPS id 34D113B24DB\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 25 Nov 2025 10:21:47 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id D8BE12F39C3;\n\tTue, 25 Nov 2025 10:21:46 +0000 (UTC)","from mail-wr1-f52.google.com (mail-wr1-f52.google.com\n [209.85.221.52])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id AC1F12F1FD0\n\tfor <linux-tegra@vger.kernel.org>; Tue, 25 Nov 2025 10:21:44 +0000 (UTC)","by mail-wr1-f52.google.com with SMTP id\n ffacd0b85a97d-42b3c965df5so2829456f8f.1\n        for <linux-tegra@vger.kernel.org>;\n Tue, 25 Nov 2025 02:21:44 -0800 (PST)"],"ARC-Seal":"i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1764066106; cv=none;\n b=avJlArJdhLXshhZo1HgHZA/QtFvdUYR+Z8MfEgJxKXM9UaBR7wLzlrIrMcgOroUU7Fw6DteArZMoHxaC9LEDSuQHQOzda5cLIw5Z/AbMAMGbmjAbkD3fcnboSpXeTY+bZ5gJ+rgascbpliDGAZmwQFsr8Cm4Y6jnghH7cEAgZBw=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1764066106; c=relaxed/simple;\n\tbh=Nl+s8+3VqFL8i/pvXYObJT1n7cruxQ9Kkr2MdBYPQNE=;\n\th=MIME-Version:References:In-Reply-To:From:Date:Message-ID:Subject:\n\t To:Cc:Content-Type;\n b=lNOmswnOQEmf5CGb0itSq8/9lNCm6EtsnSuu5c2J5miU6gz38oZ5qj6+vgb2sPtYGwCYYmKZrFtTXaVz2mBUT6glB4O6dqghJyBdxSlS0s6bJGJoNeR4lJjjogRgqadGsu46NK8KZxSk2k9zc5Z6ediMtcXpVj3NWimRRNOXHwE=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=gmail.com;\n spf=pass smtp.mailfrom=gmail.com;\n dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com\n header.b=GLc0uZz2; arc=none smtp.client-ip=209.85.221.52","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n        d=gmail.com; s=20230601; t=1764066103; x=1764670903;\n darn=vger.kernel.org;\n        h=content-transfer-encoding:cc:to:subject:message-id:date:from\n         :in-reply-to:references:mime-version:from:to:cc:subject:date\n         :message-id:reply-to;\n        bh=mMAa1PahDcZGGFamJpPR85zyctP0GPcnw67hHv9HjNU=;\n        b=GLc0uZz2DvejL+9fdSJGkA1QRga3m+XsED20aH3XZIMmTBSjeCSuqVasEzNk8Pvscp\n         8eZb1rkWsHK0989pDvhjHUUMpLf/9MwW3Y8kMNiHpOGzRdV3JBHjUIRL9XfTTu1VX0ON\n         tqQIF80HRtyYJQPqDfavxv0m5xq9eNe+Vda3FSaKIGVoN/KsGWRGMz+hQ5RcidTAZ1U1\n         rg7RAoE6XyPOOlLJuvzsDW3DrWpAGF8mJUGz0q26WOKnGJMPYG7jff1BQue2Tf2NFHYs\n         YdMlYalvYn9ENaJ45K1NUM+3pvBIGM+iOjFbXcvj3kaeDaFdhbpOycf825LtemlGZ5gn\n         hHKw==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n        d=1e100.net; s=20230601; t=1764066103; x=1764670903;\n        h=content-transfer-encoding:cc:to:subject:message-id:date:from\n         :in-reply-to:references:mime-version:x-gm-gg:x-gm-message-state:from\n         :to:cc:subject:date:message-id:reply-to;\n        bh=mMAa1PahDcZGGFamJpPR85zyctP0GPcnw67hHv9HjNU=;\n        b=HSnAyct/holM5ox1Yz45jJjhsBB2NUCDNOcmADRnzH01Go39lfAWcknUnkskzHiiFd\n         wOaWLTbegsuaraa4otBt7bEXZ4o8Tyyfkysl1waiDnCvyOWrfCDkeSU7+meDkSr8O1v+\n         xBCPTfrqWdnQl8biLkDUZhOtx5VZY/agQRJa63Nfxe2cU7V4mkypIE3e5G9LGCgkuY35\n         xlwcVmsfIQt8R7xE3Rk4DQuvL29RPOm88j1rqiUyNV+XE4acG/k+1x2edkRSyNaEKsgS\n         pG9t/hFpzy+b7kzVYKbDlMCnSy9eV/0oqKaNEWsBog6z5iZxVICHCB9E/gJ9MU8H5Pv5\n         E4NQ==","X-Forwarded-Encrypted":"i=1;\n AJvYcCW8CxoyLlsM2bL1cm7oOYboKCzik4ZUoxoj86KUuaUehJEPnYDygjzZ817NfwLIoQ044EhMnLTmqE+H0A==@vger.kernel.org","X-Gm-Message-State":"AOJu0Yy9Hd9yxtQTnBGNM7E0FlX2Dip7CWzhKzS/O0ASM8wTtAjcGom7\n\t4AvkQCJQJ08iT/InHtvkxx5LlXPmiXqqmx1ECfWIdXBii1t3l5CJkxcOuI6qhdffQSjq23Zrzqh\n\tvsz/Ag8HCMXZZ+aRXwsTHd1AHeLthdZk=","X-Gm-Gg":"ASbGnctcjqvh1OfldWnfr+gXM79FYRZ0wkn25VZPLKSCogKTvW7D5iWaToMtyA95OBa\n\tNEz05lNdA8IuPYAUTrbDBl00x7PNFc0iCxBT8Yc6RidAUUZ9Pah3cz1vCvPtyy4kuTuG5kIp3Ys\n\tD4aP/YvTtUSH85uaNF5kjlwqz0WX4LNPpIevorNlefPd6Lvxnh0rzifDd2dPfpM/oJke+SbpS7l\n\tCB0mm2bVQUB0NI+eCo6/e+orIY7kR2jH0pC/EFjQ5cz3FQhfAvgjgM738vXAZXJFlJ+xMBG","X-Google-Smtp-Source":"\n AGHT+IGs/n3s+ljPxhnH+g77kzWfSIpoVvX9+gmjeFbXMAeiCC1KIHbqdKpuwES2cbl9f+HwXmh2k55li5DiqVgzvXc=","X-Received":"by 2002:a05:6000:420d:b0:425:7e45:a4df with SMTP id\n ffacd0b85a97d-42e0f1e3540mr2067660f8f.11.1764066102844; Tue, 25 Nov 2025\n 02:21:42 -0800 (PST)","Precedence":"bulk","X-Mailing-List":"linux-tegra@vger.kernel.org","List-Id":"<linux-tegra.vger.kernel.org>","List-Subscribe":"<mailto:linux-tegra+subscribe@vger.kernel.org>","List-Unsubscribe":"<mailto:linux-tegra+unsubscribe@vger.kernel.org>","MIME-Version":"1.0","References":"<20250915080157.28195-1-clamor95@gmail.com>\n <20250915080157.28195-7-clamor95@gmail.com>\n <175847725338.4354.4145979844570539358@lazor>","In-Reply-To":"<175847725338.4354.4145979844570539358@lazor>","From":"Svyatoslav Ryhel <clamor95@gmail.com>","Date":"Tue, 25 Nov 2025 12:21:30 +0200","X-Gm-Features":"AWmQ_bl56LuUHLPnztGhAMdmRur5Ggnq7b6fJH-NAjFY7Cca_zX_XBphsvjf_7k","Message-ID":"\n <CAPVz0n2xtmNRvawkvWD7FJbfTU0y2bD+qsFoJ4VLmivaz=K7aA@mail.gmail.com>","Subject":"Re: [PATCH v3 06/11] clk: tegra: remove EMC to MC clock mux in\n Tegra114","To":"Stephen Boyd <sboyd@kernel.org>","Cc":"Chanwoo Choi <cw00.choi@samsung.com>, Conor Dooley <conor+dt@kernel.org>,\n\tDmitry Osipenko <digetx@gmail.com>, Jonathan Hunter <jonathanh@nvidia.com>,\n\tKrzysztof Kozlowski <krzk@kernel.org>,\n Kyungmin Park <kyungmin.park@samsung.com>,\n\tMichael Turquette <mturquette@baylibre.com>,\n Mikko Perttunen <mperttunen@nvidia.com>,\n\tMyungJoo Ham <myungjoo.ham@samsung.com>,\n Prashant Gaikwad <pgaikwad@nvidia.com>,\n\tRob Herring <robh@kernel.org>, Thierry Reding <thierry.reding@gmail.com>,\n\tThierry Reding <treding@nvidia.com>, linux-kernel@vger.kernel.org,\n\tdevicetree@vger.kernel.org, linux-tegra@vger.kernel.org,\n\tlinux-clk@vger.kernel.org, linux-pm@vger.kernel.org","Content-Type":"text/plain; charset=\"UTF-8\"","Content-Transfer-Encoding":"quoted-printable"}}]