[{"id":3321516,"web_url":"http://patchwork.ozlabs.org/comment/3321516/","msgid":"<20240603155445.GA501876-robh@kernel.org>","list_archive_url":null,"date":"2024-06-03T15:54:45","subject":"Re: [DO NOT MERGE v8 19/36] dt-bindings: interrupt-controller:\n renesas,sh7751-irl-ext: Add json-schema","submitter":{"id":62529,"url":"http://patchwork.ozlabs.org/api/people/62529/","name":"Rob Herring (Arm)","email":"robh@kernel.org"},"content":"On Wed, May 29, 2024 at 05:01:05PM +0900, Yoshinori Sato wrote:\n> Renesas SH7751 external interrupt encoder json-schema.\n> \n> Signed-off-by: Yoshinori Sato \n> ---\n> .../renesas,sh7751-irl-ext.yaml | 57 +++++++++++++++++++\n> 1 file changed, 57 insertions(+)\n> create mode 100644 Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-irl-ext.yaml\n> \n> diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-irl-ext.yaml b/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-irl-ext.yaml\n> new file mode 100644\n> index 000000000000..ff70d57b86cd\n> --- /dev/null\n> +++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-irl-ext.yaml\n> @@ -0,0 +1,57 @@\n> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause\n> +%YAML 1.2\n> +---\n> +$id: http://devicetree.org/schemas/interrupt-controller/renesas,sh7751-irl-ext.yaml#\n> +$schema: http://devicetree.org/meta-schemas/core.yaml#\n> +\n> +title: Renesas SH7751 external interrupt encoder with enable regs.\n> +\n> +maintainers:\n> + - Yoshinori Sato \n> +\n> +description:\n> + This is the generally used external interrupt encoder on SH7751 based boards.\n> +\n> +properties:\n> + compatible:\n> + items:\n> + - const: renesas,sh7751-irl-ext\n> +\n> + reg: true\n\nNeeds to define how many and what they are.\n\n> +\n> + interrupt-controller: true\n> +\n> + '#interrupt-cells':\n> + const: 2\n> +\n> + '#address-cells':\n> + const: 0\n> +\n> + renesas,set-to-disable:\n> + $ref: /schemas/types.yaml#/definitions/flag\n> + description: Invert enable registers. Setting the bit to 0 enables interrupts.\n> +\n> + renesas,enable-reg:\n> + $ref: /schemas/types.yaml#/definitions/uint32-array\n> + description: |\n\nDon't need '|'.\n\n> + IRQ enable register bit mapping\n\nThis needs a better description and constraints? Number of entries in \nthe array or values of the entries.\n\n> +\n> +required:\n> + - compatible\n> + - reg\n> + - interrupt-controller\n> + - '#interrupt-cells'\n> + - renesas,enable-reg\n> +\n> +additionalProperties: false\n> +\n> +examples:\n> + - |\n> + r2dintc: interrupt-controller@a4000000 {\n> + compatible = \"renesas,sh7751-irl-ext\";\n> + reg = <0xa4000000 0x02>;\n> + interrupt-controller;\n> + #address-cells = <0>;\n> + #interrupt-cells = <2>;\n> + renesas,enable-reg = <12 9 10 3 0 4 1 2 8 5 6 7 15 15 15 11>;\n> + };\n> -- \n> 2.39.2\n>","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=SKCKUK+6;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2604:1380:45d1:ec00::1; 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