[{"id":2912970,"web_url":"http://patchwork.ozlabs.org/comment/2912970/","msgid":"<20220614222922.GB2830345-robh@kernel.org>","list_archive_url":null,"date":"2022-06-14T22:29:22","subject":"Re: [PATCH v4 20/23] dt-bindings: ata: ahci: Add Baikal-T1 AHCI SATA\n controller DT schema","submitter":{"id":62529,"url":"http://patchwork.ozlabs.org/api/people/62529/","name":"Rob Herring (Arm)","email":"robh@kernel.org"},"content":"On Fri, Jun 10, 2022 at 11:17:58AM +0300, Serge Semin wrote:\n> Baikal-T1 AHCI controller is based on the DWC AHCI SATA IP-core v4.10a\n> with the next specific settings: two SATA ports, cascaded CSR access based\n> on two clock domains (APB and AXI), selectable source of the reference\n> clock (though stable work is currently available from the external source\n> only), two reset lanes for the application and SATA ports domains. Other\n> than that the device is fully compatible with the generic DWC AHCI SATA\n> bindings.\n> \n> Signed-off-by: Serge Semin \n> Reviewed-by: Hannes Reinecke \n> \n> ---\n> \n> Changelog v2:\n> - Rename 'syscon' property to 'baikal,bt1-syscon'.\n> - Drop macro usage from the example node.\n> \n> Changelog v4:\n> - Use the DWC AHCI port properties definition from the DWC AHCI SATA\n> common schema. (@Rob)\n> - Drop Baikal-T1 syscon reference and implement the clock signal\n> source in the framework of the clock controller. (@Rob)\n> ---\n> .../bindings/ata/baikal,bt1-ahci.yaml | 116 ++++++++++++++++++\n> 1 file changed, 116 insertions(+)\n> create mode 100644 Documentation/devicetree/bindings/ata/baikal,bt1-ahci.yaml\n> \n> diff --git a/Documentation/devicetree/bindings/ata/baikal,bt1-ahci.yaml b/Documentation/devicetree/bindings/ata/baikal,bt1-ahci.yaml\n> new file mode 100644\n> index 000000000000..d5fbd7d561d8\n> --- /dev/null\n> +++ b/Documentation/devicetree/bindings/ata/baikal,bt1-ahci.yaml\n> @@ -0,0 +1,116 @@\n> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)\n> +%YAML 1.2\n> +---\n> +$id: http://devicetree.org/schemas/ata/baikal,bt1-ahci.yaml#\n> +$schema: http://devicetree.org/meta-schemas/core.yaml#\n> +\n> +title: Baikal-T1 SoC AHCI SATA controller\n> +\n> +maintainers:\n> + - Serge Semin \n> +\n> +description: |\n> + AHCI SATA controller embedded into the Baikal-T1 SoC is based on the\n> + DWC AHCI SATA v4.10a IP-core.\n> +\n> +allOf:\n> + - $ref: snps,dwc-ahci.yaml#\n> +\n> +properties:\n> + compatible:\n> + contains:\n> + const: baikal,bt1-ahci\n> +\n> + clocks:\n> + items:\n> + - description: Peripheral APB bus clock source\n> + - description: Application AXI BIU clock\n> + - description: SATA Ports reference clock\n> +\n> + clock-names:\n> + items:\n> + - const: pclk\n> + - const: aclk\n> + - const: ref\n> +\n> + resets:\n> + items:\n> + - description: Application AXI BIU domain reset\n> + - description: SATA Ports clock domain reset\n> +\n> + reset-names:\n> + items:\n> + - const: arst\n> + - const: ref\n> +\n> + ports-implemented:\n> + maximum: 0x3\n> +\n> +patternProperties:\n> + \"^sata-port@[0-9a-e]$\":\n> + $ref: /schemas/ata/snps,dwc-ahci.yaml#/$defs/dwc-ahci-port\n> +\n> + properties:\n> + reg:\n> + minimum: 0\n> + maximum: 1\n> +\n> + snps,tx-ts-max:\n> + $ref: /schemas/types.yaml#/definitions/uint32\n> + description:\n> + Due to having AXI3 bus interface utilized the maximum Tx DMA\n> + transaction size can't exceed 16 beats (AxLEN[3:0]).\n> + enum: [ 1, 2, 4, 8, 16 ]\n> +\n> + snps,rx-ts-max:\n> + $ref: /schemas/types.yaml#/definitions/uint32\n> + description:\n> + Due to having AXI3 bus interface utilized the maximum Rx DMA\n> + transaction size can't exceed 16 beats (AxLEN[3:0]).\n> + enum: [ 1, 2, 4, 8, 16 ]\n> +\n> + unevaluatedProperties: false\n> +\n> +required:\n> + - compatible\n> + - reg\n> + - interrupts\n> + - clocks\n> + - clock-names\n> + - resets\n> +\n> +unevaluatedProperties: false\n> +\n> +examples:\n> + - |\n> + sata@1f050000 {\n> + compatible = \"baikal,bt1-ahci\", \"snps,dwc-ahci\";\n\nJust drop 'snps,dwc-ahci'. The generic IP block fallbacks have proven to \nbe useless.\n\n> + reg = <0x1f050000 0x2000>;\n> + #address-cells = <1>;\n> + #size-cells = <0>;\n> +\n> + interrupts = <0 64 4>;\n> +\n> + clocks = <&ccu_sys 1>, <&ccu_axi 2>, <&sata_ref_clk>;\n> + clock-names = \"pclk\", \"aclk\", \"ref\";\n> +\n> + resets = <&ccu_axi 2>, <&ccu_sys 0>;\n> + reset-names = \"arst\", \"ref\";\n> +\n> + ports-implemented = <0x3>;\n> +\n> + sata-port@0 {\n> + reg = <0>;\n> +\n> + snps,tx-ts-max = <4>;\n> + snps,rx-ts-max = <4>;\n> + };\n> +\n> + sata-port@1 {\n> + reg = <1>;\n> +\n> + snps,tx-ts-max = <4>;\n> + snps,rx-ts-max = <4>;\n> + };\n> + };\n> +...\n> -- \n> 2.35.1\n> \n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2620:137:e000::1:20; helo=out1.vger.email;\n envelope-from=linux-ide-owner@vger.kernel.org; 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charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20220610081801.11854-21-Sergey.Semin@baikalelectronics.ru>","X-Spam-Status":"No, score=-1.2 required=5.0 tests=BAYES_00,\n FREEMAIL_ENVFROM_END_DIGIT,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM,\n HEADER_FROM_DIFFERENT_DOMAINS,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,\n SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=no\n autolearn_force=no version=3.4.6","X-Spam-Checker-Version":"SpamAssassin 3.4.6 (2021-04-09) on\n lindbergh.monkeyblade.net","Precedence":"bulk","List-ID":"","X-Mailing-List":"linux-ide@vger.kernel.org"}},{"id":2915204,"web_url":"http://patchwork.ozlabs.org/comment/2915204/","msgid":"<20220617194954.ayoqkla3ww3hf2qy@mobilestation>","list_archive_url":null,"date":"2022-06-17T19:49:54","subject":"Re: [PATCH v4 20/23] dt-bindings: ata: ahci: Add Baikal-T1 AHCI SATA\n controller DT schema","submitter":{"id":70038,"url":"http://patchwork.ozlabs.org/api/people/70038/","name":"Serge Semin","email":"fancer.lancer@gmail.com"},"content":"On Tue, Jun 14, 2022 at 04:29:22PM -0600, Rob Herring wrote:\n> On Fri, Jun 10, 2022 at 11:17:58AM +0300, Serge Semin wrote:\n> > Baikal-T1 AHCI controller is based on the DWC AHCI SATA IP-core v4.10a\n> > with the next specific settings: two SATA ports, cascaded CSR access based\n> > on two clock domains (APB and AXI), selectable source of the reference\n> > clock (though stable work is currently available from the external source\n> > only), two reset lanes for the application and SATA ports domains. Other\n> > than that the device is fully compatible with the generic DWC AHCI SATA\n> > bindings.\n> > \n> > Signed-off-by: Serge Semin \n> > Reviewed-by: Hannes Reinecke \n> > \n> > ---\n> > \n> > Changelog v2:\n> > - Rename 'syscon' property to 'baikal,bt1-syscon'.\n> > - Drop macro usage from the example node.\n> > \n> > Changelog v4:\n> > - Use the DWC AHCI port properties definition from the DWC AHCI SATA\n> > common schema. (@Rob)\n> > - Drop Baikal-T1 syscon reference and implement the clock signal\n> > source in the framework of the clock controller. (@Rob)\n> > ---\n> > .../bindings/ata/baikal,bt1-ahci.yaml | 116 ++++++++++++++++++\n> > 1 file changed, 116 insertions(+)\n> > create mode 100644 Documentation/devicetree/bindings/ata/baikal,bt1-ahci.yaml\n> > \n> > diff --git a/Documentation/devicetree/bindings/ata/baikal,bt1-ahci.yaml b/Documentation/devicetree/bindings/ata/baikal,bt1-ahci.yaml\n> > new file mode 100644\n> > index 000000000000..d5fbd7d561d8\n> > --- /dev/null\n> > +++ b/Documentation/devicetree/bindings/ata/baikal,bt1-ahci.yaml\n> > @@ -0,0 +1,116 @@\n> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)\n> > +%YAML 1.2\n> > +---\n> > +$id: http://devicetree.org/schemas/ata/baikal,bt1-ahci.yaml#\n> > +$schema: http://devicetree.org/meta-schemas/core.yaml#\n> > +\n> > +title: Baikal-T1 SoC AHCI SATA controller\n> > +\n> > +maintainers:\n> > + - Serge Semin \n> > +\n> > +description: |\n> > + AHCI SATA controller embedded into the Baikal-T1 SoC is based on the\n> > + DWC AHCI SATA v4.10a IP-core.\n> > +\n> > +allOf:\n> > + - $ref: snps,dwc-ahci.yaml#\n> > +\n> > +properties:\n> > + compatible:\n> > + contains:\n> > + const: baikal,bt1-ahci\n> > +\n> > + clocks:\n> > + items:\n> > + - description: Peripheral APB bus clock source\n> > + - description: Application AXI BIU clock\n> > + - description: SATA Ports reference clock\n> > +\n> > + clock-names:\n> > + items:\n> > + - const: pclk\n> > + - const: aclk\n> > + - const: ref\n> > +\n> > + resets:\n> > + items:\n> > + - description: Application AXI BIU domain reset\n> > + - description: SATA Ports clock domain reset\n> > +\n> > + reset-names:\n> > + items:\n> > + - const: arst\n> > + - const: ref\n> > +\n> > + ports-implemented:\n> > + maximum: 0x3\n> > +\n> > +patternProperties:\n> > + \"^sata-port@[0-9a-e]$\":\n> > + $ref: /schemas/ata/snps,dwc-ahci.yaml#/$defs/dwc-ahci-port\n> > +\n> > + properties:\n> > + reg:\n> > + minimum: 0\n> > + maximum: 1\n> > +\n> > + snps,tx-ts-max:\n> > + $ref: /schemas/types.yaml#/definitions/uint32\n> > + description:\n> > + Due to having AXI3 bus interface utilized the maximum Tx DMA\n> > + transaction size can't exceed 16 beats (AxLEN[3:0]).\n> > + enum: [ 1, 2, 4, 8, 16 ]\n> > +\n> > + snps,rx-ts-max:\n> > + $ref: /schemas/types.yaml#/definitions/uint32\n> > + description:\n> > + Due to having AXI3 bus interface utilized the maximum Rx DMA\n> > + transaction size can't exceed 16 beats (AxLEN[3:0]).\n> > + enum: [ 1, 2, 4, 8, 16 ]\n> > +\n> > + unevaluatedProperties: false\n> > +\n> > +required:\n> > + - compatible\n> > + - reg\n> > + - interrupts\n> > + - clocks\n> > + - clock-names\n> > + - resets\n> > +\n> > +unevaluatedProperties: false\n> > +\n> > +examples:\n> > + - |\n> > + sata@1f050000 {\n> > + compatible = \"baikal,bt1-ahci\", \"snps,dwc-ahci\";\n> \n\n> Just drop 'snps,dwc-ahci'. The generic IP block fallbacks have proven to \n> be useless.\n\nPlease see my answer to your comment to the patch\n[PATCH v4 17/23] dt-bindings: ata: ahci: Add DWC AHCI SATA controller DT schema\nin this series here:\nhttps://lore.kernel.org/linux-ide/20220617193744.av27axznbogademt@mobilestation/\nLet's settle the fallback usage in general otherwise I'll keep\nsubmitting patches with such functionality and will always be getting\nyour notes in that regard.)\n\n-Sergey\n\n\n> \n> > + reg = <0x1f050000 0x2000>;\n> > + #address-cells = <1>;\n> > + #size-cells = <0>;\n> > +\n> > + interrupts = <0 64 4>;\n> > +\n> > + clocks = <&ccu_sys 1>, <&ccu_axi 2>, <&sata_ref_clk>;\n> > + clock-names = \"pclk\", \"aclk\", \"ref\";\n> > +\n> > + resets = <&ccu_axi 2>, <&ccu_sys 0>;\n> > + reset-names = \"arst\", \"ref\";\n> > +\n> > + ports-implemented = <0x3>;\n> > +\n> > + sata-port@0 {\n> > + reg = <0>;\n> > +\n> > + snps,tx-ts-max = <4>;\n> > + snps,rx-ts-max = <4>;\n> > + };\n> > +\n> > + sata-port@1 {\n> > + reg = <1>;\n> > +\n> > + snps,tx-ts-max = <4>;\n> > + snps,rx-ts-max = <4>;\n> > + };\n> > + };\n> > +...\n> > -- \n> > 2.35.1\n> > \n> >","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["bilbo.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20210112 header.b=oLc+30L5;\n\tdkim-atps=neutral","ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2620:137:e000::1:20; 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