get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/patches/1525721/
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 1525721,
    "url": "http://patchwork.ozlabs.org/api/patches/1525721/",
    "web_url": "http://patchwork.ozlabs.org/project/openvswitch/patch/38c9b941c662fc08a47f5759a3e6b32267212590.1631094144.git.grive@u256.net/",
    "project": {
        "id": 47,
        "url": "http://patchwork.ozlabs.org/api/projects/47/",
        "name": "Open vSwitch",
        "link_name": "openvswitch",
        "list_id": "ovs-dev.openvswitch.org",
        "list_email": "ovs-dev@openvswitch.org",
        "web_url": "http://openvswitch.org/",
        "scm_url": "git@github.com:openvswitch/ovs.git",
        "webscm_url": "https://github.com/openvswitch/ovs",
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<38c9b941c662fc08a47f5759a3e6b32267212590.1631094144.git.grive@u256.net>",
    "list_archive_url": null,
    "date": "2021-09-08T09:47:35",
    "name": "[ovs-dev,v5,11/27] ovs-atomic: Expose atomic exchange operation",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "83f9741c1a040605cf414bb3d934fb9f12b89f85",
    "submitter": {
        "id": 78795,
        "url": "http://patchwork.ozlabs.org/api/people/78795/",
        "name": "Gaëtan Rivet",
        "email": "grive@u256.net"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/openvswitch/patch/38c9b941c662fc08a47f5759a3e6b32267212590.1631094144.git.grive@u256.net/mbox/",
    "series": [
        {
            "id": 261424,
            "url": "http://patchwork.ozlabs.org/api/series/261424/",
            "web_url": "http://patchwork.ozlabs.org/project/openvswitch/list/?series=261424",
            "date": "2021-09-08T09:47:24",
            "name": "dpif-netdev: Parallel offload processing",
            "version": 5,
            "mbox": "http://patchwork.ozlabs.org/series/261424/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/1525721/comments/",
    "check": "success",
    "checks": "http://patchwork.ozlabs.org/api/patches/1525721/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<ovs-dev-bounces@openvswitch.org>",
        "X-Original-To": [
            "incoming@patchwork.ozlabs.org",
            "ovs-dev@openvswitch.org"
        ],
        "Delivered-To": [
            "patchwork-incoming@bilbo.ozlabs.org",
            "ovs-dev@lists.linuxfoundation.org"
        ],
        "Authentication-Results": [
            "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n unprotected) header.d=u256.net header.i=@u256.net header.a=rsa-sha256\n header.s=fm2 header.b=wumMUmwI;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n unprotected) header.d=messagingengine.com header.i=@messagingengine.com\n header.a=rsa-sha256 header.s=fm3 header.b=IQzpW0lh;\n\tdkim-atps=neutral",
            "ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=openvswitch.org\n (client-ip=140.211.166.137; helo=smtp4.osuosl.org;\n envelope-from=ovs-dev-bounces@openvswitch.org; receiver=<UNKNOWN>)",
            "smtp1.osuosl.org (amavisd-new);\n dkim=pass (2048-bit key) header.d=u256.net header.b=\"wumMUmwI\";\n dkim=pass (2048-bit key) header.d=messagingengine.com\n header.b=\"IQzpW0lh\""
        ],
        "Received": [
            "from smtp4.osuosl.org (smtp4.osuosl.org [140.211.166.137])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest\n SHA256)\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 4H4HQq0zSDz9sW8\n\tfor <incoming@patchwork.ozlabs.org>; Wed,  8 Sep 2021 19:49:07 +1000 (AEST)",
            "from localhost (localhost [127.0.0.1])\n\tby smtp4.osuosl.org (Postfix) with ESMTP id 6BD6A4071E;\n\tWed,  8 Sep 2021 09:49:05 +0000 (UTC)",
            "from smtp4.osuosl.org ([127.0.0.1])\n\tby localhost (smtp4.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id ALVrd0_RTemn; Wed,  8 Sep 2021 09:49:04 +0000 (UTC)",
            "from lists.linuxfoundation.org (lf-lists.osuosl.org\n [IPv6:2605:bc80:3010:104::8cd3:938])\n\tby smtp4.osuosl.org (Postfix) with ESMTPS id 52B3A4253E;\n\tWed,  8 Sep 2021 09:49:03 +0000 (UTC)",
            "from lf-lists.osuosl.org (localhost [127.0.0.1])\n\tby lists.linuxfoundation.org (Postfix) with ESMTP id 0822CC0011;\n\tWed,  8 Sep 2021 09:49:03 +0000 (UTC)",
            "from smtp1.osuosl.org (smtp1.osuosl.org [IPv6:2605:bc80:3010::138])\n by lists.linuxfoundation.org (Postfix) with ESMTP id 023CCC000D\n for <ovs-dev@openvswitch.org>; Wed,  8 Sep 2021 09:49:01 +0000 (UTC)",
            "from localhost (localhost [127.0.0.1])\n by smtp1.osuosl.org (Postfix) with ESMTP id 8AB6F83595\n for <ovs-dev@openvswitch.org>; Wed,  8 Sep 2021 09:48:23 +0000 (UTC)",
            "from smtp1.osuosl.org ([127.0.0.1])\n by localhost (smtp1.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n with ESMTP id ussHt8s3KjAo for <ovs-dev@openvswitch.org>;\n Wed,  8 Sep 2021 09:48:21 +0000 (UTC)",
            "from wout3-smtp.messagingengine.com (wout3-smtp.messagingengine.com\n [64.147.123.19])\n by smtp1.osuosl.org (Postfix) with ESMTPS id 80AFA831A0\n for <ovs-dev@openvswitch.org>; Wed,  8 Sep 2021 09:48:19 +0000 (UTC)",
            "from compute2.internal (compute2.nyi.internal [10.202.2.42])\n by mailout.west.internal (Postfix) with ESMTP id DC46132009D7;\n Wed,  8 Sep 2021 05:48:18 -0400 (EDT)",
            "from mailfrontend2 ([10.202.2.163])\n by compute2.internal (MEProxy); Wed, 08 Sep 2021 05:48:19 -0400",
            "by mail.messagingengine.com (Postfix) with ESMTPA; Wed,\n 8 Sep 2021 05:48:17 -0400 (EDT)"
        ],
        "X-Virus-Scanned": [
            "amavisd-new at osuosl.org",
            "amavisd-new at osuosl.org"
        ],
        "X-Greylist": "from auto-whitelisted by SQLgrey-1.8.0",
        "DKIM-Signature": [
            "v=1; a=rsa-sha256; c=relaxed/relaxed; d=u256.net; h=from\n :to:cc:subject:date:message-id:in-reply-to:references\n :mime-version:content-transfer-encoding; s=fm2; bh=ylecnYVKo/EE7\n PP8Hn2/ocTh6Uab8EQY5R4pM6UX9AM=; b=wumMUmwIndPvnwIfB2B/v3nN26MeE\n 3TrSOOys+LELPs0W9/RbH/rjkvurMZv81EBpH8/yLzrr3eE7/+TBhmaHdQIL4Q91\n adLNEzhQ+4NoqL5XsTx1dwiVR/N9QzAwKYs7Ro7Th2xiPZuRNhXxr7co8JtEqPP+\n whF5dsRiik58MTvVmqE9G2OZX/Owcc9jXWK6/6ozt0xZWpdKRXuNkm4Ci6j/OY5t\n JoZJRXlGMQDSBE0Zf5bP5fKU9HJoo72i9sJ+tnjcAYgnBzS3Z4aFDT7m0nlIakXW\n 7Y98OvruBUChMrBrnIsUEVxF2QAWuDqrW5i2o0zZLhiliig0fTdnBWifg==",
            "v=1; a=rsa-sha256; c=relaxed/relaxed; d=\n messagingengine.com; h=cc:content-transfer-encoding:date:from\n :in-reply-to:message-id:mime-version:references:subject:to\n :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s=\n fm3; bh=ylecnYVKo/EE7PP8Hn2/ocTh6Uab8EQY5R4pM6UX9AM=; b=IQzpW0lh\n kZBhPi70cKylIVCyi8hFExOyTmi6bofx2KB0FeYjyQuccpku4RXcaeXp7Sr5YmqU\n vYze9416ySYTdrGiEcNq0YIYy1kEkCUFOVIx+GtLOICELs5Bl1pzyoL9H6IMekSM\n r/P1PtgXJarPAnq9DSbjLV+DxFSFE2roMxdc5JWb6LbmaFp+ETYE/Kzb84Q/8FJs\n SRnjjo4YZGwnCkE+nW+NK/cR+SjfC2hRJzlQ8UHHt82xj9fbksg7Oiwab8/Nbe2p\n 1j5vHaznTtMAHMkS/HjKP3vswUW6y2oeaR33MQfSc1JnuMeAgutKshBeZqGirT5o\n rSQIb7WbiuQQiA=="
        ],
        "X-ME-Sender": "<xms:4oY4Ycd0l2i-gpZOtA4e6224hSkYmE8ilYszUutf-0badNOJyxAmmw>\n <xme:4oY4YeOe0Rz9zuq4hCI0sD1JGtK4SRBWfpb5yjz4xrGvPepo1ZYvqokZlL0nl7fQH\n qLrkcfcKambW088Tmo>",
        "X-ME-Received": "\n <xmr:4oY4YdjwpOQ5MkBB7YryOxq_skvSsf-XpTbenHBA8HiHcSS3tlirBnp_Abd6W3j2iBitxZt99Tr1F94qZ3Qr-RnGbw>",
        "X-ME-Proxy-Cause": "\n gggruggvucftvghtrhhoucdtuddrgedvtddrudefjedgudekucetufdoteggodetrfdotf\n fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen\n uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne\n cujfgurhephffvufffkffojghfggfgsedtkeertdertddtnecuhfhrohhmpefirggvthgr\n nhcutfhivhgvthcuoehgrhhivhgvsehuvdehiedrnhgvtheqnecuggftrfgrthhtvghrnh\n ephefgveffkeetheetfeeifedvheelfeejfeehveduteejhfekuedtkeeiuedvteehnecu\n vehluhhsthgvrhfuihiivgepudenucfrrghrrghmpehmrghilhhfrhhomhepghhrihhvvg\n esuhdvheeirdhnvght",
        "X-ME-Proxy": "<xmx:4oY4YR8IoCbfaNpKDFkNrkAWI6k_TKaqTNMEJbB9JQ8oAR-IWuhnXA>\n <xmx:4oY4YYsTR9Sp4h7tw1fRRhOsQ7yx0v9-dSZM7cS-385EN0LEX8P5iA>\n <xmx:4oY4YYHQ3Ew9m8co1wSFeafI1YgoxlU24sYYBrJWAl-pF4768DMHhw>\n <xmx:4oY4YVVYfugAQ5EFuxSa3_HIjU5eCP0lZDI-zDaEZGPDzvo1JLztzQ>",
        "From": "Gaetan Rivet <grive@u256.net>",
        "To": "ovs-dev@openvswitch.org",
        "Date": "Wed,  8 Sep 2021 11:47:35 +0200",
        "Message-Id": "\n <38c9b941c662fc08a47f5759a3e6b32267212590.1631094144.git.grive@u256.net>",
        "X-Mailer": "git-send-email 2.31.1",
        "In-Reply-To": "<cover.1631094144.git.grive@u256.net>",
        "References": "<cover.1631094144.git.grive@u256.net>",
        "MIME-Version": "1.0",
        "Cc": "Eli Britstein <elibr@nvidia.com>,\n Maxime Coquelin <maxime.coquelin@redhat.com>",
        "Subject": "[ovs-dev] [PATCH v5 11/27] ovs-atomic: Expose atomic exchange\n\toperation",
        "X-BeenThere": "ovs-dev@openvswitch.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "<ovs-dev.openvswitch.org>",
        "List-Unsubscribe": "<https://mail.openvswitch.org/mailman/options/ovs-dev>,\n <mailto:ovs-dev-request@openvswitch.org?subject=unsubscribe>",
        "List-Archive": "<http://mail.openvswitch.org/pipermail/ovs-dev/>",
        "List-Post": "<mailto:ovs-dev@openvswitch.org>",
        "List-Help": "<mailto:ovs-dev-request@openvswitch.org?subject=help>",
        "List-Subscribe": "<https://mail.openvswitch.org/mailman/listinfo/ovs-dev>,\n <mailto:ovs-dev-request@openvswitch.org?subject=subscribe>",
        "Content-Type": "text/plain; charset=\"us-ascii\"",
        "Content-Transfer-Encoding": "7bit",
        "Errors-To": "ovs-dev-bounces@openvswitch.org",
        "Sender": "\"dev\" <ovs-dev-bounces@openvswitch.org>"
    },
    "content": "The atomic exchange operation is a useful primitive that should be\navailable as well.  Most compilers already expose or offer a way\nto use it, but a single symbol needs to be defined.\n\nSigned-off-by: Gaetan Rivet <grive@u256.net>\nReviewed-by: Eli Britstein <elibr@nvidia.com>\nReviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>\n---\n lib/ovs-atomic-c++.h      |  3 +++\n lib/ovs-atomic-clang.h    |  5 +++++\n lib/ovs-atomic-gcc4+.h    |  5 +++++\n lib/ovs-atomic-gcc4.7+.h  |  5 +++++\n lib/ovs-atomic-i586.h     |  5 +++++\n lib/ovs-atomic-locked.h   |  9 +++++++++\n lib/ovs-atomic-msvc.h     | 22 ++++++++++++++++++++++\n lib/ovs-atomic-pthreads.h |  5 +++++\n lib/ovs-atomic-x86_64.h   |  5 +++++\n lib/ovs-atomic.h          |  8 +++++++-\n 10 files changed, 71 insertions(+), 1 deletion(-)",
    "diff": "diff --git a/lib/ovs-atomic-c++.h b/lib/ovs-atomic-c++.h\nindex d47b8dd39..8605fa9d3 100644\n--- a/lib/ovs-atomic-c++.h\n+++ b/lib/ovs-atomic-c++.h\n@@ -29,6 +29,9 @@ using std::atomic_compare_exchange_strong_explicit;\n using std::atomic_compare_exchange_weak;\n using std::atomic_compare_exchange_weak_explicit;\n \n+using std::atomic_exchange;\n+using std::atomic_exchange_explicit;\n+\n #define atomic_read(SRC, DST) \\\n     atomic_read_explicit(SRC, DST, memory_order_seq_cst)\n #define atomic_read_explicit(SRC, DST, ORDER)   \\\ndiff --git a/lib/ovs-atomic-clang.h b/lib/ovs-atomic-clang.h\nindex 34cc2faa7..cdf02a512 100644\n--- a/lib/ovs-atomic-clang.h\n+++ b/lib/ovs-atomic-clang.h\n@@ -67,6 +67,11 @@ typedef enum {\n #define atomic_compare_exchange_weak_explicit(DST, EXP, SRC, ORD1, ORD2) \\\n     __c11_atomic_compare_exchange_weak(DST, EXP, SRC, ORD1, ORD2)\n \n+#define atomic_exchange(RMW, ARG) \\\n+    atomic_exchange_explicit(RMW, ARG, memory_order_seq_cst)\n+#define atomic_exchange_explicit(RMW, ARG, ORDER) \\\n+    __c11_atomic_exchange(RMW, ARG, ORDER)\n+\n #define atomic_add(RMW, ARG, ORIG) \\\n     atomic_add_explicit(RMW, ARG, ORIG, memory_order_seq_cst)\n #define atomic_sub(RMW, ARG, ORIG) \\\ndiff --git a/lib/ovs-atomic-gcc4+.h b/lib/ovs-atomic-gcc4+.h\nindex 25bcf20a0..f9accde1a 100644\n--- a/lib/ovs-atomic-gcc4+.h\n+++ b/lib/ovs-atomic-gcc4+.h\n@@ -128,6 +128,11 @@ atomic_signal_fence(memory_order order)\n #define atomic_compare_exchange_weak_explicit   \\\n     atomic_compare_exchange_strong_explicit\n \n+#define atomic_exchange_explicit(DST, SRC, ORDER) \\\n+    __sync_lock_test_and_set(DST, SRC)\n+#define atomic_exchange(DST, SRC) \\\n+    atomic_exchange_explicit(DST, SRC, memory_order_seq_cst)\n+\n #define atomic_op__(RMW, OP, ARG, ORIG)                     \\\n     ({                                                      \\\n         typeof(RMW) rmw__ = (RMW);                          \\\ndiff --git a/lib/ovs-atomic-gcc4.7+.h b/lib/ovs-atomic-gcc4.7+.h\nindex 4c197ebe0..846e05775 100644\n--- a/lib/ovs-atomic-gcc4.7+.h\n+++ b/lib/ovs-atomic-gcc4.7+.h\n@@ -61,6 +61,11 @@ typedef enum {\n #define atomic_compare_exchange_weak_explicit(DST, EXP, SRC, ORD1, ORD2) \\\n     __atomic_compare_exchange_n(DST, EXP, SRC, true, ORD1, ORD2)\n \n+#define atomic_exchange_explicit(DST, SRC, ORDER) \\\n+    __atomic_exchange_n(DST, SRC, ORDER)\n+#define atomic_exchange(DST, SRC) \\\n+    atomic_exchange_explicit(DST, SRC, memory_order_seq_cst)\n+\n #define atomic_add(RMW, OPERAND, ORIG) \\\n         atomic_add_explicit(RMW, OPERAND, ORIG, memory_order_seq_cst)\n #define atomic_sub(RMW, OPERAND, ORIG) \\\ndiff --git a/lib/ovs-atomic-i586.h b/lib/ovs-atomic-i586.h\nindex 9a385ce84..35a0959ff 100644\n--- a/lib/ovs-atomic-i586.h\n+++ b/lib/ovs-atomic-i586.h\n@@ -400,6 +400,11 @@ atomic_signal_fence(memory_order order)\n #define atomic_compare_exchange_weak_explicit   \\\n     atomic_compare_exchange_strong_explicit\n \n+#define atomic_exchange_explicit(RMW, ARG, ORDER) \\\n+    atomic_exchange__(RMW, ARG, ORDER)\n+#define atomic_exchange(RMW, ARG) \\\n+    atomic_exchange_explicit(RMW, ARG, memory_order_seq_cst)\n+\n #define atomic_add__(RMW, ARG, CLOB)            \\\n     asm volatile(\"lock; xadd %0,%1 ; \"          \\\n                  \"# atomic_add__     \"          \\\ndiff --git a/lib/ovs-atomic-locked.h b/lib/ovs-atomic-locked.h\nindex f8f0ba2a5..bf38c4a43 100644\n--- a/lib/ovs-atomic-locked.h\n+++ b/lib/ovs-atomic-locked.h\n@@ -31,6 +31,15 @@ void atomic_unlock__(void *);\n          atomic_unlock__(DST),                          \\\n          false)))\n \n+#define atomic_exchange_locked(DST, SRC)     \\\n+    ({                                       \\\n+        atomic_lock__(DST);                  \\\n+        typeof(*(DST)) __tmp = *(DST);       \\\n+        *(DST) = SRC;                        \\\n+        atomic_unlock__(DST);                \\\n+        __tmp;                               \\\n+    })\n+\n #define atomic_op_locked_add +=\n #define atomic_op_locked_sub -=\n #define atomic_op_locked_or  |=\ndiff --git a/lib/ovs-atomic-msvc.h b/lib/ovs-atomic-msvc.h\nindex 9def887d3..ef8310269 100644\n--- a/lib/ovs-atomic-msvc.h\n+++ b/lib/ovs-atomic-msvc.h\n@@ -345,6 +345,28 @@ atomic_signal_fence(memory_order order)\n #define atomic_compare_exchange_weak_explicit \\\n         atomic_compare_exchange_strong_explicit\n \n+/* While intrinsics offering different memory ordering\n+ * are available in MSVC C compiler, they are not defined\n+ * in the C++ compiler. Ignore for compatibility.\n+ *\n+ * Use nested ternary operators as the GNU extension ({})\n+ * is not available.\n+ */\n+\n+#define atomic_exchange_explicit(DST, SRC, ORDER) \\\n+    ((sizeof *(DST) == 1) ? \\\n+        _InterlockedExchange8((char volatile *) DST, SRC) \\\n+    : (sizeof *(DST) == 2) ? \\\n+        _InterlockedExchange16((short volatile *) DST, SRC) \\\n+    : (sizeof *(DST) == 4) ? \\\n+        _InterlockedExchange((long int volatile *) DST, SRC) \\\n+    : (sizeof *(DST) == 8) ? \\\n+        _InterlockedExchange64((__int64 volatile *) DST, SRC) \\\n+    : (ovs_abort(), 0))\n+\n+#define atomic_exchange(DST, SRC) \\\n+        atomic_exchange_explicit(DST, SRC, memory_order_seq_cst)\n+\n /* MSVCs c++ compiler implements c11 atomics and looking through its\n  * implementation (in xatomic.h), orders are ignored for x86 platform.\n  * Do the same here. */\ndiff --git a/lib/ovs-atomic-pthreads.h b/lib/ovs-atomic-pthreads.h\nindex 12234e79e..570a67fe4 100644\n--- a/lib/ovs-atomic-pthreads.h\n+++ b/lib/ovs-atomic-pthreads.h\n@@ -77,6 +77,11 @@ atomic_signal_fence(memory_order order OVS_UNUSED)\n #define atomic_compare_exchange_weak_explicit   \\\n     atomic_compare_exchange_strong_explicit\n \n+#define atomic_exchange(DST, SRC) \\\n+    atomic_exchange_locked(DST, SRC)\n+#define atomic_exchange_explicit(DST, SRC, ORDER) \\\n+    ((void) (ORDER), atomic_exchange(DST, SRC))\n+\n #define atomic_add(RMW, ARG, ORIG) atomic_op_locked(RMW, add, ARG, ORIG)\n #define atomic_sub(RMW, ARG, ORIG) atomic_op_locked(RMW, sub, ARG, ORIG)\n #define atomic_or( RMW, ARG, ORIG) atomic_op_locked(RMW, or, ARG, ORIG)\ndiff --git a/lib/ovs-atomic-x86_64.h b/lib/ovs-atomic-x86_64.h\nindex 1e7d42707..3bdaf2f08 100644\n--- a/lib/ovs-atomic-x86_64.h\n+++ b/lib/ovs-atomic-x86_64.h\n@@ -274,6 +274,11 @@ atomic_signal_fence(memory_order order)\n #define atomic_compare_exchange_weak_explicit   \\\n     atomic_compare_exchange_strong_explicit\n \n+#define atomic_exchange_explicit(RMW, ARG, ORDER) \\\n+    atomic_exchange__(RMW, ARG, ORDER)\n+#define atomic_exchange(RMW, ARG) \\\n+    atomic_exchange_explicit(RMW, ARG, memory_order_seq_cst)\n+\n #define atomic_add__(RMW, ARG, CLOB)            \\\n     asm volatile(\"lock; xadd %0,%1 ; \"          \\\n                  \"# atomic_add__     \"          \\\ndiff --git a/lib/ovs-atomic.h b/lib/ovs-atomic.h\nindex 11fa19268..8fdce0cf8 100644\n--- a/lib/ovs-atomic.h\n+++ b/lib/ovs-atomic.h\n@@ -210,7 +210,7 @@\n  * In this section, A is an atomic type and C is the corresponding non-atomic\n  * type.\n  *\n- * The \"store\" and \"compare_exchange\" primitives match C11:\n+ * The \"store\", \"exchange\", and \"compare_exchange\" primitives match C11:\n  *\n  *     void atomic_store(A *object, C value);\n  *     void atomic_store_explicit(A *object, C value, memory_order);\n@@ -244,6 +244,12 @@\n  *         efficiently, so it should be used if the application will need to\n  *         loop anyway.\n  *\n+ *     C atomic_exchange(A *object, C desired);\n+ *     C atomic_exchange_explicit(A *object, C desired, memory_order);\n+ *\n+ *         Atomically stores 'desired' into '*object', returning the value\n+ *         previously held.\n+ *\n  * The following primitives differ from the C11 ones (and have different names)\n  * because there does not appear to be a way to implement the standard\n  * primitives in standard C:\n",
    "prefixes": [
        "ovs-dev",
        "v5",
        "11/27"
    ]
}