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GET /api/patches/1524347/
HTTP 200 OK
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{
    "id": 1524347,
    "url": "http://patchwork.ozlabs.org/api/patches/1524347/",
    "web_url": "http://patchwork.ozlabs.org/project/openvswitch/patch/20210903135316.2449305-1-kumar.amber@intel.com/",
    "project": {
        "id": 47,
        "url": "http://patchwork.ozlabs.org/api/projects/47/",
        "name": "Open vSwitch",
        "link_name": "openvswitch",
        "list_id": "ovs-dev.openvswitch.org",
        "list_email": "ovs-dev@openvswitch.org",
        "web_url": "http://openvswitch.org/",
        "scm_url": "git@github.com:openvswitch/ovs.git",
        "webscm_url": "https://github.com/openvswitch/ovs",
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<20210903135316.2449305-1-kumar.amber@intel.com>",
    "list_archive_url": null,
    "date": "2021-09-03T13:53:16",
    "name": "[ovs-dev,v1] configure: Allow opt-in to CPU ISA opts at compile time",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "18b3cd87539f2e6be1a193bbc3773532f7fa47d4",
    "submitter": {
        "id": 81621,
        "url": "http://patchwork.ozlabs.org/api/people/81621/",
        "name": "Kumar Amber",
        "email": "Kumar.amber@intel.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/openvswitch/patch/20210903135316.2449305-1-kumar.amber@intel.com/mbox/",
    "series": [
        {
            "id": 260910,
            "url": "http://patchwork.ozlabs.org/api/series/260910/",
            "web_url": "http://patchwork.ozlabs.org/project/openvswitch/list/?series=260910",
            "date": "2021-09-03T13:53:16",
            "name": "[ovs-dev,v1] configure: Allow opt-in to CPU ISA opts at compile time",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/260910/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/1524347/comments/",
    "check": "success",
    "checks": "http://patchwork.ozlabs.org/api/patches/1524347/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<ovs-dev-bounces@openvswitch.org>",
        "X-Original-To": [
            "incoming@patchwork.ozlabs.org",
            "ovs-dev@openvswitch.org"
        ],
        "Delivered-To": [
            "patchwork-incoming@bilbo.ozlabs.org",
            "ovs-dev@lists.linuxfoundation.org"
        ],
        "Authentication-Results": "ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=openvswitch.org\n (client-ip=140.211.166.133; helo=smtp2.osuosl.org;\n envelope-from=ovs-dev-bounces@openvswitch.org; receiver=<UNKNOWN>)",
        "Received": [
            "from smtp2.osuosl.org (smtp2.osuosl.org [140.211.166.133])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest\n SHA256)\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 4H1KYX2pTdz9sPf\n\tfor <incoming@patchwork.ozlabs.org>; Sat,  4 Sep 2021 00:14:39 +1000 (AEST)",
            "from localhost (localhost [127.0.0.1])\n\tby smtp2.osuosl.org (Postfix) with ESMTP id C8E62407F0;\n\tFri,  3 Sep 2021 14:14:36 +0000 (UTC)",
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            "from smtp1.osuosl.org (smtp1.osuosl.org [140.211.166.138])\n by lists.linuxfoundation.org (Postfix) with ESMTP id 0F274C000E\n for <ovs-dev@openvswitch.org>; Fri,  3 Sep 2021 14:14:33 +0000 (UTC)",
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            "from mga06.intel.com (mga06.intel.com [134.134.136.31])\n by smtp1.osuosl.org (Postfix) with ESMTPS id 7E0D780CC4\n for <ovs-dev@openvswitch.org>; Fri,  3 Sep 2021 14:14:29 +0000 (UTC)",
            "from orsmga003.jf.intel.com ([10.7.209.27])\n by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 03 Sep 2021 07:14:28 -0700",
            "from bmca4bf01706bbf.iind.intel.com (HELO localhost.localdomain)\n ([10.190.213.111])\n by orsmga003.jf.intel.com with ESMTP; 03 Sep 2021 07:14:20 -0700"
        ],
        "X-Virus-Scanned": [
            "amavisd-new at osuosl.org",
            "amavisd-new at osuosl.org"
        ],
        "X-Greylist": "domain auto-whitelisted by SQLgrey-1.8.0",
        "X-IronPort-AV": [
            "E=McAfee;i=\"6200,9189,10096\"; a=\"280445066\"",
            "E=Sophos;i=\"5.85,265,1624345200\"; d=\"scan'208\";a=\"280445066\"",
            "E=Sophos;i=\"5.85,265,1624345200\"; d=\"scan'208\";a=\"429674012\""
        ],
        "X-ExtLoop1": "1",
        "From": "Kumar Amber <kumar.amber@intel.com>",
        "To": "ovs-dev@openvswitch.org",
        "Date": "Fri,  3 Sep 2021 19:23:16 +0530",
        "Message-Id": "<20210903135316.2449305-1-kumar.amber@intel.com>",
        "X-Mailer": "git-send-email 2.25.1",
        "MIME-Version": "1.0",
        "Cc": "i.maximets@ovn.org, fbl@sysclose.org, Kumar Amber <kumar.amber@intel.com>",
        "Subject": "[ovs-dev] [PATCH v1] configure: Allow opt-in to CPU ISA opts at\n\tcompile time",
        "X-BeenThere": "ovs-dev@openvswitch.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "<ovs-dev.openvswitch.org>",
        "List-Unsubscribe": "<https://mail.openvswitch.org/mailman/options/ovs-dev>,\n <mailto:ovs-dev-request@openvswitch.org?subject=unsubscribe>",
        "List-Archive": "<http://mail.openvswitch.org/pipermail/ovs-dev/>",
        "List-Post": "<mailto:ovs-dev@openvswitch.org>",
        "List-Help": "<mailto:ovs-dev-request@openvswitch.org?subject=help>",
        "List-Subscribe": "<https://mail.openvswitch.org/mailman/listinfo/ovs-dev>,\n <mailto:ovs-dev-request@openvswitch.org?subject=subscribe>",
        "Content-Type": "text/plain; charset=\"us-ascii\"",
        "Content-Transfer-Encoding": "7bit",
        "Errors-To": "ovs-dev-bounces@openvswitch.org",
        "Sender": "\"dev\" <ovs-dev-bounces@openvswitch.org>"
    },
    "content": "This commit allows \"opt-in\" to CPU ISA optimized implementations of\nOVS SW datapath components at compile time. This can be useful in some\ndeployments where the CPU ISA optimized implementation is to be chosen\nby default.\n\nIf an subtable implementation is not available due to ISA not being available,\nit will not be selected.\n\nWith --enable-cpu-isa on an AVX512 capable CPU, the dpcls_avx512_gather,\nthe DPIF AVX512, MFEX AVX512 ISA optimized implementation is automatically\nenabled.\n\nThe default is off, so unless ./configure --enable-cpu-isa is passed,\nthe behaviour of the default OVS compile is not changed.\n\nSigned-off-by: Kumar Amber <kumar.amber@intel.com>\nSigned-off-by: Harry van Haaren <harry.van.haaren@intel.com>\nCo-authored-by: Harry van Haaren <harry.van.haaren@intel.com>\n---\n Documentation/topics/dpdk/bridge.rst |  9 +++++++++\n NEWS                                 |  2 ++\n acinclude.m4                         | 17 +++++++++++++++++\n configure.ac                         |  1 +\n lib/dpif-netdev-lookup.c             |  8 +++++++-\n lib/dpif-netdev-private-dpif.c       |  2 +-\n lib/dpif-netdev-private-extract.c    |  2 ++\n 7 files changed, 39 insertions(+), 2 deletions(-)",
    "diff": "diff --git a/Documentation/topics/dpdk/bridge.rst b/Documentation/topics/dpdk/bridge.rst\nindex f645b9ade..8568ec365 100644\n--- a/Documentation/topics/dpdk/bridge.rst\n+++ b/Documentation/topics/dpdk/bridge.rst\n@@ -436,3 +436,12 @@ the following test-case in tests/system-dpdk.at ::\n \n     make check-dpdk TESTSUITEFLAGS='-k MFEX'\n     OVS-DPDK - MFEX Autovalidator Fuzzy\n+\n+Enabling all AVX512 options\n+---------------------------\n+\n+A user can enable all the three DPIF, Miniflow Extract and DPLCS optimized\n+AVX512 options at build time, if the CPU supports the required AVX512 ISA\n+by using the following command ::\n+\n+    ./configure --enable-cpu-isa\ndiff --git a/NEWS b/NEWS\nindex 1f2adf718..8d700595b 100644\n--- a/NEWS\n+++ b/NEWS\n@@ -68,6 +68,8 @@ v2.16.0 - 16 Aug 2021\n      * Add new 'pmd-rxq-isolate' option that can be set to 'false' in order\n        that pmd cores which are pinned with rxqs using 'pmd-rxq-affinity'\n        are available for assigning other non-pinned rxqs.\n+     * Add command and documentation to enable all AVX512 optimized options\n+       by default at build time.\n    - ovs-ctl:\n      * New option '--no-record-hostname' to disable hostname configuration\n        in ovsdb on startup.\ndiff --git a/acinclude.m4 b/acinclude.m4\nindex dba365ea1..75098f980 100644\n--- a/acinclude.m4\n+++ b/acinclude.m4\n@@ -33,6 +33,23 @@ AC_DEFUN([OVS_CHECK_MFEX_AUTOVALIDATOR], [\n   fi\n ])\n \n+dnl Set OVS DPCLS DPIF and MFEX to AVX512 opt at compile time?\n+AC_DEFUN([OVS_CHECK_CPU_ISA_OPT_IN], [\n+  AC_ARG_ENABLE([cpu-isa],\n+                [AC_HELP_STRING([--enable-cpu-isa],\n+                [Enable CPU ISA default enable.])],\n+                [isa=yes],[isa=no])\n+  AC_MSG_CHECKING([whether CPU ISA should be enabled by default])\n+  if test \"$isa\" != yes; then\n+    AC_MSG_RESULT([no])\n+  else\n+    AC_DEFINE([CPU_ISA_OPT_IN], [1],\n+              [DPIF AVX512, DPCLS AVX512, MFEX AVX512 is a\n+               default implementation.])\n+    AC_MSG_RESULT([yes])\n+  fi\n+])\n+\n dnl Set OVS DPCLS Autovalidator as default subtable search at compile time?\n dnl This enables automatically running all unit tests with all DPCLS\n dnl implementations.\ndiff --git a/configure.ac b/configure.ac\nindex eaa9bf7ee..47e64a98c 100644\n--- a/configure.ac\n+++ b/configure.ac\n@@ -182,6 +182,7 @@ OVS_CONDITIONAL_CC_OPTION([-Wno-unused-parameter], [HAVE_WNO_UNUSED_PARAMETER])\n OVS_ENABLE_WERROR\n OVS_ENABLE_SPARSE\n OVS_CTAGS_IDENTIFIERS\n+OVS_CHECK_CPU_ISA_OPT_IN\n OVS_CHECK_DPCLS_AUTOVALIDATOR\n OVS_CHECK_DPIF_AVX512_DEFAULT\n OVS_CHECK_MFEX_AUTOVALIDATOR\ndiff --git a/lib/dpif-netdev-lookup.c b/lib/dpif-netdev-lookup.c\nindex bd0a99abe..0989c6a5f 100644\n--- a/lib/dpif-netdev-lookup.c\n+++ b/lib/dpif-netdev-lookup.c\n@@ -45,7 +45,13 @@ static struct dpcls_subtable_lookup_info_t subtable_lookups[] = {\n \n #if (__x86_64__ && HAVE_AVX512F && HAVE_LD_AVX512_GOOD && __SSE4_2__)\n     /* Only available on x86_64 bit builds with SSE 4.2 used for OVS core. */\n-    { .prio = 0,\n+    {\n+#ifdef CPU_ISA_OPT_IN\n+      /* Allow Autovalidator to override, but higher than default scalar. */\n+      .prio = 100,\n+#else\n+      .prio = 0,\n+#endif\n       .probe = dpcls_subtable_avx512_gather_probe,\n       .name = \"avx512_gather\", },\n #else\ndiff --git a/lib/dpif-netdev-private-dpif.c b/lib/dpif-netdev-private-dpif.c\nindex 84d4ec156..22761c10e 100644\n--- a/lib/dpif-netdev-private-dpif.c\n+++ b/lib/dpif-netdev-private-dpif.c\n@@ -60,7 +60,7 @@ dp_netdev_impl_get_default(void)\n \n /* Configure-time overriding to run test suite on all implementations. */\n #if (__x86_64__ && HAVE_AVX512F && HAVE_LD_AVX512_GOOD && __SSE4_2__)\n-#ifdef DPIF_AVX512_DEFAULT\n+#if defined(DPIF_AVX512_DEFAULT) || defined(CPU_ISA_OPT_IN)\n         dp_netdev_input_func_probe probe;\n \n         /* Check if the compiled default is compatible. */\ndiff --git a/lib/dpif-netdev-private-extract.c b/lib/dpif-netdev-private-extract.c\nindex 7a06dbf6f..482aa1f37 100644\n--- a/lib/dpif-netdev-private-extract.c\n+++ b/lib/dpif-netdev-private-extract.c\n@@ -105,6 +105,8 @@ dpif_miniflow_extract_init(void)\n     atomic_uintptr_t *mfex_func = (void *)&default_mfex_func;\n #ifdef MFEX_AUTOVALIDATOR_DEFAULT\n     int mfex_idx = MFEX_IMPL_AUTOVALIDATOR;\n+#elif CPU_ISA_OPT_IN\n+    int mfex_idx = MFEX_IMPL_STUDY;\n #else\n     int mfex_idx = MFEX_IMPL_SCALAR;\n #endif\n",
    "prefixes": [
        "ovs-dev",
        "v1"
    ]
}