[{"id":2656230,"web_url":"http://patchwork.ozlabs.org/comment/2656230/","msgid":"<87zgyqdn3d.fsf@igel.home>","date":"2021-03-26T14:08:22","subject":"Re: [PATCH v3 11/17] riscv: Convert to GENERIC_CMDLINE","submitter":{"id":2170,"url":"http://patchwork.ozlabs.org/api/people/2170/","name":"Andreas Schwab","email":"schwab@linux-m68k.org"},"content":"On Mär 26 2021, Christophe Leroy wrote:\n\n> diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c\n> index f8f15332caa2..e7c91ee478d1 100644\n> --- a/arch/riscv/kernel/setup.c\n> +++ b/arch/riscv/kernel/setup.c\n> @@ -20,6 +20,7 @@\n> #include \n> #include \n> #include \n> +#include \n> \n> #include \n> #include \n> @@ -228,10 +229,8 @@ static void __init parse_dtb(void)\n> \t}\n> \n> \tpr_err(\"No DTB passed to the kernel\\n\");\n> -#ifdef CONFIG_CMDLINE_FORCE\n> -\tstrlcpy(boot_command_line, CONFIG_CMDLINE, COMMAND_LINE_SIZE);\n> +\tcmdline_build(boot_command_line, NULL, COMMAND_LINE_SIZE);\n> \tpr_info(\"Forcing kernel command line to: %s\\n\", boot_command_line);\n\nShouldn't that message become conditional in some way?\n\nAndreas.","headers":{"Return-Path":"\n ","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Authentication-Results":["ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org\n (client-ip=112.213.38.117; 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charset=utf-8","Content-Transfer-Encoding":"8bit","X-BeenThere":"linuxppc-dev@lists.ozlabs.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"Linux on PowerPC Developers Mail List ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Cc":"linux-arch@vger.kernel.org, robh@kernel.org,\n microblaze ,\n daniel@gimpelevich.san-francisco.ca.us, devicetree@vger.kernel.org,\n linux-sh@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,\n linux-xtensa@linux-xtensa.org, x86@kernel.org, linux-kernel@vger.kernel.org,\n nios2 , linux-mips@vger.kernel.org,\n openrisc@lists.librecores.org, linux-hexagon@vger.kernel.org,\n sparclinux@vger.kernel.org, linux-riscv@lists.infradead.org, will@kernel.org,\n linux-arm-kernel@lists.infradead.org, danielwa@cisco.com","Errors-To":"linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org","Sender":"\"Linuxppc-dev\"\n "}},{"id":2656249,"web_url":"http://patchwork.ozlabs.org/comment/2656249/","msgid":"<81a7e63f-57d4-5c81-acc5-35278fe5bb04@csgroup.eu>","date":"2021-03-26T14:20:20","subject":"Re: [PATCH v3 11/17] riscv: Convert to GENERIC_CMDLINE","submitter":{"id":79086,"url":"http://patchwork.ozlabs.org/api/people/79086/","name":"Christophe Leroy","email":"christophe.leroy@csgroup.eu"},"content":"Le 26/03/2021 à 15:08, Andreas Schwab a écrit :\n> On Mär 26 2021, Christophe Leroy wrote:\n> \n>> diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c\n>> index f8f15332caa2..e7c91ee478d1 100644\n>> --- a/arch/riscv/kernel/setup.c\n>> +++ b/arch/riscv/kernel/setup.c\n>> @@ -20,6 +20,7 @@\n>> #include \n>> #include \n>> #include \n>> +#include \n>> \n>> #include \n>> #include \n>> @@ -228,10 +229,8 @@ static void __init parse_dtb(void)\n>> \t}\n>> \n>> \tpr_err(\"No DTB passed to the kernel\\n\");\n>> -#ifdef CONFIG_CMDLINE_FORCE\n>> -\tstrlcpy(boot_command_line, CONFIG_CMDLINE, COMMAND_LINE_SIZE);\n>> +\tcmdline_build(boot_command_line, NULL, COMMAND_LINE_SIZE);\n>> \tpr_info(\"Forcing kernel command line to: %s\\n\", boot_command_line);\n> \n> Shouldn't that message become conditional in some way?\n> \n\nYou are right, I did something similar on ARM but looks like I missed it on RISCV.\n\nChristophe","headers":{"Return-Path":"\n ","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Authentication-Results":["ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org\n (client-ip=112.213.38.117; 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Win64; x64; rv:78.0) Gecko/20100101\n Thunderbird/78.9.0","MIME-Version":"1.0","In-Reply-To":"<87zgyqdn3d.fsf@igel.home>","Content-Type":"text/plain; charset=utf-8; format=flowed","Content-Language":"fr","Content-Transfer-Encoding":"8bit","X-BeenThere":"linuxppc-dev@lists.ozlabs.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"Linux on PowerPC Developers Mail List ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Cc":"linux-arch@vger.kernel.org, robh@kernel.org,\n microblaze ,\n daniel@gimpelevich.san-francisco.ca.us, devicetree@vger.kernel.org,\n linux-sh@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,\n linux-xtensa@linux-xtensa.org, x86@kernel.org, linux-kernel@vger.kernel.org,\n nios2 , linux-mips@vger.kernel.org,\n openrisc@lists.librecores.org, linux-hexagon@vger.kernel.org,\n sparclinux@vger.kernel.org, linux-riscv@lists.infradead.org, will@kernel.org,\n linux-arm-kernel@lists.infradead.org, danielwa@cisco.com","Errors-To":"linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org","Sender":"\"Linuxppc-dev\"\n "}},{"id":2656325,"web_url":"http://patchwork.ozlabs.org/comment/2656325/","msgid":"","date":"2021-03-26T15:26:47","subject":"Re: [PATCH v3 11/17] riscv: Convert to GENERIC_CMDLINE","submitter":{"id":62529,"url":"http://patchwork.ozlabs.org/api/people/62529/","name":"Rob Herring (Arm)","email":"robh@kernel.org"},"content":"On Fri, Mar 26, 2021 at 8:20 AM Christophe Leroy\n wrote:\n>\n>\n>\n> Le 26/03/2021 à 15:08, Andreas Schwab a écrit :\n> > On Mär 26 2021, Christophe Leroy wrote:\n> >\n> >> diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c\n> >> index f8f15332caa2..e7c91ee478d1 100644\n> >> --- a/arch/riscv/kernel/setup.c\n> >> +++ b/arch/riscv/kernel/setup.c\n> >> @@ -20,6 +20,7 @@\n> >> #include \n> >> #include \n> >> #include \n> >> +#include \n> >>\n> >> #include \n> >> #include \n> >> @@ -228,10 +229,8 @@ static void __init parse_dtb(void)\n> >> }\n> >>\n> >> pr_err(\"No DTB passed to the kernel\\n\");\n> >> -#ifdef CONFIG_CMDLINE_FORCE\n> >> - strlcpy(boot_command_line, CONFIG_CMDLINE, COMMAND_LINE_SIZE);\n> >> + cmdline_build(boot_command_line, NULL, COMMAND_LINE_SIZE);\n> >> pr_info(\"Forcing kernel command line to: %s\\n\", boot_command_line);\n> >\n> > Shouldn't that message become conditional in some way?\n> >\n>\n> You are right, I did something similar on ARM but looks like I missed it on RISCV.\n\nHow is this hunk even useful? Under what conditions can you boot\nwithout a DTB? Even with a built-in DTB, the DT cmdline handling would\nbe called.\n\nRob","headers":{"Return-Path":"\n ","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Authentication-Results":["ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org\n (client-ip=112.213.38.117; helo=lists.ozlabs.org;\n envelope-from=linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org;\n receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=Eg+BwZGA;\n\tdkim-atps=neutral","lists.ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=Eg+BwZGA;\n\tdkim-atps=neutral","lists.ozlabs.org; spf=pass (sender SPF authorized)\n smtp.mailfrom=kernel.org (client-ip=198.145.29.99; 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charset=\"UTF-8\"","Content-Transfer-Encoding":"quoted-printable","X-BeenThere":"linuxppc-dev@lists.ozlabs.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"Linux on PowerPC Developers Mail List ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Cc":"\"open list:GENERIC INCLUDE/ASM HEADER FILES\" ,\n devicetree@vger.kernel.org, microblaze ,\n Daniel Gimpelevich ,\n linux-xtensa@linux-xtensa.org, SH-Linux ,\n linuxppc-dev , X86 ML ,\n \"linux-kernel@vger.kernel.org\" ,\n nios2 ,\n \"open list:MIPS\" ,\n Openrisc ,\n Andreas Schwab , linux-hexagon@vger.kernel.org,\n sparclinux ,\n linux-riscv , Will Deacon ,\n linux-arm-kernel ,\n Daniel Walker ","Errors-To":"linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org","Sender":"\"Linuxppc-dev\"\n "}},{"id":2657796,"web_url":"http://patchwork.ozlabs.org/comment/2657796/","msgid":"<3ae0c2faa08f76efb8a446f262b712df@mailhost.ics.forth.gr>","date":"2021-03-30T00:52:17","subject":"Re: [PATCH v3 11/17] riscv: Convert to GENERIC_CMDLINE","submitter":{"id":75053,"url":"http://patchwork.ozlabs.org/api/people/75053/","name":"Nick Kossifidis","email":"mick@ics.forth.gr"},"content":"Στις 2021-03-26 17:26, Rob Herring έγραψε:\n> On Fri, Mar 26, 2021 at 8:20 AM Christophe Leroy\n> wrote:\n>> \n>> \n>> \n>> Le 26/03/2021 à 15:08, Andreas Schwab a écrit :\n>> > On Mär 26 2021, Christophe Leroy wrote:\n>> >\n>> >> diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c\n>> >> index f8f15332caa2..e7c91ee478d1 100644\n>> >> --- a/arch/riscv/kernel/setup.c\n>> >> +++ b/arch/riscv/kernel/setup.c\n>> >> @@ -20,6 +20,7 @@\n>> >> #include \n>> >> #include \n>> >> #include \n>> >> +#include \n>> >>\n>> >> #include \n>> >> #include \n>> >> @@ -228,10 +229,8 @@ static void __init parse_dtb(void)\n>> >> }\n>> >>\n>> >> pr_err(\"No DTB passed to the kernel\\n\");\n>> >> -#ifdef CONFIG_CMDLINE_FORCE\n>> >> - strlcpy(boot_command_line, CONFIG_CMDLINE, COMMAND_LINE_SIZE);\n>> >> + cmdline_build(boot_command_line, NULL, COMMAND_LINE_SIZE);\n>> >> pr_info(\"Forcing kernel command line to: %s\\n\", boot_command_line);\n>> >\n>> > Shouldn't that message become conditional in some way?\n>> >\n>> \n>> You are right, I did something similar on ARM but looks like I missed \n>> it on RISCV.\n> \n> How is this hunk even useful? Under what conditions can you boot\n> without a DTB? Even with a built-in DTB, the DT cmdline handling would\n> be called.\n> \n> Rob\n> \n\ncced Paul who introduced this:\nhttps://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git/commit/arch/riscv/kernel/setup.c?id=8fd6e05c7463b635e51ec7df0a1858c1b5a6e350","headers":{"Return-Path":"\n ","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Authentication-Results":["ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org\n (client-ip=112.213.38.117; helo=lists.ozlabs.org;\n envelope-from=linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org;\n receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n secure) header.d=ics.forth.gr header.i=@ics.forth.gr header.a=rsa-sha256\n header.s=av header.b=CXdKG8Ae;\n\tdkim-atps=neutral","lists.ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n secure) header.d=ics.forth.gr header.i=@ics.forth.gr header.a=rsa-sha256\n header.s=av header.b=CXdKG8Ae;\n\tdkim-atps=neutral","lists.ozlabs.org; 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charset=UTF-8;\n format=flowed","Content-Transfer-Encoding":"8bit","Date":"Tue, 30 Mar 2021 03:52:17 +0300","From":"Nick Kossifidis ","To":"Rob Herring ","Subject":"Re: [PATCH v3 11/17] riscv: Convert to GENERIC_CMDLINE","Organization":"FORTH","In-Reply-To":"\n ","References":"\n <46745e07b04139a22b5bd01dc37df97e6981e643.1616765870.git.christophe.leroy@csgroup.eu>\n <87zgyqdn3d.fsf@igel.home> <81a7e63f-57d4-5c81-acc5-35278fe5bb04@csgroup.eu>\n ","Message-ID":"<3ae0c2faa08f76efb8a446f262b712df@mailhost.ics.forth.gr>","X-Sender":"mick@mailhost.ics.forth.gr","User-Agent":"Roundcube Webmail/1.3.16","X-Brightmail-Tracker":"\n H4sIAAAAAAAAA+NgFjrCIsWRmVeSWpSXmKPExsXSHT1dWde5LCnB4AO/xZ1Jz9ktjh7vZbZo\n XriE2WL+kXOsFvd3NzJadOz6ymKx6fE1Vov3LTvYLC7vmsNm0blpK6PFts8tbBZz/kxhtlh5\n di27xe/v/1gtnnw8DVTceZnNom0Wv8X/PTvYLfqXdrBZNJxcwWrRcsfU4seGx6wOYh5Tfm9k\n 9fh68xyTx/0Hz1k9Fu95yeSxaVUnm8ehwx2MHi8Obmf22Lyk3mP9hm2MHudnLGT0+Ns1hdnj\n UvN1do/Pm+QCeKO4bFJSczLLUov07RK4MpqW3GYuuMdT8eD2fOYGxrVcXYycHBICJhKb5j1j\n 72Lk4hASOM4ocWFHFwtEwlRi9t5ORhCbV0BQ4uTMJ2BxZgELialX9jNC2PISzVtnM4PYLAKq\n Els+QMTZBDQl5l86CFYvIqAo8bttGivIAmaBz+wSj242AhVxcAgL2Essn2UHUsMvICzx6e5F\n VhCbUyBQ4uqL32wQB61hkjh69A8zxBEuEv8+TmeFOE5F4sPvB+wgc0SB7M1zlSYwCs5Ccuos\n JKfOQnLqAkbmVYwCiWXGepnJxXpp+UUlGXrpRZsYwRHN6LuD8fbmt3qHGJk4GA8xSnAwK4nw\n Ch9ITBDiTUmsrEotyo8vKs1JLT7EKM3BoiTOy6s3IV5IID2xJDU7NbUgtQgmy8TBKdXAZDF7\n Ibu7bpJ0S056lY5T1mb7vUI9xyRZInM7SjMP8ahbfi7Uu/0qNq1njospX8DU78dj3x2SfDtV\n xHr+FbGLEcWvzua/LQj7ONkr3DCLIUHfakKWSpDXwry3fhOKIt/ODEo56nXrAdt29SnP+nMU\n /0fe/8z4TdbTnDN88c+XOWxtenuYQhzmfH6zlLlrvXps4O6P71n8I2qa5vKWSe5VsPzLdTHu\n SsfRmr9zrF4xMis2pC6wc3hy+6X3kX3s6p2BTRKZ765un2UqyV7ZejbXdqbCqqDP7v8XdzH4\n y8tEl3xTvfqpobI9Nip3m3ir+7L5W7548iblXFzk8i1x838fU8lVvJ6yk1SXnTbzEFViKc5I\n NNRiLipOBAC7YhWKVwMAAA==","X-Mailman-Approved-At":"Tue, 30 Mar 2021 12:39:24 +1100","X-BeenThere":"linuxppc-dev@lists.ozlabs.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"Linux on PowerPC Developers Mail List ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Cc":"\"open list:GENERIC INCLUDE/ASM\n HEADER FILES\" , devicetree@vger.kernel.org,\n microblaze ,\n Daniel Gimpelevich ,\n linux-xtensa@linux-xtensa.org, SH-Linux ,\n linuxppc-dev , X86 ML ,\n linux-kernel@vger.kernel.org, \"open list:MIPS\" ,\n Openrisc ,\n Andreas Schwab , nios2 ,\n paul.walmsley@sifive.com, linux-hexagon@vger.kernel.org,\n sparclinux ,\n linux-riscv , Will Deacon ,\n linux-arm-kernel ,\n Daniel Walker ","Errors-To":"linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org","Sender":"\"Linuxppc-dev\"\n "}},{"id":2660449,"web_url":"http://patchwork.ozlabs.org/comment/2660449/","msgid":"","date":"2021-04-02T15:21:51","subject":"Re: [PATCH v3 11/17] riscv: Convert to GENERIC_CMDLINE","submitter":{"id":79086,"url":"http://patchwork.ozlabs.org/api/people/79086/","name":"Christophe Leroy","email":"christophe.leroy@csgroup.eu"},"content":"Le 26/03/2021 à 16:26, Rob Herring a écrit :\n> On Fri, Mar 26, 2021 at 8:20 AM Christophe Leroy\n> wrote:\n>>\n>>\n>>\n>> Le 26/03/2021 à 15:08, Andreas Schwab a écrit :\n>>> On Mär 26 2021, Christophe Leroy wrote:\n>>>\n>>>> diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c\n>>>> index f8f15332caa2..e7c91ee478d1 100644\n>>>> --- a/arch/riscv/kernel/setup.c\n>>>> +++ b/arch/riscv/kernel/setup.c\n>>>> @@ -20,6 +20,7 @@\n>>>> #include \n>>>> #include \n>>>> #include \n>>>> +#include \n>>>>\n>>>> #include \n>>>> #include \n>>>> @@ -228,10 +229,8 @@ static void __init parse_dtb(void)\n>>>> }\n>>>>\n>>>> pr_err(\"No DTB passed to the kernel\\n\");\n>>>> -#ifdef CONFIG_CMDLINE_FORCE\n>>>> - strlcpy(boot_command_line, CONFIG_CMDLINE, COMMAND_LINE_SIZE);\n>>>> + cmdline_build(boot_command_line, NULL, COMMAND_LINE_SIZE);\n>>>> pr_info(\"Forcing kernel command line to: %s\\n\", boot_command_line);\n>>>\n>>> Shouldn't that message become conditional in some way?\n>>>\n>>\n>> You are right, I did something similar on ARM but looks like I missed it on RISCV.\n> \n> How is this hunk even useful? Under what conditions can you boot\n> without a DTB? Even with a built-in DTB, the DT cmdline handling would\n> be called.\n> \n\nDon't know, I wanted to keep as is today.\n\nDo you think the hunk should be completely removed ?","headers":{"Return-Path":"\n ","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Authentication-Results":["ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org\n (client-ip=2404:9400:2:0:216:3eff:fee1:b9f1; helo=lists.ozlabs.org;\n envelope-from=linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org;\n receiver=)","lists.ozlabs.org; spf=pass (sender SPF authorized)\n smtp.mailfrom=csgroup.eu (client-ip=93.17.236.30; helo=pegase1.c-s.fr;\n envelope-from=christophe.leroy@csgroup.eu; receiver=)"],"Received":["from lists.ozlabs.org (lists.ozlabs.org\n [IPv6:2404:9400:2:0:216:3eff:fee1:b9f1])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange X25519 server-signature RSA-PSS (4096 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 4FBkRg0NlQz9sRf\n\tfor ; Sat, 3 Apr 2021 02:26:39 +1100 (AEDT)","from boromir.ozlabs.org (localhost [IPv6:::1])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 4FBkRf6SW5z3c9t\n\tfor ; Sat, 3 Apr 2021 02:26:38 +1100 (AEDT)","from pegase1.c-s.fr (pegase1.c-s.fr [93.17.236.30])\n (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n (No client certificate requested)\n by lists.ozlabs.org (Postfix) with ESMTPS id 4FBkL94qxcz3c41\n for ; Sat, 3 Apr 2021 02:21:53 +1100 (AEDT)","from localhost (mailhub1-int [192.168.12.234])\n by localhost (Postfix) with ESMTP id 4FBkL51pq3z9v2lh;\n Fri, 2 Apr 2021 17:21:49 +0200 (CEST)","from pegase1.c-s.fr ([192.168.12.234])\n by localhost (pegase1.c-s.fr [192.168.12.234]) (amavisd-new, port 10024)\n with ESMTP id OssVJYy-p_xH; Fri, 2 Apr 2021 17:21:49 +0200 (CEST)","from messagerie.si.c-s.fr (messagerie.si.c-s.fr [192.168.25.192])\n by pegase1.c-s.fr (Postfix) with ESMTP id 4FBkL50gT0z9v2lf;\n Fri, 2 Apr 2021 17:21:49 +0200 (CEST)","from localhost (localhost [127.0.0.1])\n by messagerie.si.c-s.fr (Postfix) with ESMTP id 155BE8BB7D;\n Fri, 2 Apr 2021 17:21:51 +0200 (CEST)","from messagerie.si.c-s.fr ([127.0.0.1])\n by localhost (messagerie.si.c-s.fr [127.0.0.1]) (amavisd-new, port 10023)\n with ESMTP id 6n2Gg89KkRnV; Fri, 2 Apr 2021 17:21:51 +0200 (CEST)","from [192.168.4.90] (unknown [192.168.4.90])\n by messagerie.si.c-s.fr (Postfix) with ESMTP id 1C4F58BB7C;\n Fri, 2 Apr 2021 17:21:50 +0200 (CEST)"],"X-Virus-Scanned":["Debian amavisd-new at c-s.fr","amavisd-new at c-s.fr"],"Subject":"Re: [PATCH v3 11/17] riscv: Convert to GENERIC_CMDLINE","To":"Rob Herring ","References":"\n <46745e07b04139a22b5bd01dc37df97e6981e643.1616765870.git.christophe.leroy@csgroup.eu>\n <87zgyqdn3d.fsf@igel.home> <81a7e63f-57d4-5c81-acc5-35278fe5bb04@csgroup.eu>\n ","From":"Christophe Leroy ","Message-ID":"","Date":"Fri, 2 Apr 2021 17:21:51 +0200","User-Agent":"Mozilla/5.0 (Windows NT 6.1; Win64; x64; rv:78.0) Gecko/20100101\n Thunderbird/78.9.0","MIME-Version":"1.0","In-Reply-To":"\n ","Content-Type":"text/plain; charset=utf-8; format=flowed","Content-Language":"fr","Content-Transfer-Encoding":"8bit","X-BeenThere":"linuxppc-dev@lists.ozlabs.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"Linux on PowerPC Developers Mail List ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Cc":"\"open list:GENERIC INCLUDE/ASM HEADER FILES\" ,\n devicetree@vger.kernel.org, microblaze ,\n Daniel Gimpelevich ,\n linux-xtensa@linux-xtensa.org, SH-Linux ,\n linuxppc-dev , X86 ML ,\n \"linux-kernel@vger.kernel.org\" ,\n nios2 ,\n \"open list:MIPS\" ,\n Openrisc ,\n Andreas Schwab , linux-hexagon@vger.kernel.org,\n sparclinux ,\n linux-riscv , Will Deacon ,\n linux-arm-kernel ,\n Daniel Walker ","Errors-To":"linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org","Sender":"\"Linuxppc-dev\"\n "}}]