[{"id":2196595,"web_url":"http://patchwork.ozlabs.org/comment/2196595/","msgid":"<20190618114815.GJ28892@ulmo>","list_archive_url":null,"date":"2019-06-18T11:48:15","subject":"Re: [PATCH V3 07/17] clk: tegra: save and restore CPU and System\n\tclocks context","submitter":{"id":26234,"url":"http://patchwork.ozlabs.org/api/people/26234/","name":"Thierry Reding","email":"thierry.reding@gmail.com"},"content":"On Tue, Jun 18, 2019 at 12:46:21AM -0700, Sowjanya Komatineni wrote:\n> During system suspend state, core power goes off and looses all the\n> CAR controller register settings.\n> \n> This patch creates APIs for saving and restoring the context of Tegra\n> CPUG, CPULP and SCLK.\n> \n> CPU and System clock context includes\n> - CPUG, CPULP, and SCLK burst policy settings for clock sourcea of all\n>   their normal states.\n> - SCLK divisor and System clock rate for restoring SCLK, AHB and APB\n>   rates on resume.\n> - OSC_DIV settings which are used as reference clock input to some PLLs.\n> - SPARE_REG and CLK_MASK settings.\n> \n> These APIs are used in Tegra210 clock driver during suspend and resume\n> operation.\n> \n> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>\n> ---\n>  drivers/clk/tegra/clk-tegra-super-gen4.c |  4 --\n>  drivers/clk/tegra/clk.c                  | 80 ++++++++++++++++++++++++++++++++\n>  drivers/clk/tegra/clk.h                  | 14 ++++++\n>  3 files changed, 94 insertions(+), 4 deletions(-)\n> \n> diff --git a/drivers/clk/tegra/clk-tegra-super-gen4.c b/drivers/clk/tegra/clk-tegra-super-gen4.c\n> index cdfe7c9697e1..ed69ec4d883e 100644\n> --- a/drivers/clk/tegra/clk-tegra-super-gen4.c\n> +++ b/drivers/clk/tegra/clk-tegra-super-gen4.c\n> @@ -19,10 +19,6 @@\n>  #define PLLX_MISC2 0x514\n>  #define PLLX_MISC3 0x518\n>  \n> -#define CCLKG_BURST_POLICY 0x368\n> -#define CCLKLP_BURST_POLICY 0x370\n> -#define SCLK_BURST_POLICY 0x028\n> -#define SYSTEM_CLK_RATE 0x030\n>  #define SCLK_DIVIDER 0x2c\n>  \n>  static DEFINE_SPINLOCK(sysrate_lock);\n> diff --git a/drivers/clk/tegra/clk.c b/drivers/clk/tegra/clk.c\n> index 573e3c967ae1..26690663157a 100644\n> --- a/drivers/clk/tegra/clk.c\n> +++ b/drivers/clk/tegra/clk.c\n> @@ -70,6 +70,12 @@ static struct clk **clks;\n>  static int clk_num;\n>  static struct clk_onecell_data clk_data;\n>  \n> +static u32 cclkg_burst_policy_ctx[2];\n> +static u32 cclklp_burst_policy_ctx[2];\n> +static u32 sclk_burst_policy_ctx[2];\n> +static u32 sys_clk_divisor_ctx, system_rate_ctx;\n> +static u32 spare_ctx, misc_clk_enb_ctx, clk_arm_ctx;\n> +\n>  /* Handlers for SoC-specific reset lines */\n>  static int (*special_reset_assert)(unsigned long);\n>  static int (*special_reset_deassert)(unsigned long);\n> @@ -199,6 +205,80 @@ const struct tegra_clk_periph_regs *get_reg_bank(int clkid)\n>  \t}\n>  }\n>  \n> +void tegra_cclkg_burst_policy_save_context(void)\n> +{\n> +\tint i;\n\nThis here (and the same goes for the other functions below) can be\nunsigned int.\n\nOtherwise:\n\nAcked-by: Thierry Reding <treding@nvidia.com>","headers":{"Return-Path":"<linux-gpio-owner@vger.kernel.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-gpio-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)","ozlabs.org;\n\tdmarc=pass (p=none dis=none) header.from=gmail.com","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"tv1hYFmi\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 45SmYf6jvpz9sN6\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 18 Jun 2019 21:48:22 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1729678AbfFRLsV (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tTue, 18 Jun 2019 07:48:21 -0400","from mail-wm1-f65.google.com ([209.85.128.65]:39226 \"EHLO\n\tmail-wm1-f65.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1729110AbfFRLsV (ORCPT\n\t<rfc822; linux-gpio@vger.kernel.org>); Tue, 18 Jun 2019 07:48:21 -0400","by mail-wm1-f65.google.com with SMTP id z23so2898821wma.4;\n\tTue, 18 Jun 2019 04:48:18 -0700 (PDT)","from localhost (p2E5BEF36.dip0.t-ipconnect.de. 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