[{"id":1777010,"web_url":"http://patchwork.ozlabs.org/comment/1777010/","msgid":"<20170928145647.35f21186@windsurf.lan>","list_archive_url":null,"date":"2017-09-28T12:56:47","subject":"Re: [EXT] [PATCH 1/2] arm64: dts: marvell: fix interrupt-map\n\tproperty for Armada CP110 master PCIe controller","submitter":{"id":2230,"url":"http://patchwork.ozlabs.org/api/people/2230/","name":"Thomas Petazzoni","email":"thomas.petazzoni@free-electrons.com"},"content":"Hello,\n\nOn Thu, 28 Sep 2017 12:52:07 +0000, Yehuda Yitschak wrote:\n\n> The initial version referenced the GIC interrupt controller. \n> Maybe this issue was introduced during the switch to the ICU ?\n\nNo, it was not introduced by the switch to the ICU. The switch to the\nICU looked like this:\n\n- interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;\n- interrupts = ;\n+ interrupt-map = <0 0 0 0 &cpm_icu 0 ICU_GRP_NSR 24 IRQ_TYPE_LEVEL_HIGH>;\n+ interrupts = ;\n\nAs you can see there was already a bogus \"0\" after &gic.\n\nBest regards,\n\nThomas","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"FItDOBvv\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3y2vqF6Dpsz9t66\n\tfor ;\n\tThu, 28 Sep 2017 22:57:29 +1000 (AEST)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dxYNX-0003M7-TO; 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bh=inZeOHLSU+jCXhI/inuXue2zNLA8p5IEzNczNVcN0o4=;\n\tb=FItDOBvvRwuYB5\n\tvUrxnJuRaanXj1biEfu9yhoCdtq1+qizf6I1WbC+61y/ILrrBUB4yf5zUbr5wd3PqPLWaHFRpVvCt\n\t95UIcGsXvlU8uURKHtiQJtdEiTfR5P84EAAg0nvMlcwCY6864ekRrqeC7oDm+MoBDUsS0D1fnC84b\n\t3qFKEA/rjyEFkTrRjmoUNuA5gcf6s6IdDjTqd5G/d+SdyVkKO6YsAkkBVrOc5oL81yXZVhMzeDS9D\n\tmtm2txIxY+VGVIZSatyDqM/8IRN+KAe59t2GE6/faZfTtA4t/DVHTMSjJMxXsZ2PBSRlqbFV1YpDo\n\t9i4c+VrqKHPbWbr6dWGw==;","X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","Date":"Thu, 28 Sep 2017 14:56:47 +0200","From":"Thomas Petazzoni ","To":"Yehuda Yitschak ","Subject":"Re: [EXT] [PATCH 1/2] arm64: dts: marvell: fix interrupt-map\n\tproperty for Armada CP110 master PCIe controller","Message-ID":"<20170928145647.35f21186@windsurf.lan>","In-Reply-To":"<2164f35d99974e1480790dac98be4a5d@IL-EXCH02.marvell.com>","References":"<20170928124550.11492-1-thomas.petazzoni@free-electrons.com>\n\t<20170928124550.11492-2-thomas.petazzoni@free-electrons.com>\n\t<2164f35d99974e1480790dac98be4a5d@IL-EXCH02.marvell.com>","Organization":"Free Electrons","X-Mailer":"Claws Mail 3.14.1 (GTK+ 2.24.31; x86_64-redhat-linux-gnu)","MIME-Version":"1.0","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170928_055720_055160_2E284597 ","X-CRM114-Status":"GOOD ( 10.22 )","X-Spam-Score":"-1.9 (-)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-1.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Andrew Lunn , Jason Cooper , Hanna\n\tHawa , Nadav Haklai , \n\t=?utf-8?q?Miqu=C3=A8l?= Raynal ,\n\tGregory Clement , Antoine Tenart\n\t, \n\t\"linux-arm-kernel@lists.infradead.org\"\n\t, Sebastian Hesselbarth\n\t","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1777027,"web_url":"http://patchwork.ozlabs.org/comment/1777027/","msgid":"","list_archive_url":null,"date":"2017-09-28T13:18:40","subject":"RE: [EXT] [PATCH 1/2] arm64: dts: marvell: fix interrupt-map\n\tproperty for Armada CP110 master PCIe controller","submitter":{"id":65040,"url":"http://patchwork.ozlabs.org/api/people/65040/","name":"Yehuda Yitschak","email":"yehuday@marvell.com"},"content":"Yes...but \n\nThat zero you removed is the \"parent unit address\" according to the \"interrupt-map\" documentation \n\n\tparent unit address - The unit address in the domain of the interrupt parent. The number of 32-bit\n\t\t\t cells required to specify this address is described by the #address-cells property of the node\n\t\t\t pointed to by the interrupt-parent field.\n\nNow, the gic has #address-cells = <0x1>\nAnd the icu has #address-cells = <0x0>\n\nSo when switching to ICU, the parent unit address was no longer needed and should have been removed \n\nBest Regards\n\nYehuda\n\n\n> -----Original Message-----\n> From: Thomas Petazzoni [mailto:thomas.petazzoni@free-electrons.com]\n> Sent: Thursday, September 28, 2017 15:57\n> To: Yehuda Yitschak\n> Cc: Jason Cooper; Andrew Lunn; Sebastian Hesselbarth; Gregory Clement;\n> Nadav Haklai; Hanna Hawa; Antoine Tenart; Miquèl Raynal; linux-arm-\n> kernel@lists.infradead.org\n> Subject: Re: [EXT] [PATCH 1/2] arm64: dts: marvell: fix interrupt-map\n> property for Armada CP110 master PCIe controller\n> \n> Hello,\n> \n> On Thu, 28 Sep 2017 12:52:07 +0000, Yehuda Yitschak wrote:\n> \n> > The initial version referenced the GIC interrupt controller.\n> > Maybe this issue was introduced during the switch to the ICU ?\n> \n> No, it was not introduced by the switch to the ICU. The switch to the ICU\n> looked like this:\n> \n> - interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 34\n> IRQ_TYPE_LEVEL_HIGH>;\n> - interrupts = ;\n> + interrupt-map = <0 0 0 0 &cpm_icu 0 ICU_GRP_NSR 24\n> IRQ_TYPE_LEVEL_HIGH>;\n> + interrupts = + IRQ_TYPE_LEVEL_HIGH>;\n> \n> As you can see there was already a bogus \"0\" after &gic.\n> \n> Best regards,\n> \n> Thomas\n> --\n> Thomas Petazzoni, CTO, Free Electrons\n> Embedded Linux and Kernel engineering\n> http://free-electrons.com","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"hJ+B5lgq\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3y2wRD59Kmz9sRg\n\tfor ;\n\tThu, 28 Sep 2017 23:25:12 +1000 (AEST)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dxYoO-0000Ly-1I; Thu, 28 Sep 2017 13:25:08 +0000","from mx0a-0016f401.pphosted.com ([67.231.148.174]\n\thelo=mx0b-0016f401.pphosted.com)\n\tby bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dxYie-00022F-3m for linux-arm-kernel@lists.infradead.org;\n\tThu, 28 Sep 2017 13:20:48 +0000","from pps.filterd (m0045849.ppops.net [127.0.0.1])\n\tby mx0a-0016f401.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv8SDF2oE029028; Thu, 28 Sep 2017 06:18:45 -0700","from il-exch02.marvell.com ([199.203.130.102])\n\tby mx0a-0016f401.pphosted.com with ESMTP id 2d90t20hth-1\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); \n\tThu, 28 Sep 2017 06:18:44 -0700","from IL-EXCH02.marvell.com (10.4.102.221) by IL-EXCH02.marvell.com\n\t(10.4.102.221) with Microsoft SMTP Server (TLS) id 15.0.1210.3;\n\tThu, 28 Sep 2017 16:18:40 +0300","from IL-EXCH02.marvell.com ([fe80::5893:b43a:12ee:1b7b]) by\n\tIL-EXCH02.marvell.com ([fe80::5893:b43a:12ee:1b7b%20]) with mapi id\n\t15.00.1210.000; Thu, 28 Sep 2017 16:18:40 +0300"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:MIME-Version:In-Reply-To:References:\n\tMessage-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=NQtuwMR0qpIVecJOVwfiLWnyTly1S8tc93t4RycKUD8=;\n\tb=hJ+B5lgqLNxlOs\n\ts4lbs8DRn0Q9tUVjXJAwx7DTNEAWyYQM4MyyIsB4eMymPopXI5DJy3gDGtkA1YmSImuAOcFjVOkn4\n\tdzAtkm5LRdS67lx5nC3JpdHhKGFLrUYmtQ5WHyq6IxBUfFg1+uVKT3OlMTO+8aqKCEEdGZoiUeUi0\n\t9r3wU+7rB2Ev2Oj922I9BnU5Lu5sFLdl3BdXmVG6us0nUAu8olKZY59DgVaLfZh6fJfhzsU+ewga3\n\tpXhVGvmr87iRRR1cLrvPGeHY2YlxAdKSA5VW1J1+9/7/MWrwBAhQl9SHDqFOLRd0pazSJnjCup9Qs\n\t0SENe8yMmYWJvkyTbaLA==;","From":"Yehuda Yitschak ","To":"Thomas Petazzoni ","Subject":"RE: [EXT] [PATCH 1/2] arm64: dts: marvell: fix interrupt-map\n\tproperty for Armada CP110 master PCIe controller","Thread-Topic":"[EXT] [PATCH 1/2] arm64: dts: marvell: fix interrupt-map\n\tproperty for Armada CP110 master PCIe controller","Thread-Index":"AQHTOFfGrRWtC1iVoUywL3lSv8vBQKLKP+hg///PmoCAADdaEA==","Date":"Thu, 28 Sep 2017 13:18:40 +0000","Message-ID":"","References":"<20170928124550.11492-1-thomas.petazzoni@free-electrons.com>\n\t<20170928124550.11492-2-thomas.petazzoni@free-electrons.com>\n\t<2164f35d99974e1480790dac98be4a5d@IL-EXCH02.marvell.com>\n\t<20170928145647.35f21186@windsurf.lan>","In-Reply-To":"<20170928145647.35f21186@windsurf.lan>","Accept-Language":"en-US","Content-Language":"en-US","X-MS-Has-Attach":"","X-MS-TNEF-Correlator":"","x-ms-exchange-transport-fromentityheader":"Hosted","x-originating-ip":"[10.5.102.207]","MIME-Version":"1.0","X-Proofpoint-Virus-Version":"vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-09-28_04:, , signatures=0","X-Proofpoint-Details":"rule=outbound_notspam policy=outbound score=0\n\tpriorityscore=1501\n\tmalwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0\n\tclxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0\n\tclassifier=spam adjust=0 reason=mlx scancount=1\n\tengine=8.0.1-1707230000 definitions=main-1709280198","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170928_061913_032895_D31D8211 ","X-CRM114-Status":"GOOD ( 10.71 )","X-Spam-Score":"-2.6 (--)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-2.6 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/,\n\tlow trust [67.231.148.174 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Andrew Lunn , Jason Cooper , Hanna\n\tHawa , Nadav Haklai , \n\t=?iso-8859-1?q?Miqu=E8l_Raynal?= ,\n\tGregory Clement , Antoine Tenart\n\t, \n\t\"linux-arm-kernel@lists.infradead.org\"\n\t, Sebastian Hesselbarth\n\t","Content-Type":"text/plain; charset=\"iso-8859-1\"","Content-Transfer-Encoding":"quoted-printable","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1777036,"web_url":"http://patchwork.ozlabs.org/comment/1777036/","msgid":"<2164f35d99974e1480790dac98be4a5d@IL-EXCH02.marvell.com>","list_archive_url":null,"date":"2017-09-28T12:52:07","subject":"RE: [EXT] [PATCH 1/2] arm64: dts: marvell: fix interrupt-map\n\tproperty for Armada CP110 master PCIe controller","submitter":{"id":65040,"url":"http://patchwork.ozlabs.org/api/people/65040/","name":"Yehuda Yitschak","email":"yehuday@marvell.com"},"content":"Hi Thomas \n\n> -----Original Message-----\n> From: Thomas Petazzoni [mailto:thomas.petazzoni@free-electrons.com]\n> Sent: Thursday, September 28, 2017 15:46\n> To: Jason Cooper; Andrew Lunn; Sebastian Hesselbarth; Gregory Clement\n> Cc: Nadav Haklai; Hanna Hawa; Yehuda Yitschak; Antoine Tenart; Miquèl\n> Raynal; linux-arm-kernel@lists.infradead.org; Thomas Petazzoni\n> Subject: [EXT] [PATCH 1/2] arm64: dts: marvell: fix interrupt-map property\n> for Armada CP110 master PCIe controller\n> \n> External Email\n> \n> ----------------------------------------------------------------------\n> The interrupt-map property used in the description of the Marvell Armada\n> 7K/8K PCIe controllers has a bogus extraneous 0 that causes the interrupt\n> conversion to not be done properly. This causes the PCIe PME and AER root\n> port service drivers to fail their initialization:\n> \n> [ 5.019900] genirq: Setting trigger mode 7 for irq 114 failed\n> (irq_chip_set_type_parent+0x0/0x30)\n> [ 5.028821] pcie_pme: probe of 0001:00:00.0:pcie001 failed with error -22\n> [ 5.035687] genirq: Setting trigger mode 7 for irq 114 failed\n> (irq_chip_set_type_parent+0x0/0x30)\n> [ 5.044614] aer: probe of 0001:00:00.0:pcie002 failed with error -22\n> \n> This problem exists since the Device Tree description of the master\n> CP110 was added to the kernel.\n\nThe initial version referenced the GIC interrupt controller. \nMaybe this issue was introduced during the switch to the ICU ?\nI am not sure but does the GIC has the same I think the GIC
as the ICU ?\n\n> \n> Fixes: 728dacc7f4dd5 (\"arm64: dts: marvell: initial DT description of Armada\n> 7K/8K CP110 master\")\n> Signed-off-by: Thomas Petazzoni \n> ---\n> arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | 6 +++---\n> 1 file changed, 3 insertions(+), 3 deletions(-)\n> \n> diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi\n> b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi\n> index 8263a8a504a8..f2aa2a81de4d 100644\n> --- a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi\n> +++ b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi\n> @@ -336,7 +336,7 @@\n> \t\t\t\t/* non-prefetchable memory */\n> \t\t\t\t0x82000000 0 0xf6000000 0 0xf6000000 0\n> 0xf00000>;\n> \t\t\tinterrupt-map-mask = <0 0 0 0>;\n> -\t\t\tinterrupt-map = <0 0 0 0 &cpm_icu 0 ICU_GRP_NSR\n> 22 IRQ_TYPE_LEVEL_HIGH>;\n> +\t\t\tinterrupt-map = <0 0 0 0 &cpm_icu ICU_GRP_NSR 22\n> +IRQ_TYPE_LEVEL_HIGH>;\n> \t\t\tinterrupts = IRQ_TYPE_LEVEL_HIGH>;\n> \t\t\tnum-lanes = <1>;\n> \t\t\tclocks = <&cpm_clk 1 13>;\n> @@ -362,7 +362,7 @@\n> \t\t\t\t/* non-prefetchable memory */\n> \t\t\t\t0x82000000 0 0xf7000000 0 0xf7000000 0\n> 0xf00000>;\n> \t\t\tinterrupt-map-mask = <0 0 0 0>;\n> -\t\t\tinterrupt-map = <0 0 0 0 &cpm_icu 0 ICU_GRP_NSR\n> 24 IRQ_TYPE_LEVEL_HIGH>;\n> +\t\t\tinterrupt-map = <0 0 0 0 &cpm_icu ICU_GRP_NSR 24\n> +IRQ_TYPE_LEVEL_HIGH>;\n> \t\t\tinterrupts = IRQ_TYPE_LEVEL_HIGH>;\n> \n> \t\t\tnum-lanes = <1>;\n> @@ -389,7 +389,7 @@\n> \t\t\t\t/* non-prefetchable memory */\n> \t\t\t\t0x82000000 0 0xf8000000 0 0xf8000000 0\n> 0xf00000>;\n> \t\t\tinterrupt-map-mask = <0 0 0 0>;\n> -\t\t\tinterrupt-map = <0 0 0 0 &cpm_icu 0 ICU_GRP_NSR\n> 23 IRQ_TYPE_LEVEL_HIGH>;\n> +\t\t\tinterrupt-map = <0 0 0 0 &cpm_icu ICU_GRP_NSR 23\n> +IRQ_TYPE_LEVEL_HIGH>;\n> \t\t\tinterrupts = IRQ_TYPE_LEVEL_HIGH>;\n> \n> \t\t\tnum-lanes = <1>;\n> --\n> 2.13.5","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; 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charset=\"iso-8859-1\"","Content-Transfer-Encoding":"quoted-printable","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1777039,"web_url":"http://patchwork.ozlabs.org/comment/1777039/","msgid":"<20170928155608.092d3132@windsurf.lan>","list_archive_url":null,"date":"2017-09-28T13:56:08","subject":"Re: [EXT] [PATCH 1/2] arm64: dts: marvell: fix interrupt-map\n\tproperty for Armada CP110 master PCIe controller","submitter":{"id":2230,"url":"http://patchwork.ozlabs.org/api/people/2230/","name":"Thomas Petazzoni","email":"thomas.petazzoni@free-electrons.com"},"content":"Hello,\n\nOn Thu, 28 Sep 2017 13:18:40 +0000, Yehuda Yitschak wrote:\n\n> That zero you removed is the \"parent unit address\" according to the \"interrupt-map\" documentation \n> \n> \tparent unit address - The unit address in the domain of the interrupt parent. The number of 32-bit\n> \t\t\t cells required to specify this address is described by the #address-cells property of the node\n> \t\t\t pointed to by the interrupt-parent field.\n> \n> Now, the gic has #address-cells = <0x1>\n> And the icu has #address-cells = <0x0>\n> \n> So when switching to ICU, the parent unit address was no longer needed and should have been removed \n\nIndeed, you are completely right. I'll adjust the patch accordingly and\nresend. Thanks for spotting this!\n\nBest regards,\n\nThomas","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"SugppUH3\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3y2x7p4RWXz9t2M\n\tfor ;\n\tThu, 28 Sep 2017 23:56:54 +1000 (AEST)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dxZJ2-0004mI-D8; Thu, 28 Sep 2017 13:56:48 +0000","from mail.free-electrons.com ([62.4.15.54])\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dxZIv-00049d-3d for linux-arm-kernel@lists.infradead.org;\n\tThu, 28 Sep 2017 13:56:46 +0000","by mail.free-electrons.com (Postfix, from userid 110)\n\tid 91DE420869; Thu, 28 Sep 2017 15:56:18 +0200 (CEST)","from windsurf.lan (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr\n\t[90.63.216.87])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id 481AC2078B;\n\tThu, 28 Sep 2017 15:56:08 +0200 (CEST)"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:\n\tMessage-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=68RQ7+9EKrYM522NNtVDTBa5siKLiatlURkgC/KkU40=;\n\tb=SugppUH3/RkjCh\n\t9hRSpK+cxPSrfleFCcuaGlezzxzDORmZG06c7eTkm6Ej+l7StKdFW42oi4qMPWCMuIJ/1GLd5VWSM\n\tsN6XxPQ0VkgBG/Jomceg1vfLHhLCUsQ5AwcuRrVhLJU4uM1dPVC8um7sfgK7Io2fi/nSVSiR5dz74\n\t3yiinlewQXQtibisVAMDB7vl1Un0uR1WhrXBydiXy2wQp1i8PRFy75Y0TA6dMuEPjtVnWzRR7qQ+Z\n\tIyaS4dGgtoM5g0idVx/faMKc598n/nHujNhi11xTjqZVfecqv+2ooKt3TSfUQ+X70o4S9bFPZyfv/\n\tWPcvRsUxq0AB1eCESFcQ==;","X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","Date":"Thu, 28 Sep 2017 15:56:08 +0200","From":"Thomas Petazzoni ","To":"Yehuda Yitschak ","Subject":"Re: [EXT] [PATCH 1/2] arm64: dts: marvell: fix interrupt-map\n\tproperty for Armada CP110 master PCIe controller","Message-ID":"<20170928155608.092d3132@windsurf.lan>","In-Reply-To":"","References":"<20170928124550.11492-1-thomas.petazzoni@free-electrons.com>\n\t<20170928124550.11492-2-thomas.petazzoni@free-electrons.com>\n\t<2164f35d99974e1480790dac98be4a5d@IL-EXCH02.marvell.com>\n\t<20170928145647.35f21186@windsurf.lan>\n\t","Organization":"Free Electrons","X-Mailer":"Claws Mail 3.14.1 (GTK+ 2.24.31; x86_64-redhat-linux-gnu)","MIME-Version":"1.0","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170928_065641_317024_88CF761F ","X-CRM114-Status":"UNSURE ( 9.93 )","X-CRM114-Notice":"Please train this message.","X-Spam-Score":"-1.9 (-)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-1.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Andrew Lunn , Jason Cooper , Hanna\n\tHawa , Nadav Haklai , \n\t=?utf-8?q?Miqu=C3=A8l?= Raynal ,\n\tGregory Clement , Antoine Tenart\n\t, \n\t\"linux-arm-kernel@lists.infradead.org\"\n\t, Sebastian Hesselbarth\n\t","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}}]