[{"id":1777218,"web_url":"http://patchwork.ozlabs.org/comment/1777218/","msgid":"","list_archive_url":null,"date":"2017-09-28T18:35:33","subject":"Re: [PATCH 3/8] ARM: dts: aspeed: Add I2C buses","submitter":{"id":69647,"url":"http://patchwork.ozlabs.org/api/people/69647/","name":"Brendan Higgins","email":"brendanhiggins@google.com"},"content":"On Thu, Sep 28, 2017 at 12:51 AM, Joel Stanley wrote:\n> Now with an upstream i2c bus driver, we can add the 14 i2c buses that\n> exist in ASPEED G4 and G5 generation SoCs.\n>\n> It also adds aliases for the 14 built-in I2C busses to ensure userspace\n> sees the numbering staring from zero and counting up.\n>\n> Signed-off-by: Joel Stanley \n> ---\n\nReviewed-by: Brendan Higgins \n\nnit: can we make the i2c labels and the pinctrl labels match?\n\nFor example:\n\n> +\n> + i2c13: i2c-bus@480 {\n> + #address-cells = <1>;\n> + #size-cells = <0>;\n> + #interrupt-cells = <1>;\n> +\n> + reg = <0x480 0x40>;\n> + compatible = \"aspeed,ast2500-i2c-bus\";\n> + clocks = <&clk_apb>;\n> + bus-frequency = <100000>;\n> + interrupts = <13>;\n> + interrupt-parent = <&i2c_ic>;\n> + pinctrl-names = \"default\";\n> + pinctrl-0 = <&pinctrl_i2c14_default>;\n> + status = \"disabled\";\n> + };\n\n\"i2c13\" has a pinctrl-0 of \"pinctrl_i2c14_default\"\n\nI know that pinctrl_i2c14_default is consistent with the function and\ngroups it uses, but I would like to see them all be consistent at some\npoint in the future.\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; 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\n\tThu, 28 Sep 2017 11:35:34 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<20170928075149.8154-4-joel@jms.id.au>","References":"<20170928075149.8154-1-joel@jms.id.au>\n\t<20170928075149.8154-4-joel@jms.id.au>","From":"Brendan Higgins ","Date":"Thu, 28 Sep 2017 11:35:33 -0700","Message-ID":"","Subject":"Re: [PATCH 3/8] ARM: dts: aspeed: Add I2C buses","To":"Joel Stanley ","Cc":"Rob Herring , Mark Rutland ,\n\tRussell King , devicetree\n\t, linux-arm-kernel@lists.infradead.org,\n\tLinux Kernel Mailing List , \n\tAndrew Jeffery , Rick Altherr , \n\t=?utf-8?q?C=C3=A9dric_Le_Goater?= ,\n\tlinux-aspeed@lists.ozlabs.org","Content-Type":"text/plain; charset=\"UTF-8\"","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1777220,"web_url":"http://patchwork.ozlabs.org/comment/1777220/","msgid":"","list_archive_url":null,"date":"2017-09-28T18:36:24","subject":"Re: [PATCH 4/8] ARM: dts: aspeed-romulus: Add I2C devices","submitter":{"id":69647,"url":"http://patchwork.ozlabs.org/api/people/69647/","name":"Brendan Higgins","email":"brendanhiggins@google.com"},"content":"On Thu, Sep 28, 2017 at 12:51 AM, Joel Stanley wrote:\n> Enable the buses that are in use and the devices that are attached.\n> Currently that is just the battery backed RTC.\n>\n> Some of these buses are for hotplugged cards, such as PCIe cards. Others\n> do not yet have upstream drivers, so there are no devices attached.\n>\n> Signed-off-by: Joel Stanley \n\nReviewed-by: Brendan Higgins \n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=google.com header.i=@google.com\n\theader.b=\"T2abxk4U\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y33LN20Xcz9tXP\n\tfor ;\n\tFri, 29 Sep 2017 04:36:28 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751552AbdI1Sg1 (ORCPT\n\t);\n\tThu, 28 Sep 2017 14:36:27 -0400","from mail-qk0-f182.google.com ([209.85.220.182]:49332 \"EHLO\n\tmail-qk0-f182.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1750891AbdI1Sg0 (ORCPT\n\t); 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Thu,\n\t28 Sep 2017 11:36:25 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<20170928075149.8154-5-joel@jms.id.au>","References":"<20170928075149.8154-1-joel@jms.id.au>\n\t<20170928075149.8154-5-joel@jms.id.au>","From":"Brendan Higgins ","Date":"Thu, 28 Sep 2017 11:36:24 -0700","Message-ID":"","Subject":"Re: [PATCH 4/8] ARM: dts: aspeed-romulus: Add I2C devices","To":"Joel Stanley ","Cc":"Rob Herring , Mark Rutland ,\n\tRussell King , devicetree\n\t, linux-arm-kernel@lists.infradead.org,\n\tLinux Kernel Mailing List , \n\tAndrew Jeffery , Rick Altherr , \n\t=?utf-8?q?C=C3=A9dric_Le_Goater?= ,\n\tlinux-aspeed@lists.ozlabs.org","Content-Type":"text/plain; charset=\"UTF-8\"","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1777223,"web_url":"http://patchwork.ozlabs.org/comment/1777223/","msgid":"","list_archive_url":null,"date":"2017-09-28T18:36:56","subject":"Re: [PATCH 5/8] ARM: dts: aspeed-palmetto: Add I2C devices","submitter":{"id":69647,"url":"http://patchwork.ozlabs.org/api/people/69647/","name":"Brendan Higgins","email":"brendanhiggins@google.com"},"content":"On Thu, Sep 28, 2017 at 12:51 AM, Joel Stanley wrote:\n> Enable the buses that are in use and the devices that are attached.\n> Currently that includes the battery backed RTC, temperature measurement\n> and EEPROM.\n>\n> Some of these buses are for hotplugged cards, such as PCIe cards.\n> Others do not yet have upstream drivers, so there are no devices\n> attached.\n>\n> Signed-off-by: Joel Stanley \n\nReviewed-by: Brendan Higgins \n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=google.com header.i=@google.com\n\theader.b=\"WtsDn/3o\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y33MC1Hlvz9tX5\n\tfor ;\n\tFri, 29 Sep 2017 04:37:11 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751371AbdI1Sg6 (ORCPT\n\t);\n\tThu, 28 Sep 2017 14:36:58 -0400","from mail-qt0-f177.google.com ([209.85.216.177]:44730 \"EHLO\n\tmail-qt0-f177.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1750929AbdI1Sg5 (ORCPT\n\t); Thu, 28 Sep 2017 14:36:57 -0400","by mail-qt0-f177.google.com with SMTP id o13so2919637qtf.1\n\tfor ;\n\tThu, 28 Sep 2017 11:36:57 -0700 (PDT)","by 10.140.82.175 with HTTP; Thu, 28 Sep 2017 11:36:56 -0700 (PDT)"],"DKIM-Signature":"v=1; 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\n\tThu, 28 Sep 2017 11:36:56 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<20170928075149.8154-6-joel@jms.id.au>","References":"<20170928075149.8154-1-joel@jms.id.au>\n\t<20170928075149.8154-6-joel@jms.id.au>","From":"Brendan Higgins ","Date":"Thu, 28 Sep 2017 11:36:56 -0700","Message-ID":"","Subject":"Re: [PATCH 5/8] ARM: dts: aspeed-palmetto: Add I2C devices","To":"Joel Stanley ","Cc":"Rob Herring , Mark Rutland ,\n\tRussell King , devicetree\n\t, linux-arm-kernel@lists.infradead.org,\n\tLinux Kernel Mailing List , \n\tAndrew Jeffery , Rick Altherr , \n\t=?utf-8?q?C=C3=A9dric_Le_Goater?= ,\n\tlinux-aspeed@lists.ozlabs.org","Content-Type":"text/plain; charset=\"UTF-8\"","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1777226,"web_url":"http://patchwork.ozlabs.org/comment/1777226/","msgid":"","list_archive_url":null,"date":"2017-09-28T18:37:58","subject":"Re: [PATCH 6/8] ARM: dts: aspeed-ast2500: Add I2C devices","submitter":{"id":69647,"url":"http://patchwork.ozlabs.org/api/people/69647/","name":"Brendan Higgins","email":"brendanhiggins@google.com"},"content":"On Thu, Sep 28, 2017 at 12:51 AM, Joel Stanley wrote:\n> Enable the buses that are in use and the devices that are attached.\n> Currently that includes temperature measurement and EEPROM.\n>\n> Signed-off-by: Joel Stanley \n\nReviewed-by: Brendan Higgins \n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; 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\n\tThu, 28 Sep 2017 11:37:59 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<20170928075149.8154-7-joel@jms.id.au>","References":"<20170928075149.8154-1-joel@jms.id.au>\n\t<20170928075149.8154-7-joel@jms.id.au>","From":"Brendan Higgins ","Date":"Thu, 28 Sep 2017 11:37:58 -0700","Message-ID":"","Subject":"Re: [PATCH 6/8] ARM: dts: aspeed-ast2500: Add I2C devices","To":"Joel Stanley ","Cc":"Rob Herring , Mark Rutland ,\n\tRussell King , devicetree\n\t, linux-arm-kernel@lists.infradead.org,\n\tLinux Kernel Mailing List , \n\tAndrew Jeffery , Rick Altherr , \n\t=?utf-8?q?C=C3=A9dric_Le_Goater?= ,\n\tlinux-aspeed@lists.ozlabs.org","Content-Type":"text/plain; charset=\"UTF-8\"","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1779383,"web_url":"http://patchwork.ozlabs.org/comment/1779383/","msgid":"<1507087822.5452.1.camel@aj.id.au>","list_archive_url":null,"date":"2017-10-04T03:30:22","subject":"Re: [PATCH 1/8] ARM: dts: aspeed: Move pinctrl subnodes to improve\n\treadability","submitter":{"id":68332,"url":"http://patchwork.ozlabs.org/api/people/68332/","name":"Andrew Jeffery","email":"andrew@aj.id.au"},"content":"On Thu, 2017-09-28 at 17:21 +0930, Joel Stanley wrote:\n> > From: Andrew Jeffery \n> \n> Moving the subnodes out of the pinctrl node declaration to a reference\n> allows easier access to the remaining parts of the devicetree.\n> \n> > Signed-off-by: Andrew Jeffery \n> > Reviewed-by: Xo Wang \n> > Signed-off-by: Joel Stanley \n> ---\n>  arch/arm/boot/dts/aspeed-g4.dtsi | 1483 ++++++++++++++++++------------------\n>  arch/arm/boot/dts/aspeed-g5.dtsi | 1549 +++++++++++++++++++-------------------\n>  2 files changed, 1518 insertions(+), 1514 deletions(-)\n\nI hate the way the diff came out for the g5, it's almost impossible to\nread. Also not sure how useful it is to ack my own patch, but given the\nrebasing it has suffered:\n\nAcked-by: Andrew Jeffery \n\nCheers,\n\nAndrew","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=aj.id.au header.i=@aj.id.au header.b=\"gIX7OgP6\";\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=messagingengine.com\n\theader.i=@messagingengine.com\n\theader.b=\"aZipd0FJ\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y6LyN2w9Kz9sRm\n\tfor ;\n\tWed, 4 Oct 2017 14:30:36 +1100 (AEDT)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751135AbdJDDae (ORCPT\n\t);\n\tTue, 3 Oct 2017 23:30:34 -0400","from out1-smtp.messagingengine.com ([66.111.4.25]:33623 \"EHLO\n\tout1-smtp.messagingengine.com\" rhost-flags-OK-OK-OK-OK)\n\tby vger.kernel.org with ESMTP id S1751120AbdJDDad (ORCPT\n\t); Tue, 3 Oct 2017 23:30:33 -0400","from compute4.internal (compute4.nyi.internal [10.202.2.44])\n\tby mailout.nyi.internal (Postfix) with ESMTP id C750020DEA;\n\tTue, 3 Oct 2017 23:30:32 -0400 (EDT)","from frontend1 ([10.202.2.160])\n\tby compute4.internal (MEProxy); Tue, 03 Oct 2017 23:30:32 -0400","from keelia (unknown [203.0.153.9])\n\tby mail.messagingengine.com (Postfix) with ESMTPA id 9C2237FA7E;\n\tTue, 3 Oct 2017 23:30:28 -0400 (EDT)"],"DKIM-Signature":["v=1; a=rsa-sha256; c=relaxed/relaxed; d=aj.id.au; h=cc\n\t:content-type:date:from:in-reply-to:message-id:mime-version\n\t:references:subject:to:x-me-sender:x-me-sender:x-sasl-enc\n\t:x-sasl-enc; s=fm1; bh=3FSII4JFX0Qb8xZSBpvI6yG7JaO7Si6w+jFrl9aQM\n\tdM=; b=gIX7OgP6U34kwQQ2rhkosyKNQPN0V9r52frq50W5ngiqP29ZJm6NwjJpB\n\twEAUZGBFRjBqxyNrHhc+e+i0QDpyIjPERNUhz1SadbKrF79V+K6bK4RjXyNqKRjM\n\t8XQCfqDEGhxL2XrbUjzbf53K1JCayicjxzRM+XE9I/wGYfCu/wgUCatMuWOQpASE\n\tJUp2kN81gkChDB7lMXe7sovrJ6nLCUP4u9cdQsWBGq75RR3p7PqaRRw0XFRqw/7o\n\tOUCT+w68eQ9BGtdT4/lQxDfTpmeRM0GxqjrX6QYYcl2WZ/81XIMN48UcCI5b8ARP\n\t+lZJpC8in3+XU6kfFRG5uP3TS/QpA==","v=1; a=rsa-sha256; c=relaxed/relaxed; d=\n\tmessagingengine.com; h=cc:content-type:date:from:in-reply-to\n\t:message-id:mime-version:references:subject:to:x-me-sender\n\t:x-me-sender:x-sasl-enc:x-sasl-enc; s=fm1; bh=3FSII4JFX0Qb8xZSBp\n\tvI6yG7JaO7Si6w+jFrl9aQMdM=; b=aZipd0FJkvINNHOdlJHNO6esZsYN9BddGh\n\tMxBLAllhhs3M9EViDLbMYtAVaU7JsfEMCECdD3VDNhGUoCu+3deV+OqS1lnKElsc\n\tbAoD80xnBJjj0PHInweW9/65PIbNnBszQPZVa0sAvXdznJCK6zSVHZxTLNdvG8Ij\n\tyLB9MJhtFxyEWRGXjwdErPd6TfwdxCaaMS9bL7YWfBTSbZyF7LASfS3B8b569XHN\n\tpSmKkbmLoX1LQ9RLT/lgeDrPLCQeoO/zwSuTnDD8qSlqj2sa/PVM8Cn1mdcF1Z/H\n\tmzqNdiYqIIb1UCxJiduYTe3qmvSve/r+cGvWmoq0vvxrd1irhNEw=="],"X-ME-Sender":"","X-Sasl-enc":"gYqtzmuTvf4g4V7H2gsDv1B6M9A49ZrBV84+7FhY9VJG 1507087831","Message-ID":"<1507087822.5452.1.camel@aj.id.au>","Subject":"Re: [PATCH 1/8] ARM: dts: aspeed: Move pinctrl subnodes to improve\n\treadability","From":"Andrew Jeffery ","To":"Joel Stanley , Rob Herring ,\n\tMark Rutland ","Cc":"Russell King , devicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, \n\tRick Altherr , Brendan Higgins\n\t, =?iso-8859-1?q?C=E9dric?=\n\tLe Goater , linux-aspeed@lists.ozlabs.org","Date":"Wed, 04 Oct 2017 14:00:22 +1030","In-Reply-To":"<20170928075149.8154-2-joel@jms.id.au>","References":"<20170928075149.8154-1-joel@jms.id.au>\n\t<20170928075149.8154-2-joel@jms.id.au>","Content-Type":"multipart/signed; micalg=\"pgp-sha512\";\n\tprotocol=\"application/pgp-signature\";\n\tboundary=\"=-NOye16VdEtBp6zZ3Ctex\"","X-Mailer":"Evolution 3.22.6-1ubuntu1 ","Mime-Version":"1.0","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1779388,"web_url":"http://patchwork.ozlabs.org/comment/1779388/","msgid":"<1507088159.5452.3.camel@aj.id.au>","list_archive_url":null,"date":"2017-10-04T03:35:59","subject":"Re: [PATCH 2/8] ARM: dts: aspeed: Reorder ADC node","submitter":{"id":68332,"url":"http://patchwork.ozlabs.org/api/people/68332/","name":"Andrew Jeffery","email":"andrew@aj.id.au"},"content":"On Thu, 2017-09-28 at 17:21 +0930, Joel Stanley wrote:\n> We try to keep the nodes in address order. The ADC node was out of\n> place.\n> \n> Signed-off-by: Joel Stanley \n> ---\n>  arch/arm/boot/dts/aspeed-g4.dtsi | 16 ++++++++--------\n>  arch/arm/boot/dts/aspeed-g5.dtsi | 16 ++++++++--------\n>  2 files changed, 16 insertions(+), 16 deletions(-)\n> \n> diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi\n> index 1edd0cee6221..a4579498fc25 100644\n> --- a/arch/arm/boot/dts/aspeed-g4.dtsi\n> +++ b/arch/arm/boot/dts/aspeed-g4.dtsi\n> @@ -129,6 +129,14 @@\n>  \t\t\t\t};\n>  \t\t\t};\n>  \n> +\t\t\tadc: adc@1e6e9000 {\n> +\t\t\t\tcompatible = \"aspeed,ast2400-adc\";\n> +\t\t\t\treg = <0x1e6e9000 0xb0>;\n> +\t\t\t\tclocks = <&syscon ASPEED_CLK_APB>;\n\nWe can't do this yet as the clk driver isn't yet merged, and it breaks from the\n\"just move the node\" description in the commit message.\n\n> +\t\t\t\t#io-channel-cells = <1>;\n> +\t\t\t\tstatus = \"disabled\";\n> +\t\t\t};\n> +\n>  \t\t\tsram@1e720000 {\n>  \t\t\t\tcompatible = \"mmio-sram\";\n>  \t\t\t\treg = <0x1e720000 0x8000>;\t// 32K\n> @@ -227,14 +235,6 @@\n>  \t\t\t\tno-loopback-test;\n>  \t\t\t\tstatus = \"disabled\";\n>  \t\t\t};\n> -\n> -\t\t\tadc: adc@1e6e9000 {\n> -\t\t\t\tcompatible = \"aspeed,ast2400-adc\";\n> -\t\t\t\treg = <0x1e6e9000 0xb0>;\n> -\t\t\t\tclocks = <&clk_apb>;\n> -\t\t\t\t#io-channel-cells = <1>;\n> -\t\t\t\tstatus = \"disabled\";\n> -\t\t\t};\n>  \t\t};\n>  \t};\n>  };\n> diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi\n> index f56dd67efa50..f6430b313f90 100644\n> --- a/arch/arm/boot/dts/aspeed-g5.dtsi\n> +++ b/arch/arm/boot/dts/aspeed-g5.dtsi\n> @@ -173,6 +173,14 @@\n>  \t\t\t\treg-io-width = <4>;\n>  \t\t\t};\n>  \n> +\t\t\tadc: adc@1e6e9000 {\n> +\t\t\t\tcompatible = \"aspeed,ast2500-adc\";\n> +\t\t\t\treg = <0x1e6e9000 0xb0>;\n\nDid you intend to change the size cell value here? It now matches the g4, but\nthere was an explicit comment about the size for some reason in the -hunk\nbelow. It's probably worth an explicit call-out if we're going to change it. \n\n> +\t\t\t\tclocks = <&syscon ASPEED_CLK_APB>;\n\nSee the clk comment on the g4 diff.\n\nCheers,\n\nAndrew\n\n> +\t\t\t\t#io-channel-cells = <1>;\n> +\t\t\t\tstatus = \"disabled\";\n> +\t\t\t};\n> +\n>  \t\t\tsram@1e720000 {\n>  \t\t\t\tcompatible = \"mmio-sram\";\n>  \t\t\t\treg = <0x1e720000 0x9000>;\t// 36K\n> @@ -307,14 +315,6 @@\n>  \t\t\t\tno-loopback-test;\n>  \t\t\t\tstatus = \"disabled\";\n>  \t\t\t};\n> -\n> -\t\t\tadc: adc@1e6e9000 {\n> -\t\t\t\tcompatible = \"aspeed,ast2500-adc\";\n> -\t\t\t\treg = <0x1e6e9000 0xb0>;\n> -\t\t\t\tclocks = <&clk_apb>;\n> -\t\t\t\t#io-channel-cells = <1>;\n> -\t\t\t\tstatus = \"disabled\";\n> -\t\t\t};\n>  \t\t};\n>  \t};\n>  };","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; 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s=fm1; bh=XRbSSxXZD61HSxubB2\n\tlh82IEICOP2hB398vvjJcQuB4=; b=BYFwESh+GvDkUqSVj0Nq+wpnpENSD/sfGm\n\tRYkR9KvBNH9u5+7NL2jJobtsDo9Btuq/7NsA3R+7WwwelUw/nO4OaZRnIPtP0g32\n\t4Rt+iPr3VFdIo6XyHBtVU3nnhQHdns42C0NzqqBsTmFFnv+7+qAItdiC5X0og1d0\n\tpGdohMPvWqcQKELtnkUyWBLYSb/5vIN99a/XdwzfM+htsYyG11kkSTCN8FtIzbqm\n\tq93OSRZRuriyF4PjDFh5JL0S8ZuQh0BnJEsMNINP+A/HrOZ+Nm7VdJ/BhHOhbIm0\n\tUmU35H0BBA/5ogccXxsNQWWNRB6n+68FaTPj7Bbmm5Lx0fD/5u9Q=="],"X-ME-Sender":"","X-Sasl-enc":"MrdsDR8txie3WViggYLhB16N+ZwQCFhSLvXOi6iDWYtE 1507088167","Message-ID":"<1507088159.5452.3.camel@aj.id.au>","Subject":"Re: [PATCH 2/8] ARM: dts: aspeed: Reorder ADC node","From":"Andrew Jeffery ","To":"Joel Stanley , Rob Herring ,\n\tMark Rutland ","Cc":"Russell King , devicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, \n\tRick Altherr , Brendan Higgins\n\t, =?iso-8859-1?q?C=E9dric?=\n\tLe Goater , linux-aspeed@lists.ozlabs.org","Date":"Wed, 04 Oct 2017 14:05:59 +1030","In-Reply-To":"<20170928075149.8154-3-joel@jms.id.au>","References":"<20170928075149.8154-1-joel@jms.id.au>\n\t<20170928075149.8154-3-joel@jms.id.au>","Content-Type":"multipart/signed; micalg=\"pgp-sha512\";\n\tprotocol=\"application/pgp-signature\";\n\tboundary=\"=-75AtwNxlYxnC1tzum8ve\"","X-Mailer":"Evolution 3.22.6-1ubuntu1 ","Mime-Version":"1.0","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1779403,"web_url":"http://patchwork.ozlabs.org/comment/1779403/","msgid":"<1507091793.5452.10.camel@aj.id.au>","list_archive_url":null,"date":"2017-10-04T04:36:33","subject":"Re: [PATCH 3/8] ARM: dts: aspeed: Add I2C buses","submitter":{"id":68332,"url":"http://patchwork.ozlabs.org/api/people/68332/","name":"Andrew Jeffery","email":"andrew@aj.id.au"},"content":"On Thu, 2017-09-28 at 11:35 -0700, Brendan Higgins wrote:\n> > On Thu, Sep 28, 2017 at 12:51 AM, Joel Stanley wrote:\n> > Now with an upstream i2c bus driver, we can add  the 14 i2c buses that\n> > exist in ASPEED G4 and G5 generation SoCs.\n> > \n> > It also adds aliases for the 14 built-in I2C busses to ensure userspace\n> > sees the numbering staring from zero and counting up.\n> > \n> > Signed-off-by: Joel Stanley \n> > ---\n> \n> > Reviewed-by: Brendan Higgins \n> \n> nit: can we make the i2c labels and the pinctrl labels match?\n> \n> For example:\n> \n> > +\n> > +       i2c13: i2c-bus@480 {\n> > +               #address-cells = <1>;\n> > +               #size-cells = <0>;\n> > +               #interrupt-cells = <1>;\n> > +\n> > +               reg = <0x480 0x40>;\n> > +               compatible = \"aspeed,ast2500-i2c-bus\";\n> > +               clocks = <&clk_apb>;\n> > +               bus-frequency = <100000>;\n> > +               interrupts = <13>;\n> > +               interrupt-parent = <&i2c_ic>;\n> > +               pinctrl-names = \"default\";\n> > +               pinctrl-0 = <&pinctrl_i2c14_default>;\n> > +               status = \"disabled\";\n> > +       };\n> \n> \"i2c13\" has a pinctrl-0 of \"pinctrl_i2c14_default\"\n> \n> I know that pinctrl_i2c14_default is consistent with the function and\n> groups it uses, but I would like to see them all be consistent at some\n> point in the future.\n\nI doubt we'll be making them consistent: How the i2c devices are aliased by\nLinux are independent of how they're labelled in hardware or the datasheet.\n\nFor sanity's sake pinmux's functions and groups follow the datasheet (though if\nyou want to maintain the Aspeed pinctrl drivers, be my guest :D)\n\nWe could rename the pinmux nodes to offset them from the function and group,\nbut it feels less self-contained if the nodes are named at the whim of the\ndevice requesting the function if there's no further configuration on top of\nthe function and group*. It also makes it harder to auto-explode the function\nname into the node definitions as we'd then need some further mangling to make\nthings line up.\n\n* The pinctrl devicetree bindings allow for definition of nested nodes to\nspecify collections and combinations of pin function and group, and pin\nconfiguration such as drive-strength. Thus the nodes can be a lot more complex\nthan what we've defined up until now, but what we've got enables a lot of\npretty straight-forward uses-cases.\n\nWe could alias the i2c devices in line with the hardware, but that breaks the\nconvention of starting device numbering at 0.\n\nUltimately Joel and I chose to make the break at the point where the i2c device\nrequests the mux function. It's up to the device to know what hardware mux\nconfiguration it needs and that's what this approach documents. The\ninconsistency is irritating but I don't feel like it's the end of the world,\nand I think the alternatives are (slightly) worse.\n\nCheers,\n\nAndrew","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=aj.id.au header.i=@aj.id.au header.b=\"cdR0/hFd\";\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=messagingengine.com\n\theader.i=@messagingengine.com\n\theader.b=\"o9Az/n6/\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y6NQn2TXmz9s7g\n\tfor ;\n\tWed, 4 Oct 2017 15:36:49 +1100 (AEDT)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751047AbdJDEgo (ORCPT\n\t);\n\tWed, 4 Oct 2017 00:36:44 -0400","from out1-smtp.messagingengine.com ([66.111.4.25]:52889 \"EHLO\n\tout1-smtp.messagingengine.com\" rhost-flags-OK-OK-OK-OK)\n\tby vger.kernel.org with ESMTP id S1750871AbdJDEgn (ORCPT\n\t); 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micalg=\"pgp-sha512\";\n\tprotocol=\"application/pgp-signature\";\n\tboundary=\"=-wN7roEnls3pshcsqkUzh\"","X-Mailer":"Evolution 3.22.6-1ubuntu1 ","Mime-Version":"1.0","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1779410,"web_url":"http://patchwork.ozlabs.org/comment/1779410/","msgid":"<1507092110.5452.11.camel@aj.id.au>","list_archive_url":null,"date":"2017-10-04T04:41:50","subject":"Re: [PATCH 3/8] ARM: dts: aspeed: Add I2C buses","submitter":{"id":68332,"url":"http://patchwork.ozlabs.org/api/people/68332/","name":"Andrew Jeffery","email":"andrew@aj.id.au"},"content":"On Thu, 2017-09-28 at 17:21 +0930, Joel Stanley wrote:\n> Now with an upstream i2c bus driver, we can add  the 14 i2c buses that\n> exist in ASPEED G4 and G5 generation SoCs.\n> \n> It also adds aliases for the 14 built-in I2C busses to ensure userspace\n> sees the numbering staring from zero and counting up.\n> \n> Signed-off-by: Joel Stanley \n\nAcked-by: Andrew Jeffery ","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; 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micalg=\"pgp-sha512\";\n\tprotocol=\"application/pgp-signature\";\n\tboundary=\"=-hCFI9HuFbQh5/Bbj0dYB\"","X-Mailer":"Evolution 3.22.6-1ubuntu1 ","Mime-Version":"1.0","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1779420,"web_url":"http://patchwork.ozlabs.org/comment/1779420/","msgid":"<1507093339.5452.13.camel@aj.id.au>","list_archive_url":null,"date":"2017-10-04T05:02:19","subject":"Re: [PATCH 4/8] ARM: dts: aspeed-romulus: Add I2C devices","submitter":{"id":68332,"url":"http://patchwork.ozlabs.org/api/people/68332/","name":"Andrew Jeffery","email":"andrew@aj.id.au"},"content":"On Thu, 2017-09-28 at 17:21 +0930, Joel Stanley wrote:\n> Enable the buses that are in use and the devices that are attached.\n> Currently that is just the battery backed RTC.\n> \n> Some of these buses are for hotplugged cards, such as PCIe cards. Others\n> do not yet have upstream drivers, so there are no devices attached.\n> \n> Signed-off-by: Joel Stanley \n> ---\n>  arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts | 54 ++++++++++++++++++++++++++++\n>  1 file changed, 54 insertions(+)\n> \n> diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts b/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts\n> index 1190fec1b5d0..f79c1d21c47f 100644\n> --- a/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts\n> +++ b/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts\n> @@ -79,3 +79,57 @@\n>  \tpinctrl-names = \"default\";\n>  \tpinctrl-0 = <&pinctrl_rmii1_default>;\n>  };\n> +\n> +&i2c2 {\n> +\tstatus = \"okay\";\n> +};\n> +\n> +&i2c3 {\n> +\tstatus = \"okay\";\n> +};\n> +\n> +&i2c4 {\n> +\tstatus = \"okay\";\n> +};\n> +\n> +&i2c5 {\n> +\tstatus = \"okay\";\n> +};\n> +\n> +&i2c6 {\n> +\t/* PCIe slot 1 (x8) */\n> +\tstatus = \"enabled\";\n\nThis is not okay. Neither are those below.\n\nCheers,\n\nAndrew\n\n> +};\n> +\n> +&i2c7 {\n> +\t/* PCIe slot 2 (x16) */\n> +\tstatus = \"enabled\";\n> +};\n> +\n> +&i2c8 {\n> +\t/* PCIe slot 3 (x16) */\n> +\tstatus = \"enabled\";\n> +};\n> +\n> +&i2c9 {\n> +\t/* PCIe slot 4 (x16) */\n> +\tstatus = \"enabled\";\n> +};\n> +\n> +&i2c10 {\n> +\t/* PCIe slot 5 (x8) */\n> +\tstatus = \"enabled\";\n> +};\n> +\n> +&i2c11 {\n> +\tstatus = \"okay\";\n> +\n> +\trtc@32 {\n> +\t\tcompatible = \"epson,rx8900\";\n> +\t\treg = <0x32>;\n> +\t};\n> +};\n> +\n> +&i2c12 {\n> +\tstatus = \"okay\";\n> +};","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=aj.id.au header.i=@aj.id.au header.b=\"hXHpBS4K\";\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=messagingengine.com\n\theader.i=@messagingengine.com\n\theader.b=\"L7/0suGC\"; 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c=relaxed/relaxed; d=aj.id.au; h=cc\n\t:content-type:date:from:in-reply-to:message-id:mime-version\n\t:references:subject:to:x-me-sender:x-me-sender:x-sasl-enc\n\t:x-sasl-enc; s=fm1; bh=wqjFvg0EpOpg8w3kOY9gOcvil1Vm/fUXwGIdw2PWI\n\tns=; b=hXHpBS4KeR4VDJM58ka/amHRjV++hTOrJO0GDjhPvxbeQSyoUKqXD9l4w\n\tOScUAoTx75DJSLfYdleJ1Tf/clmEurw8CiENuIO09LWOSSqYP7sF1BqG5KWFWr6k\n\t3kTBmsxbs9WiRUjrpyZmISPSXdEZMTxVodZ2mKphxQ3bXkn1bPyDKUC3QwNtFCaQ\n\t+vSsDoTc4O3Q5nggSS/bxkqky13x0NnurPsOnBCZaegQoP9jw2hDJbd+xibG0DD9\n\tSiNLP6Rf2o4+dyySskEOQwA1iYn+Vjv91sNrCxqPJegXyL0ge28g5Jba/MJbE6H5\n\t7Ijd7HfPmu437lapQknaeA6pvf17Q==","v=1; a=rsa-sha256; c=relaxed/relaxed; d=\n\tmessagingengine.com; h=cc:content-type:date:from:in-reply-to\n\t:message-id:mime-version:references:subject:to:x-me-sender\n\t:x-me-sender:x-sasl-enc:x-sasl-enc; s=fm1; bh=wqjFvg0EpOpg8w3kOY\n\t9gOcvil1Vm/fUXwGIdw2PWIns=; b=L7/0suGCiQuGZWAv5U4SKIZyr+dZ2HtNeJ\n\tMeVBAV/OT5R8RF16+MMTg3naLmWwFsNUaJsqJLHSN8BfvJvctcWIEymz78e3LRn8\n\tp2/kIlxmdOKXNZADX0SJSwhN3EJEGuiVEPuZaIPwgPJcoRASDyx1R+ArUBR0ivm/\n\tcHVPqKqI5Cp4z7Sys3ne9TIEOc7J8HcGriSMEv83915xjhbtBtj7djmDoLLQFcje\n\twIDfSNs1h9KOAVJWJIIIJaUdSHLTuE00Fu3+ocVsNHLg9Fv6/lGKQ7Hp1vn4ez4z\n\tU4JEJLRWeSIGLb3OaSwDIxwj26BSupvEGa3e612zNHibxjNSftjg=="],"X-ME-Sender":"","X-Sasl-enc":"FDBldsgVdY1J5frCM1wFHBQ2SpoRyiHJzaQ5YZZ9UrLm 1507093346","Message-ID":"<1507093339.5452.13.camel@aj.id.au>","Subject":"Re: [PATCH 4/8] ARM: dts: aspeed-romulus: Add I2C devices","From":"Andrew Jeffery ","To":"Joel Stanley , Rob Herring ,\n\tMark Rutland ","Cc":"Russell King , devicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, \n\tRick Altherr , Brendan Higgins\n\t, =?iso-8859-1?q?C=E9dric?=\n\tLe Goater , linux-aspeed@lists.ozlabs.org","Date":"Wed, 04 Oct 2017 15:32:19 +1030","In-Reply-To":"<20170928075149.8154-5-joel@jms.id.au>","References":"<20170928075149.8154-1-joel@jms.id.au>\n\t<20170928075149.8154-5-joel@jms.id.au>","Content-Type":"multipart/signed; micalg=\"pgp-sha512\";\n\tprotocol=\"application/pgp-signature\";\n\tboundary=\"=-DIe9cIUZcKX06Co5J6bn\"","X-Mailer":"Evolution 3.22.6-1ubuntu1 ","Mime-Version":"1.0","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1779424,"web_url":"http://patchwork.ozlabs.org/comment/1779424/","msgid":"<1507093737.5452.14.camel@aj.id.au>","list_archive_url":null,"date":"2017-10-04T05:08:57","subject":"Re: [PATCH 5/8] ARM: dts: aspeed-palmetto: Add I2C devices","submitter":{"id":68332,"url":"http://patchwork.ozlabs.org/api/people/68332/","name":"Andrew Jeffery","email":"andrew@aj.id.au"},"content":"On Thu, 2017-09-28 at 17:21 +0930, Joel Stanley wrote:\n> Enable the buses that are in use and the devices that are attached.\n> Currently that includes the battery backed RTC, temperature\n> measurement\n> and EEPROM.\n> \n> Some of these buses are for hotplugged cards, such as PCIe cards.\n> Others do not yet have upstream drivers, so there are no devices\n> attached.\n> \n> Signed-off-by: Joel Stanley \n\nReviewed-by: Andrew Jeffery \n\n> ---\n>  arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts | 48\n> +++++++++++++++++++++++++++\n>  1 file changed, 48 insertions(+)\n> \n> diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts\n> b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts\n> index 112551766275..e387c80b7f4f 100644\n> --- a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts\n> +++ b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts\n> @@ -61,3 +61,51 @@\n>  \tpinctrl-names = \"default\";\n>  \tpinctrl-0 = <&pinctrl_rmii1_default>;\n>  };\n> +\n> +&i2c0 {\n> +\tstatus = \"okay\";\n> +\n> +\teeprom@50 {\n> +\t\tcompatible = \"atmel,24c256\";\n> +\t\treg = <0x50>;\n> +\t\tpagesize = <64>;\n> +\t};\n> +\n> +\trtc@68 {\n> +\t\tcompatible = \"dallas,ds3231\";\n> +\t\treg = <0x68>;\n> +\t};\n> +};\n> +\n> +&i2c1 {\n> +\tstatus = \"okay\";\n> +};\n> +\n> +&i2c2 {\n> +\tstatus = \"okay\";\n> +\n> +\ttmp423@4c {\n> +\t\tcompatible = \"ti,tmp423\";\n> +\t\treg = <0x4c>;\n> +\t};\n> +};\n> +\n> +&i2c3 {\n> +\tstatus = \"okay\";\n> +};\n> +\n> +&i2c4 {\n> +\tstatus = \"okay\";\n> +};\n> +\n> +&i2c5 {\n> +\tstatus = \"okay\";\n> +};\n> +\n> +&i2c6 {\n> +\tstatus = \"okay\";\n> +};\n> +\n> +&i2c7 {\n> +\tstatus = \"okay\";\n> +};","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=aj.id.au header.i=@aj.id.au header.b=\"ErxhsD5C\";\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=messagingengine.com\n\theader.i=@messagingengine.com\n\theader.b=\"KmIrIwob\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y6P8508Jyz9sPt\n\tfor ;\n\tWed, 4 Oct 2017 16:09:08 +1100 (AEDT)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751120AbdJDFJH (ORCPT\n\t);\n\tWed, 4 Oct 2017 01:09:07 -0400","from out1-smtp.messagingengine.com ([66.111.4.25]:33091 \"EHLO\n\tout1-smtp.messagingengine.com\" rhost-flags-OK-OK-OK-OK)\n\tby vger.kernel.org with ESMTP id S1750909AbdJDFJG (ORCPT\n\t); Wed, 4 Oct 2017 01:09:06 -0400","from compute4.internal (compute4.nyi.internal [10.202.2.44])\n\tby mailout.nyi.internal (Postfix) with ESMTP id B7EA720D11;\n\tWed, 4 Oct 2017 01:09:05 -0400 (EDT)","from frontend2 ([10.202.2.161])\n\tby compute4.internal (MEProxy); Wed, 04 Oct 2017 01:09:05 -0400","from keelia (unknown [203.0.153.9])\n\tby mail.messagingengine.com (Postfix) with ESMTPA id 8C28C24009;\n\tWed, 4 Oct 2017 01:09:01 -0400 (EDT)"],"DKIM-Signature":["v=1; a=rsa-sha256; c=relaxed/relaxed; d=aj.id.au; h=cc\n\t:content-type:date:from:in-reply-to:message-id:mime-version\n\t:references:subject:to:x-me-sender:x-me-sender:x-sasl-enc\n\t:x-sasl-enc; s=fm1; bh=awwC7vrOpV5Jo5ILZTryj50ouxK4dZDLAhA55mxLM\n\t8o=; b=ErxhsD5CUvOG8mT9pTv726fd+Lbz1gvQTf5OWfHSgJfO1cX4o++vdg/mX\n\tiWPqPnoXBzczoOaCjNGicnTTv4VmP6+CNA4hYtKr0BDKteVUFTO9Z4fEpS2CvWjt\n\tf8RY9gDcKrwfos3bvfsZnuWodWeoR5Joz8LofzZz7vU11gDBQh3DRNlcjQah/94y\n\tfQcTy64ns+Kr9JvSjhpjfaOlZhjF2dYNPckF4gO0sgYcDTUY/2QLGYh44KZ2Zonh\n\t/vrNpGQRWX8rfmyYn6V+Vc45Hr42EwMr/1mcIKy9WWYYrEgcsdcBH+CBVh7AzSkC\n\tfVgvZunIpGFtqbERoAEzr3J8zteFw==","v=1; a=rsa-sha256; c=relaxed/relaxed; d=\n\tmessagingengine.com; h=cc:content-type:date:from:in-reply-to\n\t:message-id:mime-version:references:subject:to:x-me-sender\n\t:x-me-sender:x-sasl-enc:x-sasl-enc; s=fm1; bh=awwC7vrOpV5Jo5ILZT\n\tryj50ouxK4dZDLAhA55mxLM8o=; b=KmIrIwobQC8UVPKCjJXmf2VH92tXJUhJs3\n\tAIlYnxE71C9y33SGhRDKxboRfVpqHbdMp1opYp774N46xZfk1p+f1BZyl6yvWK9D\n\t5T6mGfNEhC295T2aqvmeVXRCaPwY7Hw0x7I7Ho8oFrYXMKzpavDj/esTtXQOUa6+\n\tPsLj+NLZgxbC2ZLg5nhIzW5fK2VM6E7rQUPzZKAXsPJA1ytjg9PABAwWKDT3hA9l\n\tOhIdmimn/6IqWPP4hBfP6Oc8SD1nCpBGx2+yAVf3L6hfXiaYAo0eXszVJSjhZnlQ\n\tN2F1VcBYz2mYd2KCnClsxYwfkQW0sLeGzAefTYrYAKdouJGWUVDA=="],"X-ME-Sender":"","X-Sasl-enc":"Ejhyysoky4YzIBrmxX3ORMS0Z4cbIY5D/sy3ghzliYzw 1507093744","Message-ID":"<1507093737.5452.14.camel@aj.id.au>","Subject":"Re: [PATCH 5/8] ARM: dts: aspeed-palmetto: Add I2C devices","From":"Andrew Jeffery ","To":"Joel Stanley , Rob Herring ,\n\tMark Rutland ","Cc":"Russell King , devicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, \n\tRick Altherr , Brendan Higgins\n\t, =?iso-8859-1?q?C=E9dric?=\n\tLe Goater , linux-aspeed@lists.ozlabs.org","Date":"Wed, 04 Oct 2017 15:38:57 +1030","In-Reply-To":"<20170928075149.8154-6-joel@jms.id.au>","References":"<20170928075149.8154-1-joel@jms.id.au>\n\t<20170928075149.8154-6-joel@jms.id.au>","Content-Type":"multipart/signed; micalg=\"pgp-sha512\";\n\tprotocol=\"application/pgp-signature\";\n\tboundary=\"=-X5rNVcaLKHYYfZkfQfha\"","X-Mailer":"Evolution 3.22.6-1ubuntu1 ","Mime-Version":"1.0","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1779427,"web_url":"http://patchwork.ozlabs.org/comment/1779427/","msgid":"<1507093928.5452.15.camel@aj.id.au>","list_archive_url":null,"date":"2017-10-04T05:12:08","subject":"Re: [PATCH 6/8] ARM: dts: aspeed-ast2500: Add I2C devices","submitter":{"id":68332,"url":"http://patchwork.ozlabs.org/api/people/68332/","name":"Andrew Jeffery","email":"andrew@aj.id.au"},"content":"On Thu, 2017-09-28 at 17:21 +0930, Joel Stanley wrote:\n> Enable the buses that are in use and the devices that are attached.\n> Currently that includes temperature measurement and EEPROM.\n> \n> Signed-off-by: Joel Stanley \n\nReviewed-by: Andrew Jeffery \n\n> ---\n>  arch/arm/boot/dts/aspeed-ast2500-evb.dts | 19 +++++++++++++++++++\n>  1 file changed, 19 insertions(+)\n> \n> diff --git a/arch/arm/boot/dts/aspeed-ast2500-evb.dts b/arch/arm/boot/dts/aspeed-ast2500-evb.dts\n> index 7c90dac99822..dc7d73b02b76 100644\n> --- a/arch/arm/boot/dts/aspeed-ast2500-evb.dts\n> +++ b/arch/arm/boot/dts/aspeed-ast2500-evb.dts\n> @@ -59,3 +59,22 @@\n>  \tpinctrl-names = \"default\";\n>  \tpinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;\n>  };\n> +\n> +&i2c3 {\n> +\tstatus = \"okay\";\n> +\n> +\teeprom@50 {\n> +\t\tcompatible = \"atmel,24c08\";\n> +\t\treg = <0x50>;\n> +\t\tpagesize = <16>;\n> +\t};\n> +};\n> +\n> +&i2c7 {\n> +\tstatus = \"okay\";\n> +\n> +\tlm75@4d {\n> +\t\tcompatible = \"national,lm75\";\n> +\t\treg = <0x4d>;\n> +\t};\n> +};","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; 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micalg=\"pgp-sha512\";\n\tprotocol=\"application/pgp-signature\";\n\tboundary=\"=-TTWSZwwPiUzWBYNSs96W\"","X-Mailer":"Evolution 3.22.6-1ubuntu1 ","Mime-Version":"1.0","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1779430,"web_url":"http://patchwork.ozlabs.org/comment/1779430/","msgid":"<1507093999.5452.16.camel@aj.id.au>","list_archive_url":null,"date":"2017-10-04T05:13:19","subject":"Re: [PATCH 7/8] ARM: dts: aspeed: Add aliases for UARTs","submitter":{"id":68332,"url":"http://patchwork.ozlabs.org/api/people/68332/","name":"Andrew Jeffery","email":"andrew@aj.id.au"},"content":"On Thu, 2017-09-28 at 17:21 +0930, Joel Stanley wrote:\n> Existing userspace expects the console (UART5) to be at /dev/ttyS4.  To\n> ensure the UARTs show up where users expect them, we give them fixed\n> aliases starting at 0.\n> \n> Signed-off-by: Joel Stanley \n\nReviewed-by: Andrew Jeffery \n\n> ---\n>  arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts | 4 ----\n>  arch/arm/boot/dts/aspeed-g4.dtsi              | 5 +++++\n>  arch/arm/boot/dts/aspeed-g5.dtsi              | 5 +++++\n>  3 files changed, 10 insertions(+), 4 deletions(-)\n> \n> diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts\n> index e387c80b7f4f..be51be5a5f39 100644\n> --- a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts\n> +++ b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts\n> @@ -6,10 +6,6 @@\n>  \tmodel = \"Palmetto BMC\";\n>  \tcompatible = \"tyan,palmetto-bmc\", \"aspeed,ast2400\";\n>  \n> -\taliases {\n> -\t\tserial4 = &uart5;\n> -\t};\n> -\n>  \tchosen {\n>  \t\tstdout-path = &uart5;\n>  \t\tbootargs = \"console=ttyS4,115200 earlyprintk\";\n> diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi\n> index f8611d5a6465..191c33d18122 100644\n> --- a/arch/arm/boot/dts/aspeed-g4.dtsi\n> +++ b/arch/arm/boot/dts/aspeed-g4.dtsi\n> @@ -22,6 +22,11 @@\n>  \t\ti2c11 = &i2c11;\n>  \t\ti2c12 = &i2c12;\n>  \t\ti2c13 = &i2c13;\n> +\t\tserial0 = &uart1;\n> +\t\tserial1 = &uart2;\n> +\t\tserial2 = &uart3;\n> +\t\tserial3 = &uart4;\n> +\t\tserial4 = &uart5;\n>  \t};\n>  \n>  \tcpus {\n> diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi\n> index de127370131d..251fc9f4637e 100644\n> --- a/arch/arm/boot/dts/aspeed-g5.dtsi\n> +++ b/arch/arm/boot/dts/aspeed-g5.dtsi\n> @@ -22,6 +22,11 @@\n>  \t\ti2c11 = &i2c11;\n>  \t\ti2c12 = &i2c12;\n>  \t\ti2c13 = &i2c13;\n> +\t\tserial0 = &uart1;\n> +\t\tserial1 = &uart2;\n> +\t\tserial2 = &uart3;\n> +\t\tserial3 = &uart4;\n> +\t\tserial4 = &uart5;\n>  \t};\n>  \n>  \tcpus {","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; 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micalg=\"pgp-sha512\";\n\tprotocol=\"application/pgp-signature\";\n\tboundary=\"=-oZEm4benk0uYV4kEaiSn\"","X-Mailer":"Evolution 3.22.6-1ubuntu1 ","Mime-Version":"1.0","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1779433,"web_url":"http://patchwork.ozlabs.org/comment/1779433/","msgid":"","list_archive_url":null,"date":"2017-10-04T05:13:15","subject":"Re: [PATCH 2/8] ARM: dts: aspeed: Reorder ADC node","submitter":{"id":48628,"url":"http://patchwork.ozlabs.org/api/people/48628/","name":"Joel Stanley","email":"joel@jms.id.au"},"content":"On Wed, Oct 4, 2017 at 1:05 PM, Andrew Jeffery wrote:\n> On Thu, 2017-09-28 at 17:21 +0930, Joel Stanley wrote:\n>> --- a/arch/arm/boot/dts/aspeed-g4.dtsi\n>> +++ b/arch/arm/boot/dts/aspeed-g4.dtsi\n>> @@ -129,6 +129,14 @@\n>> };\n>> };\n>>\n>> + adc: adc@1e6e9000 {\n>> + compatible = \"aspeed,ast2400-adc\";\n>> + reg = <0x1e6e9000 0xb0>;\n>> + clocks = <&syscon ASPEED_CLK_APB>;\n>\n> We can't do this yet as the clk driver isn't yet merged, and it breaks from the\n> \"just move the node\" description in the commit message.\n\nYep. This was a bad commit that comes from post-clk driver. I will fix in v2.\n\n>> diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi\n>> index f56dd67efa50..f6430b313f90 100644\n>> --- a/arch/arm/boot/dts/aspeed-g5.dtsi\n>> +++ b/arch/arm/boot/dts/aspeed-g5.dtsi\n>> @@ -173,6 +173,14 @@\n>> reg-io-width = <4>;\n>> };\n>>\n>> + adc: adc@1e6e9000 {\n>> + compatible = \"aspeed,ast2500-adc\";\n>> + reg = <0x1e6e9000 0xb0>;\n>\n> Did you intend to change the size cell value here? It now matches the g4, but\n> there was an explicit comment about the size for some reason in the -hunk\n> below. It's probably worth an explicit call-out if we're going to change it.\n\nLooks ok to me.\n\nThanks for the review.\n\nCheers,\n\nJoel\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"Q1w8GNVV\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y6PFX6N6cz9t2M\n\tfor ;\n\tWed, 4 Oct 2017 16:13:52 +1100 (AEDT)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751170AbdJDFNj (ORCPT\n\t);\n\tWed, 4 Oct 2017 01:13:39 -0400","from mail-lf0-f65.google.com ([209.85.215.65]:57251 \"EHLO\n\tmail-lf0-f65.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751158AbdJDFNh (ORCPT\n\t); Wed, 4 Oct 2017 01:13:37 -0400","by mail-lf0-f65.google.com with SMTP id 90so3857954lfs.13;\n\tTue, 03 Oct 2017 22:13:37 -0700 (PDT)","by 10.25.195.6 with HTTP; Tue, 3 Oct 2017 22:13:15 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=mime-version:sender:in-reply-to:references:from:date:message-id\n\t:subject:to:cc;\n\tbh=28TDgbTt3wQol9qUhCNu/hTXhlUI9imWwc5+I1hVOjo=;\n\tb=Q1w8GNVV3K+ASRt7qKzmV/MgKbS0hRV0WKww8EnCX5ip3KuqdV6pmO2nW/v5pqaEnJ\n\tc0s/Kd3rC2Wb/1hhcLV8mCqXw8oNdE/jhHpWDjAXSAywuRSxUEruIQksXX8WgxLFZWyQ\n\thZxBUCkIeBk88QQuri/N+6cU2+4DOII9Oxybv7W5V4HbgOnJR9YmwYV5aJFg1+zQthdg\n\t1MYJnWshVLt6zEkzuj6lVaYuyDOfcHQLxh+b2OyJOuD9iHZqZgFoHey6PtysLmQ8LJoo\n\tMa1N3oZT+LzTcjK2LKPYcqoJMZbBnupTLWKIAH6GYxXrP2yxxS4sFCuSBrwG6hO9KkLY\n\tA+Bw==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:mime-version:sender:in-reply-to:references:from\n\t:date:message-id:subject:to:cc;\n\tbh=28TDgbTt3wQol9qUhCNu/hTXhlUI9imWwc5+I1hVOjo=;\n\tb=R3GAc/gM+33/But9Bvl4oXo0wt/DNhyYeqIfl0xBXkDuLWtCiRd6OMz+gci9bUhIvG\n\tzNvmoxR8lZcrV8NozLBI8+iPFUg+Lq7V7Ck4rZLZ1LBPOWqC9qZ3fUZZzOilDBD2wpRo\n\tVRWcgXdyq/OVg5vvogWK8M876Ua1C1FFAGSrUkTg5gFxlq/63mgRcL/pxcl+Mvur9A9Z\n\tHrhQ42Zh1h2tHq20iuEoo9RrofIVSR+zdeqRIR8zwUUuzvJjr86i1waQuK03QT+/HPp6\n\tfghlxZkf6L/4jh+yX+Td8U8JrRwVR5wIV+tvMxScoyOTpAL/MN0fVcUAcGmAjcK0w+ye\n\tO0CA==","X-Gm-Message-State":"AMCzsaUU6lLG2jjy7AoOZUKdxPbynUVoEjCfpi0t/V8E2eNM1I1PYK0l\n\toAATY5WHbyvGZC1enr3hMXm6ui77ShYlJJLRDeU=","X-Google-Smtp-Source":"AOwi7QA6g8rUnaglK/Kac2Vm2nkCyIFZqBPjyiKX+8P1aqNdhBFvPS9sPxMxtCpkYPpTFGr4yNAoBMI9Rr8cfScmw2g=","X-Received":"by 10.25.78.206 with SMTP id u75mr4091905lfk.111.1507094016028; \n\tTue, 03 Oct 2017 22:13:36 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<1507088159.5452.3.camel@aj.id.au>","References":"<20170928075149.8154-1-joel@jms.id.au>\n\t<20170928075149.8154-3-joel@jms.id.au>\n\t<1507088159.5452.3.camel@aj.id.au>","From":"Joel Stanley ","Date":"Wed, 4 Oct 2017 14:43:15 +0930","X-Google-Sender-Auth":"_RVovoQk2kZTMWc0Y4QUhw2_hGA","Message-ID":"","Subject":"Re: [PATCH 2/8] ARM: dts: aspeed: Reorder ADC node","To":"Andrew Jeffery ","Cc":"Rob Herring , Mark Rutland ,\n\tRussell King , devicetree\n\t, Linux ARM\n\t, Linux Kernel Mailing List\n\t, Rick Altherr ,\n\tBrendan Higgins , \n\t=?utf-8?q?C=C3=A9dric_Le_Goater?= ,\n\tlinux-aspeed@lists.ozlabs.org","Content-Type":"text/plain; charset=\"UTF-8\"","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1779437,"web_url":"http://patchwork.ozlabs.org/comment/1779437/","msgid":"<1507094490.5452.18.camel@aj.id.au>","list_archive_url":null,"date":"2017-10-04T05:21:30","subject":"Re: [PATCH 2/8] ARM: dts: aspeed: Reorder ADC node","submitter":{"id":68332,"url":"http://patchwork.ozlabs.org/api/people/68332/","name":"Andrew Jeffery","email":"andrew@aj.id.au"},"content":"On Wed, 2017-10-04 at 14:43 +0930, Joel Stanley wrote:\n> > > > > > +                     adc: adc@1e6e9000 {\n> > > +                             compatible = \"aspeed,ast2500-adc\";\n> > > +                             reg = <0x1e6e9000 0xb0>;\n> > \n> > Did you intend to change the size cell value here? It now matches the g4, but\n> > there was an explicit comment about the size for some reason in the -hunk\n> > below. It's probably worth an explicit call-out if we're going to change it.\n> \n> Looks ok to me.\n\nYeah, sorry, was looking in the wrong spot :/\n\nAndrew","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=aj.id.au header.i=@aj.id.au header.b=\"VpA3uHv/\";\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=messagingengine.com\n\theader.i=@messagingengine.com\n\theader.b=\"LveeUyEG\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y6PQX72Mzz9sRm\n\tfor ;\n\tWed, 4 Oct 2017 16:21:40 +1100 (AEDT)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751177AbdJDFVj (ORCPT\n\t);\n\tWed, 4 Oct 2017 01:21:39 -0400","from out1-smtp.messagingengine.com ([66.111.4.25]:38063 \"EHLO\n\tout1-smtp.messagingengine.com\" rhost-flags-OK-OK-OK-OK)\n\tby vger.kernel.org with ESMTP id S1750909AbdJDFVi (ORCPT\n\t); Wed, 4 Oct 2017 01:21:38 -0400","from compute4.internal (compute4.nyi.internal [10.202.2.44])\n\tby mailout.nyi.internal (Postfix) with ESMTP id 18A5520FAB;\n\tWed, 4 Oct 2017 01:21:38 -0400 (EDT)","from frontend2 ([10.202.2.161])\n\tby compute4.internal (MEProxy); Wed, 04 Oct 2017 01:21:38 -0400","from keelia (unknown [203.0.153.9])\n\tby mail.messagingengine.com (Postfix) with ESMTPA id 913E124009;\n\tWed, 4 Oct 2017 01:21:33 -0400 (EDT)"],"DKIM-Signature":["v=1; a=rsa-sha256; c=relaxed/relaxed; d=aj.id.au; h=cc\n\t:content-type:date:from:in-reply-to:message-id:mime-version\n\t:references:subject:to:x-me-sender:x-me-sender:x-sasl-enc\n\t:x-sasl-enc; s=fm1; bh=bDMzsxc0w2NyyefUCVhE9eY3VaYffEVZb2dyN8Ccm\n\tzM=; b=VpA3uHv/L5KALeBtHYiyrxa8nDuxuo4C0oANxCOq4uA6msf6CZLbUPwB8\n\tJIkwJzHrJdTY6XCGOv3RJgueQOA8waX4lNzXYVAfih4kGpk1obhaBNrfMQPP3LTN\n\tOch4cbDObL4NNp/nE7RNL+AYBBnn0RF7rLjeJc1ErIt9tk2c+5q1h5Ox/727WX32\n\tzTk4o4jB/cpxit/2J2nsYzTX+5eLzfFi4SMv9nQDu46/Ad732ceiNcgeAoP94IWy\n\tZeXGV9El7cBhiWPECP2gh/vz3aVW2hILtWUT/3mIecVC1W8o7Ecr7hqIqW5ZEc+k\n\t8/GNYOyLuXcWk30LQXzYoHrsGPoFw==","v=1; a=rsa-sha256; c=relaxed/relaxed; d=\n\tmessagingengine.com; h=cc:content-type:date:from:in-reply-to\n\t:message-id:mime-version:references:subject:to:x-me-sender\n\t:x-me-sender:x-sasl-enc:x-sasl-enc; s=fm1; bh=bDMzsxc0w2NyyefUCV\n\thE9eY3VaYffEVZb2dyN8CcmzM=; b=LveeUyEGJdgDE2oQF2X4CLN7L7TDqZsdyr\n\tu+rr0KYDBptJVUKMt9mkdK4MzpUledswl7DFXFkllRFk+nYbE2AcQk/X0AHRt5AY\n\tCcdIiqBFT25G0yGY3VAinamcORs5xJjZiyPBhX3CNhB+ZqplWsSrPmjaV3XQ8mvo\n\tIRgKU4H8x4gaMQT0uSndCIwPg2Jr0eMn71Fq016eT3vCSn73gpFep/AJH20O0OCm\n\tFxWXnB1KoCYGswlMMuohcVo6TcKV/KmBq3KbBJ1LYGn2J0oEqSRUUd7phR6Fr9i6\n\tGqx64DStesvejsf5qKgjk4ow1Pp8zsuK2tmMi8J6SWLKXvBDFw9Q=="],"X-ME-Sender":"","X-Sasl-enc":"xz3AKS1zn7L9gWlLuWSt52zRpSAcyLNtR0iZyDG6bF+P 1507094496","Message-ID":"<1507094490.5452.18.camel@aj.id.au>","Subject":"Re: [PATCH 2/8] ARM: dts: aspeed: Reorder ADC node","From":"Andrew Jeffery ","To":"Joel Stanley ","Cc":"Rob Herring , Mark Rutland ,\n\tRussell King , devicetree\n\t, Linux ARM\n\t, Linux Kernel Mailing List\n\t, Rick Altherr ,\n\tBrendan Higgins , =?iso-8859-1?q?C=E9dric?=\n\tLe Goater , linux-aspeed@lists.ozlabs.org","Date":"Wed, 04 Oct 2017 15:51:30 +1030","In-Reply-To":"","References":"<20170928075149.8154-1-joel@jms.id.au>\n\t<20170928075149.8154-3-joel@jms.id.au>\n\t<1507088159.5452.3.camel@aj.id.au>\n\t","Content-Type":"multipart/signed; micalg=\"pgp-sha512\";\n\tprotocol=\"application/pgp-signature\";\n\tboundary=\"=-i4FU3F+fnGD/svucSC2x\"","X-Mailer":"Evolution 3.22.6-1ubuntu1 ","Mime-Version":"1.0","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1779440,"web_url":"http://patchwork.ozlabs.org/comment/1779440/","msgid":"","list_archive_url":null,"date":"2017-10-04T05:24:57","subject":"Re: [PATCH 4/8] ARM: dts: aspeed-romulus: Add I2C devices","submitter":{"id":48628,"url":"http://patchwork.ozlabs.org/api/people/48628/","name":"Joel Stanley","email":"joel@jms.id.au"},"content":"On Wed, Oct 4, 2017 at 2:32 PM, Andrew Jeffery wrote:\n> On Thu, 2017-09-28 at 17:21 +0930, Joel Stanley wrote:\n>> Enable the buses that are in use and the devices that are attached.\n>> Currently that is just the battery backed RTC.\n>>\n>> Some of these buses are for hotplugged cards, such as PCIe cards. Others\n>> do not yet have upstream drivers, so there are no devices attached.\n>>\n>> Signed-off-by: Joel Stanley \n>> ---\n>> arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts | 54 ++++++++++++++++++++++++++++\n>> 1 file changed, 54 insertions(+)\n>>\n>> diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts b/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts\n>> index 1190fec1b5d0..f79c1d21c47f 100644\n>> --- a/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts\n>> +++ b/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts\n>> @@ -79,3 +79,57 @@\n>> pinctrl-names = \"default\";\n>> pinctrl-0 = <&pinctrl_rmii1_default>;\n>> };\n>> +\n>> +&i2c2 {\n>> + status = \"okay\";\n>> +};\n>> +\n>> +&i2c3 {\n>> + status = \"okay\";\n>> +};\n>> +\n>> +&i2c4 {\n>> + status = \"okay\";\n>> +};\n>> +\n>> +&i2c5 {\n>> + status = \"okay\";\n>> +};\n>> +\n>> +&i2c6 {\n>> + /* PCIe slot 1 (x8) */\n>> + status = \"enabled\";\n>\n> This is not okay. Neither are those below.\n\nHah. Well spotted.\n\nCheers,\n\nJoel\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"p3e9yTV6\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y6PVp2zs3z9t2M\n\tfor ;\n\tWed, 4 Oct 2017 16:25:22 +1100 (AEDT)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751116AbdJDFZU (ORCPT\n\t);\n\tWed, 4 Oct 2017 01:25:20 -0400","from mail-lf0-f68.google.com ([209.85.215.68]:34592 \"EHLO\n\tmail-lf0-f68.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1750909AbdJDFZU (ORCPT\n\t); Wed, 4 Oct 2017 01:25:20 -0400","by mail-lf0-f68.google.com with SMTP id h80so4364635lfe.1;\n\tTue, 03 Oct 2017 22:25:19 -0700 (PDT)","by 10.25.195.6 with HTTP; Tue, 3 Oct 2017 22:24:57 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=mime-version:sender:in-reply-to:references:from:date:message-id\n\t:subject:to:cc;\n\tbh=ITNyhQ6Km4cawXTP9IvnzjXzoN13i/U+FzT99053VFs=;\n\tb=p3e9yTV6g3JXPiOUolsWsOnzj7E49fVYkxPW0nG8xr9sTxznRqYH2sR8yejKN/Eg4P\n\tciBXHSLcQnFcsDa7S8ICaBFjLirfTxlfNiXDzGjpKd4ECvDlZ6iOx6siZtpASxRTho5v\n\tKg2tDC6AklgajmG3VyDsKBenLubzSatVZUYE+BUg7ZjapymXlQU9q55jMoRUsfgOgII4\n\t4NTdOTOS+RkJfyR2VZjew85wtGmeShnyAYWGUDTBfeo2OU2XPVVtH/GHcenVu/picYxQ\n\tCKqePAZ39rqAFzUk4NW7wRbAXaSan+dGY0Nyg3MLfsKAVRFTc7frguwd4tRaQlKXljhb\n\tC3fw==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:mime-version:sender:in-reply-to:references:from\n\t:date:message-id:subject:to:cc;\n\tbh=ITNyhQ6Km4cawXTP9IvnzjXzoN13i/U+FzT99053VFs=;\n\tb=Mv7qEHhvs3r6kFYbUfqzYH55JYqG+cnNhLD+7fMAWoTaX5iWadqJ5sGH9TqsNSoO/N\n\tmPu7bCWu9vVHWIU3ax/32wJg60unUBsbh9JjOPWl0stomZsDaVL/cyXKCsquWOWlGs+8\n\tiZ2fjJQcuoDoNJda8MqQFjC7c0fiy72SO1TdxXQaiJN8X8rGzoAFjqke/Zsd4vr3vo+5\n\tOztzIj9bODFA/OAWI7KWSFdcNYnitBkZE9Sw69Aa0TsLmmLgTjRiKDtVwesAYJmY7/SU\n\tU98yW3GsUStzNsNU+IPTRZQijxg2M69o7k09ZOJpf9ZKqxJebFcYrYDYkfLjJ5Y4ps3z\n\t6lOw==","X-Gm-Message-State":"AHPjjUjDxmEPdHLlRDaKSfVCDvIWT8NVKpu8u56KoWydYqtID5Nn31G+\n\teHHruJljU7gnP/L9tj2HZRjkivPR+BVgGNozZ0g=","X-Google-Smtp-Source":"AOwi7QCiAomdKH3r5mNX2MmBE5CzObkmLTTdxbRq2F5qyrVW86AwDfvIs5qGDcomzyAkC0qs0iKBCkgwZgaJ3KhUfSA=","X-Received":"by 10.46.71.193 with SMTP id u184mr9781771lja.166.1507094718468; \n\tTue, 03 Oct 2017 22:25:18 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<1507093339.5452.13.camel@aj.id.au>","References":"<20170928075149.8154-1-joel@jms.id.au>\n\t<20170928075149.8154-5-joel@jms.id.au>\n\t<1507093339.5452.13.camel@aj.id.au>","From":"Joel Stanley ","Date":"Wed, 4 Oct 2017 14:54:57 +0930","X-Google-Sender-Auth":"oLnauebKbu06o0-VXlJqAG2E6BU","Message-ID":"","Subject":"Re: [PATCH 4/8] ARM: dts: aspeed-romulus: Add I2C devices","To":"Andrew Jeffery ","Cc":"Rob Herring , Mark Rutland ,\n\tRussell King , devicetree\n\t, Linux ARM\n\t, Linux Kernel Mailing List\n\t, Rick Altherr ,\n\tBrendan Higgins , \n\t=?utf-8?q?C=C3=A9dric_Le_Goater?= ,\n\tlinux-aspeed@lists.ozlabs.org","Content-Type":"text/plain; charset=\"UTF-8\"","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1779443,"web_url":"http://patchwork.ozlabs.org/comment/1779443/","msgid":"<1507094931.5452.20.camel@aj.id.au>","list_archive_url":null,"date":"2017-10-04T05:28:51","subject":"Re: [PATCH 8/8] ARM: dts: aspeed: Clean up UART nodes","submitter":{"id":68332,"url":"http://patchwork.ozlabs.org/api/people/68332/","name":"Andrew Jeffery","email":"andrew@aj.id.au"},"content":"On Thu, 2017-09-28 at 17:21 +0930, Joel Stanley wrote:\n>  - Shorten size of reg property so it covers only the implemented\n>  registers\n> \n>  - Add VUART compatible\n> \n>  - Move stray uart1 in g5 definition\n> \n>  - Remove outdated current-speed property. Different bootloaders use\n>  different speeds, so this is no longer helpful\n> \n> Signed-off-by: Joel Stanley \n> ---\n>  arch/arm/boot/dts/aspeed-g4.dtsi | 17 +++++++++--------\n>  arch/arm/boot/dts/aspeed-g5.dtsi | 36 ++++++++++++++++++------------------\n>  2 files changed, 27 insertions(+), 26 deletions(-)\n> \n> diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi\n> index 191c33d18122..7a4a53666d70 100644\n> --- a/arch/arm/boot/dts/aspeed-g4.dtsi\n> +++ b/arch/arm/boot/dts/aspeed-g4.dtsi\n> @@ -27,6 +27,7 @@\n>  \t\tserial2 = &uart3;\n>  \t\tserial3 = &uart4;\n>  \t\tserial4 = &uart5;\n> +\t\tserial5 = &vuart;\n>  \t};\n>  \n>  \tcpus {\n> @@ -199,7 +200,7 @@\n>  \n>  \t\t\tuart1: serial@1e783000 {\n>  \t\t\t\tcompatible = \"ns16550a\";\n> -\t\t\t\treg = <0x1e783000 0x1000>;\n> +\t\t\t\treg = <0x1e783000 0x20>;\n>  \t\t\t\treg-shift = <2>;\n>  \t\t\t\tinterrupts = <9>;\n>  \t\t\t\tclocks = <&clk_uart>;\n> @@ -209,7 +210,7 @@\n>  \n>  \t\t\tuart2: serial@1e78d000 {\n>  \t\t\t\tcompatible = \"ns16550a\";\n> -\t\t\t\treg = <0x1e78d000 0x1000>;\n> +\t\t\t\treg = <0x1e78d000 0x20>;\n>  \t\t\t\treg-shift = <2>;\n>  \t\t\t\tinterrupts = <32>;\n>  \t\t\t\tclocks = <&clk_uart>;\n> @@ -219,7 +220,7 @@\n>  \n>  \t\t\tuart3: serial@1e78e000 {\n>  \t\t\t\tcompatible = \"ns16550a\";\n> -\t\t\t\treg = <0x1e78e000 0x1000>;\n> +\t\t\t\treg = <0x1e78e000 0x20>;\n>  \t\t\t\treg-shift = <2>;\n>  \t\t\t\tinterrupts = <33>;\n>  \t\t\t\tclocks = <&clk_uart>;\n> @@ -229,7 +230,7 @@\n>  \n>  \t\t\tuart4: serial@1e78f000 {\n>  \t\t\t\tcompatible = \"ns16550a\";\n> -\t\t\t\treg = <0x1e78f000 0x1000>;\n> +\t\t\t\treg = <0x1e78f000 0x20>;\n>  \t\t\t\treg-shift = <2>;\n>  \t\t\t\tinterrupts = <34>;\n>  \t\t\t\tclocks = <&clk_uart>;\n> @@ -239,7 +240,7 @@\n>  \n>  \t\t\tuart5: serial@1e784000 {\n>  \t\t\t\tcompatible = \"ns16550a\";\n> -\t\t\t\treg = <0x1e784000 0x1000>;\n> +\t\t\t\treg = <0x1e784000 0x20>;\n>  \t\t\t\treg-shift = <2>;\n>  \t\t\t\tinterrupts = <10>;\n>  \t\t\t\tclocks = <&clk_uart>;\n> @@ -248,9 +249,9 @@\n>  \t\t\t\tstatus = \"disabled\";\n>  \t\t\t};\n>  \n> -\t\t\tuart6: serial@1e787000 {\n> -\t\t\t\tcompatible = \"ns16550a\";\n> -\t\t\t\treg = <0x1e787000 0x1000>;\n> +\t\t\tvuart: vuart@1e787000 {\n\nBit of a nit, but arguably this should be `vuart: serial@...`?\n\n> +\t\t\t\tcompatible = \"aspeed,ast2400-vuart\";\n> +\t\t\t\treg = <0x1e787000 0x40>;\n>  \t\t\t\treg-shift = <2>;\n>  \t\t\t\tinterrupts = <10>;\n>  \t\t\t\tclocks = <&clk_uart>;\n> diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi\n> index 251fc9f4637e..0b793305120a 100644\n> --- a/arch/arm/boot/dts/aspeed-g5.dtsi\n> +++ b/arch/arm/boot/dts/aspeed-g5.dtsi\n> @@ -27,6 +27,7 @@\n>  \t\tserial2 = &uart3;\n>  \t\tserial3 = &uart4;\n>  \t\tserial4 = &uart5;\n> +\t\tserial5 = &vuart;\n>  \t};\n>  \n>  \tcpus {\n> @@ -247,16 +248,6 @@\n>  \t\t\t\tstatus = \"disabled\";\n>  \t\t\t};\n>  \n> -\t\t\tuart1: serial@1e783000 {\n> -\t\t\t\tcompatible = \"ns16550a\";\n> -\t\t\t\treg = <0x1e783000 0x1000>;\n> -\t\t\t\treg-shift = <2>;\n> -\t\t\t\tinterrupts = <9>;\n> -\t\t\t\tclocks = <&clk_uart>;\n> -\t\t\t\tno-loopback-test;\n> -\t\t\t\tstatus = \"disabled\";\n> -\t\t\t};\n> -\n>  \t\t\tlpc: lpc@1e789000 {\n>  \t\t\t\tcompatible = \"aspeed,ast2500-lpc\", \"simple-mfd\";\n>  \t\t\t\treg = <0x1e789000 0x1000>;\n> @@ -287,9 +278,19 @@\n>  \t\t\t\t};\n>  \t\t\t};\n>  \n> +\t\t\tuart1: serial@1e783000 {\n\nEarlier in the series you had a patch moving the ADC node to be in\naddress-order with respect to the rest of the nodes but this change puts uart1\nout of address-order. As it turns out the uarts blocks are sprayed around in\nthe address-space: uart1 and uart5 are together, the vuart is elsewhere, then\nuarts 2-4 are lumped together in another spot. I think it makes sense to\nconsolidate them, but it is inconsistent. Thoughts?\n\n> +\t\t\t\tcompatible = \"ns16550a\";\n> +\t\t\t\treg = <0x1e783000 0x20>;\n> +\t\t\t\treg-shift = <2>;\n> +\t\t\t\tinterrupts = <9>;\n> +\t\t\t\tclocks = <&clk_uart>;\n> +\t\t\t\tno-loopback-test;\n> +\t\t\t\tstatus = \"disabled\";\n> +\t\t\t};\n> +\n>  \t\t\tuart2: serial@1e78d000 {\n>  \t\t\t\tcompatible = \"ns16550a\";\n> -\t\t\t\treg = <0x1e78d000 0x1000>;\n> +\t\t\t\treg = <0x1e78d000 0x20>;\n>  \t\t\t\treg-shift = <2>;\n>  \t\t\t\tinterrupts = <32>;\n>  \t\t\t\tclocks = <&clk_uart>;\n> @@ -299,7 +300,7 @@\n>  \n>  \t\t\tuart3: serial@1e78e000 {\n>  \t\t\t\tcompatible = \"ns16550a\";\n> -\t\t\t\treg = <0x1e78e000 0x1000>;\n> +\t\t\t\treg = <0x1e78e000 0x20>;\n>  \t\t\t\treg-shift = <2>;\n>  \t\t\t\tinterrupts = <33>;\n>  \t\t\t\tclocks = <&clk_uart>;\n> @@ -309,7 +310,7 @@\n>  \n>  \t\t\tuart4: serial@1e78f000 {\n>  \t\t\t\tcompatible = \"ns16550a\";\n> -\t\t\t\treg = <0x1e78f000 0x1000>;\n> +\t\t\t\treg = <0x1e78f000 0x20>;\n>  \t\t\t\treg-shift = <2>;\n>  \t\t\t\tinterrupts = <34>;\n>  \t\t\t\tclocks = <&clk_uart>;\n> @@ -319,18 +320,17 @@\n>  \n>  \t\t\tuart5: serial@1e784000 {\n>  \t\t\t\tcompatible = \"ns16550a\";\n> -\t\t\t\treg = <0x1e784000 0x1000>;\n> +\t\t\t\treg = <0x1e784000 0x20>;\n>  \t\t\t\treg-shift = <2>;\n>  \t\t\t\tinterrupts = <10>;\n>  \t\t\t\tclocks = <&clk_uart>;\n> -\t\t\t\tcurrent-speed = <38400>;\n>  \t\t\t\tno-loopback-test;\n>  \t\t\t\tstatus = \"disabled\";\n>  \t\t\t};\n>  \n> -\t\t\tuart6: serial@1e787000 {\n> -\t\t\t\tcompatible = \"ns16550a\";\n> -\t\t\t\treg = <0x1e787000 0x1000>;\n> +\t\t\tvuart: vuart@1e787000 {\n\nSee serial@ comment above.\n\nCheers,\n\nAndrew\n\n> +\t\t\t\tcompatible = \"aspeed,ast2500-vuart\";\n> +\t\t\t\treg = <0x1e787000 0x40>;\n>  \t\t\t\treg-shift = <2>;\n>  \t\t\t\tinterrupts = <10>;\n>  \t\t\t\tclocks = <&clk_uart>;","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; 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Wed, 04 Oct 2017 01:28:59 -0400","from keelia (unknown [203.0.153.9])\n\tby mail.messagingengine.com (Postfix) with ESMTPA id 2A04224570;\n\tWed, 4 Oct 2017 01:28:54 -0400 (EDT)"],"DKIM-Signature":["v=1; a=rsa-sha256; c=relaxed/relaxed; d=aj.id.au; h=cc\n\t:content-type:date:from:in-reply-to:message-id:mime-version\n\t:references:subject:to:x-me-sender:x-me-sender:x-sasl-enc\n\t:x-sasl-enc; s=fm1; bh=Qn4TtBXvOBVwMAP5esNb5cEjIm7riCyuWTB/bco5h\n\tI0=; b=mr3lFPT19uDT9czIpaRZd77II32czW4jxWEBxLY1o5rYvmMy+qlaARz9B\n\tGEP0WW13U3xB2Af9syYC2/TBbp3ZsktqWgghui25rwO7seI9YUuhELchFcPoibXO\n\tj7nhikS0d+SykmdoC642s9camf8b4z0EXMFQvuQUsiOz2bGgX/wI32DaqLMa2uBQ\n\tjiK0orcqo2pZ+B6rdKT1PijTFEtRdKhPcYu1TwUjfA/gIzG1kI8Ldk5qM0WhDeKF\n\t+IJPMvs4IzCK0DZlSgq/iAkvCSD/5esIw04CPNOa3BQ7+TfKQMhiGBeSlQvn6/2E\n\t56Z869/BXHiMM2lDTwy5QjMOYaPOg==","v=1; a=rsa-sha256; c=relaxed/relaxed; d=\n\tmessagingengine.com; h=cc:content-type:date:from:in-reply-to\n\t:message-id:mime-version:references:subject:to:x-me-sender\n\t:x-me-sender:x-sasl-enc:x-sasl-enc; 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micalg=\"pgp-sha512\";\n\tprotocol=\"application/pgp-signature\";\n\tboundary=\"=-kijKAuAMDPqSYXCkz2l6\"","X-Mailer":"Evolution 3.22.6-1ubuntu1 ","Mime-Version":"1.0","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1779452,"web_url":"http://patchwork.ozlabs.org/comment/1779452/","msgid":"","list_archive_url":null,"date":"2017-10-04T06:00:10","subject":"Re: [PATCH 8/8] ARM: dts: aspeed: Clean up UART nodes","submitter":{"id":48628,"url":"http://patchwork.ozlabs.org/api/people/48628/","name":"Joel Stanley","email":"joel@jms.id.au"},"content":"On Wed, Oct 4, 2017 at 2:58 PM, Andrew Jeffery wrote:\n> On Thu, 2017-09-28 at 17:21 +0930, Joel Stanley wrote:\n\n>> - uart6: serial@1e787000 {\n>> - compatible = \"ns16550a\";\n>> - reg = <0x1e787000 0x1000>;\n>> + vuart: vuart@1e787000 {\n>\n> Bit of a nit, but arguably this should be `vuart: serial@...`?\n\nYep, that makes sense.\n\n>\n>> + compatible = \"aspeed,ast2400-vuart\";\n>> + reg = <0x1e787000 0x40>;\n>> reg-shift = <2>;\n>> interrupts = <10>;\n>> clocks = <&clk_uart>;\n>> diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi\n>> index 251fc9f4637e..0b793305120a 100644\n>> --- a/arch/arm/boot/dts/aspeed-g5.dtsi\n>> +++ b/arch/arm/boot/dts/aspeed-g5.dtsi\n\n>> @@ -287,9 +278,19 @@\n>> };\n>> };\n>>\n>> + uart1: serial@1e783000 {\n>\n> Earlier in the series you had a patch moving the ADC node to be in\n> address-order with respect to the rest of the nodes but this change puts uart1\n> out of address-order. As it turns out the uarts blocks are sprayed around in\n> the address-space: uart1 and uart5 are together, the vuart is elsewhere, then\n> uarts 2-4 are lumped together in another spot. I think it makes sense to\n> consolidate them, but it is inconsistent. Thoughts?\n\nYeah. I'll move them to where they should be.\n\nCheers,\n\nJoel\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"DSlsA0nF\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y6QHR1z9rz9sxR\n\tfor ;\n\tWed, 4 Oct 2017 17:00:35 +1100 (AEDT)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751148AbdJDGAd (ORCPT\n\t);\n\tWed, 4 Oct 2017 02:00:33 -0400","from mail-lf0-f66.google.com ([209.85.215.66]:34915 \"EHLO\n\tmail-lf0-f66.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751133AbdJDGAc (ORCPT\n\t); Wed, 4 Oct 2017 02:00:32 -0400","by mail-lf0-f66.google.com with SMTP id c8so4383427lfe.2;\n\tTue, 03 Oct 2017 23:00:31 -0700 (PDT)","by 10.25.195.6 with HTTP; Tue, 3 Oct 2017 23:00:10 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=mime-version:sender:in-reply-to:references:from:date:message-id\n\t:subject:to:cc;\n\tbh=rB2TBIXPl6rwP+y0MjUiC+oyxWxrUKpgrf437OQmkTc=;\n\tb=DSlsA0nF4YJ/JnJ2Ey6KaAJ9l9tEOcrzlsmnI+BSWWYy/j9Lja4dk2V/wW83g/A8oT\n\tdzi7+kXmanXc8wO7L7Dk80m8WZ53rsw+tfNGbYa9Dj30XEmCfDiWrRcfXnreggkwJAub\n\tSXWG1bwmaaHO0pX6rnB7mtx8LgrrdSvc2HcTNBMQPurTFYYvs9pDj161xWF2qtX6BF15\n\tNZkahftkjdkQ5V9iLMlDD2Cs/F+qdoSrVMs7/Uz4FkoshcTWwsuJNt/TnWHsVN+wbm/L\n\t+0NyBFJnOB2mPZwLABBNgaSZ4M57db3gxVLzObiKFBk+e73ueb0tuSBbC8hLOXoZvPER\n\tVB+Q==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:mime-version:sender:in-reply-to:references:from\n\t:date:message-id:subject:to:cc;\n\tbh=rB2TBIXPl6rwP+y0MjUiC+oyxWxrUKpgrf437OQmkTc=;\n\tb=OjHxx5fVzwP8E0wlL2MYYXDJAGOjQQF6+Q+848hhefIfcrlX63QFOysTFiUMYMHTcR\n\tUiHNdQucbrXI9CNTVnZKIu32D6RHMYkVwKuF1cxZSj9PawigGm/qJbHxpshpdfhqRAyn\n\tlrLKzX6zsECxBC2pgG23JjRpfY7LrEg+crokcU817VnJug1IJ4kRYc/6H1dY7QL1924C\n\tslZdoxcAPAJDTOYHR3P58TQXQRWgMJg84kNWAnW9vLgUYIIjFa8nzCaNZpcsdgfaGAyz\n\tRtW0x26WXI1rFjdM6HOFsNhELsyHfm0aux469z9CJ9VxAoNJepKCNi5edRfRcI8Z1pUU\n\tVn0w==","X-Gm-Message-State":"AHPjjUiQO1Wil0hV8Emaf+fdcSK2So1H1CtrO7Zp8XLTyaBMBOSGgjVV\n\ttQUx2kLnVSEeOojJZ7xfhbxuugfIkGrg9XsoNv0=","X-Google-Smtp-Source":"AOwi7QA2iARl8qA9IfmKCgBvIpt50ds5dChIB6lsg48/TriTE7bxmIYRIZAHgG8TGHAOx4523i/ucBtC8+xPZ8GsVBM=","X-Received":"by 10.46.93.75 with SMTP id r72mr10792684ljb.46.1507096831025;\n\tTue, 03 Oct 2017 23:00:31 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<1507094931.5452.20.camel@aj.id.au>","References":"<20170928075149.8154-1-joel@jms.id.au>\n\t<20170928075149.8154-9-joel@jms.id.au>\n\t<1507094931.5452.20.camel@aj.id.au>","From":"Joel Stanley ","Date":"Wed, 4 Oct 2017 15:30:10 +0930","X-Google-Sender-Auth":"zUxhaCBPvOhoHKFBgnnrAh6XoGU","Message-ID":"","Subject":"Re: [PATCH 8/8] ARM: dts: aspeed: Clean up UART nodes","To":"Andrew Jeffery ","Cc":"Rob Herring , Mark Rutland ,\n\tRussell King , devicetree\n\t, Linux ARM\n\t, Linux Kernel Mailing List\n\t, Rick Altherr ,\n\tBrendan Higgins , \n\t=?utf-8?q?C=C3=A9dric_Le_Goater?= ,\n\tlinux-aspeed@lists.ozlabs.org","Content-Type":"text/plain; charset=\"UTF-8\"","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}}]