[{"id":1776869,"web_url":"http://patchwork.ozlabs.org/comment/1776869/","msgid":"<20170928083827.GE23750@n2100.armlinux.org.uk>","list_archive_url":null,"date":"2017-09-28T08:38:27","subject":"Re: [PATCH v4 2/2] memory: ti-emif-sram: introduce relocatable\n\tsuspend/resume handlers","submitter":{"id":69080,"url":"http://patchwork.ozlabs.org/api/people/69080/","name":"Russell King (Oracle)","email":"linux@armlinux.org.uk"},"content":"On Tue, Sep 26, 2017 at 07:03:55PM -0500, Dave Gerlach wrote:\n> diff --git a/drivers/memory/emif-asm-offsets.c b/drivers/memory/emif-asm-offsets.c\n> new file mode 100644\n> index 000000000000..bdb153c9e948\n> --- /dev/null\n> +++ b/drivers/memory/emif-asm-offsets.c\n> @@ -0,0 +1,22 @@\n> +/*\n> + * TI AM33XX EMIF PM Assembly Offsets\n> + *\n> + * Copyright (C) 2016-2017 Texas Instruments Inc.\n> + *\n> + * This program is free software; you can redistribute it and/or\n> + * modify it under the terms of the GNU General Public License as\n> + * published by the Free Software Foundation version 2.\n> + *\n> + * This program is distributed \"as is\" WITHOUT ANY WARRANTY of any\n> + * kind, whether express or implied; without even the implied warranty\n> + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n> + * GNU General Public License for more details.\n> + */\n> +#include \n> +\n> +int main(void)\n> +{\n> +\tti_emif_offsets();\n> +\n> +\treturn 0;\n> +}\n\n...\n\n> +#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)\n> +static inline void ti_emif_offsets(void)\n> +{\n> +\tDEFINE(EMIF_SDCFG_VAL_OFFSET,\n> +\t offsetof(struct emif_regs_amx3, emif_sdcfg_val));\n> +\tDEFINE(EMIF_TIMING1_VAL_OFFSET,\n> +\t offsetof(struct emif_regs_amx3, emif_timing1_val));\n> +\tDEFINE(EMIF_TIMING2_VAL_OFFSET,\n> +\t offsetof(struct emif_regs_amx3, emif_timing2_val));\n> +\tDEFINE(EMIF_TIMING3_VAL_OFFSET,\n> +\t offsetof(struct emif_regs_amx3, emif_timing3_val));\n> +\tDEFINE(EMIF_REF_CTRL_VAL_OFFSET,\n> +\t offsetof(struct emif_regs_amx3, emif_ref_ctrl_val));\n> +\tDEFINE(EMIF_ZQCFG_VAL_OFFSET,\n> +\t offsetof(struct emif_regs_amx3, emif_zqcfg_val));\n> +\tDEFINE(EMIF_PMCR_VAL_OFFSET,\n> +\t offsetof(struct emif_regs_amx3, emif_pmcr_val));\n> +\tDEFINE(EMIF_PMCR_SHDW_VAL_OFFSET,\n> +\t offsetof(struct emif_regs_amx3, emif_pmcr_shdw_val));\n> +\tDEFINE(EMIF_RD_WR_LEVEL_RAMP_CTRL_OFFSET,\n> +\t offsetof(struct emif_regs_amx3, emif_rd_wr_level_ramp_ctrl));\n> +\tDEFINE(EMIF_RD_WR_EXEC_THRESH_OFFSET,\n> +\t offsetof(struct emif_regs_amx3, emif_rd_wr_exec_thresh));\n> +\tDEFINE(EMIF_COS_CONFIG_OFFSET,\n> +\t offsetof(struct emif_regs_amx3, emif_cos_config));\n> +\tDEFINE(EMIF_PRIORITY_TO_COS_MAPPING_OFFSET,\n> +\t offsetof(struct emif_regs_amx3, emif_priority_to_cos_mapping));\n> +\tDEFINE(EMIF_CONNECT_ID_SERV_1_MAP_OFFSET,\n> +\t offsetof(struct emif_regs_amx3, emif_connect_id_serv_1_map));\n> +\tDEFINE(EMIF_CONNECT_ID_SERV_2_MAP_OFFSET,\n> +\t offsetof(struct emif_regs_amx3, emif_connect_id_serv_2_map));\n> +\tDEFINE(EMIF_OCP_CONFIG_VAL_OFFSET,\n> +\t offsetof(struct emif_regs_amx3, emif_ocp_config_val));\n> +\tDEFINE(EMIF_LPDDR2_NVM_TIM_OFFSET,\n> +\t offsetof(struct emif_regs_amx3, emif_lpddr2_nvm_tim));\n> +\tDEFINE(EMIF_LPDDR2_NVM_TIM_SHDW_OFFSET,\n> +\t offsetof(struct emif_regs_amx3, emif_lpddr2_nvm_tim_shdw));\n> +\tDEFINE(EMIF_DLL_CALIB_CTRL_VAL_OFFSET,\n> +\t offsetof(struct emif_regs_amx3, emif_dll_calib_ctrl_val));\n> +\tDEFINE(EMIF_DLL_CALIB_CTRL_VAL_SHDW_OFFSET,\n> +\t offsetof(struct emif_regs_amx3, emif_dll_calib_ctrl_val_shdw));\n> +\tDEFINE(EMIF_DDR_PHY_CTLR_1_OFFSET,\n> +\t offsetof(struct emif_regs_amx3, emif_ddr_phy_ctlr_1));\n> +\tDEFINE(EMIF_EXT_PHY_CTRL_VALS_OFFSET,\n> +\t offsetof(struct emif_regs_amx3, emif_ext_phy_ctrl_vals));\n> +\tDEFINE(EMIF_REGS_AMX3_SIZE, sizeof(struct emif_regs_amx3));\n> +\n> +\tBLANK();\n> +\n> +\tDEFINE(EMIF_PM_BASE_ADDR_VIRT_OFFSET,\n> +\t offsetof(struct ti_emif_pm_data, ti_emif_base_addr_virt));\n> +\tDEFINE(EMIF_PM_BASE_ADDR_PHYS_OFFSET,\n> +\t offsetof(struct ti_emif_pm_data, ti_emif_base_addr_phys));\n> +\tDEFINE(EMIF_PM_CONFIG_OFFSET,\n> +\t offsetof(struct ti_emif_pm_data, ti_emif_sram_config));\n> +\tDEFINE(EMIF_PM_REGS_VIRT_OFFSET,\n> +\t offsetof(struct ti_emif_pm_data, regs_virt));\n> +\tDEFINE(EMIF_PM_REGS_PHYS_OFFSET,\n> +\t offsetof(struct ti_emif_pm_data, regs_phys));\n> +\tDEFINE(EMIF_PM_DATA_SIZE, sizeof(struct ti_emif_pm_data));\n> +\n> +\tBLANK();\n> +\n> +\tDEFINE(EMIF_PM_SAVE_CONTEXT_OFFSET,\n> +\t offsetof(struct ti_emif_pm_functions, save_context));\n> +\tDEFINE(EMIF_PM_RESTORE_CONTEXT_OFFSET,\n> +\t offsetof(struct ti_emif_pm_functions, restore_context));\n> +\tDEFINE(EMIF_PM_ENTER_SR_OFFSET,\n> +\t offsetof(struct ti_emif_pm_functions, enter_sr));\n> +\tDEFINE(EMIF_PM_EXIT_SR_OFFSET,\n> +\t offsetof(struct ti_emif_pm_functions, exit_sr));\n> +\tDEFINE(EMIF_PM_ABORT_SR_OFFSET,\n> +\t offsetof(struct ti_emif_pm_functions, abort_sr));\n> +\tDEFINE(EMIF_PM_FUNCTIONS_SIZE, sizeof(struct ti_emif_pm_functions));\n> +}\n> +#else\n> +static inline void ti_emif_offsets(void) {}\n> +#endif\n\nAny reason the above can't be part of emif-asm-offsets.c ?","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=armlinux.org.uk header.i=@armlinux.org.uk\n\theader.b=\"DZgl8TKU\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y2p501xxtz9s5L\n\tfor ;\n\tThu, 28 Sep 2017 18:38:58 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1752511AbdI1Iin (ORCPT\n\t);\n\tThu, 28 Sep 2017 04:38:43 -0400","from pandora.armlinux.org.uk ([78.32.30.218]:52902 \"EHLO\n\tpandora.armlinux.org.uk\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1752453AbdI1Iik (ORCPT\n\t); Thu, 28 Sep 2017 04:38:40 -0400","from n2100.armlinux.org.uk\n\t([2001:4d48:ad52:3201:214:fdff:fe10:4f86]:40435)\n\tby pandora.armlinux.org.uk with esmtpsa\n\t(TLSv1:DHE-RSA-AES256-SHA:256)\n\t(Exim 4.82_1-5b7a7c0-XX) (envelope-from )\n\tid 1dxUL1-0008W5-2f; Thu, 28 Sep 2017 09:38:31 +0100","from linux by n2100.armlinux.org.uk with local (Exim 4.76)\n\t(envelope-from )\n\tid 1dxUKy-0004Yv-09; Thu, 28 Sep 2017 09:38:28 +0100"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=armlinux.org.uk; s=pandora-2014; \n\th=Sender:In-Reply-To:Content-Type:MIME-Version:References:Message-ID:Subject:Cc:To:From:Date;\n\tbh=JLZP6Dkp7a4TZ1+qzlWOpfskaDFess4adx1o/pzcZE8=; \n\tb=DZgl8TKUO8MxZQV8RnppY+rHhkTZg6wQJ4FlblCXveu5BeLjMtZPml9NpI9pMDLCOmIT0LipJtijI+R67xCokE0xVrCKItfuzLje1VToYPZRnQ898pJxscBq0uZhslsGLQI3L3NYIf8SYa1pPvC6GlcrRsXPX9x+/xA2BRhJhuQ=;","Date":"Thu, 28 Sep 2017 09:38:27 +0100","From":"Russell King - ARM Linux ","To":"Dave Gerlach ","Cc":"Tony Lindgren , Santosh Shilimkar ,\n\tlinux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org, devicetree@vger.kernel.org,\n\tRob Herring , Keerthy J ,\n\tJohan Hovold ","Subject":"Re: [PATCH v4 2/2] memory: ti-emif-sram: introduce relocatable\n\tsuspend/resume handlers","Message-ID":"<20170928083827.GE23750@n2100.armlinux.org.uk>","References":"<20170927000355.30597-1-d-gerlach@ti.com>\n\t<20170927000355.30597-3-d-gerlach@ti.com>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20170927000355.30597-3-d-gerlach@ti.com>","User-Agent":"Mutt/1.5.23 (2014-03-12)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1778417,"web_url":"http://patchwork.ozlabs.org/comment/1778417/","msgid":"<0bbba52e-c7d8-647e-9b58-55cbbe236d4a@ti.com>","list_archive_url":null,"date":"2017-10-02T15:34:18","subject":"Re: [PATCH v4 2/2] memory: ti-emif-sram: introduce relocatable\n\tsuspend/resume handlers","submitter":{"id":61863,"url":"http://patchwork.ozlabs.org/api/people/61863/","name":"Dave Gerlach","email":"d-gerlach@ti.com"},"content":"Russell,\nOn 09/28/2017 03:38 AM, Russell King - ARM Linux wrote:\n> On Tue, Sep 26, 2017 at 07:03:55PM -0500, Dave Gerlach wrote:\n>> diff --git a/drivers/memory/emif-asm-offsets.c b/drivers/memory/emif-asm-offsets.c\n>> new file mode 100644\n>> index 000000000000..bdb153c9e948\n>> --- /dev/null\n>> +++ b/drivers/memory/emif-asm-offsets.c\n>> @@ -0,0 +1,22 @@\n>> +/*\n>> + * TI AM33XX EMIF PM Assembly Offsets\n>> + *\n>> + * Copyright (C) 2016-2017 Texas Instruments Inc.\n>> + *\n>> + * This program is free software; you can redistribute it and/or\n>> + * modify it under the terms of the GNU General Public License as\n>> + * published by the Free Software Foundation version 2.\n>> + *\n>> + * This program is distributed \"as is\" WITHOUT ANY WARRANTY of any\n>> + * kind, whether express or implied; without even the implied warranty\n>> + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n>> + * GNU General Public License for more details.\n>> + */\n>> +#include \n>> +\n>> +int main(void)\n>> +{\n>> +\tti_emif_offsets();\n>> +\n>> +\treturn 0;\n>> +}\n> \n> ...\n> \n>> +#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)\n>> +static inline void ti_emif_offsets(void)\n>> +{\n>> +\tDEFINE(EMIF_SDCFG_VAL_OFFSET,\n>> +\t offsetof(struct emif_regs_amx3, emif_sdcfg_val));\n>> +\tDEFINE(EMIF_TIMING1_VAL_OFFSET,\n>> +\t offsetof(struct emif_regs_amx3, emif_timing1_val));\n>> +\tDEFINE(EMIF_TIMING2_VAL_OFFSET,\n>> +\t offsetof(struct emif_regs_amx3, emif_timing2_val));\n>> +\tDEFINE(EMIF_TIMING3_VAL_OFFSET,\n>> +\t offsetof(struct emif_regs_amx3, emif_timing3_val));\n>> +\tDEFINE(EMIF_REF_CTRL_VAL_OFFSET,\n>> +\t offsetof(struct emif_regs_amx3, emif_ref_ctrl_val));\n>> +\tDEFINE(EMIF_ZQCFG_VAL_OFFSET,\n>> +\t offsetof(struct emif_regs_amx3, emif_zqcfg_val));\n>> +\tDEFINE(EMIF_PMCR_VAL_OFFSET,\n>> +\t offsetof(struct emif_regs_amx3, emif_pmcr_val));\n>> +\tDEFINE(EMIF_PMCR_SHDW_VAL_OFFSET,\n>> +\t offsetof(struct emif_regs_amx3, emif_pmcr_shdw_val));\n>> +\tDEFINE(EMIF_RD_WR_LEVEL_RAMP_CTRL_OFFSET,\n>> +\t offsetof(struct emif_regs_amx3, emif_rd_wr_level_ramp_ctrl));\n>> +\tDEFINE(EMIF_RD_WR_EXEC_THRESH_OFFSET,\n>> +\t offsetof(struct emif_regs_amx3, emif_rd_wr_exec_thresh));\n>> +\tDEFINE(EMIF_COS_CONFIG_OFFSET,\n>> +\t offsetof(struct emif_regs_amx3, emif_cos_config));\n>> +\tDEFINE(EMIF_PRIORITY_TO_COS_MAPPING_OFFSET,\n>> +\t offsetof(struct emif_regs_amx3, emif_priority_to_cos_mapping));\n>> +\tDEFINE(EMIF_CONNECT_ID_SERV_1_MAP_OFFSET,\n>> +\t offsetof(struct emif_regs_amx3, emif_connect_id_serv_1_map));\n>> +\tDEFINE(EMIF_CONNECT_ID_SERV_2_MAP_OFFSET,\n>> +\t offsetof(struct emif_regs_amx3, emif_connect_id_serv_2_map));\n>> +\tDEFINE(EMIF_OCP_CONFIG_VAL_OFFSET,\n>> +\t offsetof(struct emif_regs_amx3, emif_ocp_config_val));\n>> +\tDEFINE(EMIF_LPDDR2_NVM_TIM_OFFSET,\n>> +\t offsetof(struct emif_regs_amx3, emif_lpddr2_nvm_tim));\n>> +\tDEFINE(EMIF_LPDDR2_NVM_TIM_SHDW_OFFSET,\n>> +\t offsetof(struct emif_regs_amx3, emif_lpddr2_nvm_tim_shdw));\n>> +\tDEFINE(EMIF_DLL_CALIB_CTRL_VAL_OFFSET,\n>> +\t offsetof(struct emif_regs_amx3, emif_dll_calib_ctrl_val));\n>> +\tDEFINE(EMIF_DLL_CALIB_CTRL_VAL_SHDW_OFFSET,\n>> +\t offsetof(struct emif_regs_amx3, emif_dll_calib_ctrl_val_shdw));\n>> +\tDEFINE(EMIF_DDR_PHY_CTLR_1_OFFSET,\n>> +\t offsetof(struct emif_regs_amx3, emif_ddr_phy_ctlr_1));\n>> +\tDEFINE(EMIF_EXT_PHY_CTRL_VALS_OFFSET,\n>> +\t offsetof(struct emif_regs_amx3, emif_ext_phy_ctrl_vals));\n>> +\tDEFINE(EMIF_REGS_AMX3_SIZE, sizeof(struct emif_regs_amx3));\n>> +\n>> +\tBLANK();\n>> +\n>> +\tDEFINE(EMIF_PM_BASE_ADDR_VIRT_OFFSET,\n>> +\t offsetof(struct ti_emif_pm_data, ti_emif_base_addr_virt));\n>> +\tDEFINE(EMIF_PM_BASE_ADDR_PHYS_OFFSET,\n>> +\t offsetof(struct ti_emif_pm_data, ti_emif_base_addr_phys));\n>> +\tDEFINE(EMIF_PM_CONFIG_OFFSET,\n>> +\t offsetof(struct ti_emif_pm_data, ti_emif_sram_config));\n>> +\tDEFINE(EMIF_PM_REGS_VIRT_OFFSET,\n>> +\t offsetof(struct ti_emif_pm_data, regs_virt));\n>> +\tDEFINE(EMIF_PM_REGS_PHYS_OFFSET,\n>> +\t offsetof(struct ti_emif_pm_data, regs_phys));\n>> +\tDEFINE(EMIF_PM_DATA_SIZE, sizeof(struct ti_emif_pm_data));\n>> +\n>> +\tBLANK();\n>> +\n>> +\tDEFINE(EMIF_PM_SAVE_CONTEXT_OFFSET,\n>> +\t offsetof(struct ti_emif_pm_functions, save_context));\n>> +\tDEFINE(EMIF_PM_RESTORE_CONTEXT_OFFSET,\n>> +\t offsetof(struct ti_emif_pm_functions, restore_context));\n>> +\tDEFINE(EMIF_PM_ENTER_SR_OFFSET,\n>> +\t offsetof(struct ti_emif_pm_functions, enter_sr));\n>> +\tDEFINE(EMIF_PM_EXIT_SR_OFFSET,\n>> +\t offsetof(struct ti_emif_pm_functions, exit_sr));\n>> +\tDEFINE(EMIF_PM_ABORT_SR_OFFSET,\n>> +\t offsetof(struct ti_emif_pm_functions, abort_sr));\n>> +\tDEFINE(EMIF_PM_FUNCTIONS_SIZE, sizeof(struct ti_emif_pm_functions));\n>> +}\n>> +#else\n>> +static inline void ti_emif_offsets(void) {}\n>> +#endif\n> \n> Any reason the above can't be part of emif-asm-offsets.c ?\n> \n\nYes that's a good point. I was focused on moving the macros and didn't think\nabout why I hid everything away in the header in the first place, to avoid\ncluttering the global asm-offsets.c. Now that we have our own file there's no\nreason for this, I will fix this and the kbuild robot issue and send v5. I can\nsimplify the makefile more which will avoid that build error.\n\nRegards,\nDave\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=ti.com header.i=@ti.com header.b=\"SCAAoCWd\"; \n\tdkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y5R7K3hhCz9t6s\n\tfor ;\n\tTue, 3 Oct 2017 02:35:09 +1100 (AEDT)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751770AbdJBPfH (ORCPT\n\t);\n\tMon, 2 Oct 2017 11:35:07 -0400","from fllnx210.ext.ti.com ([198.47.19.17]:31854 \"EHLO\n\tfllnx210.ext.ti.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751712AbdJBPfH (ORCPT\n\t); Mon, 2 Oct 2017 11:35:07 -0400","from dflxv15.itg.ti.com ([128.247.5.124])\n\tby fllnx210.ext.ti.com (8.15.1/8.15.1) with ESMTP id v92FYIBS023642; \n\tMon, 2 Oct 2017 10:34:18 -0500","from DLEE70.ent.ti.com (dlemailx.itg.ti.com [157.170.170.113])\n\tby dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v92FYIiu023367;\n\tMon, 2 Oct 2017 10:34:18 -0500","from [128.247.59.203] (128.247.59.203) by DLEE70.ent.ti.com\n\t(157.170.170.113) with Microsoft SMTP Server id 14.3.294.0;\n\tMon, 2 Oct 2017 10:34:17 -0500"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com;\n\ts=ti-com-17Q1; t=1506958458;\n\tbh=kwwl3PKOMbiC7+g6S0dK/Y6z94jVuw3DoTItTUbX/B8=;\n\th=Subject:To:References:CC:From:Date:In-Reply-To;\n\tb=SCAAoCWdm/iGx2GRZiep4K7KUsIF6SulUe/8brWx0av+6kG2du9FNoXaLEpXD+bLy\n\tehU0nHoVSUcrUQ37n2rDKpRnlmFROd+uE7RPoQ4CNXpeOoXWhk1q1HakYxI1QkjEqD\n\tPcCJzZlpJj3gKzV/J+VLY3F2bvKpmoGlBtCzJp28=","Subject":"Re: [PATCH v4 2/2] memory: ti-emif-sram: introduce relocatable\n\tsuspend/resume handlers","To":"Russell King - ARM Linux ","References":"<20170927000355.30597-1-d-gerlach@ti.com>\n\t<20170927000355.30597-3-d-gerlach@ti.com>\n\t<20170928083827.GE23750@n2100.armlinux.org.uk>","CC":"Tony Lindgren , Santosh Shilimkar ,\n\t,\n\t, ,\n\t, Rob Herring ,\n\tKeerthy J , Johan Hovold ","From":"Dave Gerlach ","Message-ID":"<0bbba52e-c7d8-647e-9b58-55cbbe236d4a@ti.com>","Date":"Mon, 2 Oct 2017 10:34:18 -0500","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101\n\tThunderbird/45.5.1","MIME-Version":"1.0","In-Reply-To":"<20170928083827.GE23750@n2100.armlinux.org.uk>","Content-Type":"text/plain; charset=\"windows-1252\"","Content-Transfer-Encoding":"7bit","X-Originating-IP":"[128.247.59.203]","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1779065,"web_url":"http://patchwork.ozlabs.org/comment/1779065/","msgid":"<169e5257-3e05-3c61-32ae-27b34123859c@ti.com>","list_archive_url":null,"date":"2017-10-03T15:14:23","subject":"Re: [PATCH v4 2/2] memory: ti-emif-sram: introduce relocatable\n\tsuspend/resume handlers","submitter":{"id":61863,"url":"http://patchwork.ozlabs.org/api/people/61863/","name":"Dave Gerlach","email":"d-gerlach@ti.com"},"content":"On 10/02/2017 10:34 AM, Dave Gerlach wrote:\n> Russell,\n> On 09/28/2017 03:38 AM, Russell King - ARM Linux wrote:\n>> On Tue, Sep 26, 2017 at 07:03:55PM -0500, Dave Gerlach wrote:\n>>> diff --git a/drivers/memory/emif-asm-offsets.c b/drivers/memory/emif-asm-offsets.c\n>>> new file mode 100644\n>>> index 000000000000..bdb153c9e948\n>>> --- /dev/null\n>>> +++ b/drivers/memory/emif-asm-offsets.c\n>>> @@ -0,0 +1,22 @@\n>>> +/*\n>>> + * TI AM33XX EMIF PM Assembly Offsets\n>>> + *\n>>> + * Copyright (C) 2016-2017 Texas Instruments Inc.\n>>> + *\n>>> + * This program is free software; you can redistribute it and/or\n>>> + * modify it under the terms of the GNU General Public License as\n>>> + * published by the Free Software Foundation version 2.\n>>> + *\n>>> + * This program is distributed \"as is\" WITHOUT ANY WARRANTY of any\n>>> + * kind, whether express or implied; without even the implied warranty\n>>> + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n>>> + * GNU General Public License for more details.\n>>> + */\n>>> +#include \n>>> +\n>>> +int main(void)\n>>> +{\n>>> +\tti_emif_offsets();\n>>> +\n>>> +\treturn 0;\n>>> +}\n>>\n>> ...\n>>\n>>> +#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)\n>>> +static inline void ti_emif_offsets(void)\n>>> +{\n>>> +\tDEFINE(EMIF_SDCFG_VAL_OFFSET,\n>>> +\t offsetof(struct emif_regs_amx3, emif_sdcfg_val));\n>>> +\tDEFINE(EMIF_TIMING1_VAL_OFFSET,\n>>> +\t offsetof(struct emif_regs_amx3, emif_timing1_val));\n>>> +\tDEFINE(EMIF_TIMING2_VAL_OFFSET,\n>>> +\t offsetof(struct emif_regs_amx3, emif_timing2_val));\n>>> +\tDEFINE(EMIF_TIMING3_VAL_OFFSET,\n>>> +\t offsetof(struct emif_regs_amx3, emif_timing3_val));\n>>> +\tDEFINE(EMIF_REF_CTRL_VAL_OFFSET,\n>>> +\t offsetof(struct emif_regs_amx3, emif_ref_ctrl_val));\n>>> +\tDEFINE(EMIF_ZQCFG_VAL_OFFSET,\n>>> +\t offsetof(struct emif_regs_amx3, emif_zqcfg_val));\n>>> +\tDEFINE(EMIF_PMCR_VAL_OFFSET,\n>>> +\t offsetof(struct emif_regs_amx3, emif_pmcr_val));\n>>> +\tDEFINE(EMIF_PMCR_SHDW_VAL_OFFSET,\n>>> +\t offsetof(struct emif_regs_amx3, emif_pmcr_shdw_val));\n>>> +\tDEFINE(EMIF_RD_WR_LEVEL_RAMP_CTRL_OFFSET,\n>>> +\t offsetof(struct emif_regs_amx3, emif_rd_wr_level_ramp_ctrl));\n>>> +\tDEFINE(EMIF_RD_WR_EXEC_THRESH_OFFSET,\n>>> +\t offsetof(struct emif_regs_amx3, emif_rd_wr_exec_thresh));\n>>> +\tDEFINE(EMIF_COS_CONFIG_OFFSET,\n>>> +\t offsetof(struct emif_regs_amx3, emif_cos_config));\n>>> +\tDEFINE(EMIF_PRIORITY_TO_COS_MAPPING_OFFSET,\n>>> +\t offsetof(struct emif_regs_amx3, emif_priority_to_cos_mapping));\n>>> +\tDEFINE(EMIF_CONNECT_ID_SERV_1_MAP_OFFSET,\n>>> +\t offsetof(struct emif_regs_amx3, emif_connect_id_serv_1_map));\n>>> +\tDEFINE(EMIF_CONNECT_ID_SERV_2_MAP_OFFSET,\n>>> +\t offsetof(struct emif_regs_amx3, emif_connect_id_serv_2_map));\n>>> +\tDEFINE(EMIF_OCP_CONFIG_VAL_OFFSET,\n>>> +\t offsetof(struct emif_regs_amx3, emif_ocp_config_val));\n>>> +\tDEFINE(EMIF_LPDDR2_NVM_TIM_OFFSET,\n>>> +\t offsetof(struct emif_regs_amx3, emif_lpddr2_nvm_tim));\n>>> +\tDEFINE(EMIF_LPDDR2_NVM_TIM_SHDW_OFFSET,\n>>> +\t offsetof(struct emif_regs_amx3, emif_lpddr2_nvm_tim_shdw));\n>>> +\tDEFINE(EMIF_DLL_CALIB_CTRL_VAL_OFFSET,\n>>> +\t offsetof(struct emif_regs_amx3, emif_dll_calib_ctrl_val));\n>>> +\tDEFINE(EMIF_DLL_CALIB_CTRL_VAL_SHDW_OFFSET,\n>>> +\t offsetof(struct emif_regs_amx3, emif_dll_calib_ctrl_val_shdw));\n>>> +\tDEFINE(EMIF_DDR_PHY_CTLR_1_OFFSET,\n>>> +\t offsetof(struct emif_regs_amx3, emif_ddr_phy_ctlr_1));\n>>> +\tDEFINE(EMIF_EXT_PHY_CTRL_VALS_OFFSET,\n>>> +\t offsetof(struct emif_regs_amx3, emif_ext_phy_ctrl_vals));\n>>> +\tDEFINE(EMIF_REGS_AMX3_SIZE, sizeof(struct emif_regs_amx3));\n>>> +\n>>> +\tBLANK();\n>>> +\n>>> +\tDEFINE(EMIF_PM_BASE_ADDR_VIRT_OFFSET,\n>>> +\t offsetof(struct ti_emif_pm_data, ti_emif_base_addr_virt));\n>>> +\tDEFINE(EMIF_PM_BASE_ADDR_PHYS_OFFSET,\n>>> +\t offsetof(struct ti_emif_pm_data, ti_emif_base_addr_phys));\n>>> +\tDEFINE(EMIF_PM_CONFIG_OFFSET,\n>>> +\t offsetof(struct ti_emif_pm_data, ti_emif_sram_config));\n>>> +\tDEFINE(EMIF_PM_REGS_VIRT_OFFSET,\n>>> +\t offsetof(struct ti_emif_pm_data, regs_virt));\n>>> +\tDEFINE(EMIF_PM_REGS_PHYS_OFFSET,\n>>> +\t offsetof(struct ti_emif_pm_data, regs_phys));\n>>> +\tDEFINE(EMIF_PM_DATA_SIZE, sizeof(struct ti_emif_pm_data));\n>>> +\n>>> +\tBLANK();\n>>> +\n>>> +\tDEFINE(EMIF_PM_SAVE_CONTEXT_OFFSET,\n>>> +\t offsetof(struct ti_emif_pm_functions, save_context));\n>>> +\tDEFINE(EMIF_PM_RESTORE_CONTEXT_OFFSET,\n>>> +\t offsetof(struct ti_emif_pm_functions, restore_context));\n>>> +\tDEFINE(EMIF_PM_ENTER_SR_OFFSET,\n>>> +\t offsetof(struct ti_emif_pm_functions, enter_sr));\n>>> +\tDEFINE(EMIF_PM_EXIT_SR_OFFSET,\n>>> +\t offsetof(struct ti_emif_pm_functions, exit_sr));\n>>> +\tDEFINE(EMIF_PM_ABORT_SR_OFFSET,\n>>> +\t offsetof(struct ti_emif_pm_functions, abort_sr));\n>>> +\tDEFINE(EMIF_PM_FUNCTIONS_SIZE, sizeof(struct ti_emif_pm_functions));\n>>> +}\n>>> +#else\n>>> +static inline void ti_emif_offsets(void) {}\n>>> +#endif\n>>\n>> Any reason the above can't be part of emif-asm-offsets.c ?\n>>\n> \n> Yes that's a good point. I was focused on moving the macros and didn't think\n> about why I hid everything away in the header in the first place, to avoid\n> cluttering the global asm-offsets.c. Now that we have our own file there's no\n> reason for this, I will fix this and the kbuild robot issue and send v5. I can\n> simplify the makefile more which will avoid that build error.\n\nOn second thought, perhaps it is best we keep these offsets in the header so\nthat they can be easily included for generation in the pm-asm-offsets header.\n\nBefore, everything was generated in the top-level asm-offsets.h so I could\neasily access all macros from ti-emif-sram-pm.S and also the sleep33xx.S found\nhere [1]. Now I can generate emif-asm-offsets.h and pm-asm-offsets.h as separate\nfiles but the sleep33xx.S code requires the macros from both, and because\nemif-asm-offsets.h is generated at build it is hard to describe the build\ndependency from the arch/arm/mach-omap2/Makefile to a generated header in\ndrivers/memory.\n\nThe cleanest solution I have found is to include the emif macros in\npm-asm-offsets.h directly by placing ti_emif_offsets() in the c file used to\ngenerate the PM macros. Next version I send will do it this way unless there is\nan objection.\n\nRegards,\nDave\n\n[1] https://www.spinics.net/lists/arm-kernel/msg595934.html\n\n> \n> Regards,\n> Dave\n> \n\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=ti.com header.i=@ti.com header.b=\"SvYOVbv5\"; \n\tdkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y62hG1FH6z9sRV\n\tfor ;\n\tWed, 4 Oct 2017 02:17:18 +1100 (AEDT)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1752410AbdJCPRE (ORCPT\n\t);\n\tTue, 3 Oct 2017 11:17:04 -0400","from fllnx209.ext.ti.com ([198.47.19.16]:28569 \"EHLO\n\tfllnx209.ext.ti.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1752395AbdJCPRB (ORCPT\n\t); Tue, 3 Oct 2017 11:17:01 -0400","from dflxv15.itg.ti.com ([128.247.5.124])\n\tby fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id v93FFOJ4000448; \n\tTue, 3 Oct 2017 10:15:24 -0500","from DLEE70.ent.ti.com (dlemailx.itg.ti.com [157.170.170.113])\n\tby dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v93FFJxZ020809;\n\tTue, 3 Oct 2017 10:15:19 -0500","from [128.247.59.203] (128.247.59.203) by DLEE70.ent.ti.com\n\t(157.170.170.113) with Microsoft SMTP Server id 14.3.294.0;\n\tTue, 3 Oct 2017 10:15:18 -0500"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com;\n\ts=ti-com-17Q1; t=1507043724;\n\tbh=NkqO7xVcPLH/UlIYiyFquaRSMgKFMwhOostYPjk+mtU=;\n\th=Subject:To:References:CC:From:Date:In-Reply-To;\n\tb=SvYOVbv5tqZCoJU3Pzjw/6ZVvITaN8SRKbacx0fiUEN7gE6YVNhduFGloUzhMxq7z\n\tkVtxDW+l0rltf5ZfokoXVejfVDF5Zkg57VU4PA/V1BLMrXm23+aKV3aTdKwp1BWYiA\n\tRHdtknNHffDImS2QxxPTrcP0/VGkYE0FkkRtKaQA=","Subject":"Re: [PATCH v4 2/2] memory: ti-emif-sram: introduce relocatable\n\tsuspend/resume handlers","To":"Russell King - ARM Linux ","References":"<20170927000355.30597-1-d-gerlach@ti.com>\n\t<20170927000355.30597-3-d-gerlach@ti.com>\n\t<20170928083827.GE23750@n2100.armlinux.org.uk>\n\t<0bbba52e-c7d8-647e-9b58-55cbbe236d4a@ti.com>","CC":"Tony Lindgren , Santosh Shilimkar ,\n\t,\n\t, ,\n\t, Rob Herring ,\n\tKeerthy J , Johan Hovold ","From":"Dave Gerlach ","Message-ID":"<169e5257-3e05-3c61-32ae-27b34123859c@ti.com>","Date":"Tue, 3 Oct 2017 10:14:23 -0500","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101\n\tThunderbird/45.5.1","MIME-Version":"1.0","In-Reply-To":"<0bbba52e-c7d8-647e-9b58-55cbbe236d4a@ti.com>","Content-Type":"text/plain; charset=\"windows-1252\"","Content-Transfer-Encoding":"7bit","X-Originating-IP":"[128.247.59.203]","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}}]