[{"id":1775458,"web_url":"http://patchwork.ozlabs.org/comment/1775458/","msgid":"<20170926130108.uibnri32b73elfy6@flea>","list_archive_url":null,"date":"2017-09-26T13:01:08","subject":"Re: [PATCH v2 03/10] pinctrl: axp209: use drv_data of\n\tpinctrl_pin_desc to store pin reg","submitter":{"id":12916,"url":"http://patchwork.ozlabs.org/api/people/12916/","name":"Maxime Ripard","email":"maxime.ripard@free-electrons.com"},"content":"On Tue, Sep 26, 2017 at 12:17:13PM +0000, Quentin Schulz wrote:\n> Instead of using a function to retrieve each pin's correct control\n> register, use drv_data within pinctrl_pin_desc to store the ctrl reg.\n> \n> Remove axp20x_gpio_get_reg and replace every occurrence by a get from\n> drv_data.\n\nWhy do you need to do that? This should be explained.\n\nMaxime","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y1h1H3wZwz9tXj\n\tfor ;\n\tTue, 26 Sep 2017 23:01:55 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S967724AbdIZNBl (ORCPT );\n\tTue, 26 Sep 2017 09:01:41 -0400","from mail.free-electrons.com ([62.4.15.54]:54097 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S965798AbdIZNBj (ORCPT\n\t); Tue, 26 Sep 2017 09:01:39 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid A8BFC20850; Tue, 26 Sep 2017 15:01:37 +0200 (CEST)","from localhost (unknown [195.81.232.10])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id 6EA912095D;\n\tTue, 26 Sep 2017 15:01:07 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","Date":"Tue, 26 Sep 2017 15:01:08 +0200","From":"Maxime Ripard ","To":"Quentin Schulz ","Cc":"linus.walleij@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com,\n\twens@csie.org, linux@armlinux.org.uk, lee.jones@linaro.org,\n\tlinux-gpio@vger.kernel.org, devicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-sunxi@googlegroups.com, thomas.petazzoni@free-electrons.com","Subject":"Re: [PATCH v2 03/10] pinctrl: axp209: use drv_data of\n\tpinctrl_pin_desc to store pin reg","Message-ID":"<20170926130108.uibnri32b73elfy6@flea>","References":"\n\t<7993a30fbc2e50a2d228fa0c8fad643c4034b101.1506428208.git-series.quentin.schulz@free-electrons.com>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha1;\n\tprotocol=\"application/pgp-signature\"; boundary=\"xcnhxbzwbfsiulu2\"","Content-Disposition":"inline","In-Reply-To":"<7993a30fbc2e50a2d228fa0c8fad643c4034b101.1506428208.git-series.quentin.schulz@free-electrons.com>","User-Agent":"NeoMutt/20170914 (1.9.0)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1775479,"web_url":"http://patchwork.ozlabs.org/comment/1775479/","msgid":"<20170926131445.xo2uawiovjtmyivj@flea>","list_archive_url":null,"date":"2017-09-26T13:14:45","subject":"Re: [PATCH v2 07/10] mfd: axp20x: add pinctrl cell for AXP813","submitter":{"id":12916,"url":"http://patchwork.ozlabs.org/api/people/12916/","name":"Maxime Ripard","email":"maxime.ripard@free-electrons.com"},"content":"On Tue, Sep 26, 2017 at 12:17:17PM +0000, Quentin Schulz wrote:\n> As pinctrl and GPIO driver now supports AXP813, add a cell for it.\n> \n> Signed-off-by: Quentin Schulz \n> ---\n> drivers/mfd/axp20x.c | 3 +++\n> 1 file changed, 3 insertions(+)\n> \n> diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c\n> index 336de66..a457528 100644\n> --- a/drivers/mfd/axp20x.c\n> +++ b/drivers/mfd/axp20x.c\n> @@ -876,6 +876,9 @@ static struct mfd_cell axp813_cells[] = {\n> \t\t.name\t\t\t= \"axp221-pek\",\n> \t\t.num_resources\t\t= ARRAY_SIZE(axp803_pek_resources),\n> \t\t.resources\t\t= axp803_pek_resources,\n> +\t}, {\n> +\t\t.name\t\t\t= \"axp20x-gpio\",\n> +\t\t.of_compatible\t\t= \"x-powers,axp813-pctl\",\n\nThis was probably introduced in the previous driver, but why are you\nusing the pctl suffix? Can't we just use the GPIO one to remain\nconsistent with the previous users and the datasheet?\n\nThanks!\nMaxime","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y1hJL5L89z9tXn\n\tfor ;\n\tTue, 26 Sep 2017 23:14:58 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S967199AbdIZNO5 (ORCPT );\n\tTue, 26 Sep 2017 09:14:57 -0400","from mail.free-electrons.com ([62.4.15.54]:54718 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S967144AbdIZNO4 (ORCPT\n\t); Tue, 26 Sep 2017 09:14:56 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid 94442207D6; Tue, 26 Sep 2017 15:14:54 +0200 (CEST)","from localhost (unknown [195.81.232.10])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id 6FEA8207C8;\n\tTue, 26 Sep 2017 15:14:44 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","Date":"Tue, 26 Sep 2017 15:14:45 +0200","From":"Maxime Ripard ","To":"Quentin Schulz ","Cc":"linus.walleij@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com,\n\twens@csie.org, linux@armlinux.org.uk, lee.jones@linaro.org,\n\tlinux-gpio@vger.kernel.org, devicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-sunxi@googlegroups.com, thomas.petazzoni@free-electrons.com","Subject":"Re: [PATCH v2 07/10] mfd: axp20x: add pinctrl cell for AXP813","Message-ID":"<20170926131445.xo2uawiovjtmyivj@flea>","References":"\n\t<5345a2e94013f4e4f7b545cd4d84b098bd2fa349.1506428208.git-series.quentin.schulz@free-electrons.com>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha1;\n\tprotocol=\"application/pgp-signature\"; boundary=\"2cdrv6jxd25mp4ib\"","Content-Disposition":"inline","In-Reply-To":"<5345a2e94013f4e4f7b545cd4d84b098bd2fa349.1506428208.git-series.quentin.schulz@free-electrons.com>","User-Agent":"NeoMutt/20170914 (1.9.0)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1775482,"web_url":"http://patchwork.ozlabs.org/comment/1775482/","msgid":"<20170926131609.zifnvdwmdjjae7dq@flea>","list_archive_url":null,"date":"2017-09-26T13:16:09","subject":"Re: [PATCH v2 08/10] ARM: dts: add dtsi for AXP813 PMIC","submitter":{"id":12916,"url":"http://patchwork.ozlabs.org/api/people/12916/","name":"Maxime Ripard","email":"maxime.ripard@free-electrons.com"},"content":"On Tue, Sep 26, 2017 at 12:17:18PM +0000, Quentin Schulz wrote:\n> From: Maxime Ripard \n> \n> The AXP813 PMIC is used with some Allwinner SoCs. Create a dtsi to\n> include in each board embedding it.\n> \n> Signed-off-by: Quentin Schulz \n\nThere must be my Signed-off-by here.\n\nMaxime","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y1hKz5zgZz9tXn\n\tfor ;\n\tTue, 26 Sep 2017 23:16:23 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S965834AbdIZNQW (ORCPT );\n\tTue, 26 Sep 2017 09:16:22 -0400","from mail.free-electrons.com ([62.4.15.54]:54808 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S965771AbdIZNQV (ORCPT\n\t); Tue, 26 Sep 2017 09:16:21 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid 6CD89207D0; Tue, 26 Sep 2017 15:16:19 +0200 (CEST)","from localhost (unknown [195.81.232.10])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id 4A1332074A;\n\tTue, 26 Sep 2017 15:16:09 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","Date":"Tue, 26 Sep 2017 15:16:09 +0200","From":"Maxime Ripard ","To":"Quentin Schulz ","Cc":"linus.walleij@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com,\n\twens@csie.org, linux@armlinux.org.uk, lee.jones@linaro.org,\n\tlinux-gpio@vger.kernel.org, devicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-sunxi@googlegroups.com, thomas.petazzoni@free-electrons.com","Subject":"Re: [PATCH v2 08/10] ARM: dts: add dtsi for AXP813 PMIC","Message-ID":"<20170926131609.zifnvdwmdjjae7dq@flea>","References":"\n\t","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha1;\n\tprotocol=\"application/pgp-signature\"; boundary=\"eq6tdwfjohbgqyva\"","Content-Disposition":"inline","In-Reply-To":"","User-Agent":"NeoMutt/20170914 (1.9.0)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1775486,"web_url":"http://patchwork.ozlabs.org/comment/1775486/","msgid":"<0ae64e95-ee49-fb4c-e79b-e8c25c86580c@free-electrons.com>","list_archive_url":null,"date":"2017-09-26T13:17:05","subject":"Re: [PATCH v2 03/10] pinctrl: axp209: use drv_data of\n\tpinctrl_pin_desc to store pin reg","submitter":{"id":69366,"url":"http://patchwork.ozlabs.org/api/people/69366/","name":"Quentin Schulz","email":"quentin.schulz@free-electrons.com"},"content":"Hi Maxime,\n\nOn 26/09/2017 15:01, Maxime Ripard wrote:\n> On Tue, Sep 26, 2017 at 12:17:13PM +0000, Quentin Schulz wrote:\n>> Instead of using a function to retrieve each pin's correct control\n>> register, use drv_data within pinctrl_pin_desc to store the ctrl reg.\n>>\n>> Remove axp20x_gpio_get_reg and replace every occurrence by a get from\n>> drv_data.\n> \n> Why do you need to do that? This should be explained.\n> \n\nAgreed that it misses an explanation.\n\nToday, to get a register addr of one of the GPIOs in the PMIC, we\nbasically get the GPIO number and returns the register via this info.\n\nThere are 3 GPIOs in AXP209, 2 in AXP813. I didn't want to have a switch\ncase for the GPIO number and then an if/else inside one of the case to\ncheck if the device is AXP209 or AXP813 in which case we return -EINVAL\ninstead of the GPIO2 reg. With support for new PMIC, we would have a\nbunch of if conditions and complexify the process for something really\nsimple.\n\nIMHO, this also allows easier integration of future PMICs which might\nhave different regs for the GPIOs.\n\nI don't *need* it but I find this solution nicer.\n\nThanks,\nQuentin","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y1hMS2jycz9tXn\n\tfor ;\n\tTue, 26 Sep 2017 23:17:40 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1030695AbdIZNR0 (ORCPT\n\t);\n\tTue, 26 Sep 2017 09:17:26 -0400","from mail.free-electrons.com ([62.4.15.54]:54857 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1030693AbdIZNRV (ORCPT\n\t); Tue, 26 Sep 2017 09:17:21 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid 31A6E207AF; Tue, 26 Sep 2017 15:17:19 +0200 (CEST)","from [192.168.0.13] (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr\n\t[90.63.216.87])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id DAB8F20926;\n\tTue, 26 Sep 2017 15:17:08 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","Subject":"Re: [PATCH v2 03/10] pinctrl: axp209: use drv_data of\n\tpinctrl_pin_desc to store pin reg","To":"Maxime Ripard ","Cc":"linus.walleij@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com,\n\twens@csie.org, linux@armlinux.org.uk, lee.jones@linaro.org,\n\tlinux-gpio@vger.kernel.org, devicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-sunxi@googlegroups.com, thomas.petazzoni@free-electrons.com","References":"\n\t<7993a30fbc2e50a2d228fa0c8fad643c4034b101.1506428208.git-series.quentin.schulz@free-electrons.com>\n\t<20170926130108.uibnri32b73elfy6@flea>","From":"Quentin Schulz ","Message-ID":"<0ae64e95-ee49-fb4c-e79b-e8c25c86580c@free-electrons.com>","Date":"Tue, 26 Sep 2017 15:17:05 +0200","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.3.0","MIME-Version":"1.0","In-Reply-To":"<20170926130108.uibnri32b73elfy6@flea>","Content-Type":"multipart/signed; micalg=pgp-sha256;\n\tprotocol=\"application/pgp-signature\";\n\tboundary=\"vSHPog3EoUl0rPKW3pRvkEVwkG1WG7sTx\"","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1775527,"web_url":"http://patchwork.ozlabs.org/comment/1775527/","msgid":"<20170926134527.kmhpxn4ysfmvdulf@flea>","list_archive_url":null,"date":"2017-09-26T13:45:27","subject":"Re: [PATCH v2 03/10] pinctrl: axp209: use drv_data of\n\tpinctrl_pin_desc to store pin reg","submitter":{"id":12916,"url":"http://patchwork.ozlabs.org/api/people/12916/","name":"Maxime Ripard","email":"maxime.ripard@free-electrons.com"},"content":"On Tue, Sep 26, 2017 at 01:17:05PM +0000, Quentin Schulz wrote:\n> Hi Maxime,\n> \n> On 26/09/2017 15:01, Maxime Ripard wrote:\n> > On Tue, Sep 26, 2017 at 12:17:13PM +0000, Quentin Schulz wrote:\n> >> Instead of using a function to retrieve each pin's correct control\n> >> register, use drv_data within pinctrl_pin_desc to store the ctrl reg.\n> >>\n> >> Remove axp20x_gpio_get_reg and replace every occurrence by a get from\n> >> drv_data.\n> > \n> > Why do you need to do that? This should be explained.\n> > \n> \n> Agreed that it misses an explanation.\n> \n> Today, to get a register addr of one of the GPIOs in the PMIC, we\n> basically get the GPIO number and returns the register via this info.\n> \n> There are 3 GPIOs in AXP209, 2 in AXP813. I didn't want to have a switch\n> case for the GPIO number and then an if/else inside one of the case to\n> check if the device is AXP209 or AXP813 in which case we return -EINVAL\n> instead of the GPIO2 reg. With support for new PMIC, we would have a\n> bunch of if conditions and complexify the process for something really\n> simple.\n\nI'm not sure how that relates to your code actually. The only thing\nthat patch is doing is to move the register offset from a function to\nthe structure associated to the pin.\n\nHowever, even in the AXP813 case, you're using exactly the same\nvalues, so that's not really needed.\n\nNow, you also mentionned the pin number. While this patch doesn't\nreally address it, it's also no really needed. The number of pins is\nalready known and registered in the GPIO framework. If the framework\ndoesn't already do it (which would be surprising), you can just check\nthat the pin number passed is not going to be higher than the one you\nregistered.\n\n> IMHO, this also allows easier integration of future PMICs which might\n> have different regs for the GPIOs.\n\nLet's worry about future PMICs in the future.\n\nMaxime","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y1j0S2T6lz9s81\n\tfor ;\n\tTue, 26 Sep 2017 23:46:16 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S968189AbdIZNpn (ORCPT );\n\tTue, 26 Sep 2017 09:45:43 -0400","from mail.free-electrons.com ([62.4.15.54]:55842 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S967470AbdIZNpj (ORCPT\n\t); Tue, 26 Sep 2017 09:45:39 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid 7B308208F1; Tue, 26 Sep 2017 15:45:37 +0200 (CEST)","from localhost (unknown [195.81.232.10])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id 5433720807;\n\tTue, 26 Sep 2017 15:45:27 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","Date":"Tue, 26 Sep 2017 15:45:27 +0200","From":"Maxime Ripard ","To":"Quentin Schulz ","Cc":"linus.walleij@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com,\n\twens@csie.org, linux@armlinux.org.uk, lee.jones@linaro.org,\n\tlinux-gpio@vger.kernel.org, devicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-sunxi@googlegroups.com, thomas.petazzoni@free-electrons.com","Subject":"Re: [PATCH v2 03/10] pinctrl: axp209: use drv_data of\n\tpinctrl_pin_desc to store pin reg","Message-ID":"<20170926134527.kmhpxn4ysfmvdulf@flea>","References":"\n\t<7993a30fbc2e50a2d228fa0c8fad643c4034b101.1506428208.git-series.quentin.schulz@free-electrons.com>\n\t<20170926130108.uibnri32b73elfy6@flea>\n\t<0ae64e95-ee49-fb4c-e79b-e8c25c86580c@free-electrons.com>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha1;\n\tprotocol=\"application/pgp-signature\"; boundary=\"zjqmg4hqb6yittcl\"","Content-Disposition":"inline","In-Reply-To":"<0ae64e95-ee49-fb4c-e79b-e8c25c86580c@free-electrons.com>","User-Agent":"NeoMutt/20170914 (1.9.0)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1775540,"web_url":"http://patchwork.ozlabs.org/comment/1775540/","msgid":"","list_archive_url":null,"date":"2017-09-26T13:53:12","subject":"Re: [PATCH v2 08/10] ARM: dts: add dtsi for AXP813 PMIC","submitter":{"id":47154,"url":"http://patchwork.ozlabs.org/api/people/47154/","name":"Chen-Yu Tsai","email":"wens@csie.org"},"content":"On Tue, Sep 26, 2017 at 8:17 PM, Quentin Schulz\n wrote:\n> From: Maxime Ripard \n>\n> The AXP813 PMIC is used with some Allwinner SoCs. Create a dtsi to\n> include in each board embedding it.\n>\n> Signed-off-by: Quentin Schulz \n> ---\n> arch/arm/boot/dts/axp813.dtsi | 58 ++++++++++++++++++++++++++++++++++++-\n> 1 file changed, 58 insertions(+)\n> create mode 100644 arch/arm/boot/dts/axp813.dtsi\n>\n> diff --git a/arch/arm/boot/dts/axp813.dtsi b/arch/arm/boot/dts/axp813.dtsi\n> new file mode 100644\n> index 0000000..e7f95e8\n> --- /dev/null\n> +++ b/arch/arm/boot/dts/axp813.dtsi\n> @@ -0,0 +1,58 @@\n> +/*\n> + * Copyright 2017 Free Electrons\n> + *\n> + * Quentin Schulz \n> + *\n> + * This file is dual-licensed: you can use it either under the terms\n> + * of the GPL or the X11 license, at your option. Note that this dual\n> + * licensing only applies to this file, and not this project as a\n> + * whole.\n> + *\n> + * a) This file is free software; you can redistribute it and/or\n> + * modify it under the terms of the GNU General Public License as\n> + * published by the Free Software Foundation; either version 2 of the\n> + * License, or (at your option) any later version.\n> + *\n> + * This file is distributed in the hope that it will be useful,\n> + * but WITHOUT ANY WARRANTY; without even the implied warranty of\n> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n> + * GNU General Public License for more details.\n> + *\n> + * Or, alternatively,\n> + *\n> + * b) Permission is hereby granted, free of charge, to any person\n> + * obtaining a copy of this software and associated documentation\n> + * files (the \"Software\"), to deal in the Software without\n> + * restriction, including without limitation the rights to use,\n> + * copy, modify, merge, publish, distribute, sublicense, and/or\n> + * sell copies of the Software, and to permit persons to whom the\n> + * Software is furnished to do so, subject to the following\n> + * conditions:\n> + *\n> + * The above copyright notice and this permission notice shall be\n> + * included in all copies or substantial portions of the Software.\n> + *\n> + * THE SOFTWARE IS PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND,\n> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES\n> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND\n> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT\n> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,\n> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING\n> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR\n> + * OTHER DEALINGS IN THE SOFTWARE.\n> + */\n> +\n> +/*\n> + * AXP813 Integrated Power Management Chip\n> + */\n> +\n> +&axp813 {\n\nI'd like to name the label axp81x instead. And possibly the filename as well.\n\nSee https://github.com/wens/linux/commit/05b9ca82c795816f7f2569ce96dc35b62487f89c\n\nChenYu\n\n> + interrupt-controller;\n> + #interrupt-cells = <1>;\n> +\n> + axp_pctl: axp_pctl {\n> + compatible = \"x-powers,axp813-pctl\";\n> + gpio-controller;\n> + #gpio-cells = <2>;\n> + };\n> +};\n> --\n> git-series 0.9.1\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y1j920dZvz9sPr\n\tfor ;\n\tTue, 26 Sep 2017 23:53:42 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S969291AbdIZNxk (ORCPT );\n\tTue, 26 Sep 2017 09:53:40 -0400","from smtp.csie.ntu.edu.tw ([140.112.30.61]:60712 \"EHLO\n\tsmtp.csie.ntu.edu.tw\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S968208AbdIZNxj (ORCPT\n\t); Tue, 26 Sep 2017 09:53:39 -0400","from mail-wm0-f51.google.com (mail-wm0-f51.google.com\n\t[74.125.82.51])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits))\n\t(No client certificate requested) (Authenticated sender: b93043)\n\tby smtp.csie.ntu.edu.tw (Postfix) with ESMTPSA id 17E8A204A5;\n\tTue, 26 Sep 2017 21:53:36 +0800 (CST)","by mail-wm0-f51.google.com with SMTP id m72so8205801wmc.1;\n\tTue, 26 Sep 2017 06:53:35 -0700 (PDT)","by 10.223.196.226 with HTTP; Tue, 26 Sep 2017 06:53:12 -0700 (PDT)"],"X-Gm-Message-State":"AHPjjUg9DIVSWwOaSKbPc0h8hCo1Qi45ed6NXvJnNQuHZMC1N9q87WgH\n\trqGp1+ipUIVP36tWU+8TRRWekHl8v7cRkyf8wMc=","X-Google-Smtp-Source":"AOwi7QCMZa9paLrUTOkS0YCuDVB1SWN50gypoehUJQojyp0afNdKIE8ApxhvXBmt8HrpDOA8rxB+TN8PGOUVQ7PPOig=","X-Received":"by 10.28.237.17 with SMTP id l17mr2350230wmh.99.1506434012623;\n\tTue, 26 Sep 2017 06:53:32 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"","References":"\n\t","From":"Chen-Yu Tsai ","Date":"Tue, 26 Sep 2017 21:53:12 +0800","X-Gmail-Original-Message-ID":"","Message-ID":"","Subject":"Re: [PATCH v2 08/10] ARM: dts: add dtsi for AXP813 PMIC","To":"Quentin Schulz ","Cc":"Linus Walleij ,\n\tRob Herring , \n\tMark Rutland , Chen-Yu Tsai ,\n\tRussell King ,\n\tMaxime Ripard ,\n\tLee Jones ,\n\t\"linux-gpio@vger.kernel.org\" ,\n\tdevicetree ,\n\tlinux-kernel ,\n\tlinux-arm-kernel ,\n\tlinux-sunxi ,\n\tThomas Petazzoni ","Content-Type":"text/plain; charset=\"UTF-8\"","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1777238,"web_url":"http://patchwork.ozlabs.org/comment/1777238/","msgid":"<20170928190614.v5jgejvgdlyxbxrh@dell>","list_archive_url":null,"date":"2017-09-28T19:06:14","subject":"Re: [PATCH v2 07/10] mfd: axp20x: add pinctrl cell for AXP813","submitter":{"id":12720,"url":"http://patchwork.ozlabs.org/api/people/12720/","name":"Lee Jones","email":"lee.jones@linaro.org"},"content":"On Tue, 26 Sep 2017, Maxime Ripard wrote:\n\n> On Tue, Sep 26, 2017 at 12:17:17PM +0000, Quentin Schulz wrote:\n> > As pinctrl and GPIO driver now supports AXP813, add a cell for it.\n> > \n> > Signed-off-by: Quentin Schulz \n> > ---\n> > drivers/mfd/axp20x.c | 3 +++\n> > 1 file changed, 3 insertions(+)\n> > \n> > diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c\n> > index 336de66..a457528 100644\n> > --- a/drivers/mfd/axp20x.c\n> > +++ b/drivers/mfd/axp20x.c\n> > @@ -876,6 +876,9 @@ static struct mfd_cell axp813_cells[] = {\n> > \t\t.name\t\t\t= \"axp221-pek\",\n> > \t\t.num_resources\t\t= ARRAY_SIZE(axp803_pek_resources),\n> > \t\t.resources\t\t= axp803_pek_resources,\n> > +\t}, {\n> > +\t\t.name\t\t\t= \"axp20x-gpio\",\n> > +\t\t.of_compatible\t\t= \"x-powers,axp813-pctl\",\n> \n> This was probably introduced in the previous driver, but why are you\n> using the pctl suffix? Can't we just use the GPIO one to remain\n> consistent with the previous users and the datasheet?\n\nRight. Pinctrl is a Linuxisum. GPIO sounds more appropriate.","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=linaro.org header.i=@linaro.org\n\theader.b=\"jIJQfhSa\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y340w473kz9tX8\n\tfor ;\n\tFri, 29 Sep 2017 05:06:22 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751126AbdI1TGU (ORCPT\n\t);\n\tThu, 28 Sep 2017 15:06:20 -0400","from mail-pf0-f178.google.com ([209.85.192.178]:49779 \"EHLO\n\tmail-pf0-f178.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1750902AbdI1TGT (ORCPT\n\t); Thu, 28 Sep 2017 15:06:19 -0400","by mail-pf0-f178.google.com with SMTP id l188so1308613pfc.6\n\tfor ;\n\tThu, 28 Sep 2017 12:06:19 -0700 (PDT)","from dell ([70.35.39.2]) by smtp.gmail.com with ESMTPSA id\n\tb63sm4029766pga.27.2017.09.28.12.06.16\n\t(version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256);\n\tThu, 28 Sep 2017 12:06:17 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google;\n\th=date:from:to:cc:subject:message-id:references:mime-version\n\t:content-disposition:content-transfer-encoding:in-reply-to\n\t:user-agent; bh=0m7pz1emTi+K8C4EeniVTz93qHIJAYv4P49Yi5zRJQ8=;\n\tb=jIJQfhSa4lrapSPR2YBZQHpEeNNp+hJnb+qWhf+9N+PiRAt2P87taKY8e4JodYLUh7\n\tJshKUNSK2DBKD0VZyLKJup6+VK9760eWm/S+WH3gC/hd4MSuKObBlzqo6bgYZL+oksU/\n\tTVCPX7owsKOjrPAR6UyUJYsRH1AiJrdzRljsI=","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-disposition:content-transfer-encoding\n\t:in-reply-to:user-agent;\n\tbh=0m7pz1emTi+K8C4EeniVTz93qHIJAYv4P49Yi5zRJQ8=;\n\tb=D9M4w3XBQCXjdmSFfRnQNoGd9NJxqbk9IJYZuAu20nX1uFO/pzLBlIGQOFEc2YC1Ja\n\tVJQAr7lj+4EzfOJ3gxyyP8GO2P904oiIJmtEw47L07M7OjOOcaAy2zRpczK/BcU5xFEq\n\tk4xby30TBR2ZLigY39cA+pbinjii0BlDNCMLsWvwu9eYUT4W3KuFpY+pnX1hbJmpobQy\n\t5algzyMHJjJr1zc64zguhcnxuq5pJs3RpmVqFUcHKXdAjgi7Bx11RiPF0Olvnu0frOwJ\n\tqkA/vFw3kwKh+6mXfOGVRhHUhs5QVyqrdDUiFwQ5XKEBLZ32LJNtEeUnPgWD0gPhRzMD\n\tGg4w==","X-Gm-Message-State":"AHPjjUhVIOJv9rJFk/JhtExhC7LrZOs4emkdrpHvJAVIDo5LNkf1f2uM\n\tdTC5l/25wLBoO5cYClcwSRHPvg==","X-Google-Smtp-Source":"AOwi7QDNSDpaSx4+dhUAwV7+PAqn+hoQIt9Pk3DmsaQezWvcTLcU62URHTKoPADr74KluSv9iZuhrA==","X-Received":"by 10.159.198.74 with SMTP id y10mr4781236plt.45.1506625578933; \n\tThu, 28 Sep 2017 12:06:18 -0700 (PDT)","Date":"Thu, 28 Sep 2017 20:06:14 +0100","From":"Lee Jones ","To":"Maxime Ripard ","Cc":"Quentin Schulz ,\n\tlinus.walleij@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com,\n\twens@csie.org, linux@armlinux.org.uk, linux-gpio@vger.kernel.org,\n\tdevicetree@vger.kernel.org, linux-kernel@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org, linux-sunxi@googlegroups.com,\n\tthomas.petazzoni@free-electrons.com","Subject":"Re: [PATCH v2 07/10] mfd: axp20x: add pinctrl cell for AXP813","Message-ID":"<20170928190614.v5jgejvgdlyxbxrh@dell>","References":"\n\t<5345a2e94013f4e4f7b545cd4d84b098bd2fa349.1506428208.git-series.quentin.schulz@free-electrons.com>\n\t<20170926131445.xo2uawiovjtmyivj@flea>","MIME-Version":"1.0","Content-Type":"text/plain; charset=utf-8","Content-Disposition":"inline","Content-Transfer-Encoding":"8bit","In-Reply-To":"<20170926131445.xo2uawiovjtmyivj@flea>","User-Agent":"NeoMutt/20170113 (1.7.2)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}}]