[{"id":1775293,"web_url":"http://patchwork.ozlabs.org/comment/1775293/","msgid":"<20170926092431.puk7e5ippmjwfy4x@flea>","list_archive_url":null,"date":"2017-09-26T09:24:31","subject":"Re: [PATCH v2 01/13] clk: sunxi-ng: sun6i: Export video PLLs","submitter":{"id":12916,"url":"http://patchwork.ozlabs.org/api/people/12916/","name":"Maxime Ripard","email":"maxime.ripard@free-electrons.com"},"content":"On Tue, Sep 26, 2017 at 06:59:07AM +0000, Chen-Yu Tsai wrote:\n> The 2x outputs of the 2 video PLL clocks are directly used by the\n> HDMI controller block.\n> \n> Export them so they can be referenced in the device tree.\n> \n> Fixes: c6e6c96d8fa6 (\"clk: sunxi-ng: Add A31/A31s clocks\")\n> Signed-off-by: Chen-Yu Tsai \n\nAcked-by: Maxime Ripard \n\nThanks!\nMaxime","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y1bBj73MNz9tX4\n\tfor ;\n\tTue, 26 Sep 2017 19:24:45 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S968433AbdIZJYf (ORCPT );\n\tTue, 26 Sep 2017 05:24:35 -0400","from mail.free-electrons.com ([62.4.15.54]:47195 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S967742AbdIZJYd (ORCPT\n\t); Tue, 26 Sep 2017 05:24:33 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid 9045320852; Tue, 26 Sep 2017 11:24:31 +0200 (CEST)","from localhost (unknown [195.81.232.10])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id 6C10A20837;\n\tTue, 26 Sep 2017 11:24:31 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","Date":"Tue, 26 Sep 2017 11:24:31 +0200","From":"Maxime Ripard ","To":"Chen-Yu Tsai ","Cc":"Mark Brown , David Airlie ,\n\tMichael Turquette ,\n\tStephen Boyd , Rob Herring ,\n\tMark Rutland , dri-devel@lists.freedesktop.org, \n\tlinux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org,\n\tdevicetree@vger.kernel.org, linux-kernel@vger.kernel.org,\n\tlinux-sunxi@googlegroups.com","Subject":"Re: [PATCH v2 01/13] clk: sunxi-ng: sun6i: Export video PLLs","Message-ID":"<20170926092431.puk7e5ippmjwfy4x@flea>","References":"<20170926065919.24446-1-wens@csie.org>\n\t<20170926065919.24446-2-wens@csie.org>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha1;\n\tprotocol=\"application/pgp-signature\"; boundary=\"3ongovkpszxygp7q\"","Content-Disposition":"inline","In-Reply-To":"<20170926065919.24446-2-wens@csie.org>","User-Agent":"NeoMutt/20170914 (1.9.0)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1775297,"web_url":"http://patchwork.ozlabs.org/comment/1775297/","msgid":"<20170926093247.blcu52dzluqawzb5@flea>","list_archive_url":null,"date":"2017-09-26T09:32:47","subject":"Re: [PATCH v2 02/13] clk: sunxi-ng: sun6i: Rename HDMI DDC clock to\n\tavoid name collision","submitter":{"id":12916,"url":"http://patchwork.ozlabs.org/api/people/12916/","name":"Maxime Ripard","email":"maxime.ripard@free-electrons.com"},"content":"On Tue, Sep 26, 2017 at 06:59:08AM +0000, Chen-Yu Tsai wrote:\n> The HDMI DDC clock found in the CCU is the parent of the actual DDC\n> clock within the HDMI controller. That clock is also named \"hdmi-ddc\".\n> \n> Rename the one in the CCU to \"hdmi-ddc-parent\". This makes more sense\n> than renaming the one in the HDMI controller to something else.\n> \n> Fixes: c6e6c96d8fa6 (\"clk: sunxi-ng: Add A31/A31s clocks\")\n> Signed-off-by: Chen-Yu Tsai \n\nI'd rather stick to the datasheet names. What about \"DDC\" ?\n\nMaxime","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y1bN436ltz9tX4\n\tfor ;\n\tTue, 26 Sep 2017 19:32:52 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S967785AbdIZJcu (ORCPT );\n\tTue, 26 Sep 2017 05:32:50 -0400","from mail.free-electrons.com ([62.4.15.54]:47378 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S965144AbdIZJct (ORCPT\n\t); Tue, 26 Sep 2017 05:32:49 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid 7CD7A2090D; Tue, 26 Sep 2017 11:32:47 +0200 (CEST)","from localhost (unknown [195.81.232.10])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id 52CBB208D8;\n\tTue, 26 Sep 2017 11:32:47 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","Date":"Tue, 26 Sep 2017 11:32:47 +0200","From":"Maxime Ripard ","To":"Chen-Yu Tsai ","Cc":"Mark Brown , David Airlie ,\n\tMichael Turquette ,\n\tStephen Boyd , Rob Herring ,\n\tMark Rutland , dri-devel@lists.freedesktop.org, \n\tlinux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org,\n\tdevicetree@vger.kernel.org, linux-kernel@vger.kernel.org,\n\tlinux-sunxi@googlegroups.com","Subject":"Re: [PATCH v2 02/13] clk: sunxi-ng: sun6i: Rename HDMI DDC clock to\n\tavoid name collision","Message-ID":"<20170926093247.blcu52dzluqawzb5@flea>","References":"<20170926065919.24446-1-wens@csie.org>\n\t<20170926065919.24446-3-wens@csie.org>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha1;\n\tprotocol=\"application/pgp-signature\"; boundary=\"4hidansbmszwo3hv\"","Content-Disposition":"inline","In-Reply-To":"<20170926065919.24446-3-wens@csie.org>","User-Agent":"NeoMutt/20170914 (1.9.0)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1775308,"web_url":"http://patchwork.ozlabs.org/comment/1775308/","msgid":"<20170926095603.c67y4rytydya7kjd@flea>","list_archive_url":null,"date":"2017-09-26T09:56:03","subject":"Re: [PATCH v2 03/13] drm/sun4i: tcon: Add support for demuxing TCON\n\toutput on A31","submitter":{"id":12916,"url":"http://patchwork.ozlabs.org/api/people/12916/","name":"Maxime Ripard","email":"maxime.ripard@free-electrons.com"},"content":"Hi,\n\nOn Tue, Sep 26, 2017 at 06:59:09AM +0000, Chen-Yu Tsai wrote:\n> On systems with 2 TCONs such as the A31, it is possible to demux the\n> output of the TCONs to one encoder.\n> \n> Add support for this for the A31.\n> \n> Signed-off-by: Chen-Yu Tsai \n> ---\n> drivers/gpu/drm/sun4i/sun4i_tcon.c | 61 ++++++++++++++++++++++++++++++++++++++\n> 1 file changed, 61 insertions(+)\n> \n> diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c\n> index e853dfe51389..770b843a6fa9 100644\n> --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c\n> +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c\n> @@ -14,9 +14,12 @@\n> #include \n> #include \n> #include \n> +#include \n> #include \n> #include \n> \n> +#include \n> +\n> #include \n> #include \n> #include \n> @@ -109,11 +112,69 @@ void sun4i_tcon_enable_vblank(struct sun4i_tcon *tcon, bool enable)\n> }\n> EXPORT_SYMBOL(sun4i_tcon_enable_vblank);\n> \n> +static struct sun4i_tcon *sun4i_get_first_tcon(struct drm_device *drm)\n> +{\n> +\tstruct sun4i_drv *drv = drm->dev_private;\n> +\tstruct sun4i_tcon *tcon;\n> +\n> +\tlist_for_each_entry(tcon, &drv->tcon_list, list)\n> +\t\tif (tcon->id == 0)\n> +\t\t\treturn tcon;\n> +\n> +\tdev_warn(drm->dev,\n> +\t\t \"TCON0 not found, display output muxing may not work\\n\");\n> +\n> +\treturn tcon;\n> +}\n> +\n> +static int _sun6i_tcon_set_mux(struct drm_encoder *encoder)\n> +{\n> +\tstruct sun4i_tcon *tcon = sun4i_get_first_tcon(encoder->dev);\n> +\tint tcon_id = drm_crtc_to_sun4i_crtc(encoder->crtc)->tcon->id;\n> +\tu32 shift;\n> +\n> +\tDRM_DEBUG_DRIVER(\"Muxing encoder %s to CRTC %s (TCON %d)\\n\",\n> +\t\t\t encoder->name, encoder->crtc->name, tcon_id);\n> +\n> +\t/* Only 2 TCONs */\n> +\tif (tcon_id >= 2)\n> +\t\treturn -EINVAL;\n> +\n> +\tswitch (encoder->encoder_type) {\n> +\tcase DRM_MODE_ENCODER_TMDS:\n> +\t\t/* HDMI */\n> +\t\tshift = 8;\n> +\t\tbreak;\n> +\tcase DRM_MODE_ENCODER_DSI:\n> +\t\t/* No MIPI DSI on A31s */\n> +\t\tif (of_device_is_compatible(tcon->dev->of_node,\n> +\t\t\t\t\t \"allwinner,sun6i-a31s-tcon\"))\n\nI'm not sure that test is needed.\n\nWe won't end up in that case if we don't have a connected DSI block,\nwhich isn't going to be the case on the A31. And I guess we can tackle\nDSI later (when I'll send my patches...).\n\n> +\t\t\treturn -EINVAL;\n> +\t\tshift = 0;\n> +\t\tbreak;\n> +\tdefault:\n> +\t\treturn -EINVAL;\n> +\t}\n> +\n> +\tregmap_update_bits(tcon->regs, SUN4I_TCON_MUX_CTRL_REG,\n> +\t\t\t 0x3 << shift, tcon_id << shift);\n> +\n> +\treturn 0;\n> +}\n> +\n> void sun4i_tcon_set_mux(struct sun4i_tcon *tcon, int channel,\n> \t\t\tstruct drm_encoder *encoder)\n> {\n> +\t/* Get the device node of the display engine */\n> +\tstruct device_node *node = encoder->dev->dev->of_node;\n> \tu32 val;\n> \n> +\tif (of_device_is_compatible(node, \"allwinner,sun6i-a31-display-engine\") ||\n> +\t of_device_is_compatible(node, \"allwinner,sun6i-a31s-display-engine\")) {\n> +\t\t_sun6i_tcon_set_mux(encoder);\n> +\t\treturn;\n> +\t}\n> +\n\nI'd really like to avoid mix and matching the structure defined\nbehaviour and those of_device_is_compatible calls spread out\neverywhere.\n\nYou can either add a flag or a function pointer.\n\nMaxime","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y1btv6Yj7z9tXb\n\tfor ;\n\tTue, 26 Sep 2017 19:56:07 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S967859AbdIZJ4G (ORCPT );\n\tTue, 26 Sep 2017 05:56:06 -0400","from mail.free-electrons.com ([62.4.15.54]:47950 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S967650AbdIZJ4F (ORCPT\n\t); Tue, 26 Sep 2017 05:56:05 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid CD93A208FD; Tue, 26 Sep 2017 11:56:02 +0200 (CEST)","from localhost (unknown [195.81.232.10])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id A5556208B1;\n\tTue, 26 Sep 2017 11:56:02 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","Date":"Tue, 26 Sep 2017 11:56:03 +0200","From":"Maxime Ripard ","To":"Chen-Yu Tsai ","Cc":"Mark Brown , David Airlie ,\n\tMichael Turquette ,\n\tStephen Boyd , Rob Herring ,\n\tMark Rutland , dri-devel@lists.freedesktop.org, \n\tlinux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org,\n\tdevicetree@vger.kernel.org, linux-kernel@vger.kernel.org,\n\tlinux-sunxi@googlegroups.com","Subject":"Re: [PATCH v2 03/13] drm/sun4i: tcon: Add support for demuxing TCON\n\toutput on A31","Message-ID":"<20170926095603.c67y4rytydya7kjd@flea>","References":"<20170926065919.24446-1-wens@csie.org>\n\t<20170926065919.24446-4-wens@csie.org>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha1;\n\tprotocol=\"application/pgp-signature\"; boundary=\"fwfopzxho5wg6h5l\"","Content-Disposition":"inline","In-Reply-To":"<20170926065919.24446-4-wens@csie.org>","User-Agent":"NeoMutt/20170914 (1.9.0)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1775311,"web_url":"http://patchwork.ozlabs.org/comment/1775311/","msgid":"<20170926095629.hp3igc4zx7u6yn55@flea>","list_archive_url":null,"date":"2017-09-26T09:56:29","subject":"Re: [PATCH v2 04/13] drm/sun4i: hdmi: Disable clks in bind function\n\terror path and unbind function","submitter":{"id":12916,"url":"http://patchwork.ozlabs.org/api/people/12916/","name":"Maxime Ripard","email":"maxime.ripard@free-electrons.com"},"content":"On Tue, Sep 26, 2017 at 06:59:10AM +0000, Chen-Yu Tsai wrote:\n> The HDMI driver enables the bus and mod clocks in the bind function, but\n> does not disable them if it then bails our due to any errors. Neither\n> does it disable the clocks in the unbind function.\n> \n> Fix this by adding a proper error path to the bind function, and\n> clk_disable_unprepare calls to the unbind function.\n> \n> Also rename the err_cleanup_connector label to err_cleanup_encoder,\n> since it is the encoder that gets cleaned up.\n> \n> Fixes: 9c5681011a0c (\"drm/sun4i: Add HDMI support\")\n> Signed-off-by: Chen-Yu Tsai \n\nAcked-by: Maxime Ripard \n\nMaxime","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y1bvf4Zj0z9tXb\n\tfor ;\n\tTue, 26 Sep 2017 19:56:46 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1030215AbdIZJ4d (ORCPT\n\t);\n\tTue, 26 Sep 2017 05:56:33 -0400","from mail.free-electrons.com ([62.4.15.54]:47975 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S967898AbdIZJ4b (ORCPT\n\t); Tue, 26 Sep 2017 05:56:31 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid 7C852208DE; Tue, 26 Sep 2017 11:56:29 +0200 (CEST)","from localhost (unknown [195.81.232.10])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id 59D06208B1;\n\tTue, 26 Sep 2017 11:56:29 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","Date":"Tue, 26 Sep 2017 11:56:29 +0200","From":"Maxime Ripard ","To":"Chen-Yu Tsai ","Cc":"Mark Brown , David Airlie ,\n\tMichael Turquette ,\n\tStephen Boyd , Rob Herring ,\n\tMark Rutland , dri-devel@lists.freedesktop.org, \n\tlinux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org,\n\tdevicetree@vger.kernel.org, linux-kernel@vger.kernel.org,\n\tlinux-sunxi@googlegroups.com","Subject":"Re: [PATCH v2 04/13] drm/sun4i: hdmi: Disable clks in bind function\n\terror path and unbind function","Message-ID":"<20170926095629.hp3igc4zx7u6yn55@flea>","References":"<20170926065919.24446-1-wens@csie.org>\n\t<20170926065919.24446-5-wens@csie.org>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha1;\n\tprotocol=\"application/pgp-signature\"; boundary=\"tpspz472yzsgjpbf\"","Content-Disposition":"inline","In-Reply-To":"<20170926065919.24446-5-wens@csie.org>","User-Agent":"NeoMutt/20170914 (1.9.0)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1775313,"web_url":"http://patchwork.ozlabs.org/comment/1775313/","msgid":"<20170926095647.o4p72dd6n3257n5m@flea>","list_archive_url":null,"date":"2017-09-26T09:56:47","subject":"Re: [PATCH v2 05/13] drm/sun4i: hdmi: create a regmap for later use","submitter":{"id":12916,"url":"http://patchwork.ozlabs.org/api/people/12916/","name":"Maxime Ripard","email":"maxime.ripard@free-electrons.com"},"content":"On Tue, Sep 26, 2017 at 06:59:11AM +0000, Chen-Yu Tsai wrote:\n> The HDMI driver is written with readl/writel I/O to the registers.\n> However, to support the A31 variant, which has a different layout\n> for the DDC registers, it was recommended to use regfields to have\n> a cleaner implementation. To use regfields, we need to create an\n> underlying regmap.\n> \n> This patch only adds the regmap. It does not convert the existing\n> driver accesses to use regmap.\n> \n> Signed-off-by: Chen-Yu Tsai \n\nAcked-by: Maxime Ripard \n\nMaxime","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y1bw20sSrz9tXb\n\tfor ;\n\tTue, 26 Sep 2017 19:57:06 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1754420AbdIZJ4v (ORCPT\n\t);\n\tTue, 26 Sep 2017 05:56:51 -0400","from mail.free-electrons.com ([62.4.15.54]:48051 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1030250AbdIZJ4t (ORCPT\n\t); Tue, 26 Sep 2017 05:56:49 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid 36599208FD; Tue, 26 Sep 2017 11:56:47 +0200 (CEST)","from localhost (unknown [195.81.232.10])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id 10FAD20847;\n\tTue, 26 Sep 2017 11:56:47 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","Date":"Tue, 26 Sep 2017 11:56:47 +0200","From":"Maxime Ripard ","To":"Chen-Yu Tsai ","Cc":"Mark Brown , David Airlie ,\n\tMichael Turquette ,\n\tStephen Boyd , Rob Herring ,\n\tMark Rutland , dri-devel@lists.freedesktop.org, \n\tlinux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org,\n\tdevicetree@vger.kernel.org, linux-kernel@vger.kernel.org,\n\tlinux-sunxi@googlegroups.com","Subject":"Re: [PATCH v2 05/13] drm/sun4i: hdmi: create a regmap for later use","Message-ID":"<20170926095647.o4p72dd6n3257n5m@flea>","References":"<20170926065919.24446-1-wens@csie.org>\n\t<20170926065919.24446-6-wens@csie.org>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha1;\n\tprotocol=\"application/pgp-signature\"; boundary=\"7by3ndkwhayzdm3u\"","Content-Disposition":"inline","In-Reply-To":"<20170926065919.24446-6-wens@csie.org>","User-Agent":"NeoMutt/20170914 (1.9.0)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1775317,"web_url":"http://patchwork.ozlabs.org/comment/1775317/","msgid":"<20170926095838.vvgdnm7bdodwtjzv@flea>","list_archive_url":null,"date":"2017-09-26T09:58:38","subject":"Re: [PATCH v2 06/13] drm/sun4i: hdmi: Allow using second PLL as TMDS\n\tclk parent","submitter":{"id":12916,"url":"http://patchwork.ozlabs.org/api/people/12916/","name":"Maxime Ripard","email":"maxime.ripard@free-electrons.com"},"content":"On Tue, Sep 26, 2017 at 06:59:12AM +0000, Chen-Yu Tsai wrote:\n> Allwinner SoCs typically have two PLLs reserved for video related usage.\n> At the moment we only support using the first one to feed the HDMI\n> transmitter block's TMDS clock.\n> \n> Let the HDMI encoder's TMDS clock go through all of its parents when\n> calculating possible clock rates. This allows usage of the second video\n> PLL as its parent.\n> \n> Note that this does not handle conflicting pixel clocks. It is entirely\n> possible to have an LCD panel use one pixel clock rate, only to be\n> overridden by the HDMI transmitter's clock rate request when the second\n> display pipeline is enabled.\n> \n> This should be handled by having all the clock drivers honor clock rate\n> ranges, and have the consumers use clk_set_rate_min/clk_set_rate_max.\n\nThat, or relying on clk_set_rate_protect\n\nAcked-by: Maxime Ripard \n\nMaxime","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y1bxv2nh7z9tXb\n\tfor ;\n\tTue, 26 Sep 2017 19:58:43 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S935644AbdIZJ6l (ORCPT );\n\tTue, 26 Sep 2017 05:58:41 -0400","from mail.free-electrons.com ([62.4.15.54]:48229 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S934122AbdIZJ6k (ORCPT\n\t); Tue, 26 Sep 2017 05:58:40 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid 193EE208DE; Tue, 26 Sep 2017 11:58:38 +0200 (CEST)","from localhost (unknown [195.81.232.10])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id EB3F3208B1;\n\tTue, 26 Sep 2017 11:58:37 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","Date":"Tue, 26 Sep 2017 11:58:38 +0200","From":"Maxime Ripard ","To":"Chen-Yu Tsai ","Cc":"Mark Brown , David Airlie ,\n\tMichael Turquette ,\n\tStephen Boyd , Rob Herring ,\n\tMark Rutland , dri-devel@lists.freedesktop.org, \n\tlinux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org,\n\tdevicetree@vger.kernel.org, linux-kernel@vger.kernel.org,\n\tlinux-sunxi@googlegroups.com","Subject":"Re: [PATCH v2 06/13] drm/sun4i: hdmi: Allow using second PLL as TMDS\n\tclk parent","Message-ID":"<20170926095838.vvgdnm7bdodwtjzv@flea>","References":"<20170926065919.24446-1-wens@csie.org>\n\t<20170926065919.24446-7-wens@csie.org>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha1;\n\tprotocol=\"application/pgp-signature\"; boundary=\"qttlu3ybmjip77q3\"","Content-Disposition":"inline","In-Reply-To":"<20170926065919.24446-7-wens@csie.org>","User-Agent":"NeoMutt/20170914 (1.9.0)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1775321,"web_url":"http://patchwork.ozlabs.org/comment/1775321/","msgid":"<20170926100150.5rgmraenrriekhna@flea>","list_archive_url":null,"date":"2017-09-26T10:01:50","subject":"Re: [PATCH v2 09/13] drm/sun4i: hdmi: Add support for controller\n\thardware variants","submitter":{"id":12916,"url":"http://patchwork.ozlabs.org/api/people/12916/","name":"Maxime Ripard","email":"maxime.ripard@free-electrons.com"},"content":"On Tue, Sep 26, 2017 at 06:59:15AM +0000, Chen-Yu Tsai wrote:\n> The HDMI controller found in earlier Allwinner SoCs have slight\n> differences between the A10, A10s, and the A31:\n> \n> - Need different initial values for the PLL related registers\n> \n> - Different behavior of the DDC and TMDS clocks\n> \n> - Different register layout for the DDC portion\n> \n> - Separate DDC parent clock on the A31\n> \n> - Explicit reset control\n> \n> For the A31, the HDMI TMDS clock has a different value offset for\n> the divider. The HDMI DDC block is different from the one in the\n> other SoCs. As far as the DDC clock goes, it has no pre-divider,\n> as it is clocked from a slower parent clock, not the TMDS clock.\n> The divider offset from the register value is different. And the\n> clock control register is at a different offset.\n> \n> A new variant data structure is created to store pointers to the\n> above functions, structures, and the different initial values.\n> Another flag notates whether there is a separate DDC parent clock.\n> If not, the TMDS clock is passed to the DDC clock create function,\n> as before.\n> \n> Regmap fields are used to deal with the different register layout\n> of the DDC block.\n> \n> Signed-off-by: Chen-Yu Tsai \n\nAcked-by: Maxime Ripard \n\nMaxime","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y1c1b0RcSz9tXb\n\tfor ;\n\tTue, 26 Sep 2017 20:01:55 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S935734AbdIZKBx (ORCPT );\n\tTue, 26 Sep 2017 06:01:53 -0400","from mail.free-electrons.com ([62.4.15.54]:48375 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S934122AbdIZKBw (ORCPT\n\t); Tue, 26 Sep 2017 06:01:52 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid C3360208BF; Tue, 26 Sep 2017 12:01:49 +0200 (CEST)","from localhost (unknown [195.81.232.10])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id 9CB30208A1;\n\tTue, 26 Sep 2017 12:01:49 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","Date":"Tue, 26 Sep 2017 12:01:50 +0200","From":"Maxime Ripard ","To":"Chen-Yu Tsai ","Cc":"Mark Brown , David Airlie ,\n\tMichael Turquette ,\n\tStephen Boyd , Rob Herring ,\n\tMark Rutland , dri-devel@lists.freedesktop.org, \n\tlinux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org,\n\tdevicetree@vger.kernel.org, linux-kernel@vger.kernel.org,\n\tlinux-sunxi@googlegroups.com","Subject":"Re: [PATCH v2 09/13] drm/sun4i: hdmi: Add support for controller\n\thardware variants","Message-ID":"<20170926100150.5rgmraenrriekhna@flea>","References":"<20170926065919.24446-1-wens@csie.org>\n\t<20170926065919.24446-10-wens@csie.org>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha1;\n\tprotocol=\"application/pgp-signature\"; boundary=\"vn4jicumbtbjskss\"","Content-Disposition":"inline","In-Reply-To":"<20170926065919.24446-10-wens@csie.org>","User-Agent":"NeoMutt/20170914 (1.9.0)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1775322,"web_url":"http://patchwork.ozlabs.org/comment/1775322/","msgid":"<20170926100211.io7hczwst4ziu7bn@flea>","list_archive_url":null,"date":"2017-09-26T10:02:11","subject":"Re: [PATCH v2 10/13] drm/sun4i: hdmi: Add A31 specific DDC register\n\tdefinitions","submitter":{"id":12916,"url":"http://patchwork.ozlabs.org/api/people/12916/","name":"Maxime Ripard","email":"maxime.ripard@free-electrons.com"},"content":"On Tue, Sep 26, 2017 at 06:59:16AM +0000, Chen-Yu Tsai wrote:\n> The DDC block for the HDMI controller is different on the A31.\n> \n> This patch adds the register definitions.\n> \n> Signed-off-by: Chen-Yu Tsai \n\nAcked-by: Maxime Ripard \n\nMaxime","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y1c1z15pRz9tXb\n\tfor ;\n\tTue, 26 Sep 2017 20:02:15 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S936885AbdIZKCN (ORCPT );\n\tTue, 26 Sep 2017 06:02:13 -0400","from mail.free-electrons.com ([62.4.15.54]:48411 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S934122AbdIZKCM (ORCPT\n\t); Tue, 26 Sep 2017 06:02:12 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid B71FC208DE; Tue, 26 Sep 2017 12:02:10 +0200 (CEST)","from localhost (unknown [195.81.232.10])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id 9274A208A1;\n\tTue, 26 Sep 2017 12:02:10 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","Date":"Tue, 26 Sep 2017 12:02:11 +0200","From":"Maxime Ripard ","To":"Chen-Yu Tsai ","Cc":"Mark Brown , David Airlie ,\n\tMichael Turquette ,\n\tStephen Boyd , Rob Herring ,\n\tMark Rutland , dri-devel@lists.freedesktop.org, \n\tlinux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org,\n\tdevicetree@vger.kernel.org, linux-kernel@vger.kernel.org,\n\tlinux-sunxi@googlegroups.com","Subject":"Re: [PATCH v2 10/13] drm/sun4i: hdmi: Add A31 specific DDC register\n\tdefinitions","Message-ID":"<20170926100211.io7hczwst4ziu7bn@flea>","References":"<20170926065919.24446-1-wens@csie.org>\n\t<20170926065919.24446-11-wens@csie.org>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha1;\n\tprotocol=\"application/pgp-signature\"; boundary=\"spyxpvhgdslimos3\"","Content-Disposition":"inline","In-Reply-To":"<20170926065919.24446-11-wens@csie.org>","User-Agent":"NeoMutt/20170914 (1.9.0)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1775324,"web_url":"http://patchwork.ozlabs.org/comment/1775324/","msgid":"<20170926100240.es6fbqux3kfihd33@flea>","list_archive_url":null,"date":"2017-09-26T10:02:40","subject":"Re: [PATCH v2 11/13] drm/sun4i: hdmi: Add support for A31's HDMI\n\tcontroller","submitter":{"id":12916,"url":"http://patchwork.ozlabs.org/api/people/12916/","name":"Maxime Ripard","email":"maxime.ripard@free-electrons.com"},"content":"On Tue, Sep 26, 2017 at 06:59:17AM +0000, Chen-Yu Tsai wrote:\n> The HDMI controller found in the A31 SoCs is slightly different\n> from the one already supported, which is found in the A10s:\n> \n> - Need different initial values for the PLL related registers\n> \n> - Different behavior of the DDC and TMDS clocks\n> \n> - Different register layout for the DDC portion\n> \n> - Separate DDC parent clock\n> \n> This patch adds support for it.\n> \n> Signed-off-by: Chen-Yu Tsai \n\nAcked-by: Maxime Ripard \n\nThanks!\nMaxime","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y1c2X4cKMz9tXb\n\tfor ;\n\tTue, 26 Sep 2017 20:02:44 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S936914AbdIZKCn (ORCPT );\n\tTue, 26 Sep 2017 06:02:43 -0400","from mail.free-electrons.com ([62.4.15.54]:48474 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S934122AbdIZKCm (ORCPT\n\t); Tue, 26 Sep 2017 06:02:42 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid 48920208BF; Tue, 26 Sep 2017 12:02:40 +0200 (CEST)","from localhost (unknown [195.81.232.10])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id 22A2B208A1;\n\tTue, 26 Sep 2017 12:02:40 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","Date":"Tue, 26 Sep 2017 12:02:40 +0200","From":"Maxime Ripard ","To":"Chen-Yu Tsai ","Cc":"Mark Brown , David Airlie ,\n\tMichael Turquette ,\n\tStephen Boyd , Rob Herring ,\n\tMark Rutland , dri-devel@lists.freedesktop.org, \n\tlinux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org,\n\tdevicetree@vger.kernel.org, linux-kernel@vger.kernel.org,\n\tlinux-sunxi@googlegroups.com","Subject":"Re: [PATCH v2 11/13] drm/sun4i: hdmi: Add support for A31's HDMI\n\tcontroller","Message-ID":"<20170926100240.es6fbqux3kfihd33@flea>","References":"<20170926065919.24446-1-wens@csie.org>\n\t<20170926065919.24446-12-wens@csie.org>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha1;\n\tprotocol=\"application/pgp-signature\"; boundary=\"2qgxzau3dwu4ouwz\"","Content-Disposition":"inline","In-Reply-To":"<20170926065919.24446-12-wens@csie.org>","User-Agent":"NeoMutt/20170914 (1.9.0)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1776014,"web_url":"http://patchwork.ozlabs.org/comment/1776014/","msgid":"","list_archive_url":null,"date":"2017-09-27T03:45:02","subject":"Re: [PATCH v2 02/13] clk: sunxi-ng: sun6i: Rename HDMI DDC clock to\n\tavoid name collision","submitter":{"id":47154,"url":"http://patchwork.ozlabs.org/api/people/47154/","name":"Chen-Yu Tsai","email":"wens@csie.org"},"content":"On Tue, Sep 26, 2017 at 5:32 PM, Maxime Ripard\n wrote:\n> On Tue, Sep 26, 2017 at 06:59:08AM +0000, Chen-Yu Tsai wrote:\n>> The HDMI DDC clock found in the CCU is the parent of the actual DDC\n>> clock within the HDMI controller. That clock is also named \"hdmi-ddc\".\n>>\n>> Rename the one in the CCU to \"hdmi-ddc-parent\". This makes more sense\n>> than renaming the one in the HDMI controller to something else.\n>>\n>> Fixes: c6e6c96d8fa6 (\"clk: sunxi-ng: Add A31/A31s clocks\")\n>> Signed-off-by: Chen-Yu Tsai \n>\n> I'd rather stick to the datasheet names. What about \"DDC\" ?\n\nWorks for me.\n\nThanks\nChenYu\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y23d23nTRz9sPt\n\tfor ;\n\tWed, 27 Sep 2017 13:45:42 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S969968AbdI0Dp3 (ORCPT );\n\tTue, 26 Sep 2017 23:45:29 -0400","from smtp.csie.ntu.edu.tw ([140.112.30.61]:34316 \"EHLO\n\tsmtp.csie.ntu.edu.tw\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S969846AbdI0Dp2 (ORCPT\n\t); Tue, 26 Sep 2017 23:45:28 -0400","from mail-wm0-f46.google.com (mail-wm0-f46.google.com\n\t[74.125.82.46])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits))\n\t(No client certificate requested) (Authenticated sender: b93043)\n\tby smtp.csie.ntu.edu.tw (Postfix) with ESMTPSA id 94BF22273C;\n\tWed, 27 Sep 2017 11:45:25 +0800 (CST)","by mail-wm0-f46.google.com with SMTP id m127so18285324wmm.1;\n\tTue, 26 Sep 2017 20:45:25 -0700 (PDT)","by 10.223.196.226 with HTTP; Tue, 26 Sep 2017 20:45:02 -0700 (PDT)"],"X-Gm-Message-State":"AHPjjUjDuMmWweCMZeZ3KQrOb95ONc0hoauucGuBSWbEvtIC0QGyI65x\n\t971dPYweE5kndritk0THfH5yu6CDeYgbzrWzPL0=","X-Google-Smtp-Source":"AOwi7QDPOFVGizBy8Z8bvFmnrIajVmKns2Nw8Y6Cpxp1sWPFVtgU9n1ubT27vhbYVj08peInTwndahq4KYyt2o02lec=","X-Received":"by 10.28.29.77 with SMTP id d74mr210765wmd.106.1506483922675;\n\tTue, 26 Sep 2017 20:45:22 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<20170926093247.blcu52dzluqawzb5@flea>","References":"<20170926065919.24446-1-wens@csie.org>\n\t<20170926065919.24446-3-wens@csie.org>\n\t<20170926093247.blcu52dzluqawzb5@flea>","From":"Chen-Yu Tsai ","Date":"Wed, 27 Sep 2017 11:45:02 +0800","X-Gmail-Original-Message-ID":"","Message-ID":"","Subject":"Re: [PATCH v2 02/13] clk: sunxi-ng: sun6i: Rename HDMI DDC clock to\n\tavoid name collision","To":"Maxime Ripard ","Cc":"Chen-Yu Tsai , Mark Brown ,\n\tDavid Airlie ,\n\tMichael Turquette ,\n\tStephen Boyd , Rob Herring ,\n\tMark Rutland ,\n\tdri-devel ,\n\tlinux-arm-kernel ,\n\tlinux-clk ,\n\tdevicetree ,\n\tlinux-kernel ,\n\tlinux-sunxi ","Content-Type":"text/plain; charset=\"UTF-8\"","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1776021,"web_url":"http://patchwork.ozlabs.org/comment/1776021/","msgid":"","list_archive_url":null,"date":"2017-09-27T04:03:25","subject":"Re: [PATCH v2 03/13] drm/sun4i: tcon: Add support for demuxing TCON\n\toutput on A31","submitter":{"id":47154,"url":"http://patchwork.ozlabs.org/api/people/47154/","name":"Chen-Yu Tsai","email":"wens@csie.org"},"content":"On Tue, Sep 26, 2017 at 5:56 PM, Maxime Ripard\n wrote:\n> Hi,\n>\n> On Tue, Sep 26, 2017 at 06:59:09AM +0000, Chen-Yu Tsai wrote:\n>> On systems with 2 TCONs such as the A31, it is possible to demux the\n>> output of the TCONs to one encoder.\n>>\n>> Add support for this for the A31.\n>>\n>> Signed-off-by: Chen-Yu Tsai \n>> ---\n>> drivers/gpu/drm/sun4i/sun4i_tcon.c | 61 ++++++++++++++++++++++++++++++++++++++\n>> 1 file changed, 61 insertions(+)\n>>\n>> diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c\n>> index e853dfe51389..770b843a6fa9 100644\n>> --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c\n>> +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c\n>> @@ -14,9 +14,12 @@\n>> #include \n>> #include \n>> #include \n>> +#include \n>> #include \n>> #include \n>>\n>> +#include \n>> +\n>> #include \n>> #include \n>> #include \n>> @@ -109,11 +112,69 @@ void sun4i_tcon_enable_vblank(struct sun4i_tcon *tcon, bool enable)\n>> }\n>> EXPORT_SYMBOL(sun4i_tcon_enable_vblank);\n>>\n>> +static struct sun4i_tcon *sun4i_get_first_tcon(struct drm_device *drm)\n>> +{\n>> + struct sun4i_drv *drv = drm->dev_private;\n>> + struct sun4i_tcon *tcon;\n>> +\n>> + list_for_each_entry(tcon, &drv->tcon_list, list)\n>> + if (tcon->id == 0)\n>> + return tcon;\n>> +\n>> + dev_warn(drm->dev,\n>> + \"TCON0 not found, display output muxing may not work\\n\");\n>> +\n>> + return tcon;\n>> +}\n>> +\n>> +static int _sun6i_tcon_set_mux(struct drm_encoder *encoder)\n>> +{\n>> + struct sun4i_tcon *tcon = sun4i_get_first_tcon(encoder->dev);\n>> + int tcon_id = drm_crtc_to_sun4i_crtc(encoder->crtc)->tcon->id;\n>> + u32 shift;\n>> +\n>> + DRM_DEBUG_DRIVER(\"Muxing encoder %s to CRTC %s (TCON %d)\\n\",\n>> + encoder->name, encoder->crtc->name, tcon_id);\n>> +\n>> + /* Only 2 TCONs */\n>> + if (tcon_id >= 2)\n>> + return -EINVAL;\n>> +\n>> + switch (encoder->encoder_type) {\n>> + case DRM_MODE_ENCODER_TMDS:\n>> + /* HDMI */\n>> + shift = 8;\n>> + break;\n>> + case DRM_MODE_ENCODER_DSI:\n>> + /* No MIPI DSI on A31s */\n>> + if (of_device_is_compatible(tcon->dev->of_node,\n>> + \"allwinner,sun6i-a31s-tcon\"))\n>\n> I'm not sure that test is needed.\n>\n> We won't end up in that case if we don't have a connected DSI block,\n> which isn't going to be the case on the A31. And I guess we can tackle\n> DSI later (when I'll send my patches...).\n\nOK. I'll leave a comment instead.\n\n>\n>> + return -EINVAL;\n>> + shift = 0;\n>> + break;\n>> + default:\n>> + return -EINVAL;\n>> + }\n>> +\n>> + regmap_update_bits(tcon->regs, SUN4I_TCON_MUX_CTRL_REG,\n>> + 0x3 << shift, tcon_id << shift);\n>> +\n>> + return 0;\n>> +}\n>> +\n>> void sun4i_tcon_set_mux(struct sun4i_tcon *tcon, int channel,\n>> struct drm_encoder *encoder)\n>> {\n>> + /* Get the device node of the display engine */\n>> + struct device_node *node = encoder->dev->dev->of_node;\n>> u32 val;\n>>\n>> + if (of_device_is_compatible(node, \"allwinner,sun6i-a31-display-engine\") ||\n>> + of_device_is_compatible(node, \"allwinner,sun6i-a31s-display-engine\")) {\n>> + _sun6i_tcon_set_mux(encoder);\n>> + return;\n>> + }\n>> +\n>\n> I'd really like to avoid mix and matching the structure defined\n> behaviour and those of_device_is_compatible calls spread out\n> everywhere.\n>\n> You can either add a flag or a function pointer.\n\nFunction pointer it is!\n\nChenYu\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y24233Ldpz9t2Q\n\tfor ;\n\tWed, 27 Sep 2017 14:03:55 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1750805AbdI0EDx (ORCPT\n\t);\n\tWed, 27 Sep 2017 00:03:53 -0400","from smtp.csie.ntu.edu.tw ([140.112.30.61]:34380 \"EHLO\n\tsmtp.csie.ntu.edu.tw\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1750703AbdI0EDv (ORCPT\n\t); Wed, 27 Sep 2017 00:03:51 -0400","from mail-wr0-f182.google.com (mail-wr0-f182.google.com\n\t[209.85.128.182])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits))\n\t(No client certificate requested) (Authenticated sender: b93043)\n\tby smtp.csie.ntu.edu.tw (Postfix) with ESMTPSA id 0DE5D23B1F;\n\tWed, 27 Sep 2017 12:03:49 +0800 (CST)","by mail-wr0-f182.google.com with SMTP id 54so51519wrz.10;\n\tTue, 26 Sep 2017 21:03:48 -0700 (PDT)","by 10.223.196.226 with HTTP; Tue, 26 Sep 2017 21:03:25 -0700 (PDT)"],"X-Gm-Message-State":"AHPjjUgsXTa0LYQByGypr5xr0dxZ9SVWFAG3OHxvgZcmoURPU7DPCsLt\n\tOFuO1UbbBWONPpzLk3xLgxp1kGpLGzjTDmKj8kw=","X-Google-Smtp-Source":"AOwi7QBe4uwO26TfzkU5CMlsZNSNb+BioIzWqgSB1gJRvk+cUSu/2NFiN+dgSU0eHycM509INaOd9GlAMCMlt16Hhew=","X-Received":"by 10.223.187.129 with SMTP id q1mr60682wrg.239.1506485026358;\n\tTue, 26 Sep 2017 21:03:46 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<20170926095603.c67y4rytydya7kjd@flea>","References":"<20170926065919.24446-1-wens@csie.org>\n\t<20170926065919.24446-4-wens@csie.org>\n\t<20170926095603.c67y4rytydya7kjd@flea>","From":"Chen-Yu Tsai ","Date":"Wed, 27 Sep 2017 12:03:25 +0800","X-Gmail-Original-Message-ID":"","Message-ID":"","Subject":"Re: [PATCH v2 03/13] drm/sun4i: tcon: Add support for demuxing TCON\n\toutput on A31","To":"Maxime Ripard ","Cc":"Chen-Yu Tsai , Mark Brown ,\n\tDavid Airlie ,\n\tMichael Turquette ,\n\tStephen Boyd , Rob Herring ,\n\tMark Rutland ,\n\tdri-devel ,\n\tlinux-arm-kernel ,\n\tlinux-clk ,\n\tdevicetree ,\n\tlinux-kernel ,\n\tlinux-sunxi ","Content-Type":"text/plain; charset=\"UTF-8\"","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}}]