[{"id":1774779,"web_url":"http://patchwork.ozlabs.org/comment/1774779/","msgid":"<874lrqkebi.fsf@free-electrons.com>","list_archive_url":null,"date":"2017-09-25T15:06:41","subject":"Re: [PATCH 3/3] arm64: dts: marvell: add NAND support on the 7040-DB\n\tboard","submitter":{"id":15771,"url":"http://patchwork.ozlabs.org/api/people/15771/","name":"Gregory CLEMENT","email":"gregory.clement@free-electrons.com"},"content":"Hi Miquel,\n \n On lun., sept. 25 2017, Miquel Raynal wrote:\n\n> From: Gregory CLEMENT \n>\n> The NAND controller used in A7K/A8K is present on the CP110 master part.\n> It is compatible with the pxa3xx_nand driver but requires the use of the\n> marvell,armada-8k-nand compatible string due to the need to first enable\n> the NAND controller.\n>\n> Add properties to the NAND node to fit the bindings constraints of the\n> pxa3xx_nand driver and enable the NAND controller.\n>\n> Add the 'marvell,system-controller' property to the cp110 master NAND\n> node with a reference to the syscon node. This is new compared to other\n> boards using the pxa3xx_nand driver and it is needed to be bootloader\n> independent and enable the NAND controller from the NAND controller\n> driver itself by writing in these syscon registers.\n>\n> Signed-off-by: Gregory CLEMENT \n> [miquel.raynal@free-electrons.com: add NAND ready/busy MPP subnode,\n> change compatible string to fit the needs of the A7k/A8k SoCs and add\n> the system controller property]\n> Signed-off-by: Miquel Raynal \n> ---\n> arch/arm64/boot/dts/marvell/armada-7040-db.dts | 24 ++++++++++++++++++++++\n> arch/arm64/boot/dts/marvell/armada-70x0.dtsi | 14 +++++++++++++\n> .../boot/dts/marvell/armada-cp110-master.dtsi | 3 ++-\n> 3 files changed, 40 insertions(+), 1 deletion(-)\n>\n> diff --git a/arch/arm64/boot/dts/marvell/armada-7040-db.dts b/arch/arm64/boot/dts/marvell/armada-7040-db.dts\n> index 9c3bdf87e543..b98cf265bae5 100644\n> --- a/arch/arm64/boot/dts/marvell/armada-7040-db.dts\n> +++ b/arch/arm64/boot/dts/marvell/armada-7040-db.dts\n> @@ -144,6 +144,30 @@\n> \t};\n> };\n> \n> +&cpm_nand {\n> +\tstatus = \"okay\";\n> +\tnum-cs = <1>;\n> +\tpinctrl-0 = <&nand_pins>, <&nand_rb>;\n> +\tpinctrl-names = \"default\";\n> +\tnand-ecc-strength = <4>;\n> +\tnand-ecc-step-size = <512>;\n> +\tmarvell,nand-enable-arbiter;\n> +\tnand-on-flash-bbt;\n> +\n> +\tpartition@0 {\n> +\t\tlabel = \"U-Boot\";\n> +\t\treg = <0 0x200000>;\n> +\t};\n> +\tpartition@200000 {\n> +\t\tlabel = \"Linux\";\n> +\t\treg = <0x200000 0xe00000>;\n> +\t};\n> +\tpartition@1000000 {\n> +\t\tlabel = \"Filesystem\";\n> +\t\treg = <0x1000000 0x3f000000>;\n> +\t};\n> +};\n> +\n> &cpm_spi1 {\n> \tstatus = \"okay\";\n> \n> diff --git a/arch/arm64/boot/dts/marvell/armada-70x0.dtsi b/arch/arm64/boot/dts/marvell/armada-70x0.dtsi\n> index 860b6ae9dcc5..0e1a1e5be399 100644\n> --- a/arch/arm64/boot/dts/marvell/armada-70x0.dtsi\n> +++ b/arch/arm64/boot/dts/marvell/armada-70x0.dtsi\n> @@ -64,5 +64,19 @@\n> &cpm_syscon0 {\n> \tcpm_pinctrl: pinctrl {\n> \t\tcompatible = \"marvell,armada-7k-pinctrl\";\n> +\n> +\t\tnand_pins: nand-pins {\n> +\t\t\tmarvell,pins =\n> +\t\t\t\"mpp15\", \"mpp16\", \"mpp17\", \"mpp18\",\n> +\t\t\t\"mpp19\", \"mpp20\", \"mpp21\", \"mpp22\",\n> +\t\t\t\"mpp23\", \"mpp24\", \"mpp25\", \"mpp26\",\n> +\t\t\t\"mpp27\";\n> +\t\t\tmarvell,function = \"dev\";\n> +\t\t};\n> +\n> +\t\tnand_rb: nand-rb {\n> +\t\t\tmarvell,pins = \"mpp13\";\n> +\t\t\tmarvell,function = \"nf\";\n> +\t\t};\n> \t};\n> };\n> diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi\n> index 8263a8a504a8..d41b41b613ec 100644\n> --- a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi\n> +++ b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi\n> @@ -274,12 +274,13 @@\n> \t\t\t\t * this controller is only usable on the CPM\n> \t\t\t\t * for A7K and on the CPS for A8K.\n> \t\t\t\t */\n> -\t\t\t\tcompatible = \"marvell,armada370-nand\";\n> +\t\t\t\tcompatible = \"marvell,armada-8k-nand\";\n\nthe controller on cp110 remains compatible with the one on Armada 370\n(even if it needs more initialization steps), so we should keep it also\nand having instead the following line:\n\ncompatible = \"marvell,armada-8k-nand\", \"marvell,armada370-nand\";\n\nYou don't have to send a new version, unless someone is against it, I\nwill amend it when applying on the mvebu branches.\n\nThanks,\n\nGregory\n\n\n> \t\t\t\treg = <0x720000 0x54>;\n> \t\t\t\t#address-cells = <1>;\n> \t\t\t\t#size-cells = <1>;\n> \t\t\t\tinterrupts = ;\n> \t\t\t\tclocks = <&cpm_clk 1 2>;\n> +\t\t\t\tmarvell,system-controller = <&cpm_syscon0>;\n> \t\t\t\tstatus = \"disabled\";\n> \t\t\t};\n> \n> -- \n> 2.11.0\n>\n>\n> _______________________________________________\n> linux-arm-kernel mailing list\n> linux-arm-kernel@lists.infradead.org\n> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y16r10Wlrz9t67\n\tfor ;\n\tTue, 26 Sep 2017 01:06:56 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S965058AbdIYPGx (ORCPT );\n\tMon, 25 Sep 2017 11:06:53 -0400","from mail.free-electrons.com ([62.4.15.54]:46619 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S965057AbdIYPGw (ORCPT\n\t); Mon, 25 Sep 2017 11:06:52 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid 8409F20957; Mon, 25 Sep 2017 17:06:50 +0200 (CEST)","from localhost (242.171.71.37.rev.sfr.net [37.71.171.242])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id 541B920915;\n\tMon, 25 Sep 2017 17:06:40 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","From":"Gregory CLEMENT ","To":"Miquel Raynal ","Cc":"David Woodhouse ,\n\tBrian Norris ,\n\tBoris Brezillon ,\n\tMarek Vasut ,\n\tRichard Weinberger , \n\tCyrille Pitchen ,\n\tJason Cooper , Andrew Lunn ,\n\tSebastian Hesselbarth ,\n\tEzequiel Garcia ,\n\tlinux-mtd@lists.infradead.org, devicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tThomas Petazzoni ,\n\tNadav Haklai ,\n\tAntoine Tenart ","Subject":"Re: [PATCH 3/3] arm64: dts: marvell: add NAND support on the 7040-DB\n\tboard","References":"<20170925145352.13145-1-miquel.raynal@free-electrons.com>\n\t<20170925145352.13145-4-miquel.raynal@free-electrons.com>","Date":"Mon, 25 Sep 2017 17:06:41 +0200","In-Reply-To":"<20170925145352.13145-4-miquel.raynal@free-electrons.com>\n\t(Miquel Raynal's message of \"Mon, 25 Sep 2017 16:53:52 +0200\")","Message-ID":"<874lrqkebi.fsf@free-electrons.com>","User-Agent":"Gnus/5.13 (Gnus v5.13) Emacs/25.2 (gnu/linux)","MIME-Version":"1.0","Content-Type":"text/plain","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1780588,"web_url":"http://patchwork.ozlabs.org/comment/1780588/","msgid":"<20171005145343.1ba59fb7@bbrezillon>","list_archive_url":null,"date":"2017-10-05T12:53:43","subject":"Re: [PATCH 0/3] Enable NAND on Armada-7040-DB board","submitter":{"id":63120,"url":"http://patchwork.ozlabs.org/api/people/63120/","name":"Boris Brezillon","email":"boris.brezillon@free-electrons.com"},"content":"On Mon, 25 Sep 2017 16:53:49 +0200\nMiquel Raynal wrote:\n\n> Hi,\n> \n> This series adds support for NAND on Armada-7040-DB board.\n> \n> Besides standard NAND node addition, it also introduces a new compatible\n> string for the pxa3xx_nand driver to support the subitilities of A7k/A8k\n> SoCs, as well as a new property used by the pxa3xx_nand driver to grab a\n> phandle on the system control node in order to enable the NAND\n> controller itself.\n> \n> Regards,\n> Miquel\n> \n> \n> Gregory CLEMENT (1):\n> arm64: dts: marvell: add NAND support on the 7040-DB board\n> \n> Miquel Raynal (2):\n> Documentation: devicetree: add pxa3xx compatible and syscon property\n> mtd: nand: pxa3xx: enable NAND controller if the SoC needs it\n\nApplied patch 1 and 2.\n\nThanks,\n\nBoris\n\n> \n> .../devicetree/bindings/mtd/pxa3xx-nand.txt | 4 +++\n> arch/arm64/boot/dts/marvell/armada-7040-db.dts | 24 +++++++++++++\n> arch/arm64/boot/dts/marvell/armada-70x0.dtsi | 14 ++++++++\n> .../boot/dts/marvell/armada-cp110-master.dtsi | 3 +-\n> drivers/mtd/nand/pxa3xx_nand.c | 41 +++++++++++++++++++---\n> 5 files changed, 81 insertions(+), 5 deletions(-)\n> \n\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y7CPl6z3cz9s7M\n\tfor ;\n\tThu, 5 Oct 2017 23:53:47 +1100 (AEDT)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751310AbdJEMxq (ORCPT\n\t);\n\tThu, 5 Oct 2017 08:53:46 -0400","from mail.free-electrons.com ([62.4.15.54]:45183 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751280AbdJEMxq (ORCPT\n\t); Thu, 5 Oct 2017 08:53:46 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid D2C39208E2; Thu, 5 Oct 2017 14:53:43 +0200 (CEST)","from bbrezillon (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr\n\t[90.63.216.87])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id 70F7320848;\n\tThu, 5 Oct 2017 14:53:43 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","Date":"Thu, 5 Oct 2017 14:53:43 +0200","From":"Boris Brezillon ","To":"Miquel Raynal ","Cc":"David Woodhouse ,\n\tBrian Norris ,\n\tMarek Vasut ,\n\tRichard Weinberger , \n\tCyrille Pitchen ,\n\tJason Cooper , Andrew Lunn ,\n\tGregory Clement ,\n\tSebastian Hesselbarth ,\n\tEzequiel Garcia ,\n\tlinux-mtd@lists.infradead.org, devicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tThomas Petazzoni ,\n\tAntoine Tenart ,\n\tNadav Haklai ","Subject":"Re: [PATCH 0/3] Enable NAND on Armada-7040-DB board","Message-ID":"<20171005145343.1ba59fb7@bbrezillon>","In-Reply-To":"<20170925145352.13145-1-miquel.raynal@free-electrons.com>","References":"<20170925145352.13145-1-miquel.raynal@free-electrons.com>","X-Mailer":"Claws Mail 3.14.1 (GTK+ 2.24.31; x86_64-pc-linux-gnu)","MIME-Version":"1.0","Content-Type":"text/plain; charset=US-ASCII","Content-Transfer-Encoding":"7bit","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1785516,"web_url":"http://patchwork.ozlabs.org/comment/1785516/","msgid":"<87sheoa16s.fsf@free-electrons.com>","list_archive_url":null,"date":"2017-10-12T14:30:19","subject":"Re: [PATCH 3/3] arm64: dts: marvell: add NAND support on the 7040-DB\n\tboard","submitter":{"id":15771,"url":"http://patchwork.ozlabs.org/api/people/15771/","name":"Gregory CLEMENT","email":"gregory.clement@free-electrons.com"},"content":"Hi Miquel,\n \n On lun., sept. 25 2017, Gregory CLEMENT wrote:\n\n> Hi Miquel,\n> \n> On lun., sept. 25 2017, Miquel Raynal wrote:\n>\n>> From: Gregory CLEMENT \n>>\n>> The NAND controller used in A7K/A8K is present on the CP110 master part.\n>> It is compatible with the pxa3xx_nand driver but requires the use of the\n>> marvell,armada-8k-nand compatible string due to the need to first enable\n>> the NAND controller.\n>>\n>> Add properties to the NAND node to fit the bindings constraints of the\n>> pxa3xx_nand driver and enable the NAND controller.\n>>\n>> Add the 'marvell,system-controller' property to the cp110 master NAND\n>> node with a reference to the syscon node. This is new compared to other\n>> boards using the pxa3xx_nand driver and it is needed to be bootloader\n>> independent and enable the NAND controller from the NAND controller\n>> driver itself by writing in these syscon registers.\n>>\n>> Signed-off-by: Gregory CLEMENT \n>> [miquel.raynal@free-electrons.com: add NAND ready/busy MPP subnode,\n>> change compatible string to fit the needs of the A7k/A8k SoCs and add\n>> the system controller property]\n>> Signed-off-by: Miquel Raynal \n>> ---\n>> arch/arm64/boot/dts/marvell/armada-7040-db.dts | 24 ++++++++++++++++++++++\n>> arch/arm64/boot/dts/marvell/armada-70x0.dtsi | 14 +++++++++++++\n>> .../boot/dts/marvell/armada-cp110-master.dtsi | 3 ++-\n>> 3 files changed, 40 insertions(+), 1 deletion(-)\n>>\n>> diff --git a/arch/arm64/boot/dts/marvell/armada-7040-db.dts b/arch/arm64/boot/dts/marvell/armada-7040-db.dts\n>> index 9c3bdf87e543..b98cf265bae5 100644\n>> --- a/arch/arm64/boot/dts/marvell/armada-7040-db.dts\n>> +++ b/arch/arm64/boot/dts/marvell/armada-7040-db.dts\n>> @@ -144,6 +144,30 @@\n>> \t};\n>> };\n>> \n>> +&cpm_nand {\n>> +\tstatus = \"okay\";\n>> +\tnum-cs = <1>;\n>> +\tpinctrl-0 = <&nand_pins>, <&nand_rb>;\n>> +\tpinctrl-names = \"default\";\n>> +\tnand-ecc-strength = <4>;\n>> +\tnand-ecc-step-size = <512>;\n>> +\tmarvell,nand-enable-arbiter;\n>> +\tnand-on-flash-bbt;\n>> +\n>> +\tpartition@0 {\n>> +\t\tlabel = \"U-Boot\";\n>> +\t\treg = <0 0x200000>;\n>> +\t};\n>> +\tpartition@200000 {\n>> +\t\tlabel = \"Linux\";\n>> +\t\treg = <0x200000 0xe00000>;\n>> +\t};\n>> +\tpartition@1000000 {\n>> +\t\tlabel = \"Filesystem\";\n>> +\t\treg = <0x1000000 0x3f000000>;\n>> +\t};\n>> +};\n>> +\n>> &cpm_spi1 {\n>> \tstatus = \"okay\";\n>> \n>> diff --git a/arch/arm64/boot/dts/marvell/armada-70x0.dtsi b/arch/arm64/boot/dts/marvell/armada-70x0.dtsi\n>> index 860b6ae9dcc5..0e1a1e5be399 100644\n>> --- a/arch/arm64/boot/dts/marvell/armada-70x0.dtsi\n>> +++ b/arch/arm64/boot/dts/marvell/armada-70x0.dtsi\n>> @@ -64,5 +64,19 @@\n>> &cpm_syscon0 {\n>> \tcpm_pinctrl: pinctrl {\n>> \t\tcompatible = \"marvell,armada-7k-pinctrl\";\n>> +\n>> +\t\tnand_pins: nand-pins {\n>> +\t\t\tmarvell,pins =\n>> +\t\t\t\"mpp15\", \"mpp16\", \"mpp17\", \"mpp18\",\n>> +\t\t\t\"mpp19\", \"mpp20\", \"mpp21\", \"mpp22\",\n>> +\t\t\t\"mpp23\", \"mpp24\", \"mpp25\", \"mpp26\",\n>> +\t\t\t\"mpp27\";\n>> +\t\t\tmarvell,function = \"dev\";\n>> +\t\t};\n>> +\n>> +\t\tnand_rb: nand-rb {\n>> +\t\t\tmarvell,pins = \"mpp13\";\n>> +\t\t\tmarvell,function = \"nf\";\n>> +\t\t};\n>> \t};\n>> };\n>> diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi\n>> index 8263a8a504a8..d41b41b613ec 100644\n>> --- a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi\n>> +++ b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi\n>> @@ -274,12 +274,13 @@\n>> \t\t\t\t * this controller is only usable on the CPM\n>> \t\t\t\t * for A7K and on the CPS for A8K.\n>> \t\t\t\t */\n>> -\t\t\t\tcompatible = \"marvell,armada370-nand\";\n>> +\t\t\t\tcompatible = \"marvell,armada-8k-nand\";\n>\n> the controller on cp110 remains compatible with the one on Armada 370\n> (even if it needs more initialization steps), so we should keep it also\n> and having instead the following line:\n>\n> compatible = \"marvell,armada-8k-nand\", \"marvell,armada370-nand\";\n>\n> You don't have to send a new version, unless someone is against it, I\n> will amend it when applying on the mvebu branches.\n\n\nNow applied on mvebu/dt64 with the changes I mentioned,\n\nThanks,\n\nGregory\n\n\n>\n> Thanks,\n>\n> Gregory\n>\n>\n>> \t\t\t\treg = <0x720000 0x54>;\n>> \t\t\t\t#address-cells = <1>;\n>> \t\t\t\t#size-cells = <1>;\n>> \t\t\t\tinterrupts = ;\n>> \t\t\t\tclocks = <&cpm_clk 1 2>;\n>> +\t\t\t\tmarvell,system-controller = <&cpm_syscon0>;\n>> \t\t\t\tstatus = \"disabled\";\n>> \t\t\t};\n>> \n>> -- \n>> 2.11.0\n>>\n>>\n>> _______________________________________________\n>> linux-arm-kernel mailing list\n>> linux-arm-kernel@lists.infradead.org\n>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel\n>\n> -- \n> Gregory Clement, Free Electrons\n> Kernel, drivers, real-time and embedded Linux\n> development, consulting, training and support.\n> http://free-electrons.com\n>\n> _______________________________________________\n> linux-arm-kernel mailing list\n> linux-arm-kernel@lists.infradead.org\n> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3yCYD85THhz9t2l\n\tfor ;\n\tFri, 13 Oct 2017 01:30:32 +1100 (AEDT)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751434AbdJLOab (ORCPT\n\t);\n\tThu, 12 Oct 2017 10:30:31 -0400","from mail.free-electrons.com ([62.4.15.54]:41592 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751394AbdJLOaa (ORCPT\n\t); Thu, 12 Oct 2017 10:30:30 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid EBF1520438; Thu, 12 Oct 2017 16:30:28 +0200 (CEST)","from localhost (unknown [37.71.171.242])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id AE5A4203B4;\n\tThu, 12 Oct 2017 16:30:18 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","From":"Gregory CLEMENT ","To":"Miquel Raynal ","Cc":"Thomas Petazzoni ,\n\tBoris Brezillon ,\n\tJason Cooper , Andrew Lunn ,\n\tRichard Weinberger ,\n\tAntoine Tenart ,\n\tNadav Haklai , Marek Vasut ,\n\tdevicetree@vger.kernel.org, linux-mtd@lists.infradead.org,\n\tEzequiel Garcia ,\n\tCyrille Pitchen ,\n\tBrian Norris ,\n\tDavid Woodhouse ,\n\tlinux-arm-kernel@lists.infradead.org,\n\tSebastian Hesselbarth ","Subject":"Re: [PATCH 3/3] arm64: dts: marvell: add NAND support on the 7040-DB\n\tboard","References":"<20170925145352.13145-1-miquel.raynal@free-electrons.com>\n\t<20170925145352.13145-4-miquel.raynal@free-electrons.com>\n\t<874lrqkebi.fsf@free-electrons.com>","Date":"Thu, 12 Oct 2017 16:30:19 +0200","In-Reply-To":"<874lrqkebi.fsf@free-electrons.com> (Gregory CLEMENT's message\n\tof \"Mon, 25 Sep 2017 17:06:41 +0200\")","Message-ID":"<87sheoa16s.fsf@free-electrons.com>","User-Agent":"Gnus/5.13 (Gnus v5.13) Emacs/25.2 (gnu/linux)","MIME-Version":"1.0","Content-Type":"text/plain","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}}]