[{"id":1774719,"web_url":"http://patchwork.ozlabs.org/comment/1774719/","msgid":"<492d2707-a83b-56a9-71c9-aed1b59b459e@st.com>","list_archive_url":null,"date":"2017-09-25T12:54:30","subject":"Re: [PATCH v3 8/8] ARM: NOMMU: Support MPU in XIP configuration","submitter":{"id":68429,"url":"http://patchwork.ozlabs.org/api/people/68429/","name":"Alexandre TORGUE","email":"alexandre.torgue@st.com"},"content":"Hi Vlad,\n\nOn 09/25/2017 11:05 AM, Vladimir Murzin wrote:\n> Currently, there is assumption in early MPU setup code that kernel\n> image is located in RAM, which is obviously not true for XIP. To run\n> code from ROM we need to make sure that it is covered by MPU. However,\n> due to we allocate regions (semi-)dynamically we can run into issue of\n> trimming region we are running from in case ROM spawns several MPU\n> regions. To help deal with that we enforce minimum alignments for start\n> end end of XIP address space as 1MB and 128Kb correspondingly.\n> \n> Signed-off-by: Vladimir Murzin \n\n\nThanks for the XIP fix.\n\nTested-by: Alexandre TORGUE \n\nregards\nAlex\n\n\n> ---\n> arch/arm/Kconfig-nommu | 2 +-\n> arch/arm/include/asm/mpu.h | 3 ++-\n> arch/arm/kernel/head-nommu.S | 20 ++++++++++++++++\n> arch/arm/kernel/vmlinux-xip.lds.S | 23 ++++++++++++++++++\n> arch/arm/mm/pmsa-v7.c | 49 +++++++++++++++++++++++++++++++++++----\n> 5 files changed, 90 insertions(+), 7 deletions(-)\n> \n> diff --git a/arch/arm/Kconfig-nommu b/arch/arm/Kconfig-nommu\n> index 930e000..0fad7d9 100644\n> --- a/arch/arm/Kconfig-nommu\n> +++ b/arch/arm/Kconfig-nommu\n> @@ -52,7 +52,7 @@ config REMAP_VECTORS_TO_RAM\n> \n> config ARM_MPU\n> bool 'Use the ARM v7 PMSA Compliant MPU'\n> - depends on !XIP_KERNEL && (CPU_V7 || CPU_V7M)\n> + depends on CPU_V7 || CPU_V7M\n> default y if CPU_V7\n> help\n> Some ARM systems without an MMU have instead a Memory Protection\n> diff --git a/arch/arm/include/asm/mpu.h b/arch/arm/include/asm/mpu.h\n> index 5db37a6..56ec026 100644\n> --- a/arch/arm/include/asm/mpu.h\n> +++ b/arch/arm/include/asm/mpu.h\n> @@ -41,6 +41,7 @@\n> #endif\n> \n> /* Access permission bits of ACR (only define those that we use)*/\n> +#define MPU_AP_PL1RO_PL0NA\t(0x5 << 8)\n> #define MPU_AP_PL1RW_PL0RW\t(0x3 << 8)\n> #define MPU_AP_PL1RW_PL0R0\t(0x2 << 8)\n> #define MPU_AP_PL1RW_PL0NA\t(0x1 << 8)\n> @@ -49,7 +50,7 @@\n> #define MPU_PROBE_REGION\t0\n> #define MPU_BG_REGION\t\t1\n> #define MPU_RAM_REGION\t\t2\n> -#define MPU_VECTORS_REGION\t3\n> +#define MPU_ROM_REGION\t\t3\n> \n> /* Maximum number of regions Linux is interested in */\n> #define MPU_MAX_REGIONS\t\t16\n> diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S\n> index 8a0718f..2ce4455 100644\n> --- a/arch/arm/kernel/head-nommu.S\n> +++ b/arch/arm/kernel/head-nommu.S\n> @@ -279,6 +279,26 @@ M_CLASS(ldr r0, [r12, #MPU_TYPE])\n> \tsetup_region r0, r5, r6, MPU_INSTR_SIDE r12\t@ 0x0, BG region, enabled\n> 2:\tisb\n> \n> +#ifdef CONFIG_XIP_KERNEL\n> +\tset_region_nr r0, #MPU_ROM_REGION, r12\n> +\tisb\n> +\n> +\tldr\tr5,=(MPU_AP_PL1RO_PL0NA | MPU_RGN_NORMAL)\n> +\n> +\tldr\tr0, =CONFIG_XIP_PHYS_ADDR\t\t@ ROM start\n> +\tldr r6, =(_exiprom)\t\t\t\t@ ROM end\n> +\tsub\tr6, r6, r0\t\t\t\t@ Minimum size of region to map\n> +\tclz\tr6, r6\t\t\t\t\t@ Region size must be 2^N...\n> +\trsb\tr6, r6, #31\t\t\t\t@ ...so round up region size\n> +\tlsl\tr6, r6, #MPU_RSR_SZ\t\t\t@ Put size in right field\n> +\torr\tr6, r6, #(1 << MPU_RSR_EN)\t\t@ Set region enabled bit\n> +\n> +\tsetup_region r0, r5, r6, MPU_DATA_SIDE, r12\t@ XIP_PHYS_ADDR, shared, enabled\n> +\tbeq\t3f\t\t\t\t\t@ Memory-map not unified\n> +\tsetup_region r0, r5, r6, MPU_INSTR_SIDE, r12\t@ XIP_PHYS_ADDR, shared, enabled\n> +3:\tisb\n> +#endif\n> +\n> \t/* Enable the MPU */\n> AR_CLASS(mrc\tp15, 0, r0, c1, c0, 0)\t\t@ Read SCTLR\n> AR_CLASS(bic\tr0, r0, #CR_BR)\t\t\t@ Disable the 'default mem-map'\n> diff --git a/arch/arm/kernel/vmlinux-xip.lds.S b/arch/arm/kernel/vmlinux-xip.lds.S\n> index 8265b11..c6f7056 100644\n> --- a/arch/arm/kernel/vmlinux-xip.lds.S\n> +++ b/arch/arm/kernel/vmlinux-xip.lds.S\n> @@ -6,6 +6,8 @@\n> /* No __ro_after_init data in the .rodata section - which will always be ro */\n> #define RO_AFTER_INIT_DATA\n> \n> +#include \n> +\n> #include \n> #include \n> #include \n> @@ -205,6 +207,9 @@ SECTIONS\n> \tPERCPU_SECTION(L1_CACHE_BYTES)\n> #endif\n> \n> +#ifdef CONFIG_ARM_MPU\n> +\t. = ALIGN(SZ_128K);\n> +#endif\n> \t_exiprom = .;\t\t\t/* End of XIP ROM area */\n> \t__data_loc = ALIGN(4);\t\t/* location in binary */\n> \t. = PAGE_OFFSET + TEXT_OFFSET;\n> @@ -322,3 +327,21 @@ ASSERT((__arch_info_end - __arch_info_begin), \"no machine record defined\")\n> */\n> ASSERT(__hyp_idmap_text_end - (__hyp_idmap_text_start & PAGE_MASK) <= PAGE_SIZE,\n> \t\"HYP init code too big or misaligned\")\n> +\n> +#ifdef CONFIG_ARM_MPU\n> +/*\n> + * Due to PMSAv7 restriction on base address and size we have to\n> + * enforce minimal alignment restrictions. It was seen that weaker\n> + * alignment restriction on _xiprom will likely force XIP address\n> + * space spawns multiple MPU regions thus it is likely we run in\n> + * situation when we are reprogramming MPU region we run on with\n> + * something which doesn't cover reprogramming code itself, so as soon\n> + * as we update MPU settings we'd immediately try to execute straight\n> + * from background region which is XN.\n> + * It seem that alignment in 1M should suit most users.\n> + * _exiprom is aligned as 1/8 of 1M so can be covered by subregion\n> + * disable\n> + */\n> +ASSERT(!(_xiprom & (SZ_1M - 1)), \"XIP start address may cause MPU programming issues\")\n> +ASSERT(!(_exiprom & (SZ_128K - 1)), \"XIP end address may cause MPU programming issues\")\n> +#endif\n> diff --git a/arch/arm/mm/pmsa-v7.c b/arch/arm/mm/pmsa-v7.c\n> index c1f1fc7..27434d7 100644\n> --- a/arch/arm/mm/pmsa-v7.c\n> +++ b/arch/arm/mm/pmsa-v7.c\n> @@ -7,9 +7,11 @@\n> #include \n> #include \n> \n> +#include \n> #include \n> #include \n> #include \n> +#include \n> \n> #include \"mm.h\"\n> \n> @@ -20,6 +22,9 @@ struct region {\n> };\n> \n> static struct region __initdata mem[MPU_MAX_REGIONS];\n> +#ifdef CONFIG_XIP_KERNEL\n> +static struct region __initdata xip[MPU_MAX_REGIONS];\n> +#endif\n> \n> static unsigned int __initdata mpu_min_region_order;\n> static unsigned int __initdata mpu_max_regions;\n> @@ -229,7 +234,6 @@ static int __init allocate_region(phys_addr_t base, phys_addr_t size,\n> /* MPU initialisation functions */\n> void __init adjust_lowmem_bounds_mpu(void)\n> {\n> -\tphys_addr_t phys_offset = PHYS_OFFSET;\n> \tphys_addr_t specified_mem_size, total_mem_size = 0;\n> \tstruct memblock_region *reg;\n> \tbool first = true;\n> @@ -256,8 +260,19 @@ void __init adjust_lowmem_bounds_mpu(void)\n> \t/* ... and one for vectors */\n> \tmem_max_regions--;\n> #endif\n> +\n> +#ifdef CONFIG_XIP_KERNEL\n> +\t/* plus some regions to cover XIP ROM */\n> +\tnum = allocate_region(CONFIG_XIP_PHYS_ADDR, __pa(_exiprom) - CONFIG_XIP_PHYS_ADDR,\n> +\t\t\t mem_max_regions, xip);\n> +\n> +\tmem_max_regions -= num;\n> +#endif\n> +\n> \tfor_each_memblock(memory, reg) {\n> \t\tif (first) {\n> +\t\t\tphys_addr_t phys_offset = PHYS_OFFSET;\n> +\n> \t\t\t/*\n> \t\t\t * Initially only use memory continuous from\n> \t\t\t * PHYS_OFFSET */\n> @@ -355,7 +370,7 @@ static int __init __mpu_min_region_order(void)\n> \n> static int __init mpu_setup_region(unsigned int number, phys_addr_t start,\n> \t\t\t\t unsigned int size_order, unsigned int properties,\n> -\t\t\t\t unsigned int subregions)\n> +\t\t\t\t unsigned int subregions, bool need_flush)\n> {\n> \tu32 size_data;\n> \n> @@ -374,6 +389,9 @@ static int __init mpu_setup_region(unsigned int number, phys_addr_t start,\n> \tsize_data = ((size_order - 1) << MPU_RSR_SZ) | 1 << MPU_RSR_EN;\n> \tsize_data |= subregions << MPU_RSR_SD;\n> \n> +\tif (need_flush)\n> +\t\tflush_cache_all();\n> +\n> \tdsb(); /* Ensure all previous data accesses occur with old mappings */\n> \trgnr_write(number);\n> \tisb();\n> @@ -416,7 +434,28 @@ void __init mpu_setup(void)\n> \t/* Background */\n> \terr |= mpu_setup_region(region++, 0, 32,\n> \t\t\t\tMPU_ACR_XN | MPU_RGN_STRONGLY_ORDERED | MPU_AP_PL1RW_PL0NA,\n> -\t\t\t\t0);\n> +\t\t\t\t0, false);\n> +\n> +#ifdef CONFIG_XIP_KERNEL\n> +\t/* ROM */\n> +\tfor (i = 0; i < ARRAY_SIZE(xip); i++) {\n> +\t\t/*\n> + * In case we overwrite RAM region we set earlier in\n> + * head-nommu.S (which is cachable) all subsequent\n> + * data access till we setup RAM bellow would be done\n> + * with BG region (which is uncachable), thus we need\n> + * to clean and invalidate cache.\n> +\t\t */\n> +\t\tbool need_flush = region == MPU_RAM_REGION;\n> +\n> +\t\tif (!xip[i].size)\n> +\t\t\tcontinue;\n> +\n> +\t\terr |= mpu_setup_region(region++, xip[i].base, ilog2(xip[i].size),\n> +\t\t\t\t\tMPU_AP_PL1RO_PL0NA | MPU_RGN_NORMAL,\n> +\t\t\t\t\txip[i].subreg, need_flush);\n> +\t}\n> +#endif\n> \n> \t/* RAM */\n> \tfor (i = 0; i < ARRAY_SIZE(mem); i++) {\n> @@ -425,14 +464,14 @@ void __init mpu_setup(void)\n> \n> \t\terr |= mpu_setup_region(region++, mem[i].base, ilog2(mem[i].size),\n> \t\t\t\t\tMPU_AP_PL1RW_PL0RW | MPU_RGN_NORMAL,\n> -\t\t\t\t\tmem[i].subreg);\n> +\t\t\t\t\tmem[i].subreg, false);\n> \t}\n> \n> \t/* Vectors */\n> #ifndef CONFIG_CPU_V7M\n> \terr |= mpu_setup_region(region++, vectors_base, ilog2(2 * PAGE_SIZE),\n> \t\t\t\tMPU_AP_PL1RW_PL0NA | MPU_RGN_NORMAL,\n> -\t\t\t\t0);\n> +\t\t\t\t0, false);\n> #endif\n> \tif (err) {\n> \t\tpanic(\"MPU region initialization failure! %d\", err);\n>","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; 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charset=\"us-ascii\"; Format=\"flowed\"","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1774774,"web_url":"http://patchwork.ozlabs.org/comment/1774774/","msgid":"<45510a1b-0b7f-cc1a-f30d-64c8572be1b9@arm.com>","list_archive_url":null,"date":"2017-09-25T14:43:18","subject":"Re: [PATCH v3 8/8] ARM: NOMMU: Support MPU in XIP configuration","submitter":{"id":65248,"url":"http://patchwork.ozlabs.org/api/people/65248/","name":"Vladimir Murzin","email":"vladimir.murzin@arm.com"},"content":"Hi Alex,\n\nOn 25/09/17 13:54, Alexandre Torgue wrote:\n> Hi Vlad,\n> \n> On 09/25/2017 11:05 AM, Vladimir Murzin wrote:\n>> Currently, there is assumption in early MPU setup code that kernel\n>> image is located in RAM, which is obviously not true for XIP. To run\n>> code from ROM we need to make sure that it is covered by MPU. However,\n>> due to we allocate regions (semi-)dynamically we can run into issue of\n>> trimming region we are running from in case ROM spawns several MPU\n>> regions. To help deal with that we enforce minimum alignments for start\n>> end end of XIP address space as 1MB and 128Kb correspondingly.\n>>\n>> Signed-off-by: Vladimir Murzin \n> \n> \n> Thanks for the XIP fix.\n> \n> Tested-by: Alexandre TORGUE \n\nMuch appreciated!\n\nVladimir\n\n> \n> regards\n> Alex\n> \n> \n>> ---\n>> arch/arm/Kconfig-nommu | 2 +-\n>> arch/arm/include/asm/mpu.h | 3 ++-\n>> arch/arm/kernel/head-nommu.S | 20 ++++++++++++++++\n>> arch/arm/kernel/vmlinux-xip.lds.S | 23 ++++++++++++++++++\n>> arch/arm/mm/pmsa-v7.c | 49 +++++++++++++++++++++++++++++++++++----\n>> 5 files changed, 90 insertions(+), 7 deletions(-)\n>>\n>> diff --git a/arch/arm/Kconfig-nommu b/arch/arm/Kconfig-nommu\n>> index 930e000..0fad7d9 100644\n>> --- a/arch/arm/Kconfig-nommu\n>> +++ b/arch/arm/Kconfig-nommu\n>> @@ -52,7 +52,7 @@ config REMAP_VECTORS_TO_RAM\n>> config ARM_MPU\n>> bool 'Use the ARM v7 PMSA Compliant MPU'\n>> - depends on !XIP_KERNEL && (CPU_V7 || CPU_V7M)\n>> + depends on CPU_V7 || CPU_V7M\n>> default y if CPU_V7\n>> help\n>> Some ARM systems without an MMU have instead a Memory Protection\n>> diff --git a/arch/arm/include/asm/mpu.h b/arch/arm/include/asm/mpu.h\n>> index 5db37a6..56ec026 100644\n>> --- a/arch/arm/include/asm/mpu.h\n>> +++ b/arch/arm/include/asm/mpu.h\n>> @@ -41,6 +41,7 @@\n>> #endif\n>> /* Access permission bits of ACR (only define those that we use)*/\n>> +#define MPU_AP_PL1RO_PL0NA (0x5 << 8)\n>> #define MPU_AP_PL1RW_PL0RW (0x3 << 8)\n>> #define MPU_AP_PL1RW_PL0R0 (0x2 << 8)\n>> #define MPU_AP_PL1RW_PL0NA (0x1 << 8)\n>> @@ -49,7 +50,7 @@\n>> #define MPU_PROBE_REGION 0\n>> #define MPU_BG_REGION 1\n>> #define MPU_RAM_REGION 2\n>> -#define MPU_VECTORS_REGION 3\n>> +#define MPU_ROM_REGION 3\n>> /* Maximum number of regions Linux is interested in */\n>> #define MPU_MAX_REGIONS 16\n>> diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S\n>> index 8a0718f..2ce4455 100644\n>> --- a/arch/arm/kernel/head-nommu.S\n>> +++ b/arch/arm/kernel/head-nommu.S\n>> @@ -279,6 +279,26 @@ M_CLASS(ldr r0, [r12, #MPU_TYPE])\n>> setup_region r0, r5, r6, MPU_INSTR_SIDE r12 @ 0x0, BG region, enabled\n>> 2: isb\n>> +#ifdef CONFIG_XIP_KERNEL\n>> + set_region_nr r0, #MPU_ROM_REGION, r12\n>> + isb\n>> +\n>> + ldr r5,=(MPU_AP_PL1RO_PL0NA | MPU_RGN_NORMAL)\n>> +\n>> + ldr r0, =CONFIG_XIP_PHYS_ADDR @ ROM start\n>> + ldr r6, =(_exiprom) @ ROM end\n>> + sub r6, r6, r0 @ Minimum size of region to map\n>> + clz r6, r6 @ Region size must be 2^N...\n>> + rsb r6, r6, #31 @ ...so round up region size\n>> + lsl r6, r6, #MPU_RSR_SZ @ Put size in right field\n>> + orr r6, r6, #(1 << MPU_RSR_EN) @ Set region enabled bit\n>> +\n>> + setup_region r0, r5, r6, MPU_DATA_SIDE, r12 @ XIP_PHYS_ADDR, shared, enabled\n>> + beq 3f @ Memory-map not unified\n>> + setup_region r0, r5, r6, MPU_INSTR_SIDE, r12 @ XIP_PHYS_ADDR, shared, enabled\n>> +3: isb\n>> +#endif\n>> +\n>> /* Enable the MPU */\n>> AR_CLASS(mrc p15, 0, r0, c1, c0, 0) @ Read SCTLR\n>> AR_CLASS(bic r0, r0, #CR_BR) @ Disable the 'default mem-map'\n>> diff --git a/arch/arm/kernel/vmlinux-xip.lds.S b/arch/arm/kernel/vmlinux-xip.lds.S\n>> index 8265b11..c6f7056 100644\n>> --- a/arch/arm/kernel/vmlinux-xip.lds.S\n>> +++ b/arch/arm/kernel/vmlinux-xip.lds.S\n>> @@ -6,6 +6,8 @@\n>> /* No __ro_after_init data in the .rodata section - which will always be ro */\n>> #define RO_AFTER_INIT_DATA\n>> +#include \n>> +\n>> #include \n>> #include \n>> #include \n>> @@ -205,6 +207,9 @@ SECTIONS\n>> PERCPU_SECTION(L1_CACHE_BYTES)\n>> #endif\n>> +#ifdef CONFIG_ARM_MPU\n>> + . = ALIGN(SZ_128K);\n>> +#endif\n>> _exiprom = .; /* End of XIP ROM area */\n>> __data_loc = ALIGN(4); /* location in binary */\n>> . = PAGE_OFFSET + TEXT_OFFSET;\n>> @@ -322,3 +327,21 @@ ASSERT((__arch_info_end - __arch_info_begin), \"no machine record defined\")\n>> */\n>> ASSERT(__hyp_idmap_text_end - (__hyp_idmap_text_start & PAGE_MASK) <= PAGE_SIZE,\n>> \"HYP init code too big or misaligned\")\n>> +\n>> +#ifdef CONFIG_ARM_MPU\n>> +/*\n>> + * Due to PMSAv7 restriction on base address and size we have to\n>> + * enforce minimal alignment restrictions. It was seen that weaker\n>> + * alignment restriction on _xiprom will likely force XIP address\n>> + * space spawns multiple MPU regions thus it is likely we run in\n>> + * situation when we are reprogramming MPU region we run on with\n>> + * something which doesn't cover reprogramming code itself, so as soon\n>> + * as we update MPU settings we'd immediately try to execute straight\n>> + * from background region which is XN.\n>> + * It seem that alignment in 1M should suit most users.\n>> + * _exiprom is aligned as 1/8 of 1M so can be covered by subregion\n>> + * disable\n>> + */\n>> +ASSERT(!(_xiprom & (SZ_1M - 1)), \"XIP start address may cause MPU programming issues\")\n>> +ASSERT(!(_exiprom & (SZ_128K - 1)), \"XIP end address may cause MPU programming issues\")\n>> +#endif\n>> diff --git a/arch/arm/mm/pmsa-v7.c b/arch/arm/mm/pmsa-v7.c\n>> index c1f1fc7..27434d7 100644\n>> --- a/arch/arm/mm/pmsa-v7.c\n>> +++ b/arch/arm/mm/pmsa-v7.c\n>> @@ -7,9 +7,11 @@\n>> #include \n>> #include \n>> +#include \n>> #include \n>> #include \n>> #include \n>> +#include \n>> #include \"mm.h\"\n>> @@ -20,6 +22,9 @@ struct region {\n>> };\n>> static struct region __initdata mem[MPU_MAX_REGIONS];\n>> +#ifdef CONFIG_XIP_KERNEL\n>> +static struct region __initdata xip[MPU_MAX_REGIONS];\n>> +#endif\n>> static unsigned int __initdata mpu_min_region_order;\n>> static unsigned int __initdata mpu_max_regions;\n>> @@ -229,7 +234,6 @@ static int __init allocate_region(phys_addr_t base, phys_addr_t size,\n>> /* MPU initialisation functions */\n>> void __init adjust_lowmem_bounds_mpu(void)\n>> {\n>> - phys_addr_t phys_offset = PHYS_OFFSET;\n>> phys_addr_t specified_mem_size, total_mem_size = 0;\n>> struct memblock_region *reg;\n>> bool first = true;\n>> @@ -256,8 +260,19 @@ void __init adjust_lowmem_bounds_mpu(void)\n>> /* ... and one for vectors */\n>> mem_max_regions--;\n>> #endif\n>> +\n>> +#ifdef CONFIG_XIP_KERNEL\n>> + /* plus some regions to cover XIP ROM */\n>> + num = allocate_region(CONFIG_XIP_PHYS_ADDR, __pa(_exiprom) - CONFIG_XIP_PHYS_ADDR,\n>> + mem_max_regions, xip);\n>> +\n>> + mem_max_regions -= num;\n>> +#endif\n>> +\n>> for_each_memblock(memory, reg) {\n>> if (first) {\n>> + phys_addr_t phys_offset = PHYS_OFFSET;\n>> +\n>> /*\n>> * Initially only use memory continuous from\n>> * PHYS_OFFSET */\n>> @@ -355,7 +370,7 @@ static int __init __mpu_min_region_order(void)\n>> static int __init mpu_setup_region(unsigned int number, phys_addr_t start,\n>> unsigned int size_order, unsigned int properties,\n>> - unsigned int subregions)\n>> + unsigned int subregions, bool need_flush)\n>> {\n>> u32 size_data;\n>> @@ -374,6 +389,9 @@ static int __init mpu_setup_region(unsigned int number, phys_addr_t start,\n>> size_data = ((size_order - 1) << MPU_RSR_SZ) | 1 << MPU_RSR_EN;\n>> size_data |= subregions << MPU_RSR_SD;\n>> + if (need_flush)\n>> + flush_cache_all();\n>> +\n>> dsb(); /* Ensure all previous data accesses occur with old mappings */\n>> rgnr_write(number);\n>> isb();\n>> @@ -416,7 +434,28 @@ void __init mpu_setup(void)\n>> /* Background */\n>> err |= mpu_setup_region(region++, 0, 32,\n>> MPU_ACR_XN | MPU_RGN_STRONGLY_ORDERED | MPU_AP_PL1RW_PL0NA,\n>> - 0);\n>> + 0, false);\n>> +\n>> +#ifdef CONFIG_XIP_KERNEL\n>> + /* ROM */\n>> + for (i = 0; i < ARRAY_SIZE(xip); i++) {\n>> + /*\n>> + * In case we overwrite RAM region we set earlier in\n>> + * head-nommu.S (which is cachable) all subsequent\n>> + * data access till we setup RAM bellow would be done\n>> + * with BG region (which is uncachable), thus we need\n>> + * to clean and invalidate cache.\n>> + */\n>> + bool need_flush = region == MPU_RAM_REGION;\n>> +\n>> + if (!xip[i].size)\n>> + continue;\n>> +\n>> + err |= mpu_setup_region(region++, xip[i].base, ilog2(xip[i].size),\n>> + MPU_AP_PL1RO_PL0NA | MPU_RGN_NORMAL,\n>> + xip[i].subreg, need_flush);\n>> + }\n>> +#endif\n>> /* RAM */\n>> for (i = 0; i < ARRAY_SIZE(mem); i++) {\n>> @@ -425,14 +464,14 @@ void __init mpu_setup(void)\n>> err |= mpu_setup_region(region++, mem[i].base, ilog2(mem[i].size),\n>> MPU_AP_PL1RW_PL0RW | MPU_RGN_NORMAL,\n>> - mem[i].subreg);\n>> + mem[i].subreg, false);\n>> }\n>> /* Vectors */\n>> #ifndef CONFIG_CPU_V7M\n>> err |= mpu_setup_region(region++, vectors_base, ilog2(2 * PAGE_SIZE),\n>> MPU_AP_PL1RW_PL0NA | MPU_RGN_NORMAL,\n>> - 0);\n>> + 0, false);\n>> #endif\n>> if (err) {\n>> panic(\"MPU region initialization failure! %d\", err);\n>>\n>","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"Ulycqfbx\"; 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Mon, 25 Sep 2017 07:43:20 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:\n\tMessage-ID:From:References:To:Subject:Reply-To:Content-ID:Content-Description\n\t:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=XH/9WIJCMOb0Ve2VAFO5IN9Q3zzF6WAawcFIRBaV5mE=;\n\tb=UlycqfbxR5Nnwr\n\tIZM2WJr3eDRWPIEOIhsiT3YeRJ99t92sRcp3Fdi9tA/lKH6nsUMuE3uJZ9PDU1TlaNRe3WsBg1vbD\n\tYOqpMb0EBXloRzcFB8yX1gP14hib6lF0BJRnP8WwGyihznsebUqpS3aTmrD2HyhZnKgPxECuynb44\n\tosPZkL/61yD8CpbwoA9yj2QyeU3L+idzMDBth2YwLuid+MYA6yFFAGQIEnb30mc2gZ5xwk1EBAqvq\n\tVMlWzCPtiv35P7edo0ZfBZevDOD4JgW0UVL0sFnHCgpFmXZwfWFMpPZHB//cOOI0YFSdsi7kg6mnu\n\tmjJJ4AIRuLMVoyqQ1gyA==;","Subject":"Re: [PATCH v3 8/8] ARM: NOMMU: Support MPU in XIP configuration","To":"Alexandre Torgue ,\n\tlinux-arm-kernel@lists.infradead.org","References":"<1506330344-31556-1-git-send-email-vladimir.murzin@arm.com>\n\t<1506330344-31556-9-git-send-email-vladimir.murzin@arm.com>\n\t<492d2707-a83b-56a9-71c9-aed1b59b459e@st.com>","From":"Vladimir Murzin ","Message-ID":"<45510a1b-0b7f-cc1a-f30d-64c8572be1b9@arm.com>","Date":"Mon, 25 Sep 2017 15:43:18 +0100","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.2.1","MIME-Version":"1.0","In-Reply-To":"<492d2707-a83b-56a9-71c9-aed1b59b459e@st.com>","Content-Language":"en-GB","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170925_074342_511628_B6974F72 ","X-CRM114-Status":"GOOD ( 23.76 )","X-Spam-Score":"-6.9 (------)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-6.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/,\n\thigh trust [217.140.101.70 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"sza@esh.hu, u.kleine-koenig@pengutronix.de, linux@armlinux.org.uk,\n\tstefan@agner.ch, kbuild-all@01.org","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1782626,"web_url":"http://patchwork.ozlabs.org/comment/1782626/","msgid":"<68a6eb4d-4d8e-7c6a-0875-3165bde8de89@arm.com>","list_archive_url":null,"date":"2017-10-09T09:20:19","subject":"Re: [PATCH v3 0/8] ARM: NOMMU: MPU updates","submitter":{"id":65248,"url":"http://patchwork.ozlabs.org/api/people/65248/","name":"Vladimir Murzin","email":"vladimir.murzin@arm.com"},"content":"Russell, do you have concerns on this series?\n\nThanks\nVladimir\n\nOn 25/09/17 10:05, Vladimir Murzin wrote:\n> Hi,\n> \n> This is an update of the existent MPU code which consist set of\n> clean-ups and enhancements. The most significant changes are in the\n> way how MPU settings sync-up for secondaries (PATCH 3/8), more\n> flexible layout for memory (PATCH 7/8) and support for XIP (PATCH\n> 8/8). Since there is no in-tree user of MPU, support for M-class has\n> been added (PATCH 6/8).\n> \n> There is also practical benefit of patch set:\n> \n> \"These MPU patches introduce a nice feature that it simplifies the\n> bootloader: do not need to setup the MPU, for example for coherent DMA\n> region, which is described in device-tree too.\" András Szemző\n> \n> Changelog:\n> v2 -> v3\n> - fixed support for XIP (PATCH 8/8)\n> \t - rebased on 4.14-rc2\n> \n> v1 -> v2\n> - support for XIP (PATCH 8/8)\n> \t - rebased on 4.13-rc1\n> \n> RFC v2 -> v1\n> - dropped RFC tag\n> \t - Tested-by from András\n> \t - rebased on 4.12-rc5\n> \n> RFC -> RFC v2\n> \t - fixed MPU enable for v7m (PATCH 6/7)\n> \n> Thanks!\n> \n> Vladimir Murzin (8):\n> ARM: NOMMU: Move out MPU setup in separate module\n> ARM: NOMMU: Update MPU accessors to use cp15 helpers\n> ARM: NOMMU: Rework MPU to be mostly done in C\n> ARM: NOMMU: Disallow MPU for XIP\n> ARM: Kconfig: Kill CONFIG_VECTORS_BASE\n> ARM: V7M: Add support for MPU to M-class\n> ARM: NOMMU: Use more MPU regions to cover memory\n> ARM: NOMMU: Support MPU in XIP configuration\n> \n> arch/arm/Kconfig | 9 -\n> arch/arm/Kconfig-nommu | 4 +-\n> arch/arm/include/asm/cputype.h | 10 +\n> arch/arm/include/asm/mpu.h | 26 +-\n> arch/arm/include/asm/smp.h | 2 +-\n> arch/arm/include/asm/v7m.h | 10 +\n> arch/arm/kernel/asm-offsets.c | 11 +\n> arch/arm/kernel/head-nommu.S | 148 +++++++++---\n> arch/arm/kernel/smp.c | 2 +-\n> arch/arm/kernel/vmlinux-xip.lds.S | 23 ++\n> arch/arm/mm/Makefile | 1 +\n> arch/arm/mm/nommu.c | 254 +-------------------\n> arch/arm/mm/pmsa-v7.c | 484 ++++++++++++++++++++++++++++++++++++++\n> 13 files changed, 682 insertions(+), 302 deletions(-)\n> create mode 100644 arch/arm/mm/pmsa-v7.c\n>","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; 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Mon, 9 Oct 2017 02:20:28 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:\n\tMessage-ID:From:References:To:Subject:Reply-To:Content-ID:Content-Description\n\t:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=6SxTdZoUFAxCLjc20BN7RWjmXGbo13TJVK8gubXbAt0=;\n\tb=rCxYe8D8EpKx6B\n\tBsBhcAy9Fn0PZEYAHSMstjoDhZRhEBhDIho9nM8CGjP8EwX9cFPX5S2irQOqkyPs/7+dwPPxgusQK\n\t6Go4TjZCB3gH69uKpIccZldSiX8P3H5SiW+9LVN1kdZ7uXMSxPs0L5vKQaTc1G5jVWoskRmQ5Ie8H\n\tMUoVQohfDdjsg6BHivr9vptSrrVg3/zuF6INTgGWG76jeDfYF/O9PpzStwdcaZMM2Uia3w+5uKOud\n\t+k0xAqAoABEZ2GYr+Pmu3+z16Ol1g9OZKsAPqpi74mWqLTtwpTnYeS/KG2qNRYERylk0EpZyF3CgO\n\trzi+ByOkq8kCpwGUWN7g==;","Subject":"Re: [PATCH v3 0/8] ARM: NOMMU: MPU updates","To":"linux@armlinux.org.uk","References":"<1506330344-31556-1-git-send-email-vladimir.murzin@arm.com>","From":"Vladimir Murzin ","Message-ID":"<68a6eb4d-4d8e-7c6a-0875-3165bde8de89@arm.com>","Date":"Mon, 9 Oct 2017 10:20:19 +0100","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.2.1","MIME-Version":"1.0","In-Reply-To":"<1506330344-31556-1-git-send-email-vladimir.murzin@arm.com>","Content-Language":"en-GB","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20171009_022051_965183_395A1FCD ","X-CRM114-Status":"GOOD ( 16.01 )","X-Spam-Score":"-6.9 (------)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-6.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/,\n\thigh trust [217.140.101.70 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"alexandre.torgue@st.com, manabian@gmail.com, stefan@agner.ch,\n\tkbuild-all@01.org, u.kleine-koenig@pengutronix.de,\n\tlinux-arm-kernel@lists.infradead.org, sza@esh.hu","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1786126,"web_url":"http://patchwork.ozlabs.org/comment/1786126/","msgid":"","list_archive_url":null,"date":"2017-10-13T09:17:00","subject":"Re: [PATCH v3 0/8] ARM: NOMMU: MPU updates","submitter":{"id":65248,"url":"http://patchwork.ozlabs.org/api/people/65248/","name":"Vladimir Murzin","email":"vladimir.murzin@arm.com"},"content":"Gentle ping...\n\nOn 09/10/17 10:20, Vladimir Murzin wrote:\n> Russell, do you have concerns on this series?\n> \n> Thanks\n> Vladimir\n> \n> On 25/09/17 10:05, Vladimir Murzin wrote:\n>> Hi,\n>>\n>> This is an update of the existent MPU code which consist set of\n>> clean-ups and enhancements. The most significant changes are in the\n>> way how MPU settings sync-up for secondaries (PATCH 3/8), more\n>> flexible layout for memory (PATCH 7/8) and support for XIP (PATCH\n>> 8/8). Since there is no in-tree user of MPU, support for M-class has\n>> been added (PATCH 6/8).\n>>\n>> There is also practical benefit of patch set:\n>>\n>> \"These MPU patches introduce a nice feature that it simplifies the\n>> bootloader: do not need to setup the MPU, for example for coherent DMA\n>> region, which is described in device-tree too.\" András Szemző\n>>\n>> Changelog:\n>> v2 -> v3\n>> - fixed support for XIP (PATCH 8/8)\n>> \t - rebased on 4.14-rc2\n>>\n>> v1 -> v2\n>> - support for XIP (PATCH 8/8)\n>> \t - rebased on 4.13-rc1\n>>\n>> RFC v2 -> v1\n>> - dropped RFC tag\n>> \t - Tested-by from András\n>> \t - rebased on 4.12-rc5\n>>\n>> RFC -> RFC v2\n>> \t - fixed MPU enable for v7m (PATCH 6/7)\n>>\n>> Thanks!\n>>\n>> Vladimir Murzin (8):\n>> ARM: NOMMU: Move out MPU setup in separate module\n>> ARM: NOMMU: Update MPU accessors to use cp15 helpers\n>> ARM: NOMMU: Rework MPU to be mostly done in C\n>> ARM: NOMMU: Disallow MPU for XIP\n>> ARM: Kconfig: Kill CONFIG_VECTORS_BASE\n>> ARM: V7M: Add support for MPU to M-class\n>> ARM: NOMMU: Use more MPU regions to cover memory\n>> ARM: NOMMU: Support MPU in XIP configuration\n>>\n>> arch/arm/Kconfig | 9 -\n>> arch/arm/Kconfig-nommu | 4 +-\n>> arch/arm/include/asm/cputype.h | 10 +\n>> arch/arm/include/asm/mpu.h | 26 +-\n>> arch/arm/include/asm/smp.h | 2 +-\n>> arch/arm/include/asm/v7m.h | 10 +\n>> arch/arm/kernel/asm-offsets.c | 11 +\n>> arch/arm/kernel/head-nommu.S | 148 +++++++++---\n>> arch/arm/kernel/smp.c | 2 +-\n>> arch/arm/kernel/vmlinux-xip.lds.S | 23 ++\n>> arch/arm/mm/Makefile | 1 +\n>> arch/arm/mm/nommu.c | 254 +-------------------\n>> arch/arm/mm/pmsa-v7.c | 484 ++++++++++++++++++++++++++++++++++++++\n>> 13 files changed, 682 insertions(+), 302 deletions(-)\n>> create mode 100644 arch/arm/mm/pmsa-v7.c\n>>\n> \n> \n> _______________________________________________\n> linux-arm-kernel mailing list\n> linux-arm-kernel@lists.infradead.org\n> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel\n>","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"Q5PBC9qa\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yD2Fq35bQz9s7p\n\tfor ;\n\tFri, 13 Oct 2017 20:18:39 +1100 (AEDT)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e2w71-0004gu-S5; Fri, 13 Oct 2017 09:18:35 +0000","from foss.arm.com ([217.140.101.70])\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e2w5w-0003zs-QD for linux-arm-kernel@lists.infradead.org;\n\tFri, 13 Oct 2017 09:18:12 +0000","from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249])\n\tby usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 335B215A2;\n\tFri, 13 Oct 2017 02:17:08 -0700 (PDT)","from [10.1.78.88] (unknown [10.1.78.88])\n\tby usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id\n\tC90D33F236; Fri, 13 Oct 2017 02:17:06 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:\n\tMessage-ID:From:References:To:Subject:Reply-To:Content-ID:Content-Description\n\t:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=8CiFjq4k2ZK7P9gNRML95rJdfCjKJR2CIG0fphvA8Yk=;\n\tb=Q5PBC9qa+L+Xs2\n\trq0t6wBQVGgbkfPhlLA2vfHVFdtREzFylCNypJ1ORKp1yzHk0Y+SJCdVx8Y28nyXUVZhsCibu5sa7\n\t6zRN8ZFCVRjKbwGSB3k1MVZ9lGnD8zRNniS3Hw7H88MxNappx4NYEFEPtPO0e/0JM+/BO7P/ozfWt\n\tCGtrkCzMrEFOBbEQiepc0yEKmGDi5RqDP7E2LvqGYNYsxzd67KlIgO/iEgJU8NExsdPcLDZkymoVb\n\trDwjXV5Rh57GHNCwh6LJF7iVL04+A365CZgwTPJnoGFTQbwa2NGmJE7jXJwOCJbqTcddHOcPoZuDn\n\tOvxFJl8WdLzUTnV4v0bA==;","Subject":"Re: [PATCH v3 0/8] ARM: NOMMU: MPU updates","To":"linux@armlinux.org.uk","References":"<1506330344-31556-1-git-send-email-vladimir.murzin@arm.com>\n\t<68a6eb4d-4d8e-7c6a-0875-3165bde8de89@arm.com>","From":"Vladimir Murzin ","Message-ID":"","Date":"Fri, 13 Oct 2017 10:17:00 +0100","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.2.1","MIME-Version":"1.0","In-Reply-To":"<68a6eb4d-4d8e-7c6a-0875-3165bde8de89@arm.com>","Content-Language":"en-GB","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20171013_021729_776191_8A24EFF2 ","X-CRM114-Status":"GOOD ( 14.35 )","X-Spam-Score":"-6.9 (------)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-6.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/,\n\thigh trust [217.140.101.70 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"alexandre.torgue@st.com, manabian@gmail.com, stefan@agner.ch,\n\tkbuild-all@01.org, u.kleine-koenig@pengutronix.de,\n\tlinux-arm-kernel@lists.infradead.org, sza@esh.hu","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1786130,"web_url":"http://patchwork.ozlabs.org/comment/1786130/","msgid":"<20171013092418.GF20805@n2100.armlinux.org.uk>","list_archive_url":null,"date":"2017-10-13T09:24:18","subject":"Re: [PATCH v3 0/8] ARM: NOMMU: MPU updates","submitter":{"id":69080,"url":"http://patchwork.ozlabs.org/api/people/69080/","name":"Russell King (Oracle)","email":"linux@armlinux.org.uk"},"content":"Sorry, but I have no working MPS3 platform since it killed its uSD card\nwith all the FPGA bitstreams on. I'm waiting (since end of September)\nfor a replacement from ARM Ltd but there hasn't yet been any progress.\n\nSure, I can replace the uSD card myself, but the problem is the contents\nof the card.\n\nOn Fri, Oct 13, 2017 at 10:17:00AM +0100, Vladimir Murzin wrote:\n> Gentle ping...\n> \n> On 09/10/17 10:20, Vladimir Murzin wrote:\n> > Russell, do you have concerns on this series?\n> > \n> > Thanks\n> > Vladimir\n> > \n> > On 25/09/17 10:05, Vladimir Murzin wrote:\n> >> Hi,\n> >>\n> >> This is an update of the existent MPU code which consist set of\n> >> clean-ups and enhancements. The most significant changes are in the\n> >> way how MPU settings sync-up for secondaries (PATCH 3/8), more\n> >> flexible layout for memory (PATCH 7/8) and support for XIP (PATCH\n> >> 8/8). Since there is no in-tree user of MPU, support for M-class has\n> >> been added (PATCH 6/8).\n> >>\n> >> There is also practical benefit of patch set:\n> >>\n> >> \"These MPU patches introduce a nice feature that it simplifies the\n> >> bootloader: do not need to setup the MPU, for example for coherent DMA\n> >> region, which is described in device-tree too.\" András Szemző\n> >>\n> >> Changelog:\n> >> v2 -> v3\n> >> - fixed support for XIP (PATCH 8/8)\n> >> \t - rebased on 4.14-rc2\n> >>\n> >> v1 -> v2\n> >> - support for XIP (PATCH 8/8)\n> >> \t - rebased on 4.13-rc1\n> >>\n> >> RFC v2 -> v1\n> >> - dropped RFC tag\n> >> \t - Tested-by from András\n> >> \t - rebased on 4.12-rc5\n> >>\n> >> RFC -> RFC v2\n> >> \t - fixed MPU enable for v7m (PATCH 6/7)\n> >>\n> >> Thanks!\n> >>\n> >> Vladimir Murzin (8):\n> >> ARM: NOMMU: Move out MPU setup in separate module\n> >> ARM: NOMMU: Update MPU accessors to use cp15 helpers\n> >> ARM: NOMMU: Rework MPU to be mostly done in C\n> >> ARM: NOMMU: Disallow MPU for XIP\n> >> ARM: Kconfig: Kill CONFIG_VECTORS_BASE\n> >> ARM: V7M: Add support for MPU to M-class\n> >> ARM: NOMMU: Use more MPU regions to cover memory\n> >> ARM: NOMMU: Support MPU in XIP configuration\n> >>\n> >> arch/arm/Kconfig | 9 -\n> >> arch/arm/Kconfig-nommu | 4 +-\n> >> arch/arm/include/asm/cputype.h | 10 +\n> >> arch/arm/include/asm/mpu.h | 26 +-\n> >> arch/arm/include/asm/smp.h | 2 +-\n> >> arch/arm/include/asm/v7m.h | 10 +\n> >> arch/arm/kernel/asm-offsets.c | 11 +\n> >> arch/arm/kernel/head-nommu.S | 148 +++++++++---\n> >> arch/arm/kernel/smp.c | 2 +-\n> >> arch/arm/kernel/vmlinux-xip.lds.S | 23 ++\n> >> arch/arm/mm/Makefile | 1 +\n> >> arch/arm/mm/nommu.c | 254 +-------------------\n> >> arch/arm/mm/pmsa-v7.c | 484 ++++++++++++++++++++++++++++++++++++++\n> >> 13 files changed, 682 insertions(+), 302 deletions(-)\n> >> create mode 100644 arch/arm/mm/pmsa-v7.c\n> >>\n> > \n> > \n> > _______________________________________________\n> > linux-arm-kernel mailing list\n> > linux-arm-kernel@lists.infradead.org\n> > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel\n> > \n>","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; 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Fri, 13 Oct 2017 10:24:24 +0100","from linux by n2100.armlinux.org.uk with local (Exim 4.76)\n\t(envelope-from )\n\tid 1e2wCZ-0005D2-Bk; Fri, 13 Oct 2017 10:24:19 +0100"],"DKIM-Signature":["v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:\n\tMessage-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=Bx94/0tfxx8tNhTS+Y0xnoDBlGgW6KyT9FT418vNjxo=;\n\tb=sNCxc9xLAiU67L\n\tIoKD7t7vgHB7gGHdy3LZwWxYiEvAib5gEH9ZppeL0BoNw6y+URoOHWlnTRB7kj/DJCctR638Q/dwy\n\tU325yE4mjkMbo16Dh6vEo7Y7x2Sm4BPA1UBK8A8e2MCApuJCwzOoT/+ed46Fshv4iQkx4nsMjuAjO\n\tPsvStAaD9PnpPrtw8tzLKhUU59Pp+TQbKhEWgcbwrXWjL4w7Z/FNdg/o+MocZWCwqPXuSVx+PuFvS\n\tN31o7LGWlYiyQuHTgOmrbAhTOxFmptTdVeh080wN1J/HHaoi24lfBI24kw667ZqINH1QidFY2syPV\n\tEcUw4y9zIiYjxPLbaoKw==;","v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=armlinux.org.uk; s=pandora-2014; \n\th=Sender:In-Reply-To:Content-Transfer-Encoding:Content-Type:MIME-Version:References:Message-ID:Subject:Cc:To:From:Date;\n\tbh=K3ZD5ItSxb6gX4vpDXmbjo2iejhQW1PvjDg0fPPzXlc=; \n\tb=lcN/vvm8gax9p3YBCQaoJ5yPOkGIUmP4XFnYm2XMDuqAVjPJZg8ZTETxkEP8BFKGFjmA0RQq6z8Y0SJWdM0UnQpABnKpbKSRVV3+2lkOsDpxOK+sGBBdkI2u0Cw84ywh9meaNiN/4X7U1TdY+1efTyNDpG/Jur7EiPOTldJMJZU=;"],"Date":"Fri, 13 Oct 2017 10:24:18 +0100","From":"Russell King - ARM Linux ","To":"Vladimir Murzin ","Subject":"Re: [PATCH v3 0/8] ARM: NOMMU: MPU updates","Message-ID":"<20171013092418.GF20805@n2100.armlinux.org.uk>","References":"<1506330344-31556-1-git-send-email-vladimir.murzin@arm.com>\n\t<68a6eb4d-4d8e-7c6a-0875-3165bde8de89@arm.com>\n\t","MIME-Version":"1.0","Content-Disposition":"inline","In-Reply-To":"","User-Agent":"Mutt/1.5.23 (2014-03-12)","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20171013_022509_376999_D88333BC ","X-CRM114-Status":"GOOD ( 21.35 )","X-Spam-Score":"-4.3 (----)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-4.3 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/,\n\tmedium\n\ttrust [2001:4d48:ad52:3201:214:fdff:fe10:1be6 listed in]\n\t[list.dnswl.org]\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t-0.1 DKIM_VALID Message has at least one valid DKIM or DK signature\n\t0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n\tnot necessarily valid\n\t-0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n\tauthor's domain","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"alexandre.torgue@st.com, manabian@gmail.com, stefan@agner.ch,\n\tkbuild-all@01.org, u.kleine-koenig@pengutronix.de,\n\tlinux-arm-kernel@lists.infradead.org, sza@esh.hu","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1786143,"web_url":"http://patchwork.ozlabs.org/comment/1786143/","msgid":"<0edd802a-d596-5d46-ff53-97b1db1a453e@arm.com>","list_archive_url":null,"date":"2017-10-13T09:40:39","subject":"Re: [PATCH v3 0/8] ARM: NOMMU: MPU updates","submitter":{"id":65248,"url":"http://patchwork.ozlabs.org/api/people/65248/","name":"Vladimir Murzin","email":"vladimir.murzin@arm.com"},"content":"On 13/10/17 10:24, Russell King - ARM Linux wrote:\n> Sorry, but I have no working MPS3 platform since it killed its uSD card\n> with all the FPGA bitstreams on. I'm waiting (since end of September)\n> for a replacement from ARM Ltd but there hasn't yet been any progress.\n> \n> Sure, I can replace the uSD card myself, but the problem is the contents\n> of the card.\n\nThanks for prompt reply!\n\nI should say that board won't help you with testing this series since it\nimplements different MPU model (I have patches for that too but they are\non top of this series).\n\nI've been working closely with Alex and András (since they needed this for\ntheir Cortex-M7 platform) to make sure it works as expected. It was also\ntested with R-class FastModels.\n\nI intentionally kept CONFIG_ARM_MPU disabled by default for M-class\n(PATCH 6/8), so it won't interfere with existing bootloaders.\n\nI'd be glad if you can review the series and give it a chance to sit in\nlinux-next (I can provide a branch on top of yours for-next).\n\nCheers\nVladimir\n\n\n> \n> On Fri, Oct 13, 2017 at 10:17:00AM +0100, Vladimir Murzin wrote:\n>> Gentle ping...\n>>\n>> On 09/10/17 10:20, Vladimir Murzin wrote:\n>>> Russell, do you have concerns on this series?\n>>>\n>>> Thanks\n>>> Vladimir\n>>>\n>>> On 25/09/17 10:05, Vladimir Murzin wrote:\n>>>> Hi,\n>>>>\n>>>> This is an update of the existent MPU code which consist set of\n>>>> clean-ups and enhancements. The most significant changes are in the\n>>>> way how MPU settings sync-up for secondaries (PATCH 3/8), more\n>>>> flexible layout for memory (PATCH 7/8) and support for XIP (PATCH\n>>>> 8/8). Since there is no in-tree user of MPU, support for M-class has\n>>>> been added (PATCH 6/8).\n>>>>\n>>>> There is also practical benefit of patch set:\n>>>>\n>>>> \"These MPU patches introduce a nice feature that it simplifies the\n>>>> bootloader: do not need to setup the MPU, for example for coherent DMA\n>>>> region, which is described in device-tree too.\" András Szemző\n>>>>\n>>>> Changelog:\n>>>> v2 -> v3\n>>>> - fixed support for XIP (PATCH 8/8)\n>>>> \t - rebased on 4.14-rc2\n>>>>\n>>>> v1 -> v2\n>>>> - support for XIP (PATCH 8/8)\n>>>> \t - rebased on 4.13-rc1\n>>>>\n>>>> RFC v2 -> v1\n>>>> - dropped RFC tag\n>>>> \t - Tested-by from András\n>>>> \t - rebased on 4.12-rc5\n>>>>\n>>>> RFC -> RFC v2\n>>>> \t - fixed MPU enable for v7m (PATCH 6/7)\n>>>>\n>>>> Thanks!\n>>>>\n>>>> Vladimir Murzin (8):\n>>>> ARM: NOMMU: Move out MPU setup in separate module\n>>>> ARM: NOMMU: Update MPU accessors to use cp15 helpers\n>>>> ARM: NOMMU: Rework MPU to be mostly done in C\n>>>> ARM: NOMMU: Disallow MPU for XIP\n>>>> ARM: Kconfig: Kill CONFIG_VECTORS_BASE\n>>>> ARM: V7M: Add support for MPU to M-class\n>>>> ARM: NOMMU: Use more MPU regions to cover memory\n>>>> ARM: NOMMU: Support MPU in XIP configuration\n>>>>\n>>>> arch/arm/Kconfig | 9 -\n>>>> arch/arm/Kconfig-nommu | 4 +-\n>>>> arch/arm/include/asm/cputype.h | 10 +\n>>>> arch/arm/include/asm/mpu.h | 26 +-\n>>>> arch/arm/include/asm/smp.h | 2 +-\n>>>> arch/arm/include/asm/v7m.h | 10 +\n>>>> arch/arm/kernel/asm-offsets.c | 11 +\n>>>> arch/arm/kernel/head-nommu.S | 148 +++++++++---\n>>>> arch/arm/kernel/smp.c | 2 +-\n>>>> arch/arm/kernel/vmlinux-xip.lds.S | 23 ++\n>>>> arch/arm/mm/Makefile | 1 +\n>>>> arch/arm/mm/nommu.c | 254 +-------------------\n>>>> arch/arm/mm/pmsa-v7.c | 484 ++++++++++++++++++++++++++++++++++++++\n>>>> 13 files changed, 682 insertions(+), 302 deletions(-)\n>>>> create mode 100644 arch/arm/mm/pmsa-v7.c\n>>>>\n>>>\n>>>\n>>> _______________________________________________\n>>> linux-arm-kernel mailing list\n>>> linux-arm-kernel@lists.infradead.org\n>>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel\n>>>\n>>\n>","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"Xl1Qb1Ew\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yD2lr5fWvz9sRq\n\tfor ;\n\tFri, 13 Oct 2017 20:41:12 +1100 (AEDT)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e2wSr-0000jq-Fu; Fri, 13 Oct 2017 09:41:09 +0000","from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]\n\thelo=foss.arm.com)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e2wSk-0000Yn-QT for linux-arm-kernel@lists.infradead.org;\n\tFri, 13 Oct 2017 09:41:07 +0000","from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249])\n\tby usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 913D115A2;\n\tFri, 13 Oct 2017 02:40:42 -0700 (PDT)","from [10.1.78.88] (unknown [10.1.78.88])\n\tby usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id\n\t1DA1A3F236; Fri, 13 Oct 2017 02:40:40 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:\n\tMessage-ID:From:References:To:Subject:Reply-To:Content-ID:Content-Description\n\t:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=0HuBCHwQHT6tq+B4wYHu3qJDrTTJc3/EHcWeDDugiZ0=;\n\tb=Xl1Qb1EwDidFQv\n\t7askDI6g1LChnyXZa12VGZ8+e66WDdkvpWaMrUBe7RUY3pusgwujsJJGsxqJ6kAUz1RWj3rCTrqEv\n\tKoKjBqwLxUTbaoQb7/SiQYZ+uBuia1Iz/avMwD05otPDQtT9Y3to17LUW03c/Dhed8Y2Lry7cQmPN\n\tnezmKblKXecnrtOcH9mL3MU5YwXzW29+MWHK56Z+Mr2GwZMMipi1HtyD64Ima0SI+aFx+AJokNq28\n\trpETt7sK3+MkWtaPPA00WcVm8fdu6akfN0Wy39MpP8k5KGrNGQQBsA7lN4DYAyH5km9wN7wP0yECn\n\t7e5Ig/zGoicwrXxT2zkw==;","Subject":"Re: [PATCH v3 0/8] ARM: NOMMU: MPU updates","To":"Russell King - ARM Linux ","References":"<1506330344-31556-1-git-send-email-vladimir.murzin@arm.com>\n\t<68a6eb4d-4d8e-7c6a-0875-3165bde8de89@arm.com>\n\t\n\t<20171013092418.GF20805@n2100.armlinux.org.uk>","From":"Vladimir Murzin ","Message-ID":"<0edd802a-d596-5d46-ff53-97b1db1a453e@arm.com>","Date":"Fri, 13 Oct 2017 10:40:39 +0100","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.2.1","MIME-Version":"1.0","In-Reply-To":"<20171013092418.GF20805@n2100.armlinux.org.uk>","Content-Language":"en-GB","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20171013_024102_975297_BFB2D062 ","X-CRM114-Status":"GOOD ( 18.77 )","X-Spam-Score":"-6.9 (------)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-6.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/,\n\thigh trust [217.140.101.70 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"alexandre.torgue@st.com, manabian@gmail.com, stefan@agner.ch,\n\tkbuild-all@01.org, u.kleine-koenig@pengutronix.de,\n\tlinux-arm-kernel@lists.infradead.org, sza@esh.hu","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1786845,"web_url":"http://patchwork.ozlabs.org/comment/1786845/","msgid":"<20171014143721.GH20805@n2100.armlinux.org.uk>","list_archive_url":null,"date":"2017-10-14T14:37:21","subject":"Re: [PATCH v3 0/8] ARM: NOMMU: MPU updates","submitter":{"id":69080,"url":"http://patchwork.ozlabs.org/api/people/69080/","name":"Russell King (Oracle)","email":"linux@armlinux.org.uk"},"content":"On Fri, Oct 13, 2017 at 10:40:39AM +0100, Vladimir Murzin wrote:\n> On 13/10/17 10:24, Russell King - ARM Linux wrote:\n> > Sorry, but I have no working MPS3 platform since it killed its uSD card\n> > with all the FPGA bitstreams on. I'm waiting (since end of September)\n> > for a replacement from ARM Ltd but there hasn't yet been any progress.\n> > \n> > Sure, I can replace the uSD card myself, but the problem is the contents\n> > of the card.\n> \n> Thanks for prompt reply!\n> \n> I should say that board won't help you with testing this series since it\n> implements different MPU model (I have patches for that too but they are\n> on top of this series).\n\nIt assists as far as making sure the changes don't cause a\nregression for the platform.\n\n> I've been working closely with Alex and András (since they needed this for\n> their Cortex-M7 platform) to make sure it works as expected. It was also\n> tested with R-class FastModels.\n> \n> I intentionally kept CONFIG_ARM_MPU disabled by default for M-class\n> (PATCH 6/8), so it won't interfere with existing bootloaders.\n\nIt looks like patch 6 will allow me to select ARM_MPU for the MPS3\nconfig (by way of CPU_V7M being enabled). As I'm unable to test\nwhat effect that has here, and I don't know when I'll be able to do\nso, please check if not already done so.\n\n> I'd be glad if you can review the series and give it a chance to sit in\n> linux-next (I can provide a branch on top of yours for-next).\n\nPlease never provide a branch on top of my for-next, it's an \"unstable\"\ncommit in that it's regenerated from several sub-branches (fixes, misc,\ndevel-stable, and whatever other work I want to include in linux-next.)","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org header.b=\"Bw42vFJO\"; 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Sat, 14 Oct 2017 15:37:27 +0100","from linux by n2100.armlinux.org.uk with local (Exim 4.76)\n\t(envelope-from )\n\tid 1e3NZ4-0004Jg-9m; Sat, 14 Oct 2017 15:37:22 +0100"],"DKIM-Signature":["v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:\n\tMessage-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=UU5v3/lRoiTYsEUr8W6OmWiWFbgkF+ARWDpvElyZaiA=;\n\tb=Bw42vFJOi+Uh2c\n\t5QlDjXvqauHyrkBEQeLq+sLWlzSbTqJXSwD75vM4gEyjZF8L3qbpSSrozGt5kCVX2k2t/jTCa/GXO\n\tk2AGLICeuiVvQxOZhyIvqQ/QzYDOia9TRBpr10oN6s/Sttzw7kwrg6Ih8ovs7mNGh3h4lxjUnaGzk\n\t/f1XzN+5hC/KsWbsqitc0S7mck5eYDIXG8PzIxme4iaNcOXLN720uFXkL39tqRJIoxifhclWImSkq\n\t/sFpaeGPWIUZN8ebEOxEuoN7k0LU2L+8HnOpJmVtzVM1Sd0/7/SugzY/HRKFXKoIZzNmMpinCKdF1\n\tF0MkX/uFlXA984Sfta/A==;","v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=armlinux.org.uk; s=pandora-2014; \n\th=Sender:In-Reply-To:Content-Transfer-Encoding:Content-Type:MIME-Version:References:Message-ID:Subject:Cc:To:From:Date;\n\tbh=/x1xb2cscX2CvQXtw189LzOElJOBmVeUbezR1MqAC8w=; \n\tb=I/He/ZVvPNVvC3M1mvDB0i0KJWC5Qo/AmnXKGo6q7xj6a5S2/byPR/cFXsgkQzwPusai+cNiVkROl9DF8jTkT5hp6ETH2nAuEwNkAg8L3jsZdOSS5UX7occqlaUEDEWLEZ0Vc7qAkNauVp67o/RR1H5oaN/Ry1K4msw6kJXvg3A=;"],"Date":"Sat, 14 Oct 2017 15:37:21 +0100","From":"Russell King - ARM Linux ","To":"Vladimir Murzin ","Subject":"Re: [PATCH v3 0/8] ARM: NOMMU: MPU updates","Message-ID":"<20171014143721.GH20805@n2100.armlinux.org.uk>","References":"<1506330344-31556-1-git-send-email-vladimir.murzin@arm.com>\n\t<68a6eb4d-4d8e-7c6a-0875-3165bde8de89@arm.com>\n\t\n\t<20171013092418.GF20805@n2100.armlinux.org.uk>\n\t<0edd802a-d596-5d46-ff53-97b1db1a453e@arm.com>","MIME-Version":"1.0","Content-Disposition":"inline","In-Reply-To":"<0edd802a-d596-5d46-ff53-97b1db1a453e@arm.com>","User-Agent":"Mutt/1.5.23 (2014-03-12)","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20171014_073801_855357_C72E6061 ","X-CRM114-Status":"GOOD ( 18.85 )","X-Spam-Score":"-4.3 (----)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-4.3 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/,\n\tmedium\n\ttrust [2001:4d48:ad52:3201:214:fdff:fe10:1be6 listed in]\n\t[list.dnswl.org]\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t-0.1 DKIM_VALID Message has at least one valid DKIM or DK signature\n\t0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n\tnot necessarily valid\n\t-0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n\tauthor's domain","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"alexandre.torgue@st.com, manabian@gmail.com, stefan@agner.ch,\n\tkbuild-all@01.org, u.kleine-koenig@pengutronix.de,\n\tlinux-arm-kernel@lists.infradead.org, sza@esh.hu","Content-Type":"text/plain; charset=\"iso-8859-1\"","Content-Transfer-Encoding":"quoted-printable","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1787274,"web_url":"http://patchwork.ozlabs.org/comment/1787274/","msgid":"<2c12933f-594b-eeae-b113-dea00a6d6a02@arm.com>","list_archive_url":null,"date":"2017-10-16T09:09:44","subject":"Re: [PATCH v3 0/8] ARM: NOMMU: MPU updates","submitter":{"id":65248,"url":"http://patchwork.ozlabs.org/api/people/65248/","name":"Vladimir Murzin","email":"vladimir.murzin@arm.com"},"content":"On 14/10/17 15:37, Russell King - ARM Linux wrote:\n> On Fri, Oct 13, 2017 at 10:40:39AM +0100, Vladimir Murzin wrote:\n>> On 13/10/17 10:24, Russell King - ARM Linux wrote:\n>>> Sorry, but I have no working MPS3 platform since it killed its uSD card\n>>> with all the FPGA bitstreams on. I'm waiting (since end of September)\n>>> for a replacement from ARM Ltd but there hasn't yet been any progress.\n>>>\n>>> Sure, I can replace the uSD card myself, but the problem is the contents\n>>> of the card.\n>>\n>> Thanks for prompt reply!\n>>\n>> I should say that board won't help you with testing this series since it\n>> implements different MPU model (I have patches for that too but they are\n>> on top of this series).\n> \n> It assists as far as making sure the changes don't cause a\n> regression for the platform.\n> \n>> I've been working closely with Alex and András (since they needed this for\n>> their Cortex-M7 platform) to make sure it works as expected. It was also\n>> tested with R-class FastModels.\n>>\n>> I intentionally kept CONFIG_ARM_MPU disabled by default for M-class\n>> (PATCH 6/8), so it won't interfere with existing bootloaders.\n> \n> It looks like patch 6 will allow me to select ARM_MPU for the MPS3\n> config (by way of CPU_V7M being enabled). As I'm unable to test\n> what effect that has here, and I don't know when I'll be able to do\n> so, please check if not already done so.\n\nIt was done. To ensure that there is a change in PATCH 3/8\n\n@@ -204,13 +205,13 @@ ENTRY(__setup_mpu)\n mrc p15, 0, r0, c0, c1, 4 @ Read ID_MMFR0\n and r0, r0, #(MMFR0_PMSA) @ PMSA field\n teq r0, #(MMFR0_PMSAv7) @ PMSA v7\n- bne __error_p @ Fail: ARM_MPU on NOT v7 PMSA\n+ bxne lr\n\nthe C side already had a check in mpu_setup()\n\n \tif (!mpu_present())\n \t\treturn;\n\n> \n>> I'd be glad if you can review the series and give it a chance to sit in\n>> linux-next (I can provide a branch on top of yours for-next).\n> \n> Please never provide a branch on top of my for-next, it's an \"unstable\"\n> commit in that it's regenerated from several sub-branches (fixes, misc,\n> devel-stable, and whatever other work I want to include in linux-next.)\n> \n\nOk, got it! It seems the right branch is devel-stable. Unless you have\ncomments, I'd like to submit patches in your patch system.\n\nThanks\nVladimir","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"dF0SehCd\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yFtBw2SBfz9sP1\n\tfor ;\n\tMon, 16 Oct 2017 20:22:29 +1100 (AEDT)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e41bO-0003nA-D6; Mon, 16 Oct 2017 09:22:26 +0000","from foss.arm.com ([217.140.101.70])\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e41PT-00030C-DB for linux-arm-kernel@lists.infradead.org;\n\tMon, 16 Oct 2017 09:10:09 +0000","from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249])\n\tby usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 194C61435;\n\tMon, 16 Oct 2017 02:09:47 -0700 (PDT)","from [10.1.79.1] (unknown [10.1.79.1])\n\tby usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id\n\t9AB8D3F483; Mon, 16 Oct 2017 02:09:45 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:\n\tMessage-ID:From:References:To:Subject:Reply-To:Content-ID:Content-Description\n\t:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=wciuj1Xa0ml0GZEPNcR7eerzpaKBUthduVSJO5/+Yg8=;\n\tb=dF0SehCdtBnBw/\n\teeEccdXmc9YzUNcJJzhfTE5aVnWtDZTwzuar+KMhkZXZmdMJY1vYLt8skvJmvCJoyu1mGud8Ep5ms\n\ts1cMFfjKOvgKEIEqK1U542axBpayH3r0KBgQmkUG6PQDzwjIp90fy43zG5/lEIkpwc+pT1PdzFIiE\n\td29GLX3upIpoZAgy7mRM9oEKGsB4g//ObsbZWmULO3kvB4CJe/iH/F7MetugWc82uwSpeS0WRp5uc\n\tuPMgNtd7fV8+wQ26gZ89qYl8mMRpjTYQERT2oDsUSut4TidmvqC29E8F2Gf3g6WlbiN8my+MCFMpa\n\ty7QHYB7LwHwZY7WdVS6w==;","Subject":"Re: [PATCH v3 0/8] ARM: NOMMU: MPU updates","To":"Russell King - ARM Linux ","References":"<1506330344-31556-1-git-send-email-vladimir.murzin@arm.com>\n\t<68a6eb4d-4d8e-7c6a-0875-3165bde8de89@arm.com>\n\t\n\t<20171013092418.GF20805@n2100.armlinux.org.uk>\n\t<0edd802a-d596-5d46-ff53-97b1db1a453e@arm.com>\n\t<20171014143721.GH20805@n2100.armlinux.org.uk>","From":"Vladimir Murzin ","Message-ID":"<2c12933f-594b-eeae-b113-dea00a6d6a02@arm.com>","Date":"Mon, 16 Oct 2017 10:09:44 +0100","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.2.1","MIME-Version":"1.0","In-Reply-To":"<20171014143721.GH20805@n2100.armlinux.org.uk>","Content-Language":"en-GB","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20171016_021007_587455_8C44DF86 ","X-CRM114-Status":"GOOD ( 18.05 )","X-Spam-Score":"-6.9 (------)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-6.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/,\n\thigh trust [217.140.101.70 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"alexandre.torgue@st.com, manabian@gmail.com, stefan@agner.ch,\n\tkbuild-all@01.org, u.kleine-koenig@pengutronix.de,\n\tlinux-arm-kernel@lists.infradead.org, sza@esh.hu","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1788439,"web_url":"http://patchwork.ozlabs.org/comment/1788439/","msgid":"","list_archive_url":null,"date":"2017-10-17T14:05:30","subject":"Re: [PATCH v3 0/8] ARM: NOMMU: MPU updates","submitter":{"id":66874,"url":"http://patchwork.ozlabs.org/api/people/66874/","name":"Benjamin Gaignard","email":"benjamin.gaignard@linaro.org"},"content":"2017-09-25 11:05 GMT+02:00 Vladimir Murzin :\n> Hi,\n>\n> This is an update of the existent MPU code which consist set of\n> clean-ups and enhancements. The most significant changes are in the\n> way how MPU settings sync-up for secondaries (PATCH 3/8), more\n> flexible layout for memory (PATCH 7/8) and support for XIP (PATCH\n> 8/8). Since there is no in-tree user of MPU, support for M-class has\n> been added (PATCH 6/8).\n>\n> There is also practical benefit of patch set:\n>\n> \"These MPU patches introduce a nice feature that it simplifies the\n> bootloader: do not need to setup the MPU, for example for coherent DMA\n> region, which is described in device-tree too.\" András Szemző\n>\n> Changelog:\n> v2 -> v3\n> - fixed support for XIP (PATCH 8/8)\n> - rebased on 4.14-rc2\n>\n> v1 -> v2\n> - support for XIP (PATCH 8/8)\n> - rebased on 4.13-rc1\n>\n> RFC v2 -> v1\n> - dropped RFC tag\n> - Tested-by from András\n> - rebased on 4.12-rc5\n>\n> RFC -> RFC v2\n> - fixed MPU enable for v7m (PATCH 6/7)\n>\n> Thanks!\n\nfor the whole serie on stm32f4 and stm32f7:\n\nTested-by: Benjamin Gaignard \n\n>\n> Vladimir Murzin (8):\n> ARM: NOMMU: Move out MPU setup in separate module\n> ARM: NOMMU: Update MPU accessors to use cp15 helpers\n> ARM: NOMMU: Rework MPU to be mostly done in C\n> ARM: NOMMU: Disallow MPU for XIP\n> ARM: Kconfig: Kill CONFIG_VECTORS_BASE\n> ARM: V7M: Add support for MPU to M-class\n> ARM: NOMMU: Use more MPU regions to cover memory\n> ARM: NOMMU: Support MPU in XIP configuration\n>\n> arch/arm/Kconfig | 9 -\n> arch/arm/Kconfig-nommu | 4 +-\n> arch/arm/include/asm/cputype.h | 10 +\n> arch/arm/include/asm/mpu.h | 26 +-\n> arch/arm/include/asm/smp.h | 2 +-\n> arch/arm/include/asm/v7m.h | 10 +\n> arch/arm/kernel/asm-offsets.c | 11 +\n> arch/arm/kernel/head-nommu.S | 148 +++++++++---\n> arch/arm/kernel/smp.c | 2 +-\n> arch/arm/kernel/vmlinux-xip.lds.S | 23 ++\n> arch/arm/mm/Makefile | 1 +\n> arch/arm/mm/nommu.c | 254 +-------------------\n> arch/arm/mm/pmsa-v7.c | 484 ++++++++++++++++++++++++++++++++++++++\n> 13 files changed, 682 insertions(+), 302 deletions(-)\n> create mode 100644 arch/arm/mm/pmsa-v7.c\n>\n> --\n> 1.9.1\n>\n>\n> _______________________________________________\n> linux-arm-kernel mailing list\n> linux-arm-kernel@lists.infradead.org\n> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; 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Tue, 17 Oct 2017 07:05:30 -0700 (PDT)"],"DKIM-Signature":["v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:To:Subject:Message-ID:Date:From:\n\tReferences:In-Reply-To:MIME-Version:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=83JZddZeGrnnoc67wjsqTgN7kuagnOAnTK/ZROtp0QQ=;\n\tb=FUwBQ3FHnnvtbw\n\tqFK5v2eLXio2M/878xDLdLn7A/Xwbgj4IpuPiDwVnZIQWE6x6u65RaXNACDyvytfNBTZuvYcu8/a3\n\tk3SSqmiWGQAOIvOU3OP2p+SlnTtDvJuxVWkIYX5SqWldj2dJitg4F0m5t0978J0gX75kH2hGPfofx\n\t31lDsyXZLdwzj/KTUC9NJ0oyOA8fhA9xpiGiQhx1Bla+GotiMTsaKWqzNR6hXzFBwzZITs0/ow1J1\n\tSv9HxFyVG6xe9QlUZnRHC3a9oUkvKsStsSlWvkRrcWd6E4E2FpOYkkOZBThYUeTPcxWUZcsfHq7S8\n\tDHHtDzGdqXwFyIjbWTHw==;","v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google;\n\th=mime-version:in-reply-to:references:from:date:message-id:subject:to\n\t:cc:content-transfer-encoding;\n\tbh=D3fLJfxpLCXRmE+y4OzhS+Irn5U4rx8JsJ76KdJknZw=;\n\tb=ADKs9Pk9AtUnXsoEPC8EJrABBHIspXUigIawe5et06UICU4T0o3kvGit0G7VlEuxmg\n\tubpjWXrg4Cc2zsbuwBtwtOolYNXlPAKKk2EIJ2Fvn7nq3ozV1CGA4Qocnw3j+yluNCg3\n\tqfeHIsXTK9MWkbvPfPnFAMr7vB3QulctwKBLk="],"X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:mime-version:in-reply-to:references:from:date\n\t:message-id:subject:to:cc:content-transfer-encoding;\n\tbh=D3fLJfxpLCXRmE+y4OzhS+Irn5U4rx8JsJ76KdJknZw=;\n\tb=hOPBZ777+KeMzPMybdC9qKBCcDHNq78P1XWk/KJm59zRRTezZHkKO/bWgn54uwkBav\n\trLQG/jLWo7d4ZMV7ZhrfDValrMai7vDF1Ab8gXNqUGXB8y0gl9E6DHz076Kql9gTa6fe\n\tYx2fYgupZDlF2aoVZokDhxGOEWoT05GrLzw/COxK0vkDpqrUcoDnrWaEk2QrVLzb1GPD\n\ty6y8BYToaCWx09yaP+McirazSgm4OLadqHNVzRyJ5Rkum9a16UnsBC81+8GWbXo5+um0\n\tg1qg2iMPtJigH7D5f4iU84IlkbaSZdoTXLR1jG2FlpptRMFSN+1dum42ZmCm0lm7xvlg\n\tLXTw==","X-Gm-Message-State":"AMCzsaUhb3jRq+1bZf5QqdDmwcWfY9BpVIjwn1Vs5RB4PPypQt/YqZMn\n\tPQZywy8e531UAf/Ix+vkX3n8xYEbdEayYMkkkcelnw==","X-Google-Smtp-Source":"ABhQp+SBNDKDgx1vhS+bi/Vh/lAH3R6zOAo9xMbbfCiPykbQ25mvSOhpyVPkVbMyKCqt6Ufyuz2fanID7tGqtkfBOr4=","X-Received":"by 10.55.42.23 with SMTP id q23mr18767490qkh.108.1508249130827; \n\tTue, 17 Oct 2017 07:05:30 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<1506330344-31556-1-git-send-email-vladimir.murzin@arm.com>","References":"<1506330344-31556-1-git-send-email-vladimir.murzin@arm.com>","From":"Benjamin Gaignard ","Date":"Tue, 17 Oct 2017 16:05:30 +0200","Message-ID":"","Subject":"Re: [PATCH v3 0/8] ARM: NOMMU: MPU updates","To":"Vladimir Murzin ","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20171017_070553_066759_7A65F325 ","X-CRM114-Status":"GOOD ( 18.53 )","X-Spam-Score":"-2.7 (--)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-2.7 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/,\n\tlow\n\ttrust [2607:f8b0:400d:c09:0:0:0:22a listed in] [list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t-0.1 DKIM_VALID Message has at least one valid DKIM or DK signature\n\t0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n\tnot necessarily valid\n\t-0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n\tauthor's domain","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Alexandre Torgue , manabian@gmail.com, Russell\n\tKing - ARM Linux , stefan@agner.ch, \n\tkbuild-all@01.org, u.kleine-koenig@pengutronix.de, Linux ARM\n\t, =?utf-8?q?Szemz=C5=91_Andr?=\n\t=?utf-8?b?w6Fz?= ","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1788451,"web_url":"http://patchwork.ozlabs.org/comment/1788451/","msgid":"<79c7c3f6-9a55-9044-6a6f-df8f64c10241@arm.com>","list_archive_url":null,"date":"2017-10-17T14:13:36","subject":"Re: [PATCH v3 0/8] ARM: NOMMU: MPU updates","submitter":{"id":65248,"url":"http://patchwork.ozlabs.org/api/people/65248/","name":"Vladimir Murzin","email":"vladimir.murzin@arm.com"},"content":"On 17/10/17 15:05, Benjamin Gaignard wrote:\n> 2017-09-25 11:05 GMT+02:00 Vladimir Murzin :\n>> Hi,\n>>\n>> This is an update of the existent MPU code which consist set of\n>> clean-ups and enhancements. The most significant changes are in the\n>> way how MPU settings sync-up for secondaries (PATCH 3/8), more\n>> flexible layout for memory (PATCH 7/8) and support for XIP (PATCH\n>> 8/8). Since there is no in-tree user of MPU, support for M-class has\n>> been added (PATCH 6/8).\n>>\n>> There is also practical benefit of patch set:\n>>\n>> \"These MPU patches introduce a nice feature that it simplifies the\n>> bootloader: do not need to setup the MPU, for example for coherent DMA\n>> region, which is described in device-tree too.\" András Szemző\n>>\n>> Changelog:\n>> v2 -> v3\n>> - fixed support for XIP (PATCH 8/8)\n>> - rebased on 4.14-rc2\n>>\n>> v1 -> v2\n>> - support for XIP (PATCH 8/8)\n>> - rebased on 4.13-rc1\n>>\n>> RFC v2 -> v1\n>> - dropped RFC tag\n>> - Tested-by from András\n>> - rebased on 4.12-rc5\n>>\n>> RFC -> RFC v2\n>> - fixed MPU enable for v7m (PATCH 6/7)\n>>\n>> Thanks!\n> \n> for the whole serie on stm32f4 and stm32f7:\n> \n> Tested-by: Benjamin Gaignard \n\nThanks for giving it a try!\n\nThe series is already in Russell's patch system, so I dunno\nhow to add your Tested-by, maybe Russell can made an update\nwhen he pull patches in his tree...\n\nCheers\nVladimir\n\n> \n>>\n>> Vladimir Murzin (8):\n>> ARM: NOMMU: Move out MPU setup in separate module\n>> ARM: NOMMU: Update MPU accessors to use cp15 helpers\n>> ARM: NOMMU: Rework MPU to be mostly done in C\n>> ARM: NOMMU: Disallow MPU for XIP\n>> ARM: Kconfig: Kill CONFIG_VECTORS_BASE\n>> ARM: V7M: Add support for MPU to M-class\n>> ARM: NOMMU: Use more MPU regions to cover memory\n>> ARM: NOMMU: Support MPU in XIP configuration\n>>\n>> arch/arm/Kconfig | 9 -\n>> arch/arm/Kconfig-nommu | 4 +-\n>> arch/arm/include/asm/cputype.h | 10 +\n>> arch/arm/include/asm/mpu.h | 26 +-\n>> arch/arm/include/asm/smp.h | 2 +-\n>> arch/arm/include/asm/v7m.h | 10 +\n>> arch/arm/kernel/asm-offsets.c | 11 +\n>> arch/arm/kernel/head-nommu.S | 148 +++++++++---\n>> arch/arm/kernel/smp.c | 2 +-\n>> arch/arm/kernel/vmlinux-xip.lds.S | 23 ++\n>> arch/arm/mm/Makefile | 1 +\n>> arch/arm/mm/nommu.c | 254 +-------------------\n>> arch/arm/mm/pmsa-v7.c | 484 ++++++++++++++++++++++++++++++++++++++\n>> 13 files changed, 682 insertions(+), 302 deletions(-)\n>> create mode 100644 arch/arm/mm/pmsa-v7.c\n>>\n>> --\n>> 1.9.1\n>>\n>>\n>> _______________________________________________\n>> linux-arm-kernel mailing list\n>> linux-arm-kernel@lists.infradead.org\n>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel\n> \n> \n>","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"RiF+N1dV\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yGccy4Jtqz9s83\n\tfor ;\n\tWed, 18 Oct 2017 01:14:10 +1100 (AEDT)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e4SdB-0002s6-6x; Tue, 17 Oct 2017 14:14:05 +0000","from foss.arm.com ([217.140.101.70])\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e4Sd6-0002pX-7u for linux-arm-kernel@lists.infradead.org;\n\tTue, 17 Oct 2017 14:14:03 +0000","from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249])\n\tby usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1CFB71529;\n\tTue, 17 Oct 2017 07:13:39 -0700 (PDT)","from [10.1.79.1] (unknown [10.1.79.1])\n\tby usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id\n\t6A6833F590; Tue, 17 Oct 2017 07:13:37 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:\n\tMessage-ID:From:References:To:Subject:Reply-To:Content-ID:Content-Description\n\t:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=6i3oJt6hh3KB7RvpyltAwUbVNF3QEiejPfM3VD5DVJM=;\n\tb=RiF+N1dVbjs+0n\n\tmsNs6oMSijLWP90pTv5tOllHnrBjuTZ2VID/F5T5Y1R+JC1ehhELOKY6qUZSWfH+1XTNl2ESOPA0t\n\tmHiSncEbCpNOuzJ3WAcBtiS3cwa2UwUI/JikJp+V5wBDsKpgbpyOq8JBDtpkVcC16lhaeJgbKbMQU\n\t13MFAaVaPh8KQT/NtqHQCs99WbxWNRRDBKmHGsJ76BHL4nw/23oGNSPm3AVWSOOq+03RmzeIX4NE9\n\tca9Iu4NhVZPyRTRXSC8MIip6iwSJE8eKSn+R7bYRBYV0OHJtVKwd6L97qmbVgIXJXkwUVE2JHT+DM\n\tUslL4X3Q0gAoMx9cCUCQ==;","Subject":"Re: [PATCH v3 0/8] ARM: NOMMU: MPU updates","To":"Benjamin Gaignard ","References":"<1506330344-31556-1-git-send-email-vladimir.murzin@arm.com>\n\t","From":"Vladimir Murzin ","Message-ID":"<79c7c3f6-9a55-9044-6a6f-df8f64c10241@arm.com>","Date":"Tue, 17 Oct 2017 15:13:36 +0100","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.2.1","MIME-Version":"1.0","In-Reply-To":"","Content-Language":"en-GB","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20171017_071400_304422_CFD592BD ","X-CRM114-Status":"GOOD ( 14.66 )","X-Spam-Score":"-6.9 (------)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-6.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/,\n\thigh trust [217.140.101.70 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Alexandre Torgue , manabian@gmail.com, Russell\n\tKing - ARM Linux , stefan@agner.ch, \n\tkbuild-all@01.org, u.kleine-koenig@pengutronix.de, Linux ARM\n\t, =?utf-8?q?Szemz=C5=91_Andr?=\n\t=?utf-8?b?w6Fz?= ","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1788497,"web_url":"http://patchwork.ozlabs.org/comment/1788497/","msgid":"<20171017144656.GP20805@n2100.armlinux.org.uk>","list_archive_url":null,"date":"2017-10-17T14:46:56","subject":"Re: [PATCH v3 0/8] ARM: NOMMU: MPU updates","submitter":{"id":69080,"url":"http://patchwork.ozlabs.org/api/people/69080/","name":"Russell King (Oracle)","email":"linux@armlinux.org.uk"},"content":"On Tue, Oct 17, 2017 at 03:13:36PM +0100, Vladimir Murzin wrote:\n> On 17/10/17 15:05, Benjamin Gaignard wrote:\n> > 2017-09-25 11:05 GMT+02:00 Vladimir Murzin :\n> >> Hi,\n> >>\n> >> This is an update of the existent MPU code which consist set of\n> >> clean-ups and enhancements. The most significant changes are in the\n> >> way how MPU settings sync-up for secondaries (PATCH 3/8), more\n> >> flexible layout for memory (PATCH 7/8) and support for XIP (PATCH\n> >> 8/8). Since there is no in-tree user of MPU, support for M-class has\n> >> been added (PATCH 6/8).\n> >>\n> >> There is also practical benefit of patch set:\n> >>\n> >> \"These MPU patches introduce a nice feature that it simplifies the\n> >> bootloader: do not need to setup the MPU, for example for coherent DMA\n> >> region, which is described in device-tree too.\" András Szemző\n> >>\n> >> Changelog:\n> >> v2 -> v3\n> >> - fixed support for XIP (PATCH 8/8)\n> >> - rebased on 4.14-rc2\n> >>\n> >> v1 -> v2\n> >> - support for XIP (PATCH 8/8)\n> >> - rebased on 4.13-rc1\n> >>\n> >> RFC v2 -> v1\n> >> - dropped RFC tag\n> >> - Tested-by from András\n> >> - rebased on 4.12-rc5\n> >>\n> >> RFC -> RFC v2\n> >> - fixed MPU enable for v7m (PATCH 6/7)\n> >>\n> >> Thanks!\n> > \n> > for the whole serie on stm32f4 and stm32f7:\n> > \n> > Tested-by: Benjamin Gaignard \n> \n> Thanks for giving it a try!\n> \n> The series is already in Russell's patch system, so I dunno\n> how to add your Tested-by, maybe Russell can made an update\n> when he pull patches in his tree...\n\nApplied, along with the tested-by, and with the fixup patch folded.\n\nHowever, I notice that with \"Szemz■ András\" name, the ■ character has\nbeen replaced by a \"?\" somewhere along the lines (and my VT console\ncan't even display it, so (a) I've no idea what character it's\nsupposed to be, and (b) I can't cut'n'paste it either - as illustrated\nby my pasting above making it come out as a rectangular block.)\n\nThe problem I have is that if I push these patches out, as soon as I\ndo, I can't fix this up, because it's the \"devel-stable\" branch - and\nthe promise I make to everyone is that branch is never rebased (which\nis why it has the -stable suffix.) Once commits are published in that\nbranch, they're set in stone.\n\nFrom what I can tell, the patches were emailed to the patch system,\nwhich means it would've gone through perl's Unicode::Map8 - internally\nthe patch system uses UTF-8 to store the summary and description,\nwhile preserving the patch as a byte stream. Your emails to the list\nclaim to be UTF-8, so it should've been a no-op. So, don't know what\nhas happened, and I can't fix it at the moment, not even in the actual\ncommits.\n\nSo, I won't be pushing this out, nor will I be marking the patches as\napplied in the patch system until I have some kind of solution.","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org header.b=\"Lhzsk7II\"; \n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=armlinux.org.uk header.i=@armlinux.org.uk\n\theader.b=\"V5fp46TB\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yGdMy0w5Gz9sRW\n\tfor ;\n\tWed, 18 Oct 2017 01:47:58 +1100 (AEDT)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e4T9u-0001iJ-43; Tue, 17 Oct 2017 14:47:54 +0000","from pandora.armlinux.org.uk\n\t([2001:4d48:ad52:3201:214:fdff:fe10:1be6])\n\tby bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e4T9i-0001N4-Is for linux-arm-kernel@lists.infradead.org;\n\tTue, 17 Oct 2017 14:47:51 +0000","from n2100.armlinux.org.uk\n\t([2001:4d48:ad52:3201:214:fdff:fe10:4f86]:56902)\n\tby pandora.armlinux.org.uk with esmtpsa\n\t(TLSv1:DHE-RSA-AES256-SHA:256)\n\t(Exim 4.82_1-5b7a7c0-XX) (envelope-from )\n\tid 1e4T95-00051m-LK; Tue, 17 Oct 2017 15:47:04 +0100","from linux by n2100.armlinux.org.uk with local (Exim 4.76)\n\t(envelope-from )\n\tid 1e4T8z-0001ji-Qn; Tue, 17 Oct 2017 15:46:57 +0100"],"DKIM-Signature":["v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:\n\tMessage-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=R5voqlH9k/K4KQfr0G7zE/4snRtcTDETKpR7AdwZtg0=;\n\tb=Lhzsk7IITwOMZt\n\tyZ9rFdTEgejBwBLr+pcVUTbmI6PtsmKBLnZSjrirOr3aik3m140VE2+NAEXP4uDyQofdE9socrKqn\n\tSZizf/CZm2kKk3QKBtj5aS65bxNNTRqmSELLPquVcGbOZQXoe8zFlUerw6yip42NRGm7wbqUMzPhj\n\tAxrRSGO2CqZG6Pj0KpXm+kRPf+uuQswmsSYmE7ggwAKu+EVgRwiirjEdzJM5BPx6cXwXNIOjFyxvw\n\tRD/zVe+zwNrbLgQ218lGFFyaeZcOMeTlIqQNKSXJBf8DppxVHeNq8LK+KYuhNi1e7N1phCmh5wTeI\n\tcoE6QRoslIFLRYUGr9SQ==;","v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=armlinux.org.uk; s=pandora-2014; \n\th=Sender:In-Reply-To:Content-Transfer-Encoding:Content-Type:MIME-Version:References:Message-ID:Subject:Cc:To:From:Date;\n\tbh=Qq1IzDa0988PRQoBu3nX8wXxxVvLtsVG5fiA6isqqos=; \n\tb=V5fp46TBoh6LGjdlU8KFH5GpSYYByb48qUxBjU9ViC0kNIKg+YqZV5RnuZ9Ae/kPxeheIvVBcpgH5Hs/BoNkXhomqU8XluMgoe80o0tTJPHtdhXXwI76vNmnz4TDQXPY89WAT4CTG7QIu8/A9ka7TCYziUouimzTctdy7HIHFQs=;"],"Date":"Tue, 17 Oct 2017 15:46:56 +0100","From":"Russell King - ARM Linux ","To":"Vladimir Murzin ","Subject":"Re: [PATCH v3 0/8] ARM: NOMMU: MPU updates","Message-ID":"<20171017144656.GP20805@n2100.armlinux.org.uk>","References":"<1506330344-31556-1-git-send-email-vladimir.murzin@arm.com>\n\t\n\t<79c7c3f6-9a55-9044-6a6f-df8f64c10241@arm.com>","MIME-Version":"1.0","Content-Disposition":"inline","In-Reply-To":"<79c7c3f6-9a55-9044-6a6f-df8f64c10241@arm.com>","User-Agent":"Mutt/1.5.23 (2014-03-12)","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20171017_074743_129323_C62293D6 ","X-CRM114-Status":"GOOD ( 22.93 )","X-Spam-Score":"-4.3 (----)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-4.3 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/,\n\tmedium\n\ttrust [2001:4d48:ad52:3201:214:fdff:fe10:1be6 listed in]\n\t[list.dnswl.org]\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t-0.1 DKIM_VALID Message has at least one valid DKIM or DK signature\n\t0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n\tnot necessarily valid\n\t-0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n\tauthor's domain","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Alexandre Torgue , manabian@gmail.com,\n\tstefan@agner.ch, kbuild-all@01.org, Benjamin Gaignard\n\t, u.kleine-koenig@pengutronix.de,\n\tLinux ARM , \n\t=?utf-8?q?Szemz=C5=91_Andr?= =?utf-8?b?w6Fz?= ","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1788506,"web_url":"http://patchwork.ozlabs.org/comment/1788506/","msgid":"<20171017145614.GQ20805@n2100.armlinux.org.uk>","list_archive_url":null,"date":"2017-10-17T14:56:15","subject":"Re: [PATCH v3 0/8] ARM: NOMMU: MPU updates","submitter":{"id":69080,"url":"http://patchwork.ozlabs.org/api/people/69080/","name":"Russell King (Oracle)","email":"linux@armlinux.org.uk"},"content":"On Tue, Oct 17, 2017 at 03:46:56PM +0100, Russell King - ARM Linux wrote:\n> On Tue, Oct 17, 2017 at 03:13:36PM +0100, Vladimir Murzin wrote:\n> > On 17/10/17 15:05, Benjamin Gaignard wrote:\n> > > 2017-09-25 11:05 GMT+02:00 Vladimir Murzin :\n> > >> Hi,\n> > >>\n> > >> This is an update of the existent MPU code which consist set of\n> > >> clean-ups and enhancements. The most significant changes are in the\n> > >> way how MPU settings sync-up for secondaries (PATCH 3/8), more\n> > >> flexible layout for memory (PATCH 7/8) and support for XIP (PATCH\n> > >> 8/8). Since there is no in-tree user of MPU, support for M-class has\n> > >> been added (PATCH 6/8).\n> > >>\n> > >> There is also practical benefit of patch set:\n> > >>\n> > >> \"These MPU patches introduce a nice feature that it simplifies the\n> > >> bootloader: do not need to setup the MPU, for example for coherent DMA\n> > >> region, which is described in device-tree too.\" András Szemző\n> > >>\n> > >> Changelog:\n> > >> v2 -> v3\n> > >> - fixed support for XIP (PATCH 8/8)\n> > >> - rebased on 4.14-rc2\n> > >>\n> > >> v1 -> v2\n> > >> - support for XIP (PATCH 8/8)\n> > >> - rebased on 4.13-rc1\n> > >>\n> > >> RFC v2 -> v1\n> > >> - dropped RFC tag\n> > >> - Tested-by from András\n> > >> - rebased on 4.12-rc5\n> > >>\n> > >> RFC -> RFC v2\n> > >> - fixed MPU enable for v7m (PATCH 6/7)\n> > >>\n> > >> Thanks!\n> > > \n> > > for the whole serie on stm32f4 and stm32f7:\n> > > \n> > > Tested-by: Benjamin Gaignard \n> > \n> > Thanks for giving it a try!\n> > \n> > The series is already in Russell's patch system, so I dunno\n> > how to add your Tested-by, maybe Russell can made an update\n> > when he pull patches in his tree...\n> \n> Applied, along with the tested-by, and with the fixup patch folded.\n> \n> However, I notice that with \"Szemz■ András\" name, the ■ character has\n> been replaced by a \"?\" somewhere along the lines (and my VT console\n> can't even display it, so (a) I've no idea what character it's\n> supposed to be, and (b) I can't cut'n'paste it either - as illustrated\n> by my pasting above making it come out as a rectangular block.)\n> \n> The problem I have is that if I push these patches out, as soon as I\n> do, I can't fix this up, because it's the \"devel-stable\" branch - and\n> the promise I make to everyone is that branch is never rebased (which\n> is why it has the -stable suffix.) Once commits are published in that\n> branch, they're set in stone.\n> \n> From what I can tell, the patches were emailed to the patch system,\n> which means it would've gone through perl's Unicode::Map8 - internally\n> the patch system uses UTF-8 to store the summary and description,\n> while preserving the patch as a byte stream. Your emails to the list\n> claim to be UTF-8, so it should've been a no-op. So, don't know what\n> has happened, and I can't fix it at the moment, not even in the actual\n> commits.\n> \n> So, I won't be pushing this out, nor will I be marking the patches as\n> applied in the patch system until I have some kind of solution.\n\nOkay, seems not to be the patch system's email parsing - saving one of\nyour messages from the list and feeding that into the mail parser gives\ncorrect results - utf-8 bytes of 0xc5 0x91, which would've been placed\ninto mysql over a connection using utf-8 encoding.\n\nWhat I know is that reading it out of mysql over a utf-8 encoding gives\na '?' (0x3f) for that character. What I don't know is whether it's\nmysql having this behaviour, or whether your message was received with\nthe character already converted to a '?'.","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org header.b=\"U66eXFb7\"; \n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=armlinux.org.uk header.i=@armlinux.org.uk\n\theader.b=\"YI1fzRgY\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yGdZw02W9z9sRW\n\tfor ;\n\tWed, 18 Oct 2017 01:57:28 +1100 (AEDT)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e4TJ5-0007iZ-39; Tue, 17 Oct 2017 14:57:23 +0000","from pandora.armlinux.org.uk\n\t([2001:4d48:ad52:3201:214:fdff:fe10:1be6])\n\tby bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e4TIe-0007be-Fr for linux-arm-kernel@lists.infradead.org;\n\tTue, 17 Oct 2017 14:56:59 +0000","from n2100.armlinux.org.uk\n\t([fd8f:7570:feb6:1:214:fdff:fe10:4f86]:38993)\n\tby pandora.armlinux.org.uk with esmtpsa\n\t(TLSv1:DHE-RSA-AES256-SHA:256)\n\t(Exim 4.82_1-5b7a7c0-XX) (envelope-from )\n\tid 1e4TI3-00057a-CO; Tue, 17 Oct 2017 15:56:19 +0100","from linux by n2100.armlinux.org.uk with local (Exim 4.76)\n\t(envelope-from )\n\tid 1e4THz-0001rd-IF; Tue, 17 Oct 2017 15:56:15 +0100"],"DKIM-Signature":["v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:\n\tMessage-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=C89f4cD8XHZH3suCuxkOGJ57U4u+BCiH78LsIRfHRuo=;\n\tb=U66eXFb7oTe45B\n\tf2e2ayOy3i28so+cl+S2O4wIDGXDEW5sN4VRBEcv8BrH2eKfpgDtq0VtupTOQXmYFgGV6J75uy/zI\n\t61bCIq2blCxMK9XuQwfgcC1+swyPhUJTfnDkudNCIOQ53jnH3ND/vlkY6y8BhYTqH/asGOeHugYnG\n\tkC3CaC9rCyF5+gmC2S7Mk+G/U8oVsq8JZWp1ZSTWRXzRMm7mElVGX2+RMw2J6XMN2pe0oV6rSrV70\n\t/jH+qq/ikuf/QfsKBbTiebdy9vW/gl6dFWk2u7eWqvt5t3PcpdiDJywqkb18/DFw/ihMHxgmiVT5Z\n\tOLDIsyZhf2xJC9mJ/xbw==;","v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=armlinux.org.uk; s=pandora-2014; \n\th=Sender:In-Reply-To:Content-Transfer-Encoding:Content-Type:MIME-Version:References:Message-ID:Subject:Cc:To:From:Date;\n\tbh=/vqkLQF0WR3hz/1IIP0lVMV85/o9waLmd4juJu0TKC4=; \n\tb=YI1fzRgYib02aMDAcBoxnsvPO0zCYDwIYHOr/ntI4volskHtQ0Tnwx8A2p5uPy8p6Vqh4XmGWnra40OgPqWdEq4Fgd41VfPf9cIn0SEHrZoO8UUUbOhwtXzYTphOQwDUSYT2doGRII9HKJs+4Hyf8YRcGhsrKPasN3pBIGUQYuY=;"],"Date":"Tue, 17 Oct 2017 15:56:15 +0100","From":"Russell King - ARM Linux ","To":"Vladimir Murzin ","Subject":"Re: [PATCH v3 0/8] ARM: NOMMU: MPU updates","Message-ID":"<20171017145614.GQ20805@n2100.armlinux.org.uk>","References":"<1506330344-31556-1-git-send-email-vladimir.murzin@arm.com>\n\t\n\t<79c7c3f6-9a55-9044-6a6f-df8f64c10241@arm.com>\n\t<20171017144656.GP20805@n2100.armlinux.org.uk>","MIME-Version":"1.0","Content-Disposition":"inline","In-Reply-To":"<20171017144656.GP20805@n2100.armlinux.org.uk>","User-Agent":"Mutt/1.5.23 (2014-03-12)","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20171017_075656_895408_8BF0213E ","X-CRM114-Status":"GOOD ( 29.57 )","X-Spam-Score":"-4.3 (----)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-4.3 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/,\n\tmedium\n\ttrust [2001:4d48:ad52:3201:214:fdff:fe10:1be6 listed in]\n\t[list.dnswl.org]\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t-0.1 DKIM_VALID Message has at least one valid DKIM or DK signature\n\t0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n\tnot necessarily valid\n\t-0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n\tauthor's domain","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Alexandre Torgue , manabian@gmail.com,\n\tstefan@agner.ch, kbuild-all@01.org, Benjamin Gaignard\n\t, u.kleine-koenig@pengutronix.de,\n\tLinux ARM , \n\t=?utf-8?q?Szemz=C5=91_Andr?= =?utf-8?b?w6Fz?= ","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1788513,"web_url":"http://patchwork.ozlabs.org/comment/1788513/","msgid":"","list_archive_url":null,"date":"2017-10-17T15:02:20","subject":"Re: [PATCH v3 0/8] ARM: NOMMU: MPU updates","submitter":{"id":65248,"url":"http://patchwork.ozlabs.org/api/people/65248/","name":"Vladimir Murzin","email":"vladimir.murzin@arm.com"},"content":"On 17/10/17 15:56, Russell King - ARM Linux wrote:\n> On Tue, Oct 17, 2017 at 03:46:56PM +0100, Russell King - ARM Linux wrote:\n>> On Tue, Oct 17, 2017 at 03:13:36PM +0100, Vladimir Murzin wrote:\n>>> On 17/10/17 15:05, Benjamin Gaignard wrote:\n>>>> 2017-09-25 11:05 GMT+02:00 Vladimir Murzin :\n>>>>> Hi,\n>>>>>\n>>>>> This is an update of the existent MPU code which consist set of\n>>>>> clean-ups and enhancements. The most significant changes are in the\n>>>>> way how MPU settings sync-up for secondaries (PATCH 3/8), more\n>>>>> flexible layout for memory (PATCH 7/8) and support for XIP (PATCH\n>>>>> 8/8). Since there is no in-tree user of MPU, support for M-class has\n>>>>> been added (PATCH 6/8).\n>>>>>\n>>>>> There is also practical benefit of patch set:\n>>>>>\n>>>>> \"These MPU patches introduce a nice feature that it simplifies the\n>>>>> bootloader: do not need to setup the MPU, for example for coherent DMA\n>>>>> region, which is described in device-tree too.\" András Szemző\n>>>>>\n>>>>> Changelog:\n>>>>> v2 -> v3\n>>>>> - fixed support for XIP (PATCH 8/8)\n>>>>> - rebased on 4.14-rc2\n>>>>>\n>>>>> v1 -> v2\n>>>>> - support for XIP (PATCH 8/8)\n>>>>> - rebased on 4.13-rc1\n>>>>>\n>>>>> RFC v2 -> v1\n>>>>> - dropped RFC tag\n>>>>> - Tested-by from András\n>>>>> - rebased on 4.12-rc5\n>>>>>\n>>>>> RFC -> RFC v2\n>>>>> - fixed MPU enable for v7m (PATCH 6/7)\n>>>>>\n>>>>> Thanks!\n>>>>\n>>>> for the whole serie on stm32f4 and stm32f7:\n>>>>\n>>>> Tested-by: Benjamin Gaignard \n>>>\n>>> Thanks for giving it a try!\n>>>\n>>> The series is already in Russell's patch system, so I dunno\n>>> how to add your Tested-by, maybe Russell can made an update\n>>> when he pull patches in his tree...\n>>\n>> Applied, along with the tested-by, and with the fixup patch folded.\n>>\n>> However, I notice that with \"Szemz■ András\" name, the ■ character has\n>> been replaced by a \"?\" somewhere along the lines (and my VT console\n>> can't even display it, so (a) I've no idea what character it's\n>> supposed to be, and (b) I can't cut'n'paste it either - as illustrated\n>> by my pasting above making it come out as a rectangular block.)\n>>\n>> The problem I have is that if I push these patches out, as soon as I\n>> do, I can't fix this up, because it's the \"devel-stable\" branch - and\n>> the promise I make to everyone is that branch is never rebased (which\n>> is why it has the -stable suffix.) Once commits are published in that\n>> branch, they're set in stone.\n>>\n>> From what I can tell, the patches were emailed to the patch system,\n>> which means it would've gone through perl's Unicode::Map8 - internally\n>> the patch system uses UTF-8 to store the summary and description,\n>> while preserving the patch as a byte stream. Your emails to the list\n>> claim to be UTF-8, so it should've been a no-op. So, don't know what\n>> has happened, and I can't fix it at the moment, not even in the actual\n>> commits.\n>>\n>> So, I won't be pushing this out, nor will I be marking the patches as\n>> applied in the patch system until I have some kind of solution.\n> \n> Okay, seems not to be the patch system's email parsing - saving one of\n> your messages from the list and feeding that into the mail parser gives\n> correct results - utf-8 bytes of 0xc5 0x91, which would've been placed\n> into mysql over a connection using utf-8 encoding.\n> \n> What I know is that reading it out of mysql over a utf-8 encoding gives\n> a '?' (0x3f) for that character. What I don't know is whether it's\n> mysql having this behaviour, or whether your message was received with\n> the character already converted to a '?'.\n> \n\nPatches where send one by one with (smtp related options are omitted)\n\ngit send-email --suppress-cc=all --no-thread --to patches@armlinux.org.uk\n\nIf you want I can send a patch to you directly, so you can see if it\narrives converted or not.\n\nCheers\nVladimir","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"qdQDtPPk\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yGdjD3kvmz9sP1\n\tfor ;\n\tWed, 18 Oct 2017 02:02:56 +1100 (AEDT)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e4TOM-0003p4-Lq; Tue, 17 Oct 2017 15:02:50 +0000","from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]\n\thelo=foss.arm.com)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e4TOG-0003ZZ-QM for linux-arm-kernel@lists.infradead.org;\n\tTue, 17 Oct 2017 15:02:48 +0000","from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249])\n\tby usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 48453F;\n\tTue, 17 Oct 2017 08:02:24 -0700 (PDT)","from [10.1.79.1] (unknown [10.1.79.1])\n\tby usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id\n\t68B433F590; Tue, 17 Oct 2017 08:02:22 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:\n\tMessage-ID:From:References:To:Subject:Reply-To:Content-ID:Content-Description\n\t:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=A/MtBijPeA7Yk2Mfb1O8rORnIrYtJog5rVSE9Ermrs4=;\n\tb=qdQDtPPkM6eg5f\n\t6ZV55l0jnUEIhf5K+wPj2xb7MaACsFpD1gPQVBUC1CzCbOvFfUBttetnHHQWHoJkLwcGD5b1B675f\n\tOQBEfVU8/Y/gVpSMCU6OGqrlbVNP/jJFOA9CuwvpV+akaHm5XtZveTeveQKIFdeoic25DKofjur4n\n\tPS+XrICf9fVWh+pDcJj9QAtmCvuduOLYkS7oNTHNGA5v8wQMohVZNCDBN+Vm9Kt+dVt1JH9q6u7Ef\n\tOMyt1Bc1ofNfwci4o90+hSk9dViEw+zjiNTXBCOGthGntyofItcm4IzeXrW3op3mp2I6JYjQbXETW\n\tKAhwQBYq6f44Ye2gg/Xw==;","Subject":"Re: [PATCH v3 0/8] ARM: NOMMU: MPU updates","To":"Russell King - ARM Linux ","References":"<1506330344-31556-1-git-send-email-vladimir.murzin@arm.com>\n\t\n\t<79c7c3f6-9a55-9044-6a6f-df8f64c10241@arm.com>\n\t<20171017144656.GP20805@n2100.armlinux.org.uk>\n\t<20171017145614.GQ20805@n2100.armlinux.org.uk>","From":"Vladimir Murzin ","Message-ID":"","Date":"Tue, 17 Oct 2017 16:02:20 +0100","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.2.1","MIME-Version":"1.0","In-Reply-To":"<20171017145614.GQ20805@n2100.armlinux.org.uk>","Content-Language":"en-GB","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20171017_080246_692109_C63DD218 ","X-CRM114-Status":"GOOD ( 20.31 )","X-Spam-Score":"-6.9 (------)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-6.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/,\n\thigh trust [217.140.101.70 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Alexandre Torgue , manabian@gmail.com,\n\tstefan@agner.ch, kbuild-all@01.org, Benjamin Gaignard\n\t, u.kleine-koenig@pengutronix.de,\n\tLinux ARM , \n\t=?utf-8?q?Szemz=C5=91_Andr?= =?utf-8?b?w6Fz?= ","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}}]