[{"id":1786382,"web_url":"http://patchwork.ozlabs.org/comment/1786382/","msgid":"<20171013153148.dnejsvhxeui6opfw@armageddon.cambridge.arm.com>","list_archive_url":null,"date":"2017-10-13T15:31:48","subject":"Re: [PATCH v3 04/13] arm64: alternatives: use tpidr_el2 on VHE hosts","submitter":{"id":938,"url":"http://patchwork.ozlabs.org/api/people/938/","name":"Catalin Marinas","email":"catalin.marinas@arm.com"},"content":"On Fri, Sep 22, 2017 at 07:26:05PM +0100, James Morse wrote:\n> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c\n> index cd52d365d1f0..8e4c7da2b126 100644\n> --- a/arch/arm64/kernel/cpufeature.c\n> +++ b/arch/arm64/kernel/cpufeature.c\n> @@ -865,6 +865,7 @@ static const struct arm64_cpu_capabilities arm64_features[] = {\n> \t\t.capability = ARM64_HAS_VIRT_HOST_EXTN,\n> \t\t.def_scope = SCOPE_SYSTEM,\n> \t\t.matches = runs_at_el2,\n> +\t\t.enable = cpu_copy_el2regs,\n> \t},\n> \t{\n> \t\t.desc = \"32-bit EL0 Support\",\n> @@ -1308,3 +1309,25 @@ static int __init enable_mrs_emulation(void)\n> }\n> \n> late_initcall(enable_mrs_emulation);\n> +\n> +int cpu_copy_el2regs(void *__unused)\n> +{\n> +\tint do_copyregs = 0;\n> +\n> +\t/*\n> +\t * Copy register values that aren't redirected by hardware.\n> +\t *\n> +\t * Before code patching, we only set tpidr_el1, all CPUs need to copy\n> +\t * this value to tpidr_el2 before we patch the code. Once we've done\n> +\t * that, freshly-onlined CPUs will set tpidr_el2, so we don't need to\n> +\t * do anything here.\n> +\t */\n> +\tasm volatile(ALTERNATIVE(\"mov %0, #1\", \"mov %0, #0\",\n> +\t\t\t\t ARM64_HAS_VIRT_HOST_EXTN)\n> +\t\t : \"=r\" (do_copyregs) : : );\n\nCan you just do:\n\n\tif (cpu_have_const_cap(ARM64_HAS_VIRT_HOST_EXTN))\n\t\twrite_sysreg(read_sysreg(tpidr_el1), tpidr_el2);\n\nAt this point the capability bits should be set and the jump labels\nenabled.\n\nOtherwise:\n\nReviewed-by: Catalin Marinas ","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"sIki+/wo\"; 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Fri, 13 Oct 2017 08:31:50 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:\n\tMessage-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=Wa7cASebpy3uJUFjDQsSQAHqG5O9KErHrAmPbJJV2p4=;\n\tb=sIki+/woEGrwn+\n\tsxrza+KNTlrbUYvIbohJRDnXrMRcFHEk4rHucigdsEWynkF61BgVRMpEZyHBtFcpO2iJ1gAS2iPCI\n\tAfd+ntEDfP9i0BsPaWEvfLa8ZYznQFIhaO8zaLBzvZEsXE2cL3WsqCe/NeZEyD8ALzsoOTGpppRcS\n\tJF7MTubRRVZrY+Jau29JdsT3emIsmmfJFr9DLzcTpIKDVqmNdTMeQHHmYXDdOOQPf9n18Wvp2dGcB\n\tq1N0nzXMsD/csZq+kDcE7uny4dx9AaOT4ZYRXLPBJV5AlR41wQVlDbjj+fPNRZxpxZstUrJ1yU2X0\n\tg/zhxWuLNddEABgC2ldA==;","Date":"Fri, 13 Oct 2017 16:31:48 +0100","From":"Catalin Marinas ","To":"James Morse ","Subject":"Re: [PATCH v3 04/13] arm64: alternatives: use tpidr_el2 on VHE hosts","Message-ID":"<20171013153148.dnejsvhxeui6opfw@armageddon.cambridge.arm.com>","References":"<20170922182614.27885-1-james.morse@arm.com>\n\t<20170922182614.27885-5-james.morse@arm.com>","MIME-Version":"1.0","Content-Disposition":"inline","In-Reply-To":"<20170922182614.27885-5-james.morse@arm.com>","User-Agent":"NeoMutt/20170113 (1.7.2)","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20171013_083213_394062_1F636120 ","X-CRM114-Status":"GOOD ( 13.19 )","X-Spam-Score":"-6.9 (------)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-6.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/,\n\thigh trust [217.140.101.70 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Mark Rutland , devicetree@vger.kernel.org,\n\tLorenzo Pieralisi ,\n\tMarc Zyngier , Will Deacon ,\n\tChristoffer Dall ,\n\tRob Herring , Loc Ho ,\n\tkvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1786391,"web_url":"http://patchwork.ozlabs.org/comment/1786391/","msgid":"<20171013154226.xswo4y2viht22wvk@armageddon.cambridge.arm.com>","list_archive_url":null,"date":"2017-10-13T15:42:26","subject":"Re: [PATCH v3 08/13] arm64: Add vmap_stack header file","submitter":{"id":938,"url":"http://patchwork.ozlabs.org/api/people/938/","name":"Catalin Marinas","email":"catalin.marinas@arm.com"},"content":"On Fri, Sep 22, 2017 at 07:26:09PM +0100, James Morse wrote:\n> diff --git a/arch/arm64/include/asm/vmap_stack.h b/arch/arm64/include/asm/vmap_stack.h\n> new file mode 100644\n> index 000000000000..f41d043cac31\n> --- /dev/null\n> +++ b/arch/arm64/include/asm/vmap_stack.h\n> @@ -0,0 +1,41 @@\n> +/*\n> + * Copyright (C) 2017 ARM Ltd.\n> + *\n> + * This program is free software; you can redistribute it and/or modify\n> + * it under the terms of the GNU General Public License version 2 as\n> + * published by the Free Software Foundation.\n> + *\n> + * This program is distributed in the hope that it will be useful,\n> + * but WITHOUT ANY WARRANTY; without even the implied warranty of\n> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n> + * GNU General Public License for more details.\n> + *\n> + * You should have received a copy of the GNU General Public License\n> + * along with this program. If not, see .\n> + */\n> +#ifndef __ASM_VMAP_STACK_H\n> +#define __ASM_VMAP_STACK_H\n> +\n> +#include \n> +#include \n> +#include \n> +#include \n> +\n> +#ifdef CONFIG_VMAP_STACK\n> +/*\n> + * To ensure that VMAP'd stack overflow detection works correctly, all VMAP'd\n> + * stacks need to have the same alignment.\n> + */\n> +static inline unsigned long *arch_alloc_vmap_stack(size_t stack_size, int node)\n> +{\n> +\treturn __vmalloc_node_range(stack_size, THREAD_ALIGN,\n> +\t\t\t\t VMALLOC_START, VMALLOC_END,\n> +\t\t\t\t THREADINFO_GFP, PAGE_KERNEL, 0, node,\n> +\t\t\t\t __builtin_return_address(0));\n> +}\n> +\n> +#else\n> +unsigned long *arch_alloc_vmap_stack(size_t stack_size, int node); // link error\n\nDo you actually need this here? The calling site (at least in this\npatch), is surrounded by CONFIG_VMAP_STACK. Removing the dummy\ndeclaration should be fine (I haven't read the rest of the patches yet,\nmaybe it's needed later; would a BUILD_BUG do?).","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"tdCfJvb/\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yDBnG6651z9t2S\n\tfor ;\n\tSat, 14 Oct 2017 02:42:58 +1100 (AEDT)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e326x-0001CM-QA; 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bh=CpR+ZAYohrOWLI10s7tUIPwvYk8wGM3NNKOzSIoZqF8=;\n\tb=tdCfJvb/cxlgZm\n\tycFNvXvEvib66uT7CFCwJiSCS7vkYn1oMdm1B8iEw8DjFc7AdNXvJFIYVRn22nc58ALml/WvlGX4l\n\t8T8mSHpqP73stz+O7dhDKOkcrFGyGd1Km/6VIrfSdDWn4opYv6hfUF7k2tn1sOmsQz7K/Ns2OB8Je\n\tWywb5V0B9EXQbnMpsX/LdOOQRuud4E3vORrk5d0nnOOiD8tXDrofeh5qUm7eUtOzEhDhq/amgzuaR\n\tVt9EkrklX16ApZ/y2SKoA0+9gdbLshiJHZRHKqmV2p/6BSWKHNSlZ0WLC2WBPVaqHRh+ogrYU6g2e\n\taV4j7lN/4QxBd8tdYq7Q==;","Date":"Fri, 13 Oct 2017 16:42:26 +0100","From":"Catalin Marinas ","To":"James Morse ","Subject":"Re: [PATCH v3 08/13] arm64: Add vmap_stack header file","Message-ID":"<20171013154226.xswo4y2viht22wvk@armageddon.cambridge.arm.com>","References":"<20170922182614.27885-1-james.morse@arm.com>\n\t<20170922182614.27885-9-james.morse@arm.com>","MIME-Version":"1.0","Content-Disposition":"inline","In-Reply-To":"<20170922182614.27885-9-james.morse@arm.com>","User-Agent":"NeoMutt/20170113 (1.7.2)","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20171013_084251_858382_F40E31EB ","X-CRM114-Status":"GOOD ( 14.16 )","X-Spam-Score":"-6.9 (------)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-6.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/,\n\thigh trust [217.140.101.70 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Mark Rutland , devicetree@vger.kernel.org,\n\tLorenzo Pieralisi ,\n\tMarc Zyngier , Will Deacon ,\n\tChristoffer Dall ,\n\tRob Herring , Loc Ho ,\n\tkvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1786397,"web_url":"http://patchwork.ozlabs.org/comment/1786397/","msgid":"<20171013154914.ktxecc6zobh7fmr6@armageddon.cambridge.arm.com>","list_archive_url":null,"date":"2017-10-13T15:49:14","subject":"Re: [PATCH v3 07/13] firmware: arm_sdei: Add driver for Software\n\tDelegated Exceptions","submitter":{"id":938,"url":"http://patchwork.ozlabs.org/api/people/938/","name":"Catalin Marinas","email":"catalin.marinas@arm.com"},"content":"On Fri, Sep 22, 2017 at 07:26:08PM +0100, James Morse wrote:\n> The Software Delegated Exception Interface (SDEI) is an ARM standard\n> for registering callbacks from the platform firmware into the OS.\n> This is typically used to implement firmware notifications (such as\n> firmware-first RAS) or promote an IRQ that has been promoted to a\n> firmware-assisted NMI.\n> \n> Add the code for detecting the SDEI version and the framework for\n> registering and unregistering events. Subsequent patches will add the\n> arch-specific backend code and the necessary power management hooks.\n> \n> Only shared events are supported, power management, private events and\n> discovery for ACPI systems will be added by later patches.\n> \n> Signed-off-by: James Morse \n> ---\n> Changes since v2:\n> * Copy the priority into the structure the arch asm handler gets. This\n> is used for VMAP stacks where we can't know if a critical event interrupted\n> a normal priority event, thus they need separate stacks.\n> \n> Changes since v1:\n> * Changed entry point to unsigned long, if we support non-vhe systems this\n> won't be a valid pointer\n> * Made invoke_sdei_fn() pass the only register we are interested in, instead\n> of the whole arm_smccc_res\n> * Made all the locking WARN_ON()s lockdep_assert_held()s.\n> * Moved more messages from 'err' to 'warn'.\n> * Made IS_SDEI_CALL() not depend on whether the config option is selected.\n> * Made 'event failed' messages rate limited.\n> \n> drivers/firmware/Kconfig | 7 +\n> drivers/firmware/Makefile | 1 +\n> drivers/firmware/arm_sdei.c | 616 ++++++++++++++++++++++++++++++++++++++++++++\n> include/linux/sdei.h | 100 +++++++\n> include/uapi/linux/sdei.h | 91 +++++++\n> 5 files changed, 815 insertions(+)\n> create mode 100644 drivers/firmware/arm_sdei.c\n> create mode 100644 include/linux/sdei.h\n> create mode 100644 include/uapi/linux/sdei.h\n\nI haven't reviewed this patch (yet...). However, I think it's worth\nadding a MAINTAINERS entry with your name on it (unless you really want\nto distance yourself from this code once merged ;)).\n\nThanks.","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"MiHuUren\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yDBx56Sq6z9t2c\n\tfor ;\n\tSat, 14 Oct 2017 02:49:45 +1100 (AEDT)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e32DW-0005xi-Qd; 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bh=HWagsxmjYxp/rsyr1irbMlMecLdi8ORHTnnzJ7gp79o=;\n\tb=MiHuUreng47sGt\n\t2biqlhM+Sp6GQlxScq/ZkGw7sPLyiv9kNW3akWF2LiUO/fZ96I6d0qzlQSCXE+4d9OYHv3TVBs/sZ\n\tPb40+engkd+N5CmMIlpF88xCUUcpFZ4AuHvES+2DXY08WRf9V1Ysj4b6Pp0Abtaepbeo9pVgA05Kc\n\ticHRfSduLBVBOYY3CnmvYAciLs070sauNB1ssWv+byuT8qZV4830uTpE5hqYWlAjRYwgGwxpP3wt7\n\t4W47mL67BOiUlE2RbyUZQMgnyu4W3oJiNLZ7Jqm193TBQAEHyFBsakXpJAiNyGt+xJJxY50IuA4EY\n\tD/yX3997tk6SrUWLfyPQ==;","Date":"Fri, 13 Oct 2017 16:49:14 +0100","From":"Catalin Marinas ","To":"James Morse ","Subject":"Re: [PATCH v3 07/13] firmware: arm_sdei: Add driver for Software\n\tDelegated Exceptions","Message-ID":"<20171013154914.ktxecc6zobh7fmr6@armageddon.cambridge.arm.com>","References":"<20170922182614.27885-1-james.morse@arm.com>\n\t<20170922182614.27885-8-james.morse@arm.com>","MIME-Version":"1.0","Content-Disposition":"inline","In-Reply-To":"<20170922182614.27885-8-james.morse@arm.com>","User-Agent":"NeoMutt/20170113 (1.7.2)","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20171013_084939_289206_0D7E49B1 ","X-CRM114-Status":"GOOD ( 17.63 )","X-Spam-Score":"-6.9 (------)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-6.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/,\n\thigh trust [217.140.101.70 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Mark Rutland , devicetree@vger.kernel.org,\n\tLorenzo Pieralisi ,\n\tMarc Zyngier , Will Deacon ,\n\tChristoffer Dall ,\n\tRob Herring , Loc Ho ,\n\tkvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1786469,"web_url":"http://patchwork.ozlabs.org/comment/1786469/","msgid":"<59E0EEE5.2020208@arm.com>","list_archive_url":null,"date":"2017-10-13T16:50:45","subject":"Re: [PATCH v3 04/13] arm64: alternatives: use tpidr_el2 on VHE hosts","submitter":{"id":66575,"url":"http://patchwork.ozlabs.org/api/people/66575/","name":"James Morse","email":"james.morse@arm.com"},"content":"Hi Catalin,\n\nOn 13/10/17 16:31, Catalin Marinas wrote:\n> On Fri, Sep 22, 2017 at 07:26:05PM +0100, James Morse wrote:\n>> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c\n>> index cd52d365d1f0..8e4c7da2b126 100644\n>> --- a/arch/arm64/kernel/cpufeature.c\n>> +++ b/arch/arm64/kernel/cpufeature.c\n\n>> @@ -1308,3 +1309,25 @@ static int __init enable_mrs_emulation(void)\n>> }\n>> \n>> late_initcall(enable_mrs_emulation);\n>> +\n>> +int cpu_copy_el2regs(void *__unused)\n>> +{\n>> +\tint do_copyregs = 0;\n>> +\n>> +\t/*\n>> +\t * Copy register values that aren't redirected by hardware.\n>> +\t *\n>> +\t * Before code patching, we only set tpidr_el1, all CPUs need to copy\n>> +\t * this value to tpidr_el2 before we patch the code. Once we've done\n>> +\t * that, freshly-onlined CPUs will set tpidr_el2, so we don't need to\n>> +\t * do anything here.\n>> +\t */\n>> +\tasm volatile(ALTERNATIVE(\"mov %0, #1\", \"mov %0, #0\",\n>> +\t\t\t\t ARM64_HAS_VIRT_HOST_EXTN)\n>> +\t\t : \"=r\" (do_copyregs) : : );\n> \n> Can you just do:\n> \n> \tif (cpu_have_const_cap(ARM64_HAS_VIRT_HOST_EXTN))\n> \t\twrite_sysreg(read_sysreg(tpidr_el1), tpidr_el2);\n> \n> At this point the capability bits should be set and the jump labels\n> enabled.\n\nThese are enabled too early, we haven't done patching yet.\n\nWe need to copy tpidr_el1 -> tpidr_el2 on all CPUs that are online before code\npatching.\n\nAfter code patching new CPUs set tpidr_el2 when they come online, so we don't\nneed to do the copy... but this enable method is still called. There is nothing\nfor us to do, and tpidr_el1 now contains junk, so the copy\n\n\ncpu_have_const_cap() is great for knowing if we have a feature, here we want to\nknow if we've done the patching for this feature.\n\nI can wrap the ALTERNATIVE() into a helper, something like:\n> arm64_alternatives_applied(ARM64_HAS_VIRT_HOST_EXTN)\n\nwhich should make it clearer.\n\nChristoffer had the same question at connect, so I evidently haven't found the\nright way of describing this yet.\n\n\n> Otherwise:\n> \n> Reviewed-by: Catalin Marinas \n\nThanks for taking a look, I'll leave this RB until your happy with the\nALTERNATIVE() hackery above.\n\n\nJames","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; 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Linux x86_64;\n\trv:31.0) Gecko/20100101 Icedove/31.6.0","MIME-Version":"1.0","To":"Catalin Marinas ","Subject":"Re: [PATCH v3 04/13] arm64: alternatives: use tpidr_el2 on VHE hosts","References":"<20170922182614.27885-1-james.morse@arm.com>\n\t<20170922182614.27885-5-james.morse@arm.com>\n\t<20171013153148.dnejsvhxeui6opfw@armageddon.cambridge.arm.com>","In-Reply-To":"<20171013153148.dnejsvhxeui6opfw@armageddon.cambridge.arm.com>","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20171013_175245_186925_355496F6 ","X-CRM114-Status":"GOOD ( 20.39 )","X-Spam-Score":"-6.9 (------)","X-Spam-Report":"SpamAssassin version 3.4.1 on casper.infradead.org summary:\n\tContent analysis details: (-6.9 points, 5.0 required)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/,\n\thigh trust [217.140.101.70 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Mark Rutland , devicetree@vger.kernel.org,\n\tLorenzo Pieralisi ,\n\tMarc Zyngier , Will Deacon ,\n\tChristoffer Dall ,\n\tRob Herring , Loc Ho ,\n\tkvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1787321,"web_url":"http://patchwork.ozlabs.org/comment/1787321/","msgid":"<20171016101736.fkaikxflyc46zczf@armageddon.cambridge.arm.com>","list_archive_url":null,"date":"2017-10-16T10:17:37","subject":"Re: [PATCH v3 04/13] arm64: alternatives: use tpidr_el2 on VHE hosts","submitter":{"id":938,"url":"http://patchwork.ozlabs.org/api/people/938/","name":"Catalin Marinas","email":"catalin.marinas@arm.com"},"content":"On Fri, Sep 22, 2017 at 07:26:05PM +0100, James Morse wrote:\n> diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h\n> index 29adab8138c3..8f2d0f7d193b 100644\n> --- a/arch/arm64/include/asm/processor.h\n> +++ b/arch/arm64/include/asm/processor.h\n> @@ -193,5 +193,6 @@ static inline void spin_lock_prefetch(const void *ptr)\n> \n> int cpu_enable_pan(void *__unused);\n> int cpu_enable_cache_maint_trap(void *__unused);\n> +int cpu_copy_el2regs(void *__unused);\n> \n> #endif /* __ASM_PROCESSOR_H */\n> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c\n> index cd52d365d1f0..8e4c7da2b126 100644\n> --- a/arch/arm64/kernel/cpufeature.c\n> +++ b/arch/arm64/kernel/cpufeature.c\n[...]\n> +int cpu_copy_el2regs(void *__unused)\n\nCan this be static? I couldn't find it used anywhere else apart from\ncpufeature.c","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org header.b=\"j4tVPC3f\"; \n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=infradead.org header.i=@infradead.org\n\theader.b=\"NMxrWyKF\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yFvYc4tm5z9s7B\n\tfor ;\n\tMon, 16 Oct 2017 21:23:48 +1100 (AEDT)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e42Yj-0003C9-EB; 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h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:\n\tMessage-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=5M0O4eNe/i/ot9JczrQvTHfCzMr/tRprVJypnImBCoc=;\n\tb=j4tVPC3f7gpfUA\n\tcC2fJE2hUQLTVB+QFIrdyaHqwp4aNra+FPIiye2329/3J9C9x2Zj2l8JD0tt/Msa5suYVM9Vxqjpa\n\tWZDerqbt2Y+75bVV91OXYP2tObYNRM0dyCJCNkQF1Rq7GbmaEvrcYf1AQqxQivfAJ9MIizygp6PaJ\n\tbqbPeYMRJRQZDHI8QGjMSFp8jvZOU5GWghung/GXdTIyEJUVn3oqO36d3b6+r6xscMpn4oqpnGdEG\n\tVH9ROQ55fad9jGk7zcGcxTMH1vj4zz4T8iMv1Kj5eqW2Ds/hKGtsX0143P8vxt1XOih+Tr1D0hCWa\n\tWkiWTryAtGSk36L2vM3Q==;","v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=infradead.org; s=casper.20170209;\n\th=In-Reply-To:Content-Type:MIME-Version:\n\tReferences:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To:\n\tContent-Transfer-Encoding:Content-ID:Content-Description:Resent-Date:\n\tResent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:\n\tList-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive;\n\tbh=mCThIyQsXBYK+ymys9kaze2EIPcs8GaFpG+IR7Xn26I=;\n\tb=NMxrWyKFgxYCzsLKjVAZgTpLn\n\ti21z5bxJQbi7oWpPb+XHjmpXqcwqRZLFUO6LzcPUg+iF297lI9xx/eDtFPALExfuhzUm6i0G1hzcF\n\tz5YqffTeYut9TQsrMmtl2XKUUUtN7MOoifp+OqdzoVmStI7BJalwt0icGIo1CBCt3VBB3RlND7zYz\n\twaUlillCAF1MkoYncH9TsAKfbPW+jh7Wa6irxa9lrF82J7Lwi4tOPgBGg8ahBjSb5cEAP69F6EFiJ\n\tAajDHp5DTmKpB3tWssExGFQOvFIDU3WPEOTmsvQ13gsSSMqUP907Pcz5PzQgycfyEvZp4sbXtY/AH\n\t4/7EOnkrA==;"],"Date":"Mon, 16 Oct 2017 11:17:37 +0100","From":"Catalin Marinas ","To":"James Morse ","Subject":"Re: [PATCH v3 04/13] arm64: alternatives: use tpidr_el2 on VHE hosts","Message-ID":"<20171016101736.fkaikxflyc46zczf@armageddon.cambridge.arm.com>","References":"<20170922182614.27885-1-james.morse@arm.com>\n\t<20170922182614.27885-5-james.morse@arm.com>","MIME-Version":"1.0","Content-Disposition":"inline","In-Reply-To":"<20170922182614.27885-5-james.morse@arm.com>","User-Agent":"NeoMutt/20170113 (1.7.2)","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20171016_111803_404460_04A5AB1D ","X-CRM114-Status":"UNSURE ( 9.36 )","X-CRM114-Notice":"Please train this message.","X-Spam-Score":"-6.9 (------)","X-Spam-Report":"SpamAssassin version 3.4.1 on casper.infradead.org summary:\n\tContent analysis details: (-6.9 points, 5.0 required)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/,\n\thigh trust [217.140.101.70 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Mark Rutland , devicetree@vger.kernel.org,\n\tLorenzo Pieralisi ,\n\tMarc Zyngier , Will Deacon ,\n\tChristoffer Dall ,\n\tRob Herring , Loc Ho ,\n\tkvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1787439,"web_url":"http://patchwork.ozlabs.org/comment/1787439/","msgid":"<20171016134139.sqe6xabdson2d5rd@armageddon.cambridge.arm.com>","list_archive_url":null,"date":"2017-10-16T13:41:39","subject":"Re: [PATCH v3 09/13] arm64: kernel: Add arch-specific SDEI entry\n\tcode and CPU masking","submitter":{"id":938,"url":"http://patchwork.ozlabs.org/api/people/938/","name":"Catalin Marinas","email":"catalin.marinas@arm.com"},"content":"On Fri, Sep 22, 2017 at 07:26:10PM +0100, James Morse wrote:\n> diff --git a/arch/arm64/include/asm/sdei.h b/arch/arm64/include/asm/sdei.h\n> new file mode 100644\n> index 000000000000..ed329e01a301\n> --- /dev/null\n> +++ b/arch/arm64/include/asm/sdei.h\n> @@ -0,0 +1,63 @@\n> +/*\n> + * Copyright (C) 2017 ARM Ltd.\n> + *\n> + * This program is free software; you can redistribute it and/or modify\n> + * it under the terms of the GNU General Public License version 2 as\n> + * published by the Free Software Foundation.\n> + *\n> + * This program is distributed in the hope that it will be useful,\n> + * but WITHOUT ANY WARRANTY; without even the implied warranty of\n> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n> + * GNU General Public License for more details.\n> + *\n> + * You should have received a copy of the GNU General Public License\n> + * along with this program. If not, see .\n> + */\n> +#ifndef __ASM_SDEI_H\n> +#define __ASM_SDEI_H\n> +\n> +/* Values for sdei_exit_mode */\n> +#define SDEI_EXIT_HVC 0\n> +#define SDEI_EXIT_SMC 1\n> +\n> +#define SDEI_STACK_SIZE\t\tIRQ_STACK_SIZE\n> +\n> +#ifndef __ASSEMBLY__\n> +\n> +#include \n> +#include \n> +\n> +#include \n> +\n> +extern unsigned long sdei_exit_mode;\n> +\n> +/* Software Delegated Exception entry point from firmware*/\n> +asmlinkage void __sdei_asm_handler(unsigned long event_num, unsigned long arg,\n> +\t\t\t\t unsigned long pc, unsigned long pstate);\n> +\n> +/*\n> + * The above entry point does the minimum to call C code. This function does\n> + * anything else, before calling the driver.\n> + */\n> +struct sdei_registered_event;\n> +asmlinkage unsigned long __sdei_handler(struct pt_regs *regs,\n> +\t\t\t\t\tstruct sdei_registered_event *arg);\n> +\n> +extern unsigned long sdei_arch_get_entry_point(int conduit);\n\nNitpick: drop the \"extern\" here.\n\n> diff --git a/arch/arm64/kernel/sdei-entry.S b/arch/arm64/kernel/sdei-entry.S\n> new file mode 100644\n> index 000000000000..cf12f8da0789\n> --- /dev/null\n> +++ b/arch/arm64/kernel/sdei-entry.S\n> @@ -0,0 +1,122 @@\n> +/*\n> + * Software Delegated Exception entry point from firmware to the kernel.\n> + *\n> + * Copyright (C) 2017 ARM Ltd.\n> + *\n> + * This program is free software; you can redistribute it and/or modify\n> + * it under the terms of the GNU General Public License version 2 as\n> + * published by the Free Software Foundation.\n> + *\n> + * This program is distributed in the hope that it will be useful,\n> + * but WITHOUT ANY WARRANTY; without even the implied warranty of\n> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n> + * GNU General Public License for more details.\n> + *\n> + * You should have received a copy of the GNU General Public License\n> + * along with this program. If not, see .\n> + */\n> +\n> +#include \n> +\n> +#include \n> +#include \n> +#include \n> +#include \n> +#include \n> +#include \n> +#include \n> +\n> +/*\n> + * Software Delegated Exception entry point.\n> + *\n> + * x0: Event number\n\nCurrently the only event number is 0. Shall we plan for having other\nevents in the future or we just ignore this argument?\n\n> + * x1: struct sdei_registered_event argument from registration time.\n> + * x2: interrupted PC\n> + * x3: interrupted PSTATE\n[...]\n> +/*\n> + * __sdei_handler() returns one of:\n> + * SDEI_EV_HANDLED - success, return to the interrupted context.\n> + * SDEI_EV_FAILED - failure, return this error code to firmare.\n> + * virtual-address - success, return to this address.\n> + */\n> +static __kprobes unsigned long _sdei_handler(struct pt_regs *regs,\n> +\t\t\t\t\t struct sdei_registered_event *arg)\n> +{\n> +\tu32 mode;\n> +\tint i, err = 0;\n> +\tint clobbered_registers = 4;\n\nMaybe const int here if you want to avoid magic numbers in the 'for'\nloop below. Otherwise it looks like some variable you intend to modify\nin this function.\n\n> +\tu64 elr = read_sysreg(elr_el1);\n> +\tu32 kernel_mode = read_sysreg(CurrentEL) | 1;\t/* +SPSel */\n> +\tunsigned long vbar = read_sysreg(vbar_el1);\n> +\n> +\t/* Retrieve the missing registers values */\n> +\tfor (i = 0; i < clobbered_registers; i++) {\n> +\t\t/* from within the handler, this call always succeeds */\n> +\t\tsdei_api_event_context(i, ®s->regs[i]);\n> +\t}\n> +\n> +\t/*\n> +\t * We didn't take an exception to get here, set PAN. UAO will be cleared\n> +\t * by sdei_event_handler()s set_fs(USER_DS) call.\n> +\t */\n> +\tasm(ALTERNATIVE(\"nop\", SET_PSTATE_PAN(1), ARM64_HAS_PAN,\n> +\t\t\tCONFIG_ARM64_PAN));\n\nCan you use uaccess_disable() directly?\n\n> diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig\n> index d8a9859f6102..1f6633b337aa 100644\n> --- a/drivers/firmware/Kconfig\n> +++ b/drivers/firmware/Kconfig\n> @@ -50,6 +50,7 @@ config ARM_SCPI_POWER_DOMAIN\n> \n> config ARM_SDE_INTERFACE\n> \tbool \"ARM Software Delegated Exception Interface (SDEI)\"\n> +\tdepends on ARM64\n> \thelp\n> \t The Software Delegated Exception Interface (SDEI) is an ARM\n> \t standard for registering callbacks from the platform firmware\n> diff --git a/drivers/firmware/arm_sdei.c b/drivers/firmware/arm_sdei.c\n> index 4b3c7fd99c34..3ea6a19ae439 100644\n> --- a/drivers/firmware/arm_sdei.c\n> +++ b/drivers/firmware/arm_sdei.c\n> @@ -154,6 +154,7 @@ int sdei_api_event_context(u32 query, u64 *result)\n> \treturn invoke_sdei_fn(SDEI_1_0_FN_SDEI_EVENT_CONTEXT, query, 0, 0, 0, 0,\n> \t\t\t result);\n> }\n> +NOKPROBE_SYMBOL(sdei_api_event_context);\n\nShould this be part of the patch introducing arm_sdei.c?\n\n> \n> static int sdei_api_event_get_info(u32 event, u32 info, u64 *result)\n> {\n> diff --git a/include/linux/sdei.h b/include/linux/sdei.h\n> index bb3dd000771e..df3fe6373e32 100644\n> --- a/include/linux/sdei.h\n> +++ b/include/linux/sdei.h\n> @@ -32,6 +32,8 @@ enum sdei_conduit_types {\n> \tCONDUIT_HVC,\n> };\n> \n> +#include \n> +\n> /* Arch code should override this to set the entry point from firmware... */\n> #ifndef sdei_arch_get_entry_point\n> #define sdei_arch_get_entry_point(conduit)\t(0)\n\nSame here. This should not be built before the Kconfig change anyway.","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"cFlHJGAO\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yFzyg2zqQz9t3R\n\tfor ;\n\tTue, 17 Oct 2017 00:42:14 +1100 (AEDT)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e45ek-00013o-B5; Mon, 16 Oct 2017 13:42:10 +0000","from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]\n\thelo=foss.arm.com)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e45ee-0000uJ-PH for linux-arm-kernel@lists.infradead.org;\n\tMon, 16 Oct 2017 13:42:07 +0000","from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249])\n\tby usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5DC4D1529;\n\tMon, 16 Oct 2017 06:41:44 -0700 (PDT)","from armageddon.cambridge.arm.com (armageddon.cambridge.arm.com\n\t[10.1.206.84])\n\tby usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id\n\t6CEA53F590; Mon, 16 Oct 2017 06:41:42 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:\n\tMessage-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=CoUpbjJ+U5Sawf1qhPdK5jYJaV8yFgGix8hNBxEhTY8=;\n\tb=cFlHJGAOMoV/z0\n\tlcAmDJXslSbH1FATpLWCdd1/SU/UscSg9a25TewhNRHN+/Ie1jzZ59zEEbDheDB3vcLeqaiftvMjF\n\tv2TBR3NI28AW4IuVdCInqTwEzCMfr2Y7LoheKKvlmojxfS463qqC5NGS9umNKcKgx9PfQq5/NZbgj\n\t/3a2595e9lWR4tVEz54YwX7HM0kSLCHIiu0x+ss+UQ5LI8Uu2GG8za12d2HglxOSoSjBcRG7hrOgM\n\tivDRmtm9R7uJvkdid39YTPQWornCBzBaSg8qH4XI3zt8+ASEoABPIVq8m/+SlYEEssGsTXsj4Rjmr\n\tk8tA15I/UZbkgZgSoNgg==;","Date":"Mon, 16 Oct 2017 14:41:39 +0100","From":"Catalin Marinas ","To":"James Morse ","Subject":"Re: [PATCH v3 09/13] arm64: kernel: Add arch-specific SDEI entry\n\tcode and CPU masking","Message-ID":"<20171016134139.sqe6xabdson2d5rd@armageddon.cambridge.arm.com>","References":"<20170922182614.27885-1-james.morse@arm.com>\n\t<20170922182614.27885-10-james.morse@arm.com>","MIME-Version":"1.0","Content-Disposition":"inline","In-Reply-To":"<20170922182614.27885-10-james.morse@arm.com>","User-Agent":"NeoMutt/20170113 (1.7.2)","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20171016_064204_844964_AF84B621 ","X-CRM114-Status":"GOOD ( 23.62 )","X-Spam-Score":"-6.9 (------)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-6.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/,\n\thigh trust [217.140.101.70 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Mark Rutland , devicetree@vger.kernel.org,\n\tLorenzo Pieralisi ,\n\tMarc Zyngier , Will Deacon ,\n\tChristoffer Dall ,\n\tRob Herring , Loc Ho ,\n\tkvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1787449,"web_url":"http://patchwork.ozlabs.org/comment/1787449/","msgid":"<20171016135204.ncz6fzw5gh3gv57c@armageddon.cambridge.arm.com>","list_archive_url":null,"date":"2017-10-16T13:52:05","subject":"Re: [PATCH v3 10/13] firmware: arm_sdei: Add support for CPU and\n\tsystem power states","submitter":{"id":938,"url":"http://patchwork.ozlabs.org/api/people/938/","name":"Catalin Marinas","email":"catalin.marinas@arm.com"},"content":"On Fri, Sep 22, 2017 at 07:26:11PM +0100, James Morse wrote:\n> diff --git a/include/linux/cpuhotplug.h b/include/linux/cpuhotplug.h\n> index f24bfb2b9a2d..466b949474df 100644\n> --- a/include/linux/cpuhotplug.h\n> +++ b/include/linux/cpuhotplug.h\n> @@ -88,6 +88,7 @@ enum cpuhp_state {\n> \tCPUHP_AP_PERF_XTENSA_STARTING,\n> \tCPUHP_AP_PERF_METAG_STARTING,\n> \tCPUHP_AP_MIPS_OP_LOONGSON3_STARTING,\n> +\tCPUHP_AP_SDEI_STARTING,\n\nNitpick: how generic is this as to apply to other architectures?\nProbably not, so shall we prefix this with ARM_?\n\nNot actually a strong preferences but similar question for the\ndefinitions in the sdei.h files (and maybe the filenames themselves).","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"RQJHPoSe\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yG0Bc3FL1z9sPk\n\tfor ;\n\tTue, 17 Oct 2017 00:52:40 +1100 (AEDT)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e45oo-0001yv-PI; Mon, 16 Oct 2017 13:52:34 +0000","from foss.arm.com ([217.140.101.70])\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e45ok-0001rX-9b for linux-arm-kernel@lists.infradead.org;\n\tMon, 16 Oct 2017 13:52:31 +0000","from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249])\n\tby usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 744671529;\n\tMon, 16 Oct 2017 06:52:09 -0700 (PDT)","from armageddon.cambridge.arm.com (armageddon.cambridge.arm.com\n\t[10.1.206.84])\n\tby usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id\n\t858393F590; Mon, 16 Oct 2017 06:52:07 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:\n\tMessage-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=U2LF6aFfPb3qw7GXPMIXDF8CocrC2xLYa8f1xATr9F0=;\n\tb=RQJHPoSeRYvzLZ\n\thEzQOCVuU+ivZ1lJ853DtB1m9HGKZmR9Xy/M36HWssojdDOUPigYgMC5GSSNpmmxOugNQSNILcUZX\n\tz1gDoJkpbtGIUl+337y7PonaAZ9H43z8jXgqqgawkTq4dPazqiWmSfRT5tO0NT77Xqi0d6RjkaGUv\n\thBjC8P2X/iArOLiLRUgwC+PvW8R7S8ZCbfspyXaANRoHzy3zlwrN5owg5sTOV1yI1oBdzg9+9chTV\n\thNlHtIKOMXU8QZtHtFC02hMVR40RA/EwUkkV5bhCksMmnRYBUPCiA5r9WAhNe2HGoHcyg0Fch6bsH\n\twCw6Yy92CnujbltVuK3Q==;","Date":"Mon, 16 Oct 2017 14:52:05 +0100","From":"Catalin Marinas ","To":"James Morse ","Subject":"Re: [PATCH v3 10/13] firmware: arm_sdei: Add support for CPU and\n\tsystem power states","Message-ID":"<20171016135204.ncz6fzw5gh3gv57c@armageddon.cambridge.arm.com>","References":"<20170922182614.27885-1-james.morse@arm.com>\n\t<20170922182614.27885-11-james.morse@arm.com>","MIME-Version":"1.0","Content-Disposition":"inline","In-Reply-To":"<20170922182614.27885-11-james.morse@arm.com>","User-Agent":"NeoMutt/20170113 (1.7.2)","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20171016_065230_370346_70CA116D ","X-CRM114-Status":"UNSURE ( 9.28 )","X-CRM114-Notice":"Please train this message.","X-Spam-Score":"-6.9 (------)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-6.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/,\n\thigh trust [217.140.101.70 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Mark Rutland , devicetree@vger.kernel.org,\n\tLorenzo Pieralisi ,\n\tMarc Zyngier , Will Deacon ,\n\tChristoffer Dall ,\n\tRob Herring , Loc Ho ,\n\tkvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1788638,"web_url":"http://patchwork.ozlabs.org/comment/1788638/","msgid":"<59E63105.9080804@arm.com>","list_archive_url":null,"date":"2017-10-17T16:34:13","subject":"Re: [PATCH v3 09/13] arm64: kernel: Add arch-specific SDEI entry\n\tcode and CPU masking","submitter":{"id":66575,"url":"http://patchwork.ozlabs.org/api/people/66575/","name":"James Morse","email":"james.morse@arm.com"},"content":"Hi Catalin,\n\nOn 16/10/17 14:41, Catalin Marinas wrote:\n> On Fri, Sep 22, 2017 at 07:26:10PM +0100, James Morse wrote:\n>> diff --git a/arch/arm64/kernel/sdei-entry.S b/arch/arm64/kernel/sdei-entry.S\n>> new file mode 100644\n>> index 000000000000..cf12f8da0789\n>> --- /dev/null\n>> +++ b/arch/arm64/kernel/sdei-entry.S\n>> @@ -0,0 +1,122 @@\n>> +/*\n>> + * Software Delegated Exception entry point from firmware to the kernel.\n>> + *\n>> + * Copyright (C) 2017 ARM Ltd.\n>> + *\n>> + * This program is free software; you can redistribute it and/or modify\n>> + * it under the terms of the GNU General Public License version 2 as\n>> + * published by the Free Software Foundation.\n>> + *\n>> + * This program is distributed in the hope that it will be useful,\n>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of\n>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n>> + * GNU General Public License for more details.\n>> + *\n>> + * You should have received a copy of the GNU General Public License\n>> + * along with this program. If not, see .\n>> + */\n>> +\n>> +#include \n>> +\n>> +#include \n>> +#include \n>> +#include \n>> +#include \n>> +#include \n>> +#include \n>> +#include \n>> +\n>> +/*\n>> + * Software Delegated Exception entry point.\n>> + *\n>> + * x0: Event number\n> \n> Currently the only event number is 0. Shall we plan for having other\n> events in the future or we just ignore this argument?\n\n'0' is the only event number specified by the SDEI specification. For use with\nRAS the event number is read from the HEST. (and there may me more than one of\nthem).\n\n\n\n>> + * x1: struct sdei_registered_event argument from registration time.\n>> + * x2: interrupted PC\n>> + * x3: interrupted PSTATE\n> [...]\n>> +/*\n>> + * __sdei_handler() returns one of:\n>> + * SDEI_EV_HANDLED - success, return to the interrupted context.\n>> + * SDEI_EV_FAILED - failure, return this error code to firmare.\n>> + * virtual-address - success, return to this address.\n>> + */\n>> +static __kprobes unsigned long _sdei_handler(struct pt_regs *regs,\n>> +\t\t\t\t\t struct sdei_registered_event *arg)\n>> +{\n>> +\tu32 mode;\n>> +\tint i, err = 0;\n>> +\tint clobbered_registers = 4;\n\n> Maybe const int here if you want to avoid magic numbers in the 'for'\n> loop below. Otherwise it looks like some variable you intend to modify\n> in this function.\n\nSure.\n\n(this was modified in my various attempts to get this working on non-vhe systems\nwith KVM).\n\n\n>> +\tu64 elr = read_sysreg(elr_el1);\n>> +\tu32 kernel_mode = read_sysreg(CurrentEL) | 1;\t/* +SPSel */\n>> +\tunsigned long vbar = read_sysreg(vbar_el1);\n>> +\n>> +\t/* Retrieve the missing registers values */\n>> +\tfor (i = 0; i < clobbered_registers; i++) {\n>> +\t\t/* from within the handler, this call always succeeds */\n>> +\t\tsdei_api_event_context(i, ®s->regs[i]);\n>> +\t}\n>> +\n>> +\t/*\n>> +\t * We didn't take an exception to get here, set PAN. UAO will be cleared\n>> +\t * by sdei_event_handler()s set_fs(USER_DS) call.\n>> +\t */\n>> +\tasm(ALTERNATIVE(\"nop\", SET_PSTATE_PAN(1), ARM64_HAS_PAN,\n>> +\t\t\tCONFIG_ARM64_PAN));\n\n> Can you use uaccess_disable() directly?\n\nWouldn't this invoke sw-pan's __uaccess_ttbr0_disable():\n> write_sysreg(ttbr, ttbr0_el1);\n\nProbing depends on VHE if booted at EL2, can we guarantee to have PAN (and\ntherefore not-SW-PAN) too?\n\n(otherwise I can add 'depends on !ARM64_SW_TTBR0_PAN' to the Kconfig)\n\n\n>> diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig\n>> index d8a9859f6102..1f6633b337aa 100644\n>> --- a/drivers/firmware/Kconfig\n>> +++ b/drivers/firmware/Kconfig\n>> @@ -50,6 +50,7 @@ config ARM_SCPI_POWER_DOMAIN\n>> \n>> config ARM_SDE_INTERFACE\n>> \tbool \"ARM Software Delegated Exception Interface (SDEI)\"\n>> +\tdepends on ARM64\n>> \thelp\n>> \t The Software Delegated Exception Interface (SDEI) is an ARM\n>> \t standard for registering callbacks from the platform firmware\n>> diff --git a/drivers/firmware/arm_sdei.c b/drivers/firmware/arm_sdei.c\n>> index 4b3c7fd99c34..3ea6a19ae439 100644\n>> --- a/drivers/firmware/arm_sdei.c\n>> +++ b/drivers/firmware/arm_sdei.c\n>> @@ -154,6 +154,7 @@ int sdei_api_event_context(u32 query, u64 *result)\n>> \treturn invoke_sdei_fn(SDEI_1_0_FN_SDEI_EVENT_CONTEXT, query, 0, 0, 0, 0,\n>> \t\t\t result);\n>> }\n>> +NOKPROBE_SYMBOL(sdei_api_event_context);\n\n> Should this be part of the patch introducing arm_sdei.c?\n\nYes.\n\n\n>> static int sdei_api_event_get_info(u32 event, u32 info, u64 *result)\n>> {\n>> diff --git a/include/linux/sdei.h b/include/linux/sdei.h\n>> index bb3dd000771e..df3fe6373e32 100644\n>> --- a/include/linux/sdei.h\n>> +++ b/include/linux/sdei.h\n>> @@ -32,6 +32,8 @@ enum sdei_conduit_types {\n>> \tCONDUIT_HVC,\n>> };\n>> \n>> +#include \n>> +\n>> /* Arch code should override this to set the entry point from firmware... */\n>> #ifndef sdei_arch_get_entry_point\n>> #define sdei_arch_get_entry_point(conduit)\t(0)\n> \n> Same here. This should not be built before the Kconfig change anyway.\n\n(I've been building this on x86 to check I'd not done anything arm64 specific\noutside the arch code...)\n\nSure, I'll move this hunk and the Kconfig create a place holder asm/sdei.h in\nthe earlier patch.\n\n\nThanks,\n\nJames","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"X++30Axo\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yGgn04fsxz9t2Z\n\tfor ;\n\tWed, 18 Oct 2017 03:36:20 +1100 (AEDT)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e4Uqn-0000ra-DX; Tue, 17 Oct 2017 16:36:17 +0000","from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]\n\thelo=foss.arm.com)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e4Uqj-0000nD-6a for linux-arm-kernel@lists.infradead.org;\n\tTue, 17 Oct 2017 16:36:15 +0000","from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249])\n\tby usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id EA574F;\n\tTue, 17 Oct 2017 09:35:52 -0700 (PDT)","from [10.1.207.55] (melchizedek.cambridge.arm.com [10.1.207.55])\n\tby usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id\n\t28BCF3F590; Tue, 17 Oct 2017 09:35:51 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:In-Reply-To:References:Subject:To:\n\tMIME-Version:From:Date:Message-ID:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=/exKeJeCSKpA6pArtmGmkqlB4PAxFQSw43GIrC3Lxeg=;\n\tb=X++30AxoCahHIE\n\t8w+JoBj5+OfICmIoAmP3MRf8UGkaFl3umQ3QShq4fu9uDpov/Lbr78gdHnTPvdLa1RSvwgtV9K3wB\n\tBYKhVjV1MQ8PKcwzRkqWG3H+TtdgSs6QGXt+zBWuEC1NJhT0e2ATcZ/L4DYyxIh8FlWi3ZrtQE1jB\n\t8TviYtNq24NBW4LeSxwNV8tILjMX9PETZXFB6ZHquwtuepRM3AYKZqRY6fViSUogR7nQnaX9+KhZh\n\t8PjK+QfC+8wBdKDFG1Ue+5lWSME16Dp+iVJtX4VaktdGX7ryyxqybzPxve8oz45rb2GgC0H5CLGC9\n\tLy9mzdWSQ1Q+By3evaKA==;","Message-ID":"<59E63105.9080804@arm.com>","Date":"Tue, 17 Oct 2017 17:34:13 +0100","From":"James Morse ","User-Agent":"Mozilla/5.0 (X11; Linux x86_64;\n\trv:31.0) Gecko/20100101 Icedove/31.6.0","MIME-Version":"1.0","To":"Catalin Marinas ","Subject":"Re: [PATCH v3 09/13] arm64: kernel: Add arch-specific SDEI entry\n\tcode and CPU masking","References":"<20170922182614.27885-1-james.morse@arm.com>\n\t<20170922182614.27885-10-james.morse@arm.com>\n\t<20171016134139.sqe6xabdson2d5rd@armageddon.cambridge.arm.com>","In-Reply-To":"<20171016134139.sqe6xabdson2d5rd@armageddon.cambridge.arm.com>","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20171017_093613_324178_EE890B93 ","X-CRM114-Status":"GOOD ( 22.49 )","X-Spam-Score":"-6.9 (------)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-6.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/,\n\thigh trust [217.140.101.70 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Mark Rutland , devicetree@vger.kernel.org,\n\tLorenzo Pieralisi ,\n\tMarc Zyngier , Will Deacon ,\n\tChristoffer Dall ,\n\tRob Herring , Loc Ho ,\n\tkvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1788639,"web_url":"http://patchwork.ozlabs.org/comment/1788639/","msgid":"<59E6311E.7030406@arm.com>","list_archive_url":null,"date":"2017-10-17T16:34:38","subject":"Re: [PATCH v3 10/13] firmware: arm_sdei: Add support for CPU and\n\tsystem power states","submitter":{"id":66575,"url":"http://patchwork.ozlabs.org/api/people/66575/","name":"James Morse","email":"james.morse@arm.com"},"content":"Hi Catalin,\n\nOn 16/10/17 14:52, Catalin Marinas wrote:\n> On Fri, Sep 22, 2017 at 07:26:11PM +0100, James Morse wrote:\n>> diff --git a/include/linux/cpuhotplug.h b/include/linux/cpuhotplug.h\n>> index f24bfb2b9a2d..466b949474df 100644\n>> --- a/include/linux/cpuhotplug.h\n>> +++ b/include/linux/cpuhotplug.h\n>> @@ -88,6 +88,7 @@ enum cpuhp_state {\n>> \tCPUHP_AP_PERF_XTENSA_STARTING,\n>> \tCPUHP_AP_PERF_METAG_STARTING,\n>> \tCPUHP_AP_MIPS_OP_LOONGSON3_STARTING,\n>> +\tCPUHP_AP_SDEI_STARTING,\n> \n> Nitpick: how generic is this as to apply to other architectures?\n> Probably not, so shall we prefix this with ARM_?\n\nThis may get used on 32bit ARM. I blindly copied PSCI, which doesn't have a\nprefix. But it makes sense to have one.\n\n\n> Not actually a strong preferences but similar question for the\n> definitions in the sdei.h files (and maybe the filenames themselves).\n\n\nThanks,\n\nJames","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"UTZuvYzu\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yGgnc5FTVz9t2Z\n\tfor ;\n\tWed, 18 Oct 2017 03:36:52 +1100 (AEDT)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e4UrI-0001GB-Bo; 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bh=YkUDjad6ilNog+hWEOPQRc5JlZa4O1Jr3OAlIBmpqX0=;\n\tb=UTZuvYzufRNSea\n\tW3Ss98Kff1brNh6fP+huuQb9UrFVYYKU+qt016SKElb2KHRJjwtY8pp7fprsbd1TXBGy4GQMmPn78\n\tzeZ0ZPSmotaMVZT2zMnP7/ipClQ0aM3kQ4EdWnOdZ62E2+RhSauIoiH+ZUT+YbOwl5PQSGwgrtKK9\n\tY8IyX75l+3JT3kWNC4+9I4yjdQ9uFzDHhPD1OeJXKo1JNVttDA89S2lrUChLTi34Py2SaRHIzlTUA\n\tuDyKeNnXqXwn88qTvZNPB3AoVyjKazLG0Yyzzj6KcMxfNWl11FHYZ4vNcIi/OpwQCDDIaSSiPoe15\n\tTIPzAD3SYMvl9PfYC3pg==;","Message-ID":"<59E6311E.7030406@arm.com>","Date":"Tue, 17 Oct 2017 17:34:38 +0100","From":"James Morse ","User-Agent":"Mozilla/5.0 (X11; Linux x86_64;\n\trv:31.0) Gecko/20100101 Icedove/31.6.0","MIME-Version":"1.0","To":"Catalin Marinas ","Subject":"Re: [PATCH v3 10/13] firmware: arm_sdei: Add support for CPU and\n\tsystem power states","References":"<20170922182614.27885-1-james.morse@arm.com>\n\t<20170922182614.27885-11-james.morse@arm.com>\n\t<20171016135204.ncz6fzw5gh3gv57c@armageddon.cambridge.arm.com>","In-Reply-To":"<20171016135204.ncz6fzw5gh3gv57c@armageddon.cambridge.arm.com>","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20171017_093638_282851_918E8CB0 ","X-CRM114-Status":"GOOD ( 12.49 )","X-Spam-Score":"-6.9 (------)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-6.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/,\n\thigh trust [217.140.101.70 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Mark Rutland , devicetree@vger.kernel.org,\n\tLorenzo Pieralisi ,\n\tMarc Zyngier , Will Deacon ,\n\tChristoffer Dall ,\n\tRob Herring , Loc Ho ,\n\tkvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1788640,"web_url":"http://patchwork.ozlabs.org/comment/1788640/","msgid":"<59E6310E.6080705@arm.com>","list_archive_url":null,"date":"2017-10-17T16:34:22","subject":"Re: [PATCH v3 08/13] arm64: Add vmap_stack header file","submitter":{"id":66575,"url":"http://patchwork.ozlabs.org/api/people/66575/","name":"James Morse","email":"james.morse@arm.com"},"content":"Hi Catalin,\n\nOn 13/10/17 16:42, Catalin Marinas wrote:\n> On Fri, Sep 22, 2017 at 07:26:09PM +0100, James Morse wrote:\n>> diff --git a/arch/arm64/include/asm/vmap_stack.h b/arch/arm64/include/asm/vmap_stack.h\n>> new file mode 100644\n>> index 000000000000..f41d043cac31\n>> --- /dev/null\n>> +++ b/arch/arm64/include/asm/vmap_stack.h\n>> @@ -0,0 +1,41 @@\n\n>> +#ifndef __ASM_VMAP_STACK_H\n>> +#define __ASM_VMAP_STACK_H\n>> +\n>> +#include \n>> +#include \n>> +#include \n>> +#include \n>> +\n>> +#ifdef CONFIG_VMAP_STACK\n>> +/*\n>> + * To ensure that VMAP'd stack overflow detection works correctly, all VMAP'd\n>> + * stacks need to have the same alignment.\n>> + */\n>> +static inline unsigned long *arch_alloc_vmap_stack(size_t stack_size, int node)\n>> +{\n>> +\treturn __vmalloc_node_range(stack_size, THREAD_ALIGN,\n>> +\t\t\t\t VMALLOC_START, VMALLOC_END,\n>> +\t\t\t\t THREADINFO_GFP, PAGE_KERNEL, 0, node,\n>> +\t\t\t\t __builtin_return_address(0));\n>> +}\n>> +\n>> +#else\n>> +unsigned long *arch_alloc_vmap_stack(size_t stack_size, int node); // link error\n\n> Do you actually need this here? The calling site (at least in this\n> patch), is surrounded by CONFIG_VMAP_STACK. Removing the dummy\n> declaration should be fine (I haven't read the rest of the patches yet,\n> maybe it's needed later;\n\nThis was to avoid having to #ifdef the calling site I add in a later patch.\n\n\n> would a BUILD_BUG do?).\n\nAh, you can put those in header files, yes that would be clearer.\n\n\nThanks,\n\nJames","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"ZWXpC2VL\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yGgpV2085z9t2m\n\tfor ;\n\tWed, 18 Oct 2017 03:37:38 +1100 (AEDT)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e4Us3-0001iW-Lj; Tue, 17 Oct 2017 16:37:35 +0000","from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]\n\thelo=foss.arm.com)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e4Uqo-0000pp-4A for linux-arm-kernel@lists.infradead.org;\n\tTue, 17 Oct 2017 16:36:22 +0000","from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249])\n\tby usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DE8A41529;\n\tTue, 17 Oct 2017 09:36:01 -0700 (PDT)","from [10.1.207.55] (melchizedek.cambridge.arm.com [10.1.207.55])\n\tby usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id\n\t117C43F590; Tue, 17 Oct 2017 09:35:59 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:In-Reply-To:References:Subject:To:\n\tMIME-Version:From:Date:Message-ID:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=k1MjPN8nmPURGrEyBLmqd9QrUTwIUuz+4JSMAkLDm6w=;\n\tb=ZWXpC2VLmrnePk\n\tGy66LL3ulSppJ0eUKaVBO2iSUbhdVO5WYNnl5wACIgccwrF8whdU8cLYerAVaX6Of1ZIa31LUl2i+\n\tNNJjpUj9SN4yl1zpccnYAhkEomCWjjFxUw0SjrVQ5EWlUrksGoquhgCmmUBFEWyITw7EtFDuKojmr\n\tukS2uNpY1wB1TXYOpeJpJ/s0VRW3JjLJ10RjYF+Fy2ltBABH9zWzYlGW4XcHdai88/KvHBBD59VjK\n\tu1q6g8I1CkC6YaGtRIJ8zZRIocjVs/NxzkccEdkyov9iI2nwY/cH90wWijBFOIVhJcFMZH2/HzIZs\n\tHqNUdufAuUPGogjp9l4g==;","Message-ID":"<59E6310E.6080705@arm.com>","Date":"Tue, 17 Oct 2017 17:34:22 +0100","From":"James Morse ","User-Agent":"Mozilla/5.0 (X11; Linux x86_64;\n\trv:31.0) Gecko/20100101 Icedove/31.6.0","MIME-Version":"1.0","To":"Catalin Marinas ","Subject":"Re: [PATCH v3 08/13] arm64: Add vmap_stack header file","References":"<20170922182614.27885-1-james.morse@arm.com>\n\t<20170922182614.27885-9-james.morse@arm.com>\n\t<20171013154226.xswo4y2viht22wvk@armageddon.cambridge.arm.com>","In-Reply-To":"<20171013154226.xswo4y2viht22wvk@armageddon.cambridge.arm.com>","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20171017_093618_302057_0C4F5770 ","X-CRM114-Status":"GOOD ( 12.74 )","X-Spam-Score":"-6.9 (------)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-6.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/,\n\thigh trust [217.140.101.70 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Mark Rutland , devicetree@vger.kernel.org,\n\tLorenzo Pieralisi ,\n\tMarc Zyngier , Will Deacon ,\n\tChristoffer Dall ,\n\tRob Herring , Loc Ho ,\n\tkvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1788642,"web_url":"http://patchwork.ozlabs.org/comment/1788642/","msgid":"<59E63186.4010005@arm.com>","list_archive_url":null,"date":"2017-10-17T16:36:22","subject":"Re: [PATCH v3 04/13] arm64: alternatives: use tpidr_el2 on VHE hosts","submitter":{"id":66575,"url":"http://patchwork.ozlabs.org/api/people/66575/","name":"James Morse","email":"james.morse@arm.com"},"content":"Hi Catalin,\n\nOn 16/10/17 10:58, Catalin Marinas wrote:\n> On Fri, Oct 13, 2017 at 05:50:45PM +0100, James Morse wrote:\n>> On 13/10/17 16:31, Catalin Marinas wrote:\n>>> On Fri, Sep 22, 2017 at 07:26:05PM +0100, James Morse wrote:\n>>>> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c\n>>>> index cd52d365d1f0..8e4c7da2b126 100644\n>>>> --- a/arch/arm64/kernel/cpufeature.c\n>>>> +++ b/arch/arm64/kernel/cpufeature.c\n>>\n>>>> @@ -1308,3 +1309,25 @@ static int __init enable_mrs_emulation(void)\n>>>> }\n>>>> \n>>>> late_initcall(enable_mrs_emulation);\n>>>> +\n>>>> +int cpu_copy_el2regs(void *__unused)\n>>>> +{\n>>>> +\tint do_copyregs = 0;\n>>>> +\n>>>> +\t/*\n>>>> +\t * Copy register values that aren't redirected by hardware.\n>>>> +\t *\n>>>> +\t * Before code patching, we only set tpidr_el1, all CPUs need to copy\n>>>> +\t * this value to tpidr_el2 before we patch the code. Once we've done\n>>>> +\t * that, freshly-onlined CPUs will set tpidr_el2, so we don't need to\n>>>> +\t * do anything here.\n>>>> +\t */\n>>>> +\tasm volatile(ALTERNATIVE(\"mov %0, #1\", \"mov %0, #0\",\n>>>> +\t\t\t\t ARM64_HAS_VIRT_HOST_EXTN)\n>>>> +\t\t : \"=r\" (do_copyregs) : : );\n>>>\n>>> Can you just do:\n>>>\n>>> \tif (cpu_have_const_cap(ARM64_HAS_VIRT_HOST_EXTN))\n>>> \t\twrite_sysreg(read_sysreg(tpidr_el1), tpidr_el2);\n>>>\n>>> At this point the capability bits should be set and the jump labels\n>>> enabled.\n>>\n>> These are enabled too early, we haven't done patching yet.\n>>\n>> We need to copy tpidr_el1 -> tpidr_el2 on all CPUs that are online before code\n>> patching.\n>>\n>> After code patching new CPUs set tpidr_el2 when they come online, so we don't\n>> need to do the copy... but this enable method is still called. There is nothing\n>> for us to do, and tpidr_el1 now contains junk, so the copy\n\n> Ah, I get it now (should've read the comment but I usually expect the\n> code to be obvious; it wasn't, at least to me, in this case ;)).\n\n> You could have added the sysreg copying directly in the asm volatile.\n\nI was trying to stick to the sysreg C accessors, and thought there would be more\nregisters that needed copying. (I discovered this VHE doesn't remap all the _ELx\nregisters quite late.)\n\n\n> Anyway, I think it's better if we keep it entirely in C with this hunk\n> (untested):\n\n[...]\n\nYes, that looks much better. I got tangled up in 'which alternative', but you're\nright, they are all applied in one go so it doesn't matter.\n\n\n>\tif (!READ_ONCE(alternatives_applied))\n> \t\twrite_sysreg(read_sysreg(tpidr_el1), tpidr_el2);\n\nI don't think this READ_ONCE() is needed, that only matters within the\nstop_machine()/alternatives-patching code that modifies the value on one CPU.\n\n\nThanks,\n\nJames","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"ATgjqCfL\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yGgqW5g0pz9t2Z\n\tfor ;\n\tWed, 18 Oct 2017 03:38:31 +1100 (AEDT)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e4Usr-0001zg-RL; Tue, 17 Oct 2017 16:38:25 +0000","from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]\n\thelo=foss.arm.com)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e4Usn-0001vg-U9 for linux-arm-kernel@lists.infradead.org;\n\tTue, 17 Oct 2017 16:38:23 +0000","from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249])\n\tby usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A1523F;\n\tTue, 17 Oct 2017 09:38:01 -0700 (PDT)","from [10.1.207.55] (melchizedek.cambridge.arm.com [10.1.207.55])\n\tby usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id\n\tD4F8C3F590; Tue, 17 Oct 2017 09:37:59 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:In-Reply-To:References:Subject:To:\n\tMIME-Version:From:Date:Message-ID:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=gXkQG78oh0tSqcZiCWUgP5M/xisz7//D5voVM5MlbLs=;\n\tb=ATgjqCfLFBQsYP\n\tpBRKigZcHIx/da9vJj23HNUVEU1ff1Ui4vwrsqtLp0Vx6TDlepmXwDIK8Nh0HAR9s4/LRKTl5L4uA\n\toMDF2TQMJOEOE+O065g4W8rAbhEEoqeZsHKaTOq/dVYB6+6MUVRmliNyzk5b8POt/LCGxzsrwtyqw\n\tvDcEJehdpm6wEB0R9Hx0/PHYZ8LWtjPBR13Md9QVhW4bOe5YlP4DK5yussVJ/dznofKk7LIsn54iA\n\tM73AuqC1lrYAyU0coKOKJSm0dQkKJFVolbZm/wZ25g2D4YHHVjQyAgHQhabRooYSvLcwfz+UTN82I\n\tXg/DWd8hDG0s8Czz0v0Q==;","Message-ID":"<59E63186.4010005@arm.com>","Date":"Tue, 17 Oct 2017 17:36:22 +0100","From":"James Morse ","User-Agent":"Mozilla/5.0 (X11; Linux x86_64;\n\trv:31.0) Gecko/20100101 Icedove/31.6.0","MIME-Version":"1.0","To":"Catalin Marinas ","Subject":"Re: [PATCH v3 04/13] arm64: alternatives: use tpidr_el2 on VHE hosts","References":"<20170922182614.27885-1-james.morse@arm.com>\n\t<20170922182614.27885-5-james.morse@arm.com>\n\t<20171013153148.dnejsvhxeui6opfw@armageddon.cambridge.arm.com>\n\t<59E0EEE5.2020208@arm.com>\n\t<20171016095845.htg2g4jkyw3nvzub@armageddon.cambridge.arm.com>","In-Reply-To":"<20171016095845.htg2g4jkyw3nvzub@armageddon.cambridge.arm.com>","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20171017_093822_118494_1A664A43 ","X-CRM114-Status":"GOOD ( 21.60 )","X-Spam-Score":"-6.9 (------)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-6.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/,\n\thigh trust [217.140.101.70 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Mark Rutland , devicetree@vger.kernel.org,\n\tLorenzo Pieralisi ,\n\tMarc Zyngier , Will Deacon ,\n\tRob Herring , Loc Ho ,\n\tkvmarm@lists.cs.columbia.edu,\n\tChristoffer Dall , \n\tlinux-arm-kernel@lists.infradead.org","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1789364,"web_url":"http://patchwork.ozlabs.org/comment/1789364/","msgid":"<20171018105422.53lnvivuq37e2oy4@armageddon.cambridge.arm.com>","list_archive_url":null,"date":"2017-10-18T10:54:23","subject":"Re: [PATCH v3 09/13] arm64: kernel: Add arch-specific SDEI entry\n\tcode and CPU masking","submitter":{"id":938,"url":"http://patchwork.ozlabs.org/api/people/938/","name":"Catalin Marinas","email":"catalin.marinas@arm.com"},"content":"On Tue, Oct 17, 2017 at 05:34:13PM +0100, James Morse wrote:\n> On 16/10/17 14:41, Catalin Marinas wrote:\n> > On Fri, Sep 22, 2017 at 07:26:10PM +0100, James Morse wrote:\n> >> +\tu64 elr = read_sysreg(elr_el1);\n> >> +\tu32 kernel_mode = read_sysreg(CurrentEL) | 1;\t/* +SPSel */\n> >> +\tunsigned long vbar = read_sysreg(vbar_el1);\n> >> +\n> >> +\t/* Retrieve the missing registers values */\n> >> +\tfor (i = 0; i < clobbered_registers; i++) {\n> >> +\t\t/* from within the handler, this call always succeeds */\n> >> +\t\tsdei_api_event_context(i, ®s->regs[i]);\n> >> +\t}\n> >> +\n> >> +\t/*\n> >> +\t * We didn't take an exception to get here, set PAN. UAO will be cleared\n> >> +\t * by sdei_event_handler()s set_fs(USER_DS) call.\n> >> +\t */\n> >> +\tasm(ALTERNATIVE(\"nop\", SET_PSTATE_PAN(1), ARM64_HAS_PAN,\n> >> +\t\t\tCONFIG_ARM64_PAN));\n> \n> > Can you use uaccess_disable() directly?\n> \n> Wouldn't this invoke sw-pan's __uaccess_ttbr0_disable():\n> > write_sysreg(ttbr, ttbr0_el1);\n> \n> Probing depends on VHE if booted at EL2, can we guarantee to have PAN (and\n> therefore not-SW-PAN) too?\n> \n> (otherwise I can add 'depends on !ARM64_SW_TTBR0_PAN' to the Kconfig)\n\nWe want the Kconfig to be able to include all features. What you can do\nthough is:\n\n\tselect ARM64_PAN if ARM64_SW_TTBR0_PAN\n\nWith VHE (ARMv8.2) we can guarantee that hardware PAN is around.","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"U0lYwOBY\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yH88d5xyfz9t3Z\n\tfor ;\n\tWed, 18 Oct 2017 21:54:57 +1100 (AEDT)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e4lzv-0000Xp-3n; Wed, 18 Oct 2017 10:54:51 +0000","from foss.arm.com ([217.140.101.70])\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e4lzr-0000Uc-Sj for linux-arm-kernel@lists.infradead.org;\n\tWed, 18 Oct 2017 10:54:49 +0000","from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249])\n\tby usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8BF8C1435;\n\tWed, 18 Oct 2017 03:54:27 -0700 (PDT)","from armageddon.cambridge.arm.com (armageddon.cambridge.arm.com\n\t[10.1.206.84])\n\tby usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id\n\t9B8A33F25D; Wed, 18 Oct 2017 03:54:25 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:\n\tMessage-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=nCsABBa5+W27nnEZXUraxjfjfPZrmE0kJ3hFYCCd6Vo=;\n\tb=U0lYwOBY5M7BCc\n\tyGkHrr2se4+MRHqPAqLqAwFoZj9LeVhBd0ndZNnhWYRZhIFxYIGH2/BqD5eIIKLDMjAV+sZ3rgTy3\n\t2opuSsDtaF7e9DrK4QJPg1XxjVCFMzmQPFgnjd4cLPE84Xfhhkxw3XX0YCNzdT+UyxCNu3//NQ+uT\n\tua7TdY3ZNJd4aYtg50dfogHNO4/f0SP+z/HW/4CsjXeyO0V2Zqve9Bbr9o6PfJj/njfTGwPSthtZA\n\tmV4/Tl7HXYv5l9FXE2RHGgkAX1XgGYowdOxUmrgQcqubMiiSzgLO0qeVI+D6p4hirk3T8rFXtJ5F5\n\tmX2+DjmyYvZQe9P2i61g==;","Date":"Wed, 18 Oct 2017 11:54:23 +0100","From":"Catalin Marinas ","To":"James Morse ","Subject":"Re: [PATCH v3 09/13] arm64: kernel: Add arch-specific SDEI entry\n\tcode and CPU masking","Message-ID":"<20171018105422.53lnvivuq37e2oy4@armageddon.cambridge.arm.com>","References":"<20170922182614.27885-1-james.morse@arm.com>\n\t<20170922182614.27885-10-james.morse@arm.com>\n\t<20171016134139.sqe6xabdson2d5rd@armageddon.cambridge.arm.com>\n\t<59E63105.9080804@arm.com>","MIME-Version":"1.0","Content-Disposition":"inline","In-Reply-To":"<59E63105.9080804@arm.com>","User-Agent":"NeoMutt/20170113 (1.7.2)","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20171018_035447_951947_AFA11854 ","X-CRM114-Status":"GOOD ( 14.15 )","X-Spam-Score":"-6.9 (------)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-6.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/,\n\thigh trust [217.140.101.70 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Mark Rutland , devicetree@vger.kernel.org,\n\tLorenzo Pieralisi ,\n\tMarc Zyngier , Will Deacon ,\n\tRob Herring , Loc Ho ,\n\tkvmarm@lists.cs.columbia.edu,\n\tChristoffer Dall , \n\tlinux-arm-kernel@lists.infradead.org","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}}]