[{"id":1789407,"web_url":"http://patchwork.ozlabs.org/comment/1789407/","msgid":"","list_archive_url":null,"date":"2017-10-18T11:19:27","subject":"Re: [PATCH v3 4/4] phy: rockchip-typec: Do the calibration more\n\tcorrectly","submitter":{"id":14965,"url":"http://patchwork.ozlabs.org/api/people/14965/","name":"Kishon Vijay Abraham I","email":"kishon@ti.com"},"content":"On Friday 22 September 2017 10:14 PM, Douglas Anderson wrote:\n> Calculate the calibration code as per the docs. The docs talk about\n> reading and averaging the pullup and pulldown calibration codes. They\n> also talk about adding in some adjustment codes. Let's do what the\n> docs say.\n> \n> In practice this doesn't seem to matter a whole lot. On a device I\n> tested the pullup and pulldown codes were nearly the same (0x23 and\n> 0x24) and the adjustment codes were 0.\n> \n> Reviewed-by: Chris Zhong \n> Signed-off-by: Douglas Anderson \n\nmerged the 3rd and 4th patch to next. Thanks!\n\n-Kishon\n> ---\n> \n> Changes in v3: None\n> Changes in v2:\n> - Removed extra blank line.\n> \n> drivers/phy/rockchip/phy-rockchip-typec.c | 27 ++++++++++++++++++---------\n> 1 file changed, 18 insertions(+), 9 deletions(-)\n> \n> diff --git a/drivers/phy/rockchip/phy-rockchip-typec.c b/drivers/phy/rockchip/phy-rockchip-typec.c\n> index 95f8f23676b4..a96635447d48 100644\n> --- a/drivers/phy/rockchip/phy-rockchip-typec.c\n> +++ b/drivers/phy/rockchip/phy-rockchip-typec.c\n> @@ -560,24 +560,33 @@ static void tcphy_dp_aux_calibration(struct rockchip_typec_phy *tcphy)\n> \tu16 val;\n> \tu16 tx_ana_ctrl_reg_1;\n> \tu16 tx_ana_ctrl_reg_2;\n> -\ts32 pu_calib_code;\n> -\n> -\t/* disable txda_cal_latch_en for rewrite the calibration values */\n> -\ttx_ana_ctrl_reg_1 = readl(tcphy->base + TX_ANA_CTRL_REG_1);\n> -\ttx_ana_ctrl_reg_1 &= ~TXDA_CAL_LATCH_EN;\n> -\twritel(tx_ana_ctrl_reg_1, tcphy->base + TX_ANA_CTRL_REG_1);\n> +\ts32 pu_calib_code, pd_calib_code;\n> +\ts32 pu_adj, pd_adj;\n> +\tu16 calib;\n> \n> \t/*\n> -\t * read a resistor calibration code from CMN_TXPUCAL_CTRL[5:0] and\n> -\t * write it to TX_DIG_CTRL_REG_2[5:0].\n> +\t * Calculate calibration code as per docs: use an average of the\n> +\t * pull down and pull up. Then add in adjustments.\n> \t */\n> \tval = readl(tcphy->base + CMN_TXPUCAL_CTRL);\n> \tpu_calib_code = CMN_CALIB_CODE_POS(val);\n> +\tval = readl(tcphy->base + CMN_TXPDCAL_CTRL);\n> +\tpd_calib_code = CMN_CALIB_CODE_POS(val);\n> +\tval = readl(tcphy->base + CMN_TXPU_ADJ_CTRL);\n> +\tpu_adj = CMN_CALIB_CODE(val);\n> +\tval = readl(tcphy->base + CMN_TXPD_ADJ_CTRL);\n> +\tpd_adj = CMN_CALIB_CODE(val);\n> +\tcalib = (pu_calib_code + pd_calib_code) / 2 + pu_adj + pd_adj;\n> +\n> +\t/* disable txda_cal_latch_en for rewrite the calibration values */\n> +\ttx_ana_ctrl_reg_1 = readl(tcphy->base + TX_ANA_CTRL_REG_1);\n> +\ttx_ana_ctrl_reg_1 &= ~TXDA_CAL_LATCH_EN;\n> +\twritel(tx_ana_ctrl_reg_1, tcphy->base + TX_ANA_CTRL_REG_1);\n> \n> \t/* write the calibration, then delay 10 ms as sample in docs */\n> \tval = readl(tcphy->base + TX_DIG_CTRL_REG_2);\n> \tval &= ~(TX_RESCAL_CODE_MASK << TX_RESCAL_CODE_OFFSET);\n> -\tval |= pu_calib_code << TX_RESCAL_CODE_OFFSET;\n> +\tval |= calib << TX_RESCAL_CODE_OFFSET;\n> \twritel(val, tcphy->base + TX_DIG_CTRL_REG_2);\n> \tusleep_range(10000, 10050);\n> \n>","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; 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