[{"id":1776876,"web_url":"http://patchwork.ozlabs.org/comment/1776876/","msgid":"<CAMuHMdWfoYzWPJYaGOhF8qshKhvngwFKs=kvuH62PYif9q9+0g@mail.gmail.com>","list_archive_url":null,"date":"2017-09-28T08:33:18","subject":"Re: [patch v9 0/4] JTAG driver introduction","submitter":{"id":703,"url":"http://patchwork.ozlabs.org/api/people/703/","name":"Geert Uytterhoeven","email":"geert@linux-m68k.org"},"content":"Hi Oleksandr,\n\n[My attention was drawn by https://lwn.net/Articles/734440/]\n[CC linux-spi, which was never included, while linux-serial was]\n\nOn Thu, Sep 21, 2017 at 11:25 AM, Oleksandr Shamray\n<oleksandrs@mellanox.com> wrote:\n> When a need raise up to use JTAG interface for system's devices\n> programming or CPU debugging, usually the user layer\n> application implements jtag protocol by bit-bang or using a\n> proprietary connection to vendor hardware.\n> This method can be slow and not generic.\n>\n> We propose to implement general JTAG interface and infrastructure\n> to communicate with user layer application. In such way, we can\n> have the standard JTAG interface core part and separation from\n> specific HW implementation.\n> This allow new capability to debug the CPU or program system's\n> device via BMC without additional devices nor cost.\n>\n> This patch purpose is to add JTAG master core infrastructure by\n> defining new JTAG class and provide generic JTAG interface\n> to allow hardware specific drivers to connect this interface.\n> This will enable all JTAG drivers to use the common interface\n> part and will have separate for hardware implementation.\n>\n> The JTAG (Joint Test Action Group) core driver provides minimal generic\n> JTAG interface, which can be used by hardware specific JTAG master\n> controllers. By providing common interface for the JTAG controllers,\n> user space device programing is hardware independent.\n>\n> Modern SoC which in use for embedded system' equipped with\n> internal JTAG master interface.\n> This interface is used for programming and debugging system's\n> hardware components, like CPLD, FPGA, CPU, voltage and\n> industrial controllers.\n> Firmware for such devices can be upgraded through JTAG interface during\n> Runtime. The JTAG standard support for multiple devices programming,\n> is in case their lines are daisy-chained together.\n>\n> For example, systems which equipped with host CPU, BMC SoC or/and\n> number of programmable devices are capable to connect a pin and\n> select system components dynamically for programming and debugging,\n> This is using by the BMC which is equipped with internal SoC master\n> controller.\n> For example:\n>\n> BMC JTAG master --> pin selected to CPLDs chain for programming (filed\n> upgrade, production)\n> BMC JTAG master --> pin selected to voltage monitors for programming\n> (field upgrade, production)\n> BMC JTAG master --> pin selected to host CPU (on-site debugging\n> and developers debugging)\n>\n> For example, we can have application in user space which using calls\n> to JTAG driver executes CPLD programming directly from SVF file\n>\n> The JTAG standard (IEEE 1149.1) defines the next connector pins:\n> - TDI (Test Data In);\n> - TDO (Test Data Out);\n> - TCK (Test Clock);\n> - TMS (Test Mode Select);\n> - TRST (Test Reset) (Optional);\n>\n> The SoC equipped with JTAG master controller, performs\n> device programming on command or vector level. For example\n> a file in a standard SVF (Serial Vector Format) that contains\n> boundary scan vectors, can be used by sending each vector\n> to the JTAG interface and the JTAG controller will execute\n> the programming.\n>\n> Initial version provides the system calls set for:\n> - SIR (Scan Instruction Register, IEEE 1149.1 Data Register scan);\n> - SDR (Scan Data Register, IEEE 1149.1 Instruction Register scan);\n> - RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified\n>   number of clocks.\n>\n> SoC which are not equipped with JTAG master interface, can be built\n> on top of JTAG core driver infrastructure, by applying bit-banging of\n> TDI, TDO, TCK and TMS pins within the hardware specific driver.\n\nOr by using an SPI master?\n\nGr{oetje,eeting}s,\n\n                        Geert\n\n--\nGeert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org\n\nIn personal conversations with technical people, I call myself a hacker. But\nwhen I'm talking to journalists I just say \"programmer\" or something like that.\n                                -- Linus Torvalds","headers":{"Return-Path":"<openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>","X-Original-To":["incoming@patchwork.ozlabs.org","openbmc@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","openbmc@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3y2pHf0Vfbz9t2Q\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 28 Sep 2017 18:48:14 +1000 (AEST)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3y2pHd1prbzDsQ5\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 28 Sep 2017 18:48:13 +1000 (AEST)","from mail-wm0-x244.google.com (mail-wm0-x244.google.com\n\t[IPv6:2a00:1450:400c:c09::244])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3y2nyV49LvzDsPp\n\tfor <openbmc@lists.ozlabs.org>; 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\n\tThu, 28 Sep 2017 01:33:18 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<1505985932-27568-1-git-send-email-oleksandrs@mellanox.com>","References":"<1505985932-27568-1-git-send-email-oleksandrs@mellanox.com>","From":"Geert Uytterhoeven <geert@linux-m68k.org>","Date":"Thu, 28 Sep 2017 10:33:18 +0200","X-Google-Sender-Auth":"ErALBLwzm6Pxb4jxp6dk4SBrX4o","Message-ID":"<CAMuHMdWfoYzWPJYaGOhF8qshKhvngwFKs=kvuH62PYif9q9+0g@mail.gmail.com>","Subject":"Re: [patch v9 0/4] JTAG driver introduction","To":"Oleksandr Shamray <oleksandrs@mellanox.com>","Content-Type":"text/plain; charset=\"UTF-8\"","X-Mailman-Approved-At":"Thu, 28 Sep 2017 18:48:06 +1000","X-BeenThere":"openbmc@lists.ozlabs.org","X-Mailman-Version":"2.1.24","Precedence":"list","List-Id":"Development list for OpenBMC <openbmc.lists.ozlabs.org>","List-Unsubscribe":"<https://lists.ozlabs.org/options/openbmc>,\n\t<mailto:openbmc-request@lists.ozlabs.org?subject=unsubscribe>","List-Archive":"<http://lists.ozlabs.org/pipermail/openbmc/>","List-Post":"<mailto:openbmc@lists.ozlabs.org>","List-Help":"<mailto:openbmc-request@lists.ozlabs.org?subject=help>","List-Subscribe":"<https://lists.ozlabs.org/listinfo/openbmc>,\n\t<mailto:openbmc-request@lists.ozlabs.org?subject=subscribe>","Cc":"system-sw-low-level@mellanox.com,\n\t\"devicetree@vger.kernel.org\" <devicetree@vger.kernel.org>,\n\tJiri Pirko <jiri@resnulli.us>, Arnd Bergmann <arnd@arndb.de>,\n\tVadim Pasternak <vadimp@mellanox.com>,\n\tGreg KH <gregkh@linuxfoundation.org>, openbmc@lists.ozlabs.org,\n\t\"linux-kernel@vger.kernel.org\" <linux-kernel@vger.kernel.org>,\n\topenocd-devel-owner@lists.sourceforge.net,\n\tlinux-spi <linux-spi@vger.kernel.org>, mec@shout.net,\n\tRob Herring <robh+dt@kernel.org>, Mark Brown <broonie@kernel.org>,\n\t\"linux-serial@vger.kernel.org\" <linux-serial@vger.kernel.org>,\n\t\"linux-api@vger.kernel.org\" <linux-api@vger.kernel.org>,\n\tTobias Klauser <tklauser@distanz.ch>,\n\tMauro Carvalho Chehab <mchehab@kernel.org>,\n\t\"David S. Miller\" <davem@davemloft.net>,\n\t\"linux-arm-kernel@lists.infradead.org\"\n\t<linux-arm-kernel@lists.infradead.org>","Errors-To":"openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org","Sender":"\"openbmc\"\n\t<openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>"}},{"id":1776883,"web_url":"http://patchwork.ozlabs.org/comment/1776883/","msgid":"<AM4PR0501MB2194D67623C640E20B3A7FABB1790@AM4PR0501MB2194.eurprd05.prod.outlook.com>","list_archive_url":null,"date":"2017-09-28T08:53:12","subject":"RE: [patch v9 0/4] JTAG driver introduction","submitter":{"id":72099,"url":"http://patchwork.ozlabs.org/api/people/72099/","name":"Oleksandr Shamray","email":"oleksandrs@mellanox.com"},"content":"> -----Original Message-----\r\n> From: geert.uytterhoeven@gmail.com [mailto:geert.uytterhoeven@gmail.com]\r\n> On Behalf Of Geert Uytterhoeven\r\n> Sent: Thursday, September 28, 2017 11:33 AM\r\n> To: Oleksandr Shamray <oleksandrs@mellanox.com>\r\n> Cc: Greg KH <gregkh@linuxfoundation.org>; Arnd Bergmann\r\n> <arnd@arndb.de>; linux-kernel@vger.kernel.org; linux-arm-\r\n> kernel@lists.infradead.org; devicetree@vger.kernel.org;\r\n> openbmc@lists.ozlabs.org; Joel Stanley <joel@jms.id.au>; Jiri Pirko\r\n> <jiri@resnulli.us>; Tobias Klauser <tklauser@distanz.ch>; linux-\r\n> serial@vger.kernel.org; mec@shout.net; Vadim Pasternak\r\n> <vadimp@mellanox.com>; system-sw-low-level <system-sw-low-\r\n> level@mellanox.com>; Rob Herring <robh+dt@kernel.org>; openocd-devel-\r\n> owner@lists.sourceforge.net; linux-api@vger.kernel.org; David S. Miller\r\n> <davem@davemloft.net>; Mauro Carvalho Chehab <mchehab@kernel.org>;\r\n> linux-spi <linux-spi@vger.kernel.org>; Mark Brown <broonie@kernel.org>\r\n> Subject: Re: [patch v9 0/4] JTAG driver introduction\r\n> \r\n> Hi Oleksandr,\r\n> \r\n> [My attention was drawn by\r\n> https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flwn.net\r\n> %2FArticles%2F734440%2F&data=02%7C01%7Coleksandrs%40mellanox.com%7\r\n> C97b8ba88686a42daaace08d5064b92eb%7Ca652971c7d2e4d9ba6a4d149256f\r\n> 461b%7C0%7C0%7C636421844026854216&sdata=TeHD4a3%2FBN6a5XG3Jizf5\r\n> pmsyJHJjzkEzkpnqsXC6S0%3D&reserved=0]\r\n> [CC linux-spi, which was never included, while linux-serial was]\r\n> \r\n> On Thu, Sep 21, 2017 at 11:25 AM, Oleksandr Shamray\r\n> <oleksandrs@mellanox.com> wrote:\r\n> > When a need raise up to use JTAG interface for system's devices\r\n> > programming or CPU debugging, usually the user layer application\r\n> > implements jtag protocol by bit-bang or using a proprietary connection\r\n> > to vendor hardware.\r\n> > This method can be slow and not generic.\r\n> >\r\n\r\n\r\n[..]\r\n\r\n> >\r\n> > Initial version provides the system calls set for:\r\n> > - SIR (Scan Instruction Register, IEEE 1149.1 Data Register scan);\r\n> > - SDR (Scan Data Register, IEEE 1149.1 Instruction Register scan);\r\n> > - RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified\r\n> >   number of clocks.\r\n> >\r\n> > SoC which are not equipped with JTAG master interface, can be built on\r\n> > top of JTAG core driver infrastructure, by applying bit-banging of\r\n> > TDI, TDO, TCK and TMS pins within the hardware specific driver.\r\n> \r\n> Or by using an SPI master?\r\n> \r\n\r\nI think it depends on how flexible the SPI interface is. If you can set it to transfer \r\nfrom 1 to n bits at a time, and you control the TMS line in software, you should \r\nbe able to use it. If the SPI interface can only transfer a multiple of 8 bits \r\nat a time, then in general it would not be suitable for JTAG.\r\n\r\n> Gr{oetje,eeting}s,\r\n> \r\n>                         Geert\r\n> \r\n> --\r\n> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-\r\n> m68k.org\r\n> \r\n> In personal conversations with technical people, I call myself a hacker. But\r\n> when I'm talking to journalists I just say \"programmer\" or something like that.\r\n>                                 -- Linus Torvalds","headers":{"Return-Path":"<openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>","X-Original-To":["incoming@patchwork.ozlabs.org","openbmc@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","openbmc@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3y2pQ21LnWz9t2Q\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 28 Sep 2017 18:53:46 +1000 (AEST)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3y2pQ171rpzDsQ6\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 28 Sep 2017 18:53:45 +1000 (AEST)","from EUR02-HE1-obe.outbound.protection.outlook.com\n\t(mail-eopbgr10086.outbound.protection.outlook.com [40.107.1.86])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3y2pPb0H74zDsPp\n\tfor <openbmc@lists.ozlabs.org>; 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\n\tenvelope-from=oleksandrs@mellanox.com; receiver=<UNKNOWN>)","lists.ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=Mellanox.com header.i=@Mellanox.com\n\theader.b=\"YhB68n3o\"; dkim-atps=neutral","spf=none (sender IP is )\n\tsmtp.mailfrom=oleksandrs@mellanox.com; "],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=Mellanox.com;\n\ts=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version;\n\tbh=ZSzKvaLqOB+8JYL84xiGjioh1+Ge986pOVACqDcoF7A=;\n\tb=YhB68n3oRQmGg9w303lbAsZU7We49vO7GEDff5oF+YcfIRCjA8P7wZNfmSoffUVNHVfPrF6PoClrOTIfrv5ilez84C/1+QRGcWk1UCFiNgq+tJqWObEG/HLeXSBv8bgYpoY3UVk+4Xg08JW+NCkrjGbcfi9LmzY82oeW197SEXk=","From":"Oleksandr Shamray <oleksandrs@mellanox.com>","To":"Geert Uytterhoeven <geert@linux-m68k.org>","Subject":"RE: [patch v9 0/4] JTAG driver introduction","Thread-Topic":"[patch v9 0/4] JTAG driver introduction","Thread-Index":"AQHTMru4M5azt7XbqEuLkdSxxS/sN6LKA2cAgAAE/MA=","Date":"Thu, 28 Sep 2017 08:53:12 +0000","Message-ID":"<AM4PR0501MB2194D67623C640E20B3A7FABB1790@AM4PR0501MB2194.eurprd05.prod.outlook.com>","References":"<1505985932-27568-1-git-send-email-oleksandrs@mellanox.com>\n\t<CAMuHMdWfoYzWPJYaGOhF8qshKhvngwFKs=kvuH62PYif9q9+0g@mail.gmail.com>","In-Reply-To":"<CAMuHMdWfoYzWPJYaGOhF8qshKhvngwFKs=kvuH62PYif9q9+0g@mail.gmail.com>","Accept-Language":"en-US, uk-UA","Content-Language":"en-US","X-MS-Has-Attach":"","X-MS-TNEF-Correlator":"","authentication-results":["ozlabs.org; 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A:1; MX:1; LANG:en; ","received-spf":"None (protection.outlook.com: mellanox.com does not designate\n\tpermitted sender hosts)","spamdiagnosticoutput":"1:99","spamdiagnosticmetadata":"NSPM","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","MIME-Version":"1.0","X-OriginatorOrg":"Mellanox.com","X-MS-Exchange-CrossTenant-originalarrivaltime":"28 Sep 2017 08:53:12.4284\n\t(UTC)","X-MS-Exchange-CrossTenant-fromentityheader":"Hosted","X-MS-Exchange-CrossTenant-id":"a652971c-7d2e-4d9b-a6a4-d149256f461b","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"HE1PR05MB3339","X-BeenThere":"openbmc@lists.ozlabs.org","X-Mailman-Version":"2.1.24","Precedence":"list","List-Id":"Development list for OpenBMC <openbmc.lists.ozlabs.org>","List-Unsubscribe":"<https://lists.ozlabs.org/options/openbmc>,\n\t<mailto:openbmc-request@lists.ozlabs.org?subject=unsubscribe>","List-Archive":"<http://lists.ozlabs.org/pipermail/openbmc/>","List-Post":"<mailto:openbmc@lists.ozlabs.org>","List-Help":"<mailto:openbmc-request@lists.ozlabs.org?subject=help>","List-Subscribe":"<https://lists.ozlabs.org/listinfo/openbmc>,\n\t<mailto:openbmc-request@lists.ozlabs.org?subject=subscribe>","Cc":"system-sw-low-level <system-sw-low-level@mellanox.com>,\n\t\"devicetree@vger.kernel.org\" <devicetree@vger.kernel.org>,\n\tJiri Pirko <jiri@resnulli.us>, Arnd Bergmann <arnd@arndb.de>,\n\tVadim Pasternak <vadimp@mellanox.com>,\n\tGreg KH <gregkh@linuxfoundation.org>, \n\t\"openbmc@lists.ozlabs.org\" <openbmc@lists.ozlabs.org>,\n\t\"linux-kernel@vger.kernel.org\" <linux-kernel@vger.kernel.org>,\n\t\"openocd-devel-owner@lists.sourceforge.net\"\n\t<openocd-devel-owner@lists.sourceforge.net>,\n\tlinux-spi <linux-spi@vger.kernel.org>, \"mec@shout.net\" <mec@shout.net>,\n\tRob Herring <robh+dt@kernel.org>, Mark Brown <broonie@kernel.org>,\n\t\"linux-serial@vger.kernel.org\" <linux-serial@vger.kernel.org>,\n\t\"linux-api@vger.kernel.org\" <linux-api@vger.kernel.org>,\n\tTobias Klauser <tklauser@distanz.ch>, Mauro\n\tCarvalho Chehab <mchehab@kernel.org>,\n\t\"David S. Miller\" <davem@davemloft.net>, \n\t\"linux-arm-kernel@lists.infradead.org\"\n\t<linux-arm-kernel@lists.infradead.org>","Errors-To":"openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org","Sender":"\"openbmc\"\n\t<openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>"}},{"id":1776890,"web_url":"http://patchwork.ozlabs.org/comment/1776890/","msgid":"<CAMuHMdX1HNym4n67y2VbZqFDLHFGunfRp-LPn0g2K4qhya_w9g@mail.gmail.com>","list_archive_url":null,"date":"2017-09-28T09:02:10","subject":"Re: [patch v9 0/4] JTAG driver introduction","submitter":{"id":703,"url":"http://patchwork.ozlabs.org/api/people/703/","name":"Geert Uytterhoeven","email":"geert@linux-m68k.org"},"content":"Hi Oleksandr,\n\nOn Thu, Sep 28, 2017 at 10:53 AM, Oleksandr Shamray\n<oleksandrs@mellanox.com> wrote:\n>> [My attention was drawn by\n>> https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flwn.net\n>> %2FArticles%2F734440%2F&data=02%7C01%7Coleksandrs%40mellanox.com%7\n>> C97b8ba88686a42daaace08d5064b92eb%7Ca652971c7d2e4d9ba6a4d149256f\n>> 461b%7C0%7C0%7C636421844026854216&sdata=TeHD4a3%2FBN6a5XG3Jizf5\n>> pmsyJHJjzkEzkpnqsXC6S0%3D&reserved=0]\n>> [CC linux-spi, which was never included, while linux-serial was]\n>>\n>> On Thu, Sep 21, 2017 at 11:25 AM, Oleksandr Shamray\n>> <oleksandrs@mellanox.com> wrote:\n>> > When a need raise up to use JTAG interface for system's devices\n>> > programming or CPU debugging, usually the user layer application\n>> > implements jtag protocol by bit-bang or using a proprietary connection\n>> > to vendor hardware.\n>> > This method can be slow and not generic.\n>> >\n>\n>\n> [..]\n>\n>> >\n>> > Initial version provides the system calls set for:\n>> > - SIR (Scan Instruction Register, IEEE 1149.1 Data Register scan);\n>> > - SDR (Scan Data Register, IEEE 1149.1 Instruction Register scan);\n>> > - RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified\n>> >   number of clocks.\n>> >\n>> > SoC which are not equipped with JTAG master interface, can be built on\n>> > top of JTAG core driver infrastructure, by applying bit-banging of\n>> > TDI, TDO, TCK and TMS pins within the hardware specific driver.\n>>\n>> Or by using an SPI master?\n>>\n>\n> I think it depends on how flexible the SPI interface is. If you can set it to transfer\n> from 1 to n bits at a time, and you control the TMS line in software, you should\n> be able to use it. If the SPI interface can only transfer a multiple of 8 bits\n> at a time, then in general it would not be suitable for JTAG.\n\nSure, that depends on the actual SPI master interface.\nBut I guess you can write a generic JTAG-over-SPI driver, and use a tms-gpios\nproperty in DT to specify how to control TMS.\n\nGr{oetje,eeting}s,\n\n                        Geert\n\n--\nGeert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org\n\nIn personal conversations with technical people, I call myself a hacker. But\nwhen I'm talking to journalists I just say \"programmer\" or something like that.\n                                -- Linus Torvalds","headers":{"Return-Path":"<openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>","X-Original-To":["incoming@patchwork.ozlabs.org","openbmc@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","openbmc@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3y2pcC032Vz9t2l\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 28 Sep 2017 19:02:35 +1000 (AEST)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3y2pcB1frpzDsPp\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 28 Sep 2017 19:02:34 +1000 (AEST)","from mail-wm0-x242.google.com (mail-wm0-x242.google.com\n\t[IPv6:2a00:1450:400c:c09::242])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3y2pbp6Z0wzDsPp\n\tfor <openbmc@lists.ozlabs.org>; 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Thu,\n\t28 Sep 2017 02:02:11 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<AM4PR0501MB2194D67623C640E20B3A7FABB1790@AM4PR0501MB2194.eurprd05.prod.outlook.com>","References":"<1505985932-27568-1-git-send-email-oleksandrs@mellanox.com>\n\t<CAMuHMdWfoYzWPJYaGOhF8qshKhvngwFKs=kvuH62PYif9q9+0g@mail.gmail.com>\n\t<AM4PR0501MB2194D67623C640E20B3A7FABB1790@AM4PR0501MB2194.eurprd05.prod.outlook.com>","From":"Geert Uytterhoeven <geert@linux-m68k.org>","Date":"Thu, 28 Sep 2017 11:02:10 +0200","X-Google-Sender-Auth":"yqjJszmxOFubJPBq44r3ySY7E7Y","Message-ID":"<CAMuHMdX1HNym4n67y2VbZqFDLHFGunfRp-LPn0g2K4qhya_w9g@mail.gmail.com>","Subject":"Re: [patch v9 0/4] JTAG driver introduction","To":"Oleksandr Shamray <oleksandrs@mellanox.com>","Content-Type":"text/plain; charset=\"UTF-8\"","X-BeenThere":"openbmc@lists.ozlabs.org","X-Mailman-Version":"2.1.24","Precedence":"list","List-Id":"Development list for OpenBMC <openbmc.lists.ozlabs.org>","List-Unsubscribe":"<https://lists.ozlabs.org/options/openbmc>,\n\t<mailto:openbmc-request@lists.ozlabs.org?subject=unsubscribe>","List-Archive":"<http://lists.ozlabs.org/pipermail/openbmc/>","List-Post":"<mailto:openbmc@lists.ozlabs.org>","List-Help":"<mailto:openbmc-request@lists.ozlabs.org?subject=help>","List-Subscribe":"<https://lists.ozlabs.org/listinfo/openbmc>,\n\t<mailto:openbmc-request@lists.ozlabs.org?subject=subscribe>","Cc":"system-sw-low-level <system-sw-low-level@mellanox.com>,\n\t\"devicetree@vger.kernel.org\" <devicetree@vger.kernel.org>,\n\tJiri Pirko <jiri@resnulli.us>, Arnd Bergmann <arnd@arndb.de>,\n\tVadim Pasternak <vadimp@mellanox.com>,\n\tGreg KH <gregkh@linuxfoundation.org>, \n\t\"openbmc@lists.ozlabs.org\" <openbmc@lists.ozlabs.org>,\n\t\"linux-kernel@vger.kernel.org\" <linux-kernel@vger.kernel.org>,\n\t\"openocd-devel-owner@lists.sourceforge.net\"\n\t<openocd-devel-owner@lists.sourceforge.net>,\n\tlinux-spi <linux-spi@vger.kernel.org>, \"mec@shout.net\" <mec@shout.net>,\n\tRob Herring <robh+dt@kernel.org>, Mark Brown <broonie@kernel.org>,\n\t\"linux-serial@vger.kernel.org\" <linux-serial@vger.kernel.org>,\n\t\"linux-api@vger.kernel.org\" <linux-api@vger.kernel.org>,\n\tTobias Klauser <tklauser@distanz.ch>,\n\tMauro Carvalho Chehab <mchehab@kernel.org>,\n\t\"David S. Miller\" <davem@davemloft.net>,\n\t\"linux-arm-kernel@lists.infradead.org\"\n\t<linux-arm-kernel@lists.infradead.org>","Errors-To":"openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org","Sender":"\"openbmc\"\n\t<openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>"}},{"id":1776965,"web_url":"http://patchwork.ozlabs.org/comment/1776965/","msgid":"<AM4PR0501MB219466B15EB1314E3AF8413FB1790@AM4PR0501MB2194.eurprd05.prod.outlook.com>","list_archive_url":null,"date":"2017-09-28T11:11:42","subject":"RE: [patch v9 0/4] JTAG driver introduction","submitter":{"id":72099,"url":"http://patchwork.ozlabs.org/api/people/72099/","name":"Oleksandr Shamray","email":"oleksandrs@mellanox.com"},"content":"> -----Original Message-----\r\n> From: geert.uytterhoeven@gmail.com [mailto:geert.uytterhoeven@gmail.com]\r\n> On Behalf Of Geert Uytterhoeven\r\n> Sent: Thursday, September 28, 2017 12:02 PM\r\n> To: Oleksandr Shamray <oleksandrs@mellanox.com>\r\n> Cc: Greg KH <gregkh@linuxfoundation.org>; Arnd Bergmann\r\n> <arnd@arndb.de>; linux-kernel@vger.kernel.org; linux-arm-\r\n> kernel@lists.infradead.org; devicetree@vger.kernel.org;\r\n> openbmc@lists.ozlabs.org; Joel Stanley <joel@jms.id.au>; Jiri Pirko\r\n> <jiri@resnulli.us>; Tobias Klauser <tklauser@distanz.ch>; linux-\r\n> serial@vger.kernel.org; mec@shout.net; Vadim Pasternak\r\n> <vadimp@mellanox.com>; system-sw-low-level <system-sw-low-\r\n> level@mellanox.com>; Rob Herring <robh+dt@kernel.org>; openocd-devel-\r\n> owner@lists.sourceforge.net; linux-api@vger.kernel.org; David S. Miller\r\n> <davem@davemloft.net>; Mauro Carvalho Chehab <mchehab@kernel.org>;\r\n> linux-spi <linux-spi@vger.kernel.org>; Mark Brown <broonie@kernel.org>\r\n> Subject: Re: [patch v9 0/4] JTAG driver introduction\r\n> \r\n> Hi Oleksandr,\r\n> \r\n> On Thu, Sep 28, 2017 at 10:53 AM, Oleksandr Shamray\r\n> <oleksandrs@mellanox.com> wrote:\r\n> >> [My attention was drawn by\r\n> >> https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flw\r\n> >> n.net\r\n> >>\r\n> %2FArticles%2F734440%2F&data=02%7C01%7Coleksandrs%40mellanox.com%7\r\n> >>\r\n> C97b8ba88686a42daaace08d5064b92eb%7Ca652971c7d2e4d9ba6a4d149256f\r\n> >>\r\n> 461b%7C0%7C0%7C636421844026854216&sdata=TeHD4a3%2FBN6a5XG3Jizf5\r\n> >> pmsyJHJjzkEzkpnqsXC6S0%3D&reserved=0]\r\n> >> [CC linux-spi, which was never included, while linux-serial was]\r\n> >>\r\n> >> On Thu, Sep 21, 2017 at 11:25 AM, Oleksandr Shamray\r\n> >> <oleksandrs@mellanox.com> wrote:\r\n> >> > When a need raise up to use JTAG interface for system's devices\r\n> >> > programming or CPU debugging, usually the user layer application\r\n> >> > implements jtag protocol by bit-bang or using a proprietary\r\n> >> > connection to vendor hardware.\r\n> >> > This method can be slow and not generic.\r\n> >> >\r\n> >\r\n> >\r\n> > [..]\r\n> >\r\n> >> >\r\n> >> > Initial version provides the system calls set for:\r\n> >> > - SIR (Scan Instruction Register, IEEE 1149.1 Data Register scan);\r\n> >> > - SDR (Scan Data Register, IEEE 1149.1 Instruction Register scan);\r\n> >> > - RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified\r\n> >> >   number of clocks.\r\n> >> >\r\n> >> > SoC which are not equipped with JTAG master interface, can be built\r\n> >> > on top of JTAG core driver infrastructure, by applying bit-banging\r\n> >> > of TDI, TDO, TCK and TMS pins within the hardware specific driver.\r\n> >>\r\n> >> Or by using an SPI master?\r\n> >>\r\n> >\r\n> > I think it depends on how flexible the SPI interface is. If you can\r\n> > set it to transfer from 1 to n bits at a time, and you control the TMS\r\n> > line in software, you should be able to use it. If the SPI interface\r\n> > can only transfer a multiple of 8 bits at a time, then in general it would not be\r\n> suitable for JTAG.\r\n> \r\n> Sure, that depends on the actual SPI master interface.\r\n> But I guess you can write a generic JTAG-over-SPI driver, and use a tms-gpios\r\n> property in DT to specify how to control TMS.\r\n> \r\n\r\nYes, this is a good idea for SoC which are not equipped with JTAG hardware.\r\n\r\n> Gr{oetje,eeting}s,\r\n> \r\n>                         Geert\r\n> \r\n> --\r\n> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-\r\n> m68k.org\r\n> \r\n> In personal conversations with technical people, I call myself a hacker. But\r\n> when I'm talking to journalists I just say \"programmer\" or something like that.\r\n>                                 -- Linus Torvalds","headers":{"Return-Path":"<openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>","X-Original-To":["incoming@patchwork.ozlabs.org","openbmc@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","openbmc@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3y2sTh3L64z9tXw\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 28 Sep 2017 21:12:08 +1000 (AEST)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3y2sTg2D5ZzDsQ6\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 28 Sep 2017 21:12:07 +1000 (AEST)","from EUR01-VE1-obe.outbound.protection.outlook.com\n\t(mail-ve1eur01on0086.outbound.protection.outlook.com [104.47.1.86])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3y2sTP4ZBFzDsPp\n\tfor <openbmc@lists.ozlabs.org>; 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\n\tenvelope-from=oleksandrs@mellanox.com; receiver=<UNKNOWN>)","lists.ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=Mellanox.com header.i=@Mellanox.com\n\theader.b=\"RkJXnhJu\"; dkim-atps=neutral","spf=none (sender IP is )\n\tsmtp.mailfrom=oleksandrs@mellanox.com; "],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=Mellanox.com;\n\ts=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version;\n\tbh=x0nmrw6G39mJ5AFWSCC0hEmoEzScp7LObaJLgCsRl8I=;\n\tb=RkJXnhJu0FiNvzi9Df5KoPKI7hOsrGjfCYjh+MczJG7UrnW6laB/3dLobLhMjNzMsq3F+eqf1OMBhYbfW8e1lT29WsRjaioKwTuy1VoetoGhENUmFVPuodM5OnQahzbSTMEqgAT3VALpYm3/vXTX+MMzlN3OQJNSrMB+lKW4WHI=","From":"Oleksandr Shamray <oleksandrs@mellanox.com>","To":"Geert Uytterhoeven <geert@linux-m68k.org>","Subject":"RE: [patch v9 0/4] JTAG driver introduction","Thread-Topic":"[patch v9 0/4] JTAG driver introduction","Thread-Index":"AQHTMru4M5azt7XbqEuLkdSxxS/sN6LKA2cAgAAE/MCAAAMUAIAAIqNQ","Date":"Thu, 28 Sep 2017 11:11:42 +0000","Message-ID":"<AM4PR0501MB219466B15EB1314E3AF8413FB1790@AM4PR0501MB2194.eurprd05.prod.outlook.com>","References":"<1505985932-27568-1-git-send-email-oleksandrs@mellanox.com>\n\t<CAMuHMdWfoYzWPJYaGOhF8qshKhvngwFKs=kvuH62PYif9q9+0g@mail.gmail.com>\n\t<AM4PR0501MB2194D67623C640E20B3A7FABB1790@AM4PR0501MB2194.eurprd05.prod.outlook.com>\n\t<CAMuHMdX1HNym4n67y2VbZqFDLHFGunfRp-LPn0g2K4qhya_w9g@mail.gmail.com>","In-Reply-To":"<CAMuHMdX1HNym4n67y2VbZqFDLHFGunfRp-LPn0g2K4qhya_w9g@mail.gmail.com>","Accept-Language":"en-US, uk-UA","Content-Language":"en-US","X-MS-Has-Attach":"","X-MS-TNEF-Correlator":"","authentication-results":["ozlabs.org; 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