[{"id":1772764,"web_url":"http://patchwork.ozlabs.org/comment/1772764/","msgid":"","list_archive_url":null,"date":"2017-09-21T12:21:19","subject":"Re: [PATCH 0/8] pinctrl: meson: clean pin offsets","submitter":{"id":7055,"url":"http://patchwork.ozlabs.org/api/people/7055/","name":"Linus Walleij","email":"linus.walleij@linaro.org"},"content":"On Wed, Sep 20, 2017 at 3:39 PM, Jerome Brunet wrote:\n\n> The initial goal of this series was move to TEST_N pin from the EE\n> controller to AO controller, where it belongs. This meant modify the\n> EE_OFF value.\n>\n> This offset is a quirk we brought from the vendor driver when it was\n> initially merged. There no reason to keep this around and we could simply\n> let pinctrl figure the pin base value.\n>\n> Removing this offset, while simple, ends up being quite a patch bomb.\n> This is why I split the change over 5 first patches, so the important\n> change, patch #1 remains visible. Of course, to avoid breaking bisect,\n> these first 5 patches should be squashed into one. (If you prefer that I\n> squash it myself, I may have to send you a PR as the patch would exceed\n> VGER 100000 characters limit)\n>\n> The last change is this series, while not directly related, also requires\n> to adjust the gpio-line-names property in DT. Having these changes going\n> together would make it easier to coordinate the DTS changes.\n>\n> This was changeset has been test on gxbb P200, gxl libretech-cc. It was\n> also boot tested on meson8 (Thx Martin!)\n>\n> Jerome Brunet (8):\n> pinctrl: meson: remove offset from pinctrl\n> pinctrl: meson: remove offset continued - gxbb\n> pinctrl: meson: remove offset continued - gxl\n> pinctrl: meson: remove offset continued - meson8\n> pinctrl: meson: remove offset continued - meson8b\n> pinctrl: meson: get rid of pin_base\n> pinctrl: meson-gx: TEST_N belongs to the AO controller\n> pinctrl: meson-gxbb: add missing GPIOX_22 pin\n\nLooks good just waiting for review from Carlo && || Kevin.\n\nYours,\nLinus Walleij\n--\nTo unsubscribe from this list: send the line \"unsubscribe linux-gpio\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-gpio-owner@vger.kernel.org;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=linaro.org header.i=@linaro.org\n\theader.b=\"UMX+pDNp\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xybLq198bz9t3Z\n\tfor ;\n\tThu, 21 Sep 2017 22:21:23 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751550AbdIUMVV (ORCPT );\n\tThu, 21 Sep 2017 08:21:21 -0400","from mail-io0-f171.google.com ([209.85.223.171]:47590 \"EHLO\n\tmail-io0-f171.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751754AbdIUMVU (ORCPT\n\t); Thu, 21 Sep 2017 08:21:20 -0400","by mail-io0-f171.google.com with SMTP id e189so10432723ioa.4\n\tfor ;\n\tThu, 21 Sep 2017 05:21:20 -0700 (PDT)","by 10.79.164.78 with HTTP; Thu, 21 Sep 2017 05:21:19 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google;\n\th=mime-version:in-reply-to:references:from:date:message-id:subject:to\n\t:cc; bh=JkGLF5vhYI4LQejR3JiQdwojpFL25E2rWd6fZ9WKpuw=;\n\tb=UMX+pDNpGrGTizv3sw/artp7ZOYwgzaYkuF8R9Gpq/b5lxR4HP73dG7eybx6ZSVcWS\n\tKk/gq4e95QX+Fac12qyWweodCzqgvvejQ6ftkdlXAnYXjmG1IYWyq/8QYODROsDJ6/yz\n\tqPX4FEv/RoyZaVe4haopOJoDl3NquDZVcxtlc=","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:mime-version:in-reply-to:references:from:date\n\t:message-id:subject:to:cc;\n\tbh=JkGLF5vhYI4LQejR3JiQdwojpFL25E2rWd6fZ9WKpuw=;\n\tb=r0/7Fym/d+cSsNl/vh6nyQBHub+gRZj1Smay1S0JwDAxFcTrCpqtB7ZHoGW0X6qz7D\n\txAdYcALVu48XKSKapRKBFA/oCqI+z/Tx6VHoAPnWXbTVQ/fwu1P8FuL+flE+SAGxzFD/\n\tLfFrUnujipfNmyvU1SK/rdtEc9QQ+EyVnI7XlKtLjLhKcPmdKdBhiNrOpPwjVYLEsf2M\n\tx48RmiSyoKQq3NB0f0KXh8BPT7EI3bjCEoGZGkCJBJMETekpvfYaHwHBWQT4neaavsfw\n\taqCb2xu7IW5vfBYh+r7uMd/G7mDRSjC64+obquWkko1wDtpj0u03W/9CTLs3K0G5V0fx\n\t6XZg==","X-Gm-Message-State":"AHPjjUhZB1qOy8gHftjltdK6UeGnW5SDoWeQlXw1Uyxbex11shOJgISL\n\t6DfPz11tiZqHoDVbxn8pjHJzt2+nRMM89GIao3u/+g==","X-Google-Smtp-Source":"AOwi7QDlmiQXHcpKG1/Sr8zwAvK7oT+KqyfKmhSrA7dr4+h3A7KIqH+UD51petiQdz3LUzaYCvnegM+3iQoTN+wmD1w=","X-Received":"by 10.107.22.65 with SMTP id 62mr2757127iow.269.1505996480117;\n\tThu, 21 Sep 2017 05:21:20 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<20170920133927.17390-1-jbrunet@baylibre.com>","References":"<20170920133927.17390-1-jbrunet@baylibre.com>","From":"Linus Walleij ","Date":"Thu, 21 Sep 2017 14:21:19 +0200","Message-ID":"","Subject":"Re: [PATCH 0/8] pinctrl: meson: clean pin offsets","To":"Jerome Brunet , Carlo Caione ,\n\tKevin Hilman ","Cc":"\"linux-gpio@vger.kernel.org\" ,\n\t\"linux-arm-kernel@lists.infradead.org\" \n\t,\n\t\"open list:ARM/Amlogic Meson...\" , \n\t\"linux-kernel@vger.kernel.org\" ,\n\t\"devicetree@vger.kernel.org\" ,\n\tMartin Blumenstingl ","Content-Type":"text/plain; charset=\"UTF-8\"","Sender":"linux-gpio-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"linux-gpio@vger.kernel.org"}},{"id":1772893,"web_url":"http://patchwork.ozlabs.org/comment/1772893/","msgid":"<1506006009.2703.175.camel@baylibre.com>","list_archive_url":null,"date":"2017-09-21T15:00:09","subject":"Re: [PATCH 0/8] pinctrl: meson: clean pin offsets","submitter":{"id":69839,"url":"http://patchwork.ozlabs.org/api/people/69839/","name":"Jerome Brunet","email":"jbrunet@baylibre.com"},"content":"On Thu, 2017-09-21 at 14:21 +0200, Linus Walleij wrote:\n> On Wed, Sep 20, 2017 at 3:39 PM, Jerome Brunet wrote:\n> \n> > The initial goal of this series was move to TEST_N pin from the EE\n> > controller to AO controller, where it belongs. This meant modify the\n> > EE_OFF value.\n> > \n> > This offset is a quirk we brought from the vendor driver when it was\n> > initially merged. There no reason to keep this around and we could simply\n> > let pinctrl figure the pin base value.\n> > \n> > Removing this offset, while simple, ends up being quite a patch bomb.\n> > This is why I split the change over 5 first patches, so the important\n> > change, patch #1 remains visible. Of course, to avoid breaking bisect,\n> > these first 5 patches should be squashed into one. (If you prefer that I\n> > squash it myself, I may have to send you a PR as the patch would exceed\n> > VGER 100000 characters limit)\n> > \n> > The last change is this series, while not directly related, also requires\n> > to adjust the gpio-line-names property in DT. Having these changes going\n> > together would make it easier to coordinate the DTS changes.\n> > \n> > This was changeset has been test on gxbb P200, gxl libretech-cc. It was\n> > also boot tested on meson8 (Thx Martin!)\n> > \n> > Jerome Brunet (8):\n> > pinctrl: meson: remove offset from pinctrl\n> > pinctrl: meson: remove offset continued - gxbb\n> > pinctrl: meson: remove offset continued - gxl\n> > pinctrl: meson: remove offset continued - meson8\n> > pinctrl: meson: remove offset continued - meson8b\n> > pinctrl: meson: get rid of pin_base\n> > pinctrl: meson-gx: TEST_N belongs to the AO controller\n> > pinctrl: meson-gxbb: add missing GPIOX_22 pin\n> \n> Looks good just waiting for review from Carlo && || Kevin.\n\nThanks Linus,\n\nAfter doing this rework, I noticed that this driver (not the only one though)\nassume gpio offset (param of gpio calls) and pin offset are the same thing ...\ninstead of relying pinctrl (and gpio-ranges) to do the translation.\n\nTo make things a bit more clean, I was thinking about forwarding all gpios\nframework calls to pinconf, so the gpio to pin offset would go through the\nproper mapping function.\n\nIs this the way to do it ?\n\nUsing gpio_pinctrl_set_config() I should be able to achieve almost any \"write\"\nfunctions but I got stuck on gpio_get()\n\nATM the moment there is no gpio_pinctrl_get_config() or something similar to\nread stuff in the gpio framework from pinconf. Would you be open to add\nsomething like this ?\n\n> \n> Yours,\n> Linus Walleij\n\n--\nTo unsubscribe from this list: send the line \"unsubscribe linux-gpio\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-gpio-owner@vger.kernel.org;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=baylibre-com.20150623.gappssmtp.com\n\theader.i=@baylibre-com.20150623.gappssmtp.com\n\theader.b=\"q6P9QsRF\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xyft85MMCz9t3v\n\tfor ;\n\tFri, 22 Sep 2017 01:00:16 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751792AbdIUPAP (ORCPT );\n\tThu, 21 Sep 2017 11:00:15 -0400","from mail-wm0-f54.google.com ([74.125.82.54]:49772 \"EHLO\n\tmail-wm0-f54.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751876AbdIUPAN (ORCPT\n\t); Thu, 21 Sep 2017 11:00:13 -0400","by mail-wm0-f54.google.com with SMTP id r74so2653209wme.4\n\tfor ;\n\tThu, 21 Sep 2017 08:00:13 -0700 (PDT)","from boomer (cag06-3-82-243-161-21.fbx.proxad.net. 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There is also .get_multiple() in the works.\n\nI do not think these things should be relayed to pin config,\npin config is not for driving GPIO lines, only for setting up\nthe electrical properties of them.\n\nWhat we have is optional pin config back-end to set direction\nand set configs such as debounce or open drain by relaying\nthe gpiochip .set_config() callback to pinctrl_gpio_set_config().\nThis function is in for a reason: the\nGPIO driver is a consumer of pinctrl services.\n\nThese:\nextern int pinctrl_request_gpio(unsigned gpio);\nextern void pinctrl_free_gpio(unsigned gpio);\nextern int pinctrl_gpio_direction_input(unsigned gpio);\nextern int pinctrl_gpio_direction_output(unsigned gpio);\nextern int pinctrl_gpio_set_config(unsigned gpio, unsigned long config);\n\nHm I should rename the first two to pinctrl_gpio_request()\nand pinctrl_gpio_free() don't you think... My OCD kicks in.\n\nAnyways: as you can see we even have special callbacks\nto set the lines as input and output, we do not use the\npin config calls with parameters PIN_CONFIG_OUTPUT\nand there isn't even a corresponding PIN_CONFIG_INPUT\nthat will really set the pin to input mode for GPIO.\nAnd that would have been the first refactoring here\n(getting rid of pinctrl_gpio_direction*).\n\nThat is already a bit of a daunting task, and I don't even\nknow if it makes sense :/\n\nRelaying setting the output value or getting the input\nvalue to pinctrl doesn't make sense to me at all.\n\n> ATM the moment there is no gpio_pinctrl_get_config() or something similar to\n> read stuff in the gpio framework from pinconf. Would you be open to add\n> something like this ?\n\nI do not see the use case, but if you can describe it I can respond.\n\n.pin_config_get() in is already seldom\nimplemented correctly and drivers do not read out the hardware\nstate at probe() time. And they don't read out the mux setting\nat all, ever, just set it.\n\nYours,\nLinus Walleij\n--\nTo unsubscribe from this list: send the line \"unsubscribe linux-gpio\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-gpio-owner@vger.kernel.org;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=linaro.org header.i=@linaro.org\n\theader.b=\"FmxZ1ohM\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xz6ZC40r5z9t16\n\tfor ;\n\tFri, 22 Sep 2017 18:48:03 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751928AbdIVIsC (ORCPT );\n\tFri, 22 Sep 2017 04:48:02 -0400","from mail-it0-f49.google.com ([209.85.214.49]:47689 \"EHLO\n\tmail-it0-f49.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751919AbdIVIsB (ORCPT\n\t); Fri, 22 Sep 2017 04:48:01 -0400","by mail-it0-f49.google.com with SMTP id 85so677924ith.2\n\tfor ;\n\tFri, 22 Sep 2017 01:48:00 -0700 (PDT)","by 10.79.164.78 with HTTP; Fri, 22 Sep 2017 01:47:59 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google;\n\th=mime-version:in-reply-to:references:from:date:message-id:subject:to\n\t:cc; bh=pJGx70WhvUUMJfZLVCGXVmftnc9RPx7CNUYzI12BM74=;\n\tb=FmxZ1ohMkspTYbKL6PxZFSavRJlpgCST9Wi71D7+XnGvbTKE04VUlcOBPt4Wx4oCdr\n\t87KDdFNneVVO0pxFzadUcTstH3/4oLinFpMEAXBwV2XxV/WxoPpxzDSC14Ok6QUK/XLX\n\tJdxesGH4UXIVmQ4JzhcwfCwXUD9+4YahN6uZM=","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:mime-version:in-reply-to:references:from:date\n\t:message-id:subject:to:cc;\n\tbh=pJGx70WhvUUMJfZLVCGXVmftnc9RPx7CNUYzI12BM74=;\n\tb=pJtcXlsOzYB1t3k4BU7XxEjubpDKqnQNCVLOEDRmM+M0DzaeLdYVfchmAT9cCaWUir\n\tTauFZCNl73fpnXM2y8PTW99bN+Cvgz0Mw5z1c/j2pASDaQnAMOISv5jcZ369QZHCc1jD\n\tJMqgXAqOYfIDGTF+VOhe6QjDuRr4k3Dc3di6gltA5X2gzjaCsnGnCR+5Z9gc1sqtyE1e\n\t/Hoen8c9E9Z/hYOzXpccY5i0eLNnXnP6r/CfUc/F7hhlSrKzym5ia+WWnca4mtcRmsp8\n\tfFjKULZva6GFgJnqT9qY5JMqT7gLmYYIucooPLBeDn6tTJhq5MbOhDnqTq4aqDO8mhjw\n\t9faQ==","X-Gm-Message-State":"AHPjjUiR+akD3mW1xg28yauEOSPbvxDamdHcnMZGYqdSKTPWxQXnfzAn\n\tjsMzDbIxO9MvyENLUZw1axTAwDYWJBmJa6Rvf0uDtw==","X-Google-Smtp-Source":"AOwi7QCdANp+Gauvn6H7yKQrgg9hbi0yvFFbxHUH97xlVzfvMwoCQF1LOtNqRrVuCeItYB7ysurbq+vybvxFviTrQ1o=","X-Received":"by 10.36.123.200 with SMTP id q191mr4910529itc.83.1506070080364; \n\tFri, 22 Sep 2017 01:48:00 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<1506006009.2703.175.camel@baylibre.com>","References":"<20170920133927.17390-1-jbrunet@baylibre.com>\n\t\n\t<1506006009.2703.175.camel@baylibre.com>","From":"Linus Walleij ","Date":"Fri, 22 Sep 2017 10:47:59 +0200","Message-ID":"","Subject":"Re: [PATCH 0/8] pinctrl: meson: clean pin offsets","To":"Jerome Brunet ","Cc":"Carlo Caione , Kevin Hilman ,\n\t\"linux-gpio@vger.kernel.org\" ,\n\t\"linux-arm-kernel@lists.infradead.org\" \n\t,\n\t\"open list:ARM/Amlogic Meson...\" , \n\t\"linux-kernel@vger.kernel.org\" ,\n\t\"devicetree@vger.kernel.org\" ,\n\tMartin Blumenstingl ","Content-Type":"text/plain; charset=\"UTF-8\"","Sender":"linux-gpio-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"linux-gpio@vger.kernel.org"}},{"id":1777943,"web_url":"http://patchwork.ozlabs.org/comment/1777943/","msgid":"<7hk20fexgy.fsf@baylibre.com>","list_archive_url":null,"date":"2017-09-30T20:35:25","subject":"Re: [PATCH 0/8] pinctrl: meson: clean pin offsets","submitter":{"id":68189,"url":"http://patchwork.ozlabs.org/api/people/68189/","name":"Kevin Hilman","email":"khilman@baylibre.com"},"content":"Jerome Brunet writes:\n\n> The initial goal of this series was move to TEST_N pin from the EE\n> controller to AO controller, where it belongs. This meant modify the\n> EE_OFF value.\n>\n> This offset is a quirk we brought from the vendor driver when it was\n> initially merged. There no reason to keep this around and we could simply\n> let pinctrl figure the pin base value.\n>\n> Removing this offset, while simple, ends up being quite a patch bomb.\n> This is why I split the change over 5 first patches, so the important\n> change, patch #1 remains visible. Of course, to avoid breaking bisect,\n> these first 5 patches should be squashed into one. (If you prefer that I\n> squash it myself, I may have to send you a PR as the patch would exceed\n> VGER 100000 characters limit)\n>\n> The last change is this series, while not directly related, also requires\n> to adjust the gpio-line-names property in DT. Having these changes going\n> together would make it easier to coordinate the DTS changes.\n>\n> This was changeset has been test on gxbb P200, gxl libretech-cc. It was\n> also boot tested on meson8 (Thx Martin!)\n\nReally nice cleanup, thanks!\n\nReviewed-by: Kevin Hilman \n\nKevin\n--\nTo unsubscribe from this list: send the line \"unsubscribe linux-gpio\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-gpio-owner@vger.kernel.org;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=baylibre-com.20150623.gappssmtp.com\n\theader.i=@baylibre-com.20150623.gappssmtp.com\n\theader.b=\"mySi3rpA\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y4Ktt5qK1z9t48\n\tfor ;\n\tSun, 1 Oct 2017 07:35:34 +1100 (AEDT)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751243AbdI3Ufa (ORCPT );\n\tSat, 30 Sep 2017 16:35:30 -0400","from mail-wr0-f173.google.com ([209.85.128.173]:43260 \"EHLO\n\tmail-wr0-f173.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751202AbdI3Uf2 (ORCPT\n\t); Sat, 30 Sep 2017 16:35:28 -0400","by mail-wr0-f173.google.com with SMTP id a43so1594162wrc.0\n\tfor ;\n\tSat, 30 Sep 2017 13:35:28 -0700 (PDT)","from localhost\n\t(LAubervilliers-656-1-171-117.w193-251.abo.wanadoo.fr.\n\t[193.251.56.117]) by smtp.gmail.com with ESMTPSA id\n\tn57sm9697237wrn.29.2017.09.30.13.35.26\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tSat, 30 Sep 2017 13:35:26 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=baylibre-com.20150623.gappssmtp.com; s=20150623;\n\th=from:to:cc:subject:organization:references:user-agent:date\n\t:message-id:mime-version;\n\tbh=a/AXAhiGZZuvmq7hAuVA07BpaoTd8CA/x5KRLlfyXPw=;\n\tb=mySi3rpAG4QhpdO75NiRztBg9iV3sk9ztG+hLWmPkOjVrbLfIiSP7Pt//OoeBwb19P\n\tLKKh0RiCeiLIeBkTKTWr3z5qMqA02IaCnxyV8p9sacf6XupGide/rmcwIXtpWZ9M3F2E\n\tooxHQE6I3/I6ZjkQDTNNs/Gmm55i6Zxfm47A6Fm/hjZX9IeYzdETK6d0ywZpgos1Ot1z\n\tkUmO40A8v2AU8Itut7MuOheoFtmzAjFlco0JCdiL4hn6f5YmkHN9aUEjLG8tUgYRm/rZ\n\tPrCMCndsgSe61zkffXzfwl8Mc/bLjJGSCBl+/k9xWc0vGJqXEWTPy8AOvOwryGbcMVBN\n\tnchA==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:organization:references\n\t:user-agent:date:message-id:mime-version;\n\tbh=a/AXAhiGZZuvmq7hAuVA07BpaoTd8CA/x5KRLlfyXPw=;\n\tb=RkyGf8IszhFf7wirter0JwKJVRjEhsx8Xn0Thcc+uTLdwX+Okh7JECkHwUVkbPqR/l\n\tT30/ran1BJwLTXiijsgvD5YP0F8Qn+Y2EI1wRTbSNdT3R7DdabRQzXdviwm5msXLGknW\n\teXRDFeWZa944svYwvGsTH0lV9hFfJk069u8DbcWx7eGvi0g5lo+Ahxk/fQrNG9PiYfJ1\n\tKFW8BJ9mu4nv1cgKDHd66yE+dYya+SNQS83a3cpz0KsAJg8SiJN/MnZHKAkC239qBcfe\n\tIFZx2ZOVapqcRUq8PIf4Sdhtfahf3hAKR7E/8jjtDYEAuPJIfQZVX7zHgZILRg9SGBSn\n\tGdHA==","X-Gm-Message-State":"AHPjjUhdJ44qIrOH1Bg4SQkMfbqwku9ImzBd0UI8hkcL/Rq19vNguEDk\n\tFAdcezUd9ew3GXdEmRhFe79Uig==","X-Google-Smtp-Source":"AOwi7QAQn70KY6RfuZxRNVyxFQ4YrACabS0pAx/km6307Ep9x6RHBBi8j62p7EWJTlfsWMgLY+5tig==","X-Received":"by 10.223.133.244 with SMTP id 49mr9835296wru.153.1506803727531; \n\tSat, 30 Sep 2017 13:35:27 -0700 (PDT)","From":"Kevin Hilman ","To":"Jerome Brunet ","Cc":"Linus Walleij ,\n\tCarlo Caione , linux-gpio@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tlinux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org,\n\tdevicetree@vger.kernel.org,\n\tMartin Blumenstingl ","Subject":"Re: [PATCH 0/8] pinctrl: meson: clean pin offsets","Organization":"BayLibre","References":"<20170920133927.17390-1-jbrunet@baylibre.com>","User-Agent":"Gnus/5.13 (Gnus v5.13) Emacs/24.5 (gnu/linux)","Date":"Sat, 30 Sep 2017 22:35:25 +0200","Message-ID":"<7hk20fexgy.fsf@baylibre.com>","MIME-Version":"1.0","Content-Type":"text/plain","Sender":"linux-gpio-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"linux-gpio@vger.kernel.org"}},{"id":1777944,"web_url":"http://patchwork.ozlabs.org/comment/1777944/","msgid":"<7hmv5cdiyw.fsf@baylibre.com>","list_archive_url":null,"date":"2017-09-30T20:33:59","subject":"Re: [PATCH 0/8] pinctrl: meson: clean pin offsets","submitter":{"id":68189,"url":"http://patchwork.ozlabs.org/api/people/68189/","name":"Kevin Hilman","email":"khilman@baylibre.com"},"content":"Jerome Brunet writes:\n\n> The initial goal of this series was move to TEST_N pin from the EE\n> controller to AO controller, where it belongs. This meant modify the\n> EE_OFF value.\n>\n> This offset is a quirk we brought from the vendor driver when it was\n> initially merged. There no reason to keep this around and we could simply\n> let pinctrl figure the pin base value.\n>\n> Removing this offset, while simple, ends up being quite a patch bomb.\n> This is why I split the change over 5 first patches, so the important\n> change, patch #1 remains visible. Of course, to avoid breaking bisect,\n> these first 5 patches should be squashed into one. (If you prefer that I\n> squash it myself, I may have to send you a PR as the patch would exceed\n> VGER 100000 characters limit)\n>\n> The last change is this series, while not directly related, also requires\n> to adjust the gpio-line-names property in DT. Having these changes going\n> together would make it easier to coordinate the DTS changes.\n>\n> This was changeset has been test on gxbb P200, gxl libretech-cc. It was\n> also boot tested on meson8 (Thx Martin!)\n\nReally nice cleanup, thanks!\n\nReviewed-by: Kevin Hilman \n\nKevin\n--\nTo unsubscribe from this list: send the line \"unsubscribe linux-gpio\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-gpio-owner@vger.kernel.org;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=baylibre-com.20150623.gappssmtp.com\n\theader.i=@baylibre-com.20150623.gappssmtp.com\n\theader.b=\"P2qJ1qPJ\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y4KvB4TDHz9t2Q\n\tfor ;\n\tSun, 1 Oct 2017 07:35:50 +1100 (AEDT)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751883AbdI3Uff (ORCPT );\n\tSat, 30 Sep 2017 16:35:35 -0400","from mail-wr0-f182.google.com ([209.85.128.182]:43261 \"EHLO\n\tmail-wr0-f182.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751379AbdI3Ufb (ORCPT\n\t); Sat, 30 Sep 2017 16:35:31 -0400","by mail-wr0-f182.google.com with SMTP id a43so1594188wrc.0\n\tfor ;\n\tSat, 30 Sep 2017 13:35:30 -0700 (PDT)","from localhost\n\t(LAubervilliers-656-1-171-117.w193-251.abo.wanadoo.fr.\n\t[193.251.56.117]) by smtp.gmail.com with ESMTPSA id\n\ti7sm4817751wmc.18.2017.09.30.13.35.28\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tSat, 30 Sep 2017 13:35:28 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=baylibre-com.20150623.gappssmtp.com; s=20150623;\n\th=from:to:cc:subject:organization:references:date:message-id\n\t:user-agent:mime-version;\n\tbh=a/AXAhiGZZuvmq7hAuVA07BpaoTd8CA/x5KRLlfyXPw=;\n\tb=P2qJ1qPJxPdij4RNGPW4+I3LIx8IE41kd+GHMljYMrL6T6iTjEI4prJsGNHjZCvCo0\n\tl22vT/MOnSoXwRGIBYyMT9V8FPnHad/GESukrDYo1eYZYaRLeaMPnaOUuuYlWR4t4Z1s\n\tyoakSH0BGMXvlciatVq9GsVEvzvlFKKYBLKN0Y13ngKwKDke11E/Lkq2fYe9Y084aqa7\n\trauyu+vhZVD2K82y6NDrUkHC1ij19tmR2kxZkP4wqS+sGSVSq0eOfy7O9l197S8mkMrT\n\tMiSZ9sKcfb31QLyFDU1kF2L9Sg6+nVb9t2sR+7RWOyk4n6CPOHhazt2NXWX1T/OHaNqc\n\tbOkg==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:organization:references:date\n\t:message-id:user-agent:mime-version;\n\tbh=a/AXAhiGZZuvmq7hAuVA07BpaoTd8CA/x5KRLlfyXPw=;\n\tb=dh4+wKhPzWEa7TJpcLzUxXBBnJd3lq94XU/4SKpH+4FJEiCG2NwYFHoXKbbW+aQvQf\n\tNnTo0pGJkljEU/HgZjFrDu382vh55ZnLHNgp+CumtY1dBG4BRO9KAes6tlytO7Mo1pII\n\t1K8ZSvRTjF4R8JW2AuiGGokC/qsgRHOzoogGPm7fjADBmHG8q9dG2eWPGuNLoJp9Tbt5\n\tFadB6oDvfQML6tw6VR2x2YM/y27F5/nZySSc/lpb/usCRU+0hJkwVSEdreJRkyZyr2c/\n\tZlGQI4nPbCQnPMQHRsVjGHuOlmYj1E2jW74QUwrzZpwjNamcjieyKHAoMJoZZoYMQ0nf\n\tOHhQ==","X-Gm-Message-State":"AHPjjUg7WjuOlTzguyZCJX22mdacVmkCIUPnR8duvhEFxjwUey59/G0k\n\tfLoPVNKS+SVxukapF/F6+dGwEQ==","X-Google-Smtp-Source":"AOwi7QCQT1qubKkI3EdwvZ9T+Q3i8xaJWxhJFwPVJBKNUyI1BePbUhKYJs3dXu4qK2gCAWwcNb+IkQ==","X-Received":"by 10.223.195.110 with SMTP id e43mr9233449wrg.189.1506803729852;\n\tSat, 30 Sep 2017 13:35:29 -0700 (PDT)","From":"Kevin Hilman ","To":"Jerome Brunet ","Cc":"Linus Walleij ,\n\tCarlo Caione , linux-gpio@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tlinux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org,\n\tdevicetree@vger.kernel.org,\n\tMartin Blumenstingl ","Subject":"Re: [PATCH 0/8] pinctrl: meson: clean pin offsets","Organization":"BayLibre","References":"<20170920133927.17390-1-jbrunet@baylibre.com>","Date":"Sat, 30 Sep 2017 22:33:59 +0200","Message-ID":"<7hmv5cdiyw.fsf@baylibre.com>","User-Agent":"Gnus/5.13 (Gnus v5.13) Emacs/24.5 (gnu/linux)","MIME-Version":"1.0","Content-Type":"text/plain","Sender":"linux-gpio-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"linux-gpio@vger.kernel.org"}}]