[{"id":1784886,"web_url":"http://patchwork.ozlabs.org/comment/1784886/","msgid":"<20171011185719.GL25517@bhelgaas-glaptop.roam.corp.google.com>","list_archive_url":null,"date":"2017-10-11T18:57:19","subject":"Re: [PATCH 0/5] arm64: add ls1012a and ls1046a pcie support","submitter":{"id":67298,"url":"http://patchwork.ozlabs.org/api/people/67298/","name":"Bjorn Helgaas","email":"helgaas@kernel.org"},"content":"On Tue, Sep 19, 2017 at 05:26:53PM +0800, Zhiqiang Hou wrote:\n> From: Hou Zhiqiang \n> \n> This patch set adds ls1012a MSI and PCIe support, including driver\n> and device tree nodes. The ls1046a's MSI support patch and PCIe\n> driver patch has been applied, so only adds the PCIe device tree\n> nodes.\n> \n> Hou Zhiqiang (5):\n> irqchip/ls-scfg-msi: add LS1012a MSI support\n> arm64: dts: ls1012a: Add MSI controller DT node\n> PCI: layerscape: Add support for ls1012a\n> arm64: dts: ls1012a: Add PCIe controller DT node\n> arm64: dts: ls1046a: add PCIe controller DT nodes\n> \n> .../interrupt-controller/fsl,ls-scfg-msi.txt | 1 +\n> .../devicetree/bindings/pci/layerscape-pci.txt | 1 +\n> arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 31 +++++++++\n> arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 75 ++++++++++++++++++++++\n> drivers/irqchip/irq-ls-scfg-msi.c | 1 +\n> drivers/pci/dwc/pci-layerscape.c | 1 +\n> 6 files changed, 110 insertions(+)\n\nI'm not 100% sure who should take these. They trivially touch PCI and\nI haven't seen anybody else respond, so I put them on\npci/host-layerscape with Rob's acks.\n\nIf somebody else wants to take them, just let me know and I'll drop\nthem.\n\nThey really should be acked by Minghuan or Mingkai, who are listed as\nthe maintainers of drivers/pci/dwc/pci-layerscape.c and are presumably\nresponsible for the related dtsi files, too.\n\nThomas, Jason, and Marc are listed as maintainers of\ndrivers/irqchip/irq-ls-scfg-msi.c. It's a trivial change, but I added\nthem to the cc list.\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","mail.kernel.org;\n\tdmarc=none (p=none dis=none) header.from=kernel.org","mail.kernel.org;\n\tspf=none smtp.mailfrom=helgaas@kernel.org"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3yC3Bb2Lx1z9t2Z\n\tfor ;\n\tThu, 12 Oct 2017 05:57:27 +1100 (AEDT)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1752955AbdJKS5Z (ORCPT\n\t);\n\tWed, 11 Oct 2017 14:57:25 -0400","from mail.kernel.org ([198.145.29.99]:57018 \"EHLO mail.kernel.org\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S1752308AbdJKS5Y (ORCPT );\n\tWed, 11 Oct 2017 14:57:24 -0400","from localhost (unknown [69.71.4.159])\n\t(using TLSv1.2 with cipher DHE-RSA-AES128-SHA (128/128 bits))\n\t(No client certificate requested)\n\tby mail.kernel.org (Postfix) with ESMTPSA id 6906C204EE;\n\tWed, 11 Oct 2017 18:57:23 +0000 (UTC)"],"DMARC-Filter":"OpenDMARC Filter v1.3.2 mail.kernel.org 6906C204EE","Date":"Wed, 11 Oct 2017 13:57:19 -0500","From":"Bjorn Helgaas ","To":"Zhiqiang Hou ","Cc":"linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,\n\tlinux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinuxppc-dev@lists.ozlabs.org, marc.zyngier@arm.com,\n\trobh+dt@kernel.org, mark.rutland@arm.com, bhelgaas@google.com,\n\tshawnguo@kernel.org, Mingkai.Hu@nxp.com, Minghuan.Lian@nxp.com,\n\troy.zang@nxp.com, Thomas Gleixner ,\n\tJason Cooper ","Subject":"Re: [PATCH 0/5] arm64: add ls1012a and ls1046a pcie support","Message-ID":"<20171011185719.GL25517@bhelgaas-glaptop.roam.corp.google.com>","References":"<20170919092658.22482-1-Zhiqiang.Hou@nxp.com>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20170919092658.22482-1-Zhiqiang.Hou@nxp.com>","User-Agent":"Mutt/1.5.21 (2010-09-15)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1785111,"web_url":"http://patchwork.ozlabs.org/comment/1785111/","msgid":"","list_archive_url":null,"date":"2017-10-12T03:12:47","subject":"RE: [PATCH 0/5] arm64: add ls1012a and ls1046a pcie support","submitter":{"id":68016,"url":"http://patchwork.ozlabs.org/api/people/68016/","name":"M.h. Lian","email":"Minghuan.Lian@nxp.com"},"content":"Hi Bjorn,\n\nI greatly appreciate for your review and picking up them.\n\nAcked-by: Minghuan Lian \n\n\n> -----Original Message-----\n> From: Bjorn Helgaas [mailto:helgaas@kernel.org]\n> Sent: Thursday, October 12, 2017 2:57 AM\n> To: Z.q. Hou \n> Cc: linux-kernel@vger.kernel.org; devicetree@vger.kernel.org; linux-\n> pci@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linuxppc-\n> dev@lists.ozlabs.org; marc.zyngier@arm.com; robh+dt@kernel.org;\n> mark.rutland@arm.com; bhelgaas@google.com; shawnguo@kernel.org;\n> Mingkai Hu ; M.h. Lian ; Roy\n> Zang ; Thomas Gleixner ; Jason\n> Cooper \n> Subject: Re: [PATCH 0/5] arm64: add ls1012a and ls1046a pcie support\n> \n> On Tue, Sep 19, 2017 at 05:26:53PM +0800, Zhiqiang Hou wrote:\n> > From: Hou Zhiqiang \n> >\n> > This patch set adds ls1012a MSI and PCIe support, including driver and\n> > device tree nodes. The ls1046a's MSI support patch and PCIe driver\n> > patch has been applied, so only adds the PCIe device tree nodes.\n> >\n> > Hou Zhiqiang (5):\n> > irqchip/ls-scfg-msi: add LS1012a MSI support\n> > arm64: dts: ls1012a: Add MSI controller DT node\n> > PCI: layerscape: Add support for ls1012a\n> > arm64: dts: ls1012a: Add PCIe controller DT node\n> > arm64: dts: ls1046a: add PCIe controller DT nodes\n> >\n> > .../interrupt-controller/fsl,ls-scfg-msi.txt | 1 +\n> > .../devicetree/bindings/pci/layerscape-pci.txt | 1 +\n> > arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 31 +++++++++\n> > arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 75\n> ++++++++++++++++++++++\n> > drivers/irqchip/irq-ls-scfg-msi.c | 1 +\n> > drivers/pci/dwc/pci-layerscape.c | 1 +\n> > 6 files changed, 110 insertions(+)\n> \n> I'm not 100% sure who should take these. They trivially touch PCI and I haven't\n> seen anybody else respond, so I put them on pci/host-layerscape with Rob's acks.\n> \n> If somebody else wants to take them, just let me know and I'll drop them.\n> \n> They really should be acked by Minghuan or Mingkai, who are listed as the\n> maintainers of drivers/pci/dwc/pci-layerscape.c and are presumably responsible\n> for the related dtsi files, too.\n> \n> Thomas, Jason, and Marc are listed as maintainers of drivers/irqchip/irq-ls-scfg-\n> msi.c. It's a trivial change, but I added them to the cc list.\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=nxp.com header.i=@nxp.com header.b=\"s2FU1Gu1\"; \n\tdkim-atps=neutral","spf=none (sender IP is )\n\tsmtp.mailfrom=minghuan.lian@nxp.com; "],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3yCGBK0LdVz9t2Z\n\tfor ;\n\tThu, 12 Oct 2017 14:12:57 +1100 (AEDT)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1752123AbdJLDMy (ORCPT\n\t);\n\tWed, 11 Oct 2017 23:12:54 -0400","from mail-eopbgr10046.outbound.protection.outlook.com\n\t([40.107.1.46]:31264\n\t\"EHLO EUR02-HE1-obe.outbound.protection.outlook.com\"\n\trhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP\n\tid S1752029AbdJLDMx (ORCPT );\n\tWed, 11 Oct 2017 23:12:53 -0400","from VI1PR04MB1615.eurprd04.prod.outlook.com (10.164.84.149) by\n\tVI1PR04MB3086.eurprd04.prod.outlook.com (10.170.228.160) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id\n\t15.20.77.7; Thu, 12 Oct 2017 03:12:48 +0000","from VI1PR04MB1615.eurprd04.prod.outlook.com\n\t([fe80::a974:309e:c04:2ec7]) by\n\tVI1PR04MB1615.eurprd04.prod.outlook.com\n\t([fe80::a974:309e:c04:2ec7%13]) with mapi id 15.20.0077.020;\n\tThu, 12 Oct 2017 03:12:47 +0000"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version;\n\tbh=Oi12ty1bbB47MIOHz/rFqxzH/B0eee8nUk3trPDHjpg=;\n\tb=s2FU1Gu1ewGbzEPMc9yWsvKckfxf3qY9H3S61OIuvhDUNUrn4yXYDRNuVly5H+kOAee6R6MNxFgoIurnWj8Xgbb2lMb48Yvhlp4t30h8+QkzReBM97bj5z5BBY4+D5QDN49xGUuwC0vVOQtYf2g+rKCB2I/RSqLn4eIvFM1ql98=","From":"\"M.h. Lian\" ","To":"Bjorn Helgaas , \"Z.q. Hou\" ","CC":"\"linux-kernel@vger.kernel.org\" ,\n\t\"devicetree@vger.kernel.org\" ,\n\t\"linux-pci@vger.kernel.org\" ,\n\t\"linux-arm-kernel@lists.infradead.org\" \n\t,\n\t\"linuxppc-dev@lists.ozlabs.org\" ,\n\t\"marc.zyngier@arm.com\" ,\n\t\"robh+dt@kernel.org\" ,\n\t\"mark.rutland@arm.com\" ,\n\t\"bhelgaas@google.com\" ,\n\t\"shawnguo@kernel.org\" ,\n\t\"Mingkai Hu\" , Roy Zang ,\n\tThomas Gleixner , Jason Cooper ","Subject":"RE: [PATCH 0/5] arm64: add ls1012a and ls1046a pcie support","Thread-Topic":"[PATCH 0/5] arm64: add ls1012a and ls1046a pcie support","Thread-Index":"AQHTMSvikudq0eOiSkS112L7YCi+saLfIy6AgACJN3A=","Date":"Thu, 12 Oct 2017 03:12:47 +0000","Message-ID":"","References":"<20170919092658.22482-1-Zhiqiang.Hou@nxp.com>\n\t<20171011185719.GL25517@bhelgaas-glaptop.roam.corp.google.com>","In-Reply-To":"<20171011185719.GL25517@bhelgaas-glaptop.roam.corp.google.com>","Accept-Language":"zh-CN, en-US","Content-Language":"en-US","X-MS-Has-Attach":"","X-MS-TNEF-Correlator":"","x-originating-ip":"[192.158.241.86]","x-ms-publictraffictype":"Email","x-microsoft-exchange-diagnostics":"1; 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The ls1046a's MSI support patch and PCIe\n> > driver patch has been applied, so only adds the PCIe device tree\n> > nodes.\n> > \n> > Hou Zhiqiang (5):\n> > irqchip/ls-scfg-msi: add LS1012a MSI support\n> > arm64: dts: ls1012a: Add MSI controller DT node\n> > PCI: layerscape: Add support for ls1012a\n> > arm64: dts: ls1012a: Add PCIe controller DT node\n> > arm64: dts: ls1046a: add PCIe controller DT nodes\n> > \n> > .../interrupt-controller/fsl,ls-scfg-msi.txt | 1 +\n> > .../devicetree/bindings/pci/layerscape-pci.txt | 1 +\n> > arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 31 +++++++++\n> > arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 75 ++++++++++++++++++++++\n> > drivers/irqchip/irq-ls-scfg-msi.c | 1 +\n> > drivers/pci/dwc/pci-layerscape.c | 1 +\n> > 6 files changed, 110 insertions(+)\n> \n> I'm not 100% sure who should take these. They trivially touch PCI and\n> I haven't seen anybody else respond, so I put them on\n> pci/host-layerscape with Rob's acks.\n> \n> If somebody else wants to take them, just let me know and I'll drop\n> them.\n> \n> They really should be acked by Minghuan or Mingkai, who are listed as\n> the maintainers of drivers/pci/dwc/pci-layerscape.c and are presumably\n> responsible for the related dtsi files, too.\n> \n> Thomas, Jason, and Marc are listed as maintainers of\n> drivers/irqchip/irq-ls-scfg-msi.c. It's a trivial change, but I added\n> them to the cc list.\n\nFeel free to pick them up.\n\nAcked-by: Thomas Gleixner \n\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3yCPTY3lVXz9t2d\n\tfor ;\n\tThu, 12 Oct 2017 19:41:37 +1100 (AEDT)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1752796AbdJLIlg (ORCPT\n\t);\n\tThu, 12 Oct 2017 04:41:36 -0400","from Galois.linutronix.de ([146.0.238.70]:36116 \"EHLO\n\tGalois.linutronix.de\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751384AbdJLIlf (ORCPT\n\t); Thu, 12 Oct 2017 04:41:35 -0400","from [2a01:598:9906:5180:b183:3472:a579:7abf] (helo=nanos)\n\tby Galois.linutronix.de with esmtpsa\n\t(TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256)\n\t(Exim 4.80) (envelope-from )\n\tid 1e2Z3W-0006P2-5D; Thu, 12 Oct 2017 10:41:26 +0200"],"Date":"Thu, 12 Oct 2017 10:41:18 +0200 (CEST)","From":"Thomas Gleixner ","To":"Bjorn Helgaas ","cc":"Zhiqiang Hou , linux-kernel@vger.kernel.org,\n\tdevicetree@vger.kernel.org, linux-pci@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tlinuxppc-dev@lists.ozlabs.org, marc.zyngier@arm.com,\n\trobh+dt@kernel.org, mark.rutland@arm.com, bhelgaas@google.com,\n\tshawnguo@kernel.org, Mingkai.Hu@nxp.com, Minghuan.Lian@nxp.com,\n\troy.zang@nxp.com, Jason Cooper ","Subject":"Re: [PATCH 0/5] arm64: add ls1012a and ls1046a pcie support","In-Reply-To":"<20171011185719.GL25517@bhelgaas-glaptop.roam.corp.google.com>","Message-ID":"","References":"<20170919092658.22482-1-Zhiqiang.Hou@nxp.com>\n\t<20171011185719.GL25517@bhelgaas-glaptop.roam.corp.google.com>","User-Agent":"Alpine 2.20 (DEB 67 2015-01-07)","MIME-Version":"1.0","Content-Type":"text/plain; charset=US-ASCII","X-Linutronix-Spam-Score":"-1.0","X-Linutronix-Spam-Level":"-","X-Linutronix-Spam-Status":"No , -1.0 points, 5.0 required, ALL_TRUSTED=-1,\n\tSHORTCIRCUIT=-0.0001","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}}]