[{"id":1785911,"web_url":"http://patchwork.ozlabs.org/comment/1785911/","msgid":"<20171012224540.GE18706@codeaurora.org>","list_archive_url":null,"date":"2017-10-12T22:45:40","subject":"Re: [PATCH v4 0/9] Mediatek MT2712 clock and scpsys support","submitter":{"id":6071,"url":"http://patchwork.ozlabs.org/api/people/6071/","name":"Stephen Boyd","email":"sboyd@codeaurora.org"},"content":"On 09/19, Weiyi Lu wrote:\n> This series is based on v4.14-rc1 and composed of\n> clock control (PATCH 1-4) and scpsys control (PATCH 5-9)\n\nWhat's the merge plan? Can I apply the clk ones to clk tree and\nignore the rest?","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=codeaurora.org header.i=@codeaurora.org\n\theader.b=\"Nhsr+AoH\"; \n\tdkim=fail reason=\"signature verification failed\" (1024-bit key)\n\theader.d=codeaurora.org header.i=@codeaurora.org header.b=\"Anb5amkk\"; \n\tdkim-atps=neutral","pdx-caf-mail.web.codeaurora.org;\n\tdmarc=none (p=none dis=none) header.from=codeaurora.org","pdx-caf-mail.web.codeaurora.org;\n\tspf=none smtp.mailfrom=sboyd@codeaurora.org"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3yCmCX4bslz9sNw\n\tfor ;\n\tFri, 13 Oct 2017 09:45:44 +1100 (AEDT)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1753393AbdJLWpm (ORCPT\n\t);\n\tThu, 12 Oct 2017 18:45:42 -0400","from smtp.codeaurora.org ([198.145.29.96]:58232 \"EHLO\n\tsmtp.codeaurora.org\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1753203AbdJLWpl (ORCPT\n\t); Thu, 12 Oct 2017 18:45:41 -0400","by smtp.codeaurora.org (Postfix, from userid 1000)\n\tid 5E8D560585; Thu, 12 Oct 2017 22:45:41 +0000 (UTC)","from localhost (i-global254.qualcomm.com [199.106.103.254])\n\t(using TLSv1.2 with cipher DHE-RSA-AES128-SHA (128/128 bits))\n\t(No client certificate requested)\n\t(Authenticated sender: sboyd@smtp.codeaurora.org)\n\tby smtp.codeaurora.org (Postfix) with ESMTPSA id CCD7B601D2;\n\tThu, 12 Oct 2017 22:45:40 +0000 (UTC)"],"DKIM-Signature":["v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org;\n\ts=default; t=1507848341;\n\tbh=3e3VoGoc92J2K1B/3YMbZ3TMgSw+41yiQLJYubLzZo8=;\n\th=Date:From:To:Cc:Subject:References:In-Reply-To:From;\n\tb=Nhsr+AoHiAjRpmW+b2xBmRn2vxrUqmbiaKMTusFIsEGH5mZJfnsZ8GK9e9mPWys2R\n\txx1H1dCY2N7fqYcGMBjYmchxNRfMFrooSe3SkIxMHeHmGKtTUlh9khdB7pUKYIuf6k\n\tN5ypKJ86zp09U7CPojxsvmTMQzeqLXwANu/bCSyM=","v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org;\n\ts=default; t=1507848340;\n\tbh=3e3VoGoc92J2K1B/3YMbZ3TMgSw+41yiQLJYubLzZo8=;\n\th=Date:From:To:Cc:Subject:References:In-Reply-To:From;\n\tb=Anb5amkknUC9Lt7jCFwnz0P5F52n1MsMqlUyBUCIguV1FMusipKzpRH1GZyhWqQYA\n\tD3ug3RMlgHHVtYIKyIM7au+oZYy45jFicPsoY7DGqnMKoefsvp/AWkRyg0MgWPb763\n\teRyH2G0ezR+gd/Un72+tvakroALsDk2ivogehO3c="],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tpdx-caf-mail.web.codeaurora.org","X-Spam-Level":"","X-Spam-Status":"No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00,\n\tDKIM_SIGNED,\n\tT_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0","DMARC-Filter":"OpenDMARC Filter v1.3.2 smtp.codeaurora.org CCD7B601D2","Date":"Thu, 12 Oct 2017 15:45:40 -0700","From":"Stephen Boyd ","To":"Weiyi Lu ","Cc":"Matthias Brugger , Rob Herring ,\n\tJames Liao ,\n\tFan Chen , devicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,\n\tlinux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org,\n\tsrv_heupstream@mediatek.com","Subject":"Re: [PATCH v4 0/9] Mediatek MT2712 clock and scpsys support","Message-ID":"<20171012224540.GE18706@codeaurora.org>","References":"<1505793630-12590-1-git-send-email-weiyi.lu@mediatek.com>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<1505793630-12590-1-git-send-email-weiyi.lu@mediatek.com>","User-Agent":"Mutt/1.5.21 (2010-09-15)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1786354,"web_url":"http://patchwork.ozlabs.org/comment/1786354/","msgid":"","list_archive_url":null,"date":"2017-10-13T14:50:43","subject":"Re: [PATCH v4 0/9] Mediatek MT2712 clock and scpsys support","submitter":{"id":19886,"url":"http://patchwork.ozlabs.org/api/people/19886/","name":"Matthias Brugger","email":"matthias.bgg@gmail.com"},"content":"On 10/13/2017 12:45 AM, Stephen Boyd wrote:\n> On 09/19, Weiyi Lu wrote:\n>> This series is based on v4.14-rc1 and composed of\n>> clock control (PATCH 1-4) and scpsys control (PATCH 5-9)\n> \n> What's the merge plan? Can I apply the clk ones to clk tree and\n> ignore the rest?\n> \n\nYes, please do so. I'll take scpsys, which depends on the clock patches.\n\nRegards,\nMatthias\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"gGwwhcYf\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3yD9dP6vZxz9sRW\n\tfor ;\n\tSat, 14 Oct 2017 01:51:05 +1100 (AEDT)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1753454AbdJMOut (ORCPT\n\t);\n\tFri, 13 Oct 2017 10:50:49 -0400","from mail-wm0-f66.google.com ([74.125.82.66]:55048 \"EHLO\n\tmail-wm0-f66.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1753394AbdJMOur (ORCPT\n\t); Fri, 13 Oct 2017 10:50:47 -0400","by mail-wm0-f66.google.com with SMTP id i124so22291987wmf.3;\n\tFri, 13 Oct 2017 07:50:46 -0700 (PDT)","from ziggy.stardust (123.154.133.37.dynamic.jazztel.es.\n\t[37.133.154.123]) by smtp.gmail.com with ESMTPSA id\n\tm16sm1184302edc.7.2017.10.13.07.50.44\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tFri, 13 Oct 2017 07:50:44 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=subject:to:cc:references:from:message-id:date:user-agent\n\t:mime-version:in-reply-to:content-language:content-transfer-encoding; \n\tbh=HtxnqwxeveQRdueltnhGj/nxxbBnFW9MnjZ9rbp8VxM=;\n\tb=gGwwhcYfhT+mt8rLQCYsuh9BIDazWIqDZHFtzr+e8/VDtKVj1P4bwBuo1SKFEdlxHK\n\tjsB5dkLfHGMeCdWAuD/58qrPrKKIOv9xsTazouXDsVJOVhm6slD+oAOWCZl9vVz5fZbz\n\tXU5EEwrsNemumw5vQ1BVKJii0kPz6qMYsHVmZlKzYp78cARoCkEdPT7hhkavHvZUBqN4\n\tku+fzS46jbp0Qvmn29nQhWDTFd/m53bpbtDFsX0xrDHDaHU1svG8dd21ZiWykDHhoBtu\n\tS8ALBvUkV9kNNCqxI8K369zYvTzMjwz1YPgEyY7Q4ietLNndnpf2v+zTx7CAjVv0enJz\n\tA4Vw==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:subject:to:cc:references:from:message-id:date\n\t:user-agent:mime-version:in-reply-to:content-language\n\t:content-transfer-encoding;\n\tbh=HtxnqwxeveQRdueltnhGj/nxxbBnFW9MnjZ9rbp8VxM=;\n\tb=dZBjD752zL6DlsSe/VLSfSzLdrfKsAuWePwfkklbdsysbS/n4gC9VkHFHqfAqXm0Xi\n\tILeE+AEQTmelnh0AJSkXW6ccMQezDOikmUIqAe5VE8D7DQR25+meb3ca/aEHiIt0vPnT\n\t0AErvRWfmHLmyjqxxeqcOY2OHTKLqtwnwgE7SiRxYOV+WylukOOwNFDIuLRtjNpzC8oV\n\tKzxsDtd842myOy71rx8+RCxDiXk4qtdpV/WWVvy/7qUqfzuC1zLhlA45HoMuvLM53DUN\n\tP3fbzofFOswLEZk2T4q5965EbhThk29m89y72+IxEX+OtyvhUvwIft37j/LbpLq45jBm\n\t42ow==","X-Gm-Message-State":"AMCzsaXde3oAVAvXH7keUi19h0t2zbJYlg83CwZdbex00c3mknh7tQNV\n\ttbjwVNaoaHY86hmc6MKvhkRR8h3y","X-Google-Smtp-Source":"AOwi7QDn+ggttapxC+zNXnXcM6b2PPSCuyEVXWw8YmLmCkxFM3Tg2Nv6eZwCq5npydptPF1Sue7JqA==","X-Received":"by 10.80.135.219 with SMTP id 27mr2481569edz.203.1507906245460; \n\tFri, 13 Oct 2017 07:50:45 -0700 (PDT)","Subject":"Re: [PATCH v4 0/9] Mediatek MT2712 clock and scpsys support","To":"Stephen Boyd , Weiyi Lu ","Cc":"Rob Herring , James Liao ,\n\tFan Chen , devicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,\n\tlinux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org,\n\tsrv_heupstream@mediatek.com","References":"<1505793630-12590-1-git-send-email-weiyi.lu@mediatek.com>\n\t<20171012224540.GE18706@codeaurora.org>","From":"Matthias Brugger ","Message-ID":"","Date":"Fri, 13 Oct 2017 16:50:43 +0200","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.4.0","MIME-Version":"1.0","In-Reply-To":"<20171012224540.GE18706@codeaurora.org>","Content-Type":"text/plain; charset=utf-8; format=flowed","Content-Language":"en-US","Content-Transfer-Encoding":"7bit","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1787164,"web_url":"http://patchwork.ozlabs.org/comment/1787164/","msgid":"<1508136134.20464.49.camel@mtksdaap41>","list_archive_url":null,"date":"2017-10-16T06:42:14","subject":"Re: [PATCH v4 0/9] Mediatek MT2712 clock and scpsys support","submitter":{"id":72166,"url":"http://patchwork.ozlabs.org/api/people/72166/","name":"Weiyi Lu","email":"weiyi.lu@mediatek.com"},"content":"On Fri, 2017-10-13 at 16:50 +0200, Matthias Brugger wrote:\n> \n> On 10/13/2017 12:45 AM, Stephen Boyd wrote:\n> > On 09/19, Weiyi Lu wrote:\n> >> This series is based on v4.14-rc1 and composed of\n> >> clock control (PATCH 1-4) and scpsys control (PATCH 5-9)\n> > \n> > What's the merge plan? Can I apply the clk ones to clk tree and\n> > ignore the rest?\n> > \n> \n> Yes, please do so. I'll take scpsys, which depends on the clock patches.\n> \n> Regards,\n> Matthias\n\nHi Stephen & Matthias,\n\nI will start to separate this patch set into three series\n(clk/scpsys/dts) when I send the next version.\n\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3yFpf65qxfz9sNr\n\tfor ;\n\tMon, 16 Oct 2017 17:42:22 +1100 (AEDT)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751108AbdJPGmV (ORCPT\n\t);\n\tMon, 16 Oct 2017 02:42:21 -0400","from mailgw01.mediatek.com ([210.61.82.183]:6507 \"EHLO\n\tmailgw01.mediatek.com\" rhost-flags-OK-FAIL-OK-FAIL) by\n\tvger.kernel.org with ESMTP id S1750880AbdJPGmU (ORCPT\n\t); Mon, 16 Oct 2017 02:42:20 -0400","from mtkcas07.mediatek.inc [(172.21.101.84)] by\n\tmailgw01.mediatek.com (envelope-from )\n\t(mhqrelay.mediatek.com ESMTP with TLS)\n\twith ESMTP id 788267222; Mon, 16 Oct 2017 14:42:15 +0800","from mtkcas09.mediatek.inc (172.21.101.178) by\n\tmtkmbs03n2.mediatek.inc (172.21.101.182) with Microsoft SMTP Server\n\t(TLS) id 15.0.1210.3; Mon, 16 Oct 2017 14:42:13 +0800","from [172.21.77.4] (172.21.77.4) by mtkcas09.mediatek.inc\n\t(172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via\n\tFrontend Transport; Mon, 16 Oct 2017 14:42:14 +0800"],"X-UUID":"77dbbdcef896447b9e32f0814801dfc1-20171016","Message-ID":"<1508136134.20464.49.camel@mtksdaap41>","Subject":"Re: [PATCH v4 0/9] Mediatek MT2712 clock and scpsys support","From":"Weiyi Lu ","To":"Matthias Brugger ,\n\tStephen Boyd ","CC":"Rob Herring , James Liao ,\n\tFan Chen , ,\n\t, ,\n\t, ,\n\t","Date":"Mon, 16 Oct 2017 14:42:14 +0800","In-Reply-To":"","References":"<1505793630-12590-1-git-send-email-weiyi.lu@mediatek.com>\n\t<20171012224540.GE18706@codeaurora.org>\n\t","Content-Type":"text/plain; charset=\"UTF-8\"","X-Mailer":"Evolution 3.2.3-0ubuntu6 ","Content-Transfer-Encoding":"7bit","MIME-Version":"1.0","X-MTK":"N","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1787323,"web_url":"http://patchwork.ozlabs.org/comment/1787323/","msgid":"<4b2b1a94-2a0e-4c5e-030e-d35edb3ac2f1@gmail.com>","list_archive_url":null,"date":"2017-10-16T10:29:25","subject":"Re: [PATCH v4 0/9] Mediatek MT2712 clock and scpsys support","submitter":{"id":19886,"url":"http://patchwork.ozlabs.org/api/people/19886/","name":"Matthias Brugger","email":"matthias.bgg@gmail.com"},"content":"On 10/16/2017 08:42 AM, Weiyi Lu wrote:\n> On Fri, 2017-10-13 at 16:50 +0200, Matthias Brugger wrote:\n>>\n>> On 10/13/2017 12:45 AM, Stephen Boyd wrote:\n>>> On 09/19, Weiyi Lu wrote:\n>>>> This series is based on v4.14-rc1 and composed of\n>>>> clock control (PATCH 1-4) and scpsys control (PATCH 5-9)\n>>>\n>>> What's the merge plan? Can I apply the clk ones to clk tree and\n>>> ignore the rest?\n>>>\n>>\n>> Yes, please do so. I'll take scpsys, which depends on the clock patches.\n>>\n>> Regards,\n>> Matthias\n> \n> Hi Stephen & Matthias,\n> \n> I will start to separate this patch set into three series\n> (clk/scpsys/dts) when I send the next version.\n> \n\nThere are no comments on the clk patches, so no need to resend them, if Stephen \nis ok with taking patch 1,2,3.\n\nIf you want you can split out patch 4 and 9, but for me it's ok if they go \ntogether with the scpsys driver. When scpsys is ready I will take them all \nthrough my tree.\n\nRegards,\nMatthias\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"KEH5aJvs\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3yFvhF6w8nz9s7B\n\tfor ;\n\tMon, 16 Oct 2017 21:29:33 +1100 (AEDT)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751961AbdJPK3c (ORCPT\n\t);\n\tMon, 16 Oct 2017 06:29:32 -0400","from mail-pf0-f194.google.com ([209.85.192.194]:53735 \"EHLO\n\tmail-pf0-f194.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751501AbdJPK3b (ORCPT\n\t); Mon, 16 Oct 2017 06:29:31 -0400","by mail-pf0-f194.google.com with SMTP id t188so12995690pfd.10;\n\tMon, 16 Oct 2017 03:29:30 -0700 (PDT)","from ziggy.stardust ([92.57.80.122])\n\tby smtp.gmail.com with ESMTPSA id\n\tc185sm3164796pfb.112.2017.10.16.03.29.27\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tMon, 16 Oct 2017 03:29:29 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=subject:to:cc:references:from:message-id:date:user-agent\n\t:mime-version:in-reply-to:content-language:content-transfer-encoding; \n\tbh=Pw+rSZKhiGmvCbFaplEjpupKfxUiy8DhLX5Gwy2RsWo=;\n\tb=KEH5aJvsib+AsnKC16sg35rcIgdGOCCa4NOU+TtvJPHbk2LwibJhW1NoB8OWq6qzwo\n\txg5jZr9T2/r/woztKA50XwFOEcFrVL/as6Bpk70M1laQAw05uC813Ybv2WQIpv2vTXtf\n\turbWS85Uigws8RZeYh0QBf9d362j2BaBzuAmHhwI2R8w6HoI5ftarVGPGQhkRRmJibcS\n\tOj7oV8WZkYpnu6Ev/G/lLILoqkzAMdNIN1y8gWr8De79Tu7eprEpeQZAI5w4KJN+HDHF\n\tJbPN8UGaFgqylAWcGMtUf+NCJyR95eK5wFwmq+Z6h+mMQbQwJpkemTza7Z3jd5Md4qGe\n\tvikg==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:subject:to:cc:references:from:message-id:date\n\t:user-agent:mime-version:in-reply-to:content-language\n\t:content-transfer-encoding;\n\tbh=Pw+rSZKhiGmvCbFaplEjpupKfxUiy8DhLX5Gwy2RsWo=;\n\tb=IYN6TKuj6Ew+1tDrkVZIJL+oQ9aLOJ4aR7puAv951Rrn3lreF5ZfSkbuHbcBoBSN9N\n\tovoXpiWwWCDNmi4fox3k9UxJOlgeH0UPtYfdRQji2x9EVhSTO0kN/1bBAUZQgyccRmn+\n\txOk0Bmc5IpTHAe4FiYxS6huPq8sz9cq+Y93oNyYIcKEQYnpaogDuIa1JLdH1+3hxV/eL\n\tUSc+rpX7YiCBxVEC0rK2gojrd2RVEfeBiMpXYReqhktdtjWgqSNXpoYTgAua9U7gQ7zW\n\tLvhFEwovwvqR93dmjQpkhmqgKRfMPswRbuS0aIt/D1O1hjPk574qqqIIJzfhQs2FxdE2\n\tGqOw==","X-Gm-Message-State":"AMCzsaXEy/Y6+W+SW0V0LnlU4AvpY2bRSVM2y2f0FID3/HfvBPBWmJKI\n\twmXkZvYBXw4cRkOcmJZ2g6Q=","X-Google-Smtp-Source":"AOwi7QBRfMKuwgSpX52GhVHcYt7WNw/q8IVkASTICOd1xKS8T0jntfrZJ8qNRgvJ71tswmWBhaNlRw==","X-Received":"by 10.98.67.217 with SMTP id l86mr8292263pfi.92.1508149770549;\n\tMon, 16 Oct 2017 03:29:30 -0700 (PDT)","Subject":"Re: [PATCH v4 0/9] Mediatek MT2712 clock and scpsys support","To":"Weiyi Lu , Stephen Boyd ","Cc":"Rob Herring , James Liao ,\n\tFan Chen , devicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,\n\tlinux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org,\n\tsrv_heupstream@mediatek.com","References":"<1505793630-12590-1-git-send-email-weiyi.lu@mediatek.com>\n\t<20171012224540.GE18706@codeaurora.org>\n\t\n\t<1508136134.20464.49.camel@mtksdaap41>","From":"Matthias Brugger ","Message-ID":"<4b2b1a94-2a0e-4c5e-030e-d35edb3ac2f1@gmail.com>","Date":"Mon, 16 Oct 2017 12:29:25 +0200","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.4.0","MIME-Version":"1.0","In-Reply-To":"<1508136134.20464.49.camel@mtksdaap41>","Content-Type":"text/plain; charset=utf-8; format=flowed","Content-Language":"en-US","Content-Transfer-Encoding":"7bit","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}}]