[{"id":1770075,"web_url":"http://patchwork.ozlabs.org/comment/1770075/","msgid":"<20170918105520.GA2837@kroah.com>","list_archive_url":null,"date":"2017-09-18T10:55:20","subject":"Re: [RFC RESEND 0/3] Add support for Hisilicon Hi3521A SoC","submitter":{"id":11800,"url":"http://patchwork.ozlabs.org/api/people/11800/","name":"Greg Kroah-Hartman","email":"gregkh@linuxfoundation.org"},"content":"On Sun, Sep 17, 2017 at 03:23:24AM -0500, Marty E. Plummer wrote:\n> Greetings,\n> \n> I'd like the community's feedback on the following patchset. I've attempted to\n> split my changes up in what I believe to be a sensible setup.\n> \n> The device I'm working against is the 'SamsungSV SDR-B74301' HD CCTV surveillance\n> system, which uses a Hisilicon Hi3521A arm SoC as its basis.\n> \n> Resending due to a typo, s/primcell/primecell/\n> \n> Marty E. Plummer (3):\n> clk: hisilicon: add CRG driver Hi3521A SoC\n> arm: hisi: enable Hi3521A SoC\n> arm: dts: add Hi3521A dts\n\nSeems reasonable to me, but I'll let the clk maintainers/developers give\nyou a better review...\n\nthanks,\n\ngreg k-h","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"L8MBm7yV\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xwjbg61Wpz9s7G\n\tfor ;\n\tMon, 18 Sep 2017 20:55:59 +1000 (AEST)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dttiB-0003VF-HZ; Mon, 18 Sep 2017 10:55:35 +0000","from mail.linuxfoundation.org ([140.211.169.12])\n\tby bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dtti8-000391-E8 for linux-arm-kernel@lists.infradead.org;\n\tMon, 18 Sep 2017 10:55:34 +0000","from localhost (LFbn-1-12253-150.w90-92.abo.wanadoo.fr\n\t[90.92.67.150])\n\tby mail.linuxfoundation.org (Postfix) with ESMTPSA id 2AF709F8;\n\tMon, 18 Sep 2017 10:55:09 +0000 (UTC)"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:\n\tMessage-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=bf17ZFigEc2OEoa5KMIcL1Vxt5eoRTRUfxcMADDYOBY=;\n\tb=L8MBm7yVUy10sx\n\tNtJyVrERl5JkI+xr3zc+T2/mGjy8sjbXZQUMYIpbmcOD0Tkt2Us5VQ9Q+9JVn2iREQ/Oc+nhCI9Q9\n\tT+TjeW5vCoIAyH07iTBMLVVNsGA8tCovSgHjbfHTRHvrVE6xJOYhlLKiEFZcdL2uV0SL4HLc17IsA\n\t9rKzE+rKMtA6UCPA8h7QuGKWNHt9C7/J8FVFCd5SsnwS04BzrppKbmUXR3g1ohGIeBumY/0kFF03v\n\tME5RCo2rFTpUpksrIQtz85dyafFjIv1gOdQT8xMw+0+6eaRIsxR+266yzAilRAHb3UCC5sD7ysKwI\n\tsXxPP1VQFRAEOcrRZt+g==;","Date":"Mon, 18 Sep 2017 12:55:20 +0200","From":"Greg KH ","To":"\"Marty E. Plummer\" ","Subject":"Re: [RFC RESEND 0/3] Add support for Hisilicon Hi3521A SoC","Message-ID":"<20170918105520.GA2837@kroah.com>","References":"<20170917082327.10058-1-hanetzer@startmail.com>","MIME-Version":"1.0","Content-Disposition":"inline","In-Reply-To":"<20170917082327.10058-1-hanetzer@startmail.com>","User-Agent":"Mutt/1.9.0 (2017-09-02)","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170918_035532_520611_10176BC1 ","X-CRM114-Status":"UNSURE ( 9.17 )","X-CRM114-Notice":"Please train this message.","X-Spam-Score":"-4.2 (----)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-4.2 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/,\n\tmedium trust [140.211.169.12 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-0.0 SPF_HELO_PASS SPF: HELO matches SPF record\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"mark.rutland@arm.com, devicetree@vger.kernel.org, arnd@arndb.de,\n\tmturquette@baylibre.com, sboyd@codeaurora.org,\n\tlinux-kernel@vger.kernel.org, \n\txuwei5@hisilicon.com, linux@armlinux.org.uk, wenpan@hisilicon.com,\n\trobh+dt@kernel.org, leo.yan@linaro.org, xuejiancheng@hisilicon.com,\n\tzhangfei.gao@linaro.org, linux-clk@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1772276,"web_url":"http://patchwork.ozlabs.org/comment/1772276/","msgid":"<20170920205303.lcycfuai75a7namk@rob-hp-laptop>","list_archive_url":null,"date":"2017-09-20T20:53:03","subject":"Re: [RFC RESEND 3/3] arm: dts: add Hi3521A dts","submitter":{"id":62529,"url":"http://patchwork.ozlabs.org/api/people/62529/","name":"Rob Herring (Arm)","email":"robh@kernel.org"},"content":"On Sun, Sep 17, 2017 at 03:23:27AM -0500, Marty E. Plummer wrote:\n> Add hi3521a.dtsi and hi3521a-rs-dm290e.dts for RaySharp CCTV systems,\n> marketed under the name Samsung SDR-B74301N\n> \n> Signed-off-by: Marty E. Plummer \n> ---\n> arch/arm/boot/dts/Makefile | 2 +\n> arch/arm/boot/dts/hi3521a-rs-dm290e.dts | 52 ++++++\n> arch/arm/boot/dts/hi3521a.dtsi | 310 ++++++++++++++++++++++++++++++++\n> 3 files changed, 364 insertions(+)\n> create mode 100644 arch/arm/boot/dts/hi3521a-rs-dm290e.dts\n> create mode 100644 arch/arm/boot/dts/hi3521a.dtsi\n> \n> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile\n> index faf46abaa4a2..e7b9b5dde20f 100644\n> --- a/arch/arm/boot/dts/Makefile\n> +++ b/arch/arm/boot/dts/Makefile\n> @@ -189,6 +189,8 @@ dtb-$(CONFIG_ARCH_GEMINI) += \\\n> \tgemini-sq201.dtb \\\n> \tgemini-wbd111.dtb \\\n> \tgemini-wbd222.dtb\n> +dtb-$(CONFIG_ARCH_HI3521A) += \\\n> +\thi3521a-rs-dm290e.dtb\n> dtb-$(CONFIG_ARCH_HI3xxx) += \\\n> \thi3620-hi4511.dtb\n> dtb-$(CONFIG_ARCH_HIGHBANK) += \\\n> diff --git a/arch/arm/boot/dts/hi3521a-rs-dm290e.dts b/arch/arm/boot/dts/hi3521a-rs-dm290e.dts\n> new file mode 100644\n> index 000000000000..b32c8392c93f\n> --- /dev/null\n> +++ b/arch/arm/boot/dts/hi3521a-rs-dm290e.dts\n> @@ -0,0 +1,52 @@\n> +/*\n> + * Copyright (C) 2017 Marty Plummer \n> + *\n> + * This program is free software: you can redistribute it and/or modify\n> + * it under the terms of the GNU General Public License as published by\n> + * the Free Software Foundation, either version 3 of the License, or\n> + * (at your option) any later version.\n\nShould be version 2 or later? Doesn't really matter to me from a DT \nperspective, but it is in the kernel tree.\n\nYou can use SPDX tags if you want.\n\n> + *\n> + * This program is distributed in the hope that it will be useful,\n> + * but WITHOUT ANY WARRANTY; without even the implied warranty of\n> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n> + * GNU General Public License for more details.\n> + *\n> + * You should have received a copy of the GNU General Public License\n> + * along with this program. If not, see .\n> + */\n> +\n> +/dts-v1/;\n> +#include \"hi3521a.dtsi\"\n> +\n> +/ {\n> +\tmodel = \"RaySharp RS-DM-290E DVR Board\";\n> +\tcompatible = \"hisilicon,hi3521a\";\n\nNeeds a board compatible too.\n\n> +\n> +\taliases {\n> +\t\tserial0 = &uart0;\n> +\t\tserial1 = &uart1;\n> +\t\tserial2 = &uart2;\n> +\t};\n> +\n> +\tmemory {\n\nNeeds a unit-address.\n\n> +\t\tdevice_type = \"memory\";\n> +\t\treg = <0x80000000 0xf00000>;\n> +\t};\n> +};\n> +\n> +&hi_sfc {\n> +\tstatus = \"okay\";\n> +\tspi-nor@0 {\n> +\t\tcompatible = \"jedec,spi-nor\";\n\nI don't remember offhand, but I think this should have a device specific \ncompatible too.\n\n> +\t\treg = <0>;\n> +\t\tspi-max-frequency = <104000000>;\n> +\t};\n> +};\n> +\n> +&uart0 {\n> +\tstatus = \"okay\";\n> +};\n> +\n> +&dual_timer0 {\n> +\tstatus = \"okay\";\n> +};\n> diff --git a/arch/arm/boot/dts/hi3521a.dtsi b/arch/arm/boot/dts/hi3521a.dtsi\n> new file mode 100644\n> index 000000000000..2af746fdec46\n> --- /dev/null\n> +++ b/arch/arm/boot/dts/hi3521a.dtsi\n> @@ -0,0 +1,310 @@\n> +/*\n> + * Copyright (C) 2017 Marty Plummer \n> + *\n> + * This program is free software: you can redistribute it and/or modify\n> + * it under the terms of the GNU General Public License as published by\n> + * the Free Software Foundation, either version 3 of the License, or\n> + * (at your option) any later version.\n> + *\n> + * This program is distributed in the hope that it will be useful,\n> + * but WITHOUT ANY WARRANTY; without even the implied warranty of\n> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n> + * GNU General Public License for more details.\n> + *\n> + * You should have received a copy of the GNU General Public License\n> + * along with this program. If not, see .\n> + */\n> +\n> +#include \n> +#include \n> +/ {\n> +\t#address-cells = <1>;\n> +\t#size-cells = <1>;\n> +\tchosen { };\n> +\n> +\tcpus {\n> +\t\t#address-cells = <1>;\n> +\t\t#size-cells = <0>;\n> +\n> +\t\tcpu0: cpu@0 {\n> +\t\t\tdevice_type = \"cpu\";\n> +\t\t\tcompatible = \"arm,cortex-a7\";\n> +\t\t\treg = <0>;\n> +\t\t};\n> +\t};\n> +\n> +\thi_sfc: spi-nor-controller@10000000 {\n> +\t\tcompatible = \"hisilicon,hi3521a-spi-nor\", \"hisilicon,fmc-spi-nor\";\n> +\t\t#address-cells = <1>;\n> +\t\t#size-cells = <0>;\n> +\t\treg = <0x10000000 0x10000>, <0x14000000 0x1000000>;\n> +\t\treg-names = \"control\", \"memory\";\n> +\t\tclocks = <&crg HI3521A_FMC_CLK>;\n> +\t\tstatus = \"disabled\";\n> +\t};\n> +\n> +\tgic: interrupt-controller@10300000 {\n> +\t\tcompatible = \"arm,pl390\";\n> +\t\t#interrupt-cells = <3>;\n> +\t\tinterrupt-controller;\n> +\t\treg = <0x10301000 0x1000>, <0x10302000 0x1000>;\n> +\t};\n> +\n> +\tclk_3m: clk_3m {\n> +\t\tcompatible = \"fixed-clock\";\n> +\t\t#clock-cells = <0>;\n> +\t\tclock-frequency = <3000000>;\n> +\t};\n> +\n> +\tcrg: clock-reset-controller@12040000 {\n> +\t\tcompatible = \"hisilicon,hi3521a-crg\";\n> +\t\t#clock-cells = <1>;\n> +\t\t#reset-cells = <2>;\n> +\t\treg = <0x12040000 0x10000>;\n> +\t};\n\nThese memory mapped peripherals should be under a bus node.\n\n> +\n> +\tsoc {\n> +\t\t#address-cells = <1>;\n> +\t\t#size-cells = <1>;\n> +\t\tcompatible = \"simple-bus\";\n> +\t\tinterrupt-parent = <&gic>;\n> +\t\tranges;\n\nIt is preferred to have a value here and limit the range of the bus \naddresses.\n\n> +\n> +\t\tdmac: dma@10060000 {\n\ndma-controller@...\n\n> +\t\t\tcompatible = \"arm,pl080\", \"arm,primecell\";\n> +\t\t\treg = <0x10060000 0x1000>;\n> +\t\t\tinterrupts = ;\n> +\t\t\tstatus = \"disabled\";\n\nI wouldn't think enabling dma would be a per board decision.\n\n> +\t\t};\n> +\n> +\t\tdual_timer0: timer@12000000 {\n> +\t\t\tcompatible = \"arm,sp804\", \"arm,primecell\";\n> +\t\t\tinterrupts = ,\n> +\t\t\t\t ;\n> +\t\t\treg = <0x12000000 0x1000>;\n> +\t\t\tclocks = <&clk_3m>;\n> +\t\t\tclock-names = \"apb_pclk\";\n\nIIRC, it is deprecated to have a single clock here. The h/w has 2 clock \ninputs.\n\nWhere's the ARM architected timer?\n\n> +\t\t\tstatus = \"disabled\";\n> +\t\t};\n> +\n> +\t\tdual_timer1: timer@12010000 {\n> +\t\t\tcompatible = \"arm,sp804\", \"arm,primecell\";\n> +\t\t\tinterrupts = ,\n> +\t\t\t\t ;\n> +\t\t\treg = <0x12010000 0x1000>;\n> +\t\t\tclocks = <&clk_3m>;\n> +\t\t\tclock-name = \"apb_pclk\";\n> +\t\t\tstatus = \"disabled\";\n> +\t\t};\n> +\n> +\t\tdual_timer2: timer@12020000 {\n> +\t\t\tcompatible = \"arm,sp804\", \"arm,primecell\";\n> +\t\t\tinterrupts = ,\n> +\t\t\t\t ;\n> +\t\t\treg = <0x12020000 0x1000>;\n> +\t\t\tclocks = <&clk_3m>;\n> +\t\t\tclock-name = \"apb_pclk\";\n> +\t\t\tstatus = \"disabled\";\n> +\t\t};\n> +\n> +\t\tdual_timer3: timer@12030000 {\n> +\t\t\tcompatible = \"arm,sp804\", \"arm,primecell\";\n> +\t\t\tinterrupts = ,\n> +\t\t\t\t ;\n> +\t\t\treg = <0x12030000 0x1000>;\n> +\t\t\tclocks = <&clk_3m>;\n> +\t\t\tclock-name = \"apb_pclk\";\n> +\t\t\tstatus = \"disabled\";\n> +\t\t};\n> +\n> +\t\twdt0: watchdog@12070000 {\n> +\t\t\tcompatible = \"arm,sp805\", \"arm,primecell\";\n> +\t\t\tarm,primecell-periphid = <0x00141805>;\n> +\t\t\treg = <0x12070000 0x1000>;\n> +\t\t\tinterrupts = ;\n> +\t\t\tclocks = <&clk_3m>;\n> +\t\t\tclock-names = \"apb_pclk\";\n> +\t\t};\n> +\n> +\t\tuart0: serial@12080000 {\n> +\t\t\tcompatible = \"arm,pl011\", \"arm,primecell\";\n> +\t\t\treg = <0x12080000 0x1000>;\n> +\t\t\tinterrupts = ;\n> +\t\t\tclocks = <&crg HI3521A_UART0_CLK>;\n> +\t\t\tclock-names = \"apb_pclk\";\n> +\t\t\tstatus = \"disabled\";\n> +\t\t};\n> +\n> +\t\tuart1: serial@12090000 {\n> +\t\t\tcompatible = \"arm,pl011\", \"arm,primecell\";\n> +\t\t\treg = <0x12090000 0x1000>;\n> +\t\t\tinterrupts = ;\n> +\t\t\tclocks = <&crg HI3521A_UART1_CLK>;\n> +\t\t\tclock-names = \"apb_pclk\";\n> +\t\t\tstatus = \"disabled\";\n> +\t\t};\n> +\n> +\t\tuart2: serial@120a0000 {\n> +\t\t\tcompatible = \"arm,pl011\", \"arm,primecell\";\n> +\t\t\treg = <0x120a0000 0x1000>;\n> +\t\t\tinterrupts = ;\n> +\t\t\tclocks = <&crg HI3521A_UART2_CLK>;\n> +\t\t\tclock-names = \"apb_pclk\";\n> +\t\t\tstatus = \"disabled\";\n> +\t\t};\n> +\n> +\t\tgpio0: gpio@12150000 {\n> +\t\t\tcompatible = \"arm,pl061\", \"arm,primecell\";\n> +\t\t\treg = <0x12150000 0x1000>;\n> +\t\t\tinterrupts = ;\n> +\t\t\tgpio-controller;\n> +\t\t\t#gpio-cells = <2>;\n> +\t\t\tinterrupt-controller;\n> +\t\t\t#interrupt-cells = <2>;\n> +\t\t\tstatus = \"disabled\";\n> +\t\t};\n> +\n> +\t\tgpio1: gpio@12160000 {\n> +\t\t\tcompatible = \"arm,pl061\", \"arm,primecell\";\n> +\t\t\treg = <0x12160000 0x1000>;\n> +\t\t\tinterrupts = ;\n> +\t\t\tgpio-controller;\n> +\t\t\t#gpio-cells = <2>;\n> +\t\t\tinterrupt-controller;\n> +\t\t\t#interrupt-cells = <2>;\n> +\t\t\tstatus = \"disabled\";\n> +\t\t};\n> +\n> +\t\tgpio2: gpio@12170000 {\n> +\t\t\tcompatible = \"arm,pl061\", \"arm,primecell\";\n> +\t\t\treg = <0x12170000 0x1000>;\n> +\t\t\tinterrupts = ;\n> +\t\t\tgpio-controller;\n> +\t\t\t#gpio-cells = <2>;\n> +\t\t\tinterrupt-controller;\n> +\t\t\t#interrupt-cells = <2>;\n> +\t\t\tstatus = \"disabled\";\n> +\t\t};\n> +\n> +\t\tgpio3: gpio@12180000 {\n> +\t\t\tcompatible = \"arm,pl061\", \"arm,primecell\";\n> +\t\t\treg = <0x12180000 0x1000>;\n> +\t\t\tinterrupts = ;\n> +\t\t\tgpio-controller;\n> +\t\t\t#gpio-cells = <2>;\n> +\t\t\tinterrupt-controller;\n> +\t\t\t#interrupt-cells = <2>;\n> +\t\t\tstatus = \"disabled\";\n> +\t\t};\n> +\n> +\t\tgpio4: gpio@12190000 {\n> +\t\t\tcompatible = \"arm,pl061\", \"arm,primecell\";\n> +\t\t\treg = <0x12190000 0x1000>;\n> +\t\t\tinterrupts = ;\n> +\t\t\tgpio-controller;\n> +\t\t\t#gpio-cells = <2>;\n> +\t\t\tinterrupt-controller;\n> +\t\t\t#interrupt-cells = <2>;\n> +\t\t\tstatus = \"disabled\";\n> +\t\t};\n> +\n> +\t\tgpio5: gpio@121a0000 {\n> +\t\t\tcompatible = \"arm,pl061\", \"arm,primecell\";\n> +\t\t\treg = <0x121a0000 0x1000>;\n> +\t\t\tinterrupts = ;\n> +\t\t\tgpio-controller;\n> +\t\t\t#gpio-cells = <2>;\n> +\t\t\tinterrupt-controller;\n> +\t\t\t#interrupt-cells = <2>;\n> +\t\t\tstatus = \"disabled\";\n> +\t\t};\n> +\n> +\t\tgpio6: gpio@121b0000 {\n> +\t\t\tcompatible = \"arm,pl061\", \"arm,primecell\";\n> +\t\t\treg = <0x121b0000 0x1000>;\n> +\t\t\tinterrupts = ;\n> +\t\t\tgpio-controller;\n> +\t\t\t#gpio-cells = <2>;\n> +\t\t\tinterrupt-controller;\n> +\t\t\t#interrupt-cells = <2>;\n> +\t\t\tstatus = \"disabled\";\n> +\t\t};\n> +\n> +\t\tgpio7: gpio@121c0000 {\n> +\t\t\tcompatible = \"arm,pl061\", \"arm,primecell\";\n> +\t\t\treg = <0x121c0000 0x1000>;\n> +\t\t\tinterrupts = ;\n> +\t\t\tgpio-controller;\n> +\t\t\t#gpio-cells = <2>;\n> +\t\t\tinterrupt-controller;\n> +\t\t\t#interrupt-cells = <2>;\n> +\t\t\tstatus = \"disabled\";\n> +\t\t};\n> +\n> +\t\tgpio8: gpio@121d0000 {\n> +\t\t\tcompatible = \"arm,pl061\", \"arm,primecell\";\n> +\t\t\treg = <0x121d0000 0x1000>;\n> +\t\t\tinterrupts = ;\n> +\t\t\tgpio-controller;\n> +\t\t\t#gpio-cells = <2>;\n> +\t\t\tinterrupt-controller;\n> +\t\t\t#interrupt-cells = <2>;\n> +\t\t\tstatus = \"disabled\";\n> +\t\t};\n> +\n> +\t\tgpio9: gpio@121e0000 {\n> +\t\t\tcompatible = \"arm,pl061\", \"arm,primecell\";\n> +\t\t\treg = <0x121e0000 0x1000>;\n> +\t\t\tinterrupts = ;\n> +\t\t\tgpio-controller;\n> +\t\t\t#gpio-cells = <2>;\n> +\t\t\tinterrupt-controller;\n> +\t\t\t#interrupt-cells = <2>;\n> +\t\t\tstatus = \"disabled\";\n> +\t\t};\n> +\n> +\t\tgpio10: gpio@121f0000 {\n> +\t\t\tcompatible = \"arm,pl061\", \"arm,primecell\";\n> +\t\t\treg = <0x121f0000 0x1000>;\n> +\t\t\tinterrupts = ;\n> +\t\t\tgpio-controller;\n> +\t\t\t#gpio-cells = <2>;\n> +\t\t\tinterrupt-controller;\n> +\t\t\t#interrupt-cells = <2>;\n> +\t\t\tstatus = \"disabled\";\n> +\t\t};\n> +\n> +\t\tgpio11: gpio@12200000 {\n> +\t\t\tcompatible = \"arm,pl061\", \"arm,primecell\";\n> +\t\t\treg = <0x12200000 0x1000>;\n> +\t\t\tinterrupts = ;\n> +\t\t\tgpio-controller;\n> +\t\t\t#gpio-cells = <2>;\n> +\t\t\tinterrupt-controller;\n> +\t\t\t#interrupt-cells = <2>;\n> +\t\t\tstatus = \"disabled\";\n> +\t\t};\n> +\n> +\t\tgpio12: gpio@12210000 {\n> +\t\t\tcompatible = \"arm,pl061\", \"arm,primecell\";\n> +\t\t\treg = <0x12210000 0x1000>;\n> +\t\t\tinterrupts = ;\n> +\t\t\tgpio-controller;\n> +\t\t\t#gpio-cells = <2>;\n> +\t\t\tinterrupt-controller;\n> +\t\t\t#interrupt-cells = <2>;\n> +\t\t\tstatus = \"disabled\";\n> +\t\t};\n> +\n> +\t\tgpio13: gpio@12220000 {\n> +\t\t\tcompatible = \"arm,pl061\", \"arm,primecell\";\n> +\t\t\treg = <0x12220000 0x1000>;\n> +\t\t\tinterrupts = ;\n> +\t\t\tgpio-controller;\n> +\t\t\t#gpio-cells = <2>;\n> +\t\t\tinterrupt-controller;\n> +\t\t\t#interrupt-cells = <2>;\n> +\t\t\tstatus = \"disabled\";\n> +\t\t};\n> +\t};\n> +};\n> -- \n> 2.14.1\n>","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; 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Plummer\" ","Subject":"Re: [RFC RESEND 3/3] arm: dts: add Hi3521A dts","Message-ID":"<20170920205303.lcycfuai75a7namk@rob-hp-laptop>","References":"<20170917082327.10058-1-hanetzer@startmail.com>\n\t<20170917082327.10058-4-hanetzer@startmail.com>","MIME-Version":"1.0","Content-Disposition":"inline","In-Reply-To":"<20170917082327.10058-4-hanetzer@startmail.com>","User-Agent":"NeoMutt/20170113 (1.7.2)","X-Spam-Note":"CRM114 invocation failed","X-Spam-Score":"-3.8 (---)","X-Spam-Report":"SpamAssassin version 3.4.1 on merlin.infradead.org summary:\n\tContent analysis details: (-3.8 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t0.5 RCVD_IN_SORBS_SPAM RBL: SORBS: sender is a spam source\n\t[209.85.192.193 listed in dnsbl.sorbs.net]\n\t-2.8 RCVD_IN_MSPIKE_H2 RBL: Average reputation (+2)\n\t[209.85.192.193 listed in wl.mailspike.net]\n\t-0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/,\n\tno trust [209.85.192.193 listed in list.dnswl.org]\n\t0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends\n\tin digit (robherring2[at]gmail.com)\n\t0.0 HEADER_FROM_DIFFERENT_DOMAINS From and EnvelopeFrom 2nd level\n\tmail domains are different\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail\n\tprovider (robherring2[at]gmail.com)\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t0.2 FREEMAIL_FORGED_FROMDOMAIN 2nd level domains in From and\n\tEnvelopeFrom freemail headers are different","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"mark.rutland@arm.com, devicetree@vger.kernel.org, arnd@arndb.de,\n\tgregkh@linuxfoundation.org, mturquette@baylibre.com,\n\tsboyd@codeaurora.org, \n\tlinux-kernel@vger.kernel.org, xuwei5@hisilicon.com,\n\tlinux@armlinux.org.uk, \n\twenpan@hisilicon.com, leo.yan@linaro.org, xuejiancheng@hisilicon.com, \n\tzhangfei.gao@linaro.org, linux-clk@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1772305,"web_url":"http://patchwork.ozlabs.org/comment/1772305/","msgid":"<20170920230405.tz3vzoys2vn72rgv@proprietary-killer.fossland>","list_archive_url":null,"date":"2017-09-20T23:04:12","subject":"Re: [RFC RESEND 3/3] arm: dts: add Hi3521A dts","submitter":{"id":72369,"url":"http://patchwork.ozlabs.org/api/people/72369/","name":"Marty E. Plummer","email":"hanetzer@startmail.com"},"content":"On Wed, Sep 20, 2017 at 08:53:03PM +0000, Rob Herring wrote:\n> On Sun, Sep 17, 2017 at 03:23:27AM -0500, Marty E. Plummer wrote:\n> > Add hi3521a.dtsi and hi3521a-rs-dm290e.dts for RaySharp CCTV systems,\n> > marketed under the name Samsung SDR-B74301N\n> > \n> > Signed-off-by: Marty E. Plummer \n> > ---\n> > arch/arm/boot/dts/Makefile | 2 +\n> > arch/arm/boot/dts/hi3521a-rs-dm290e.dts | 52 ++++++\n> > arch/arm/boot/dts/hi3521a.dtsi | 310 ++++++++++++++++++++++++++++++++\n> > 3 files changed, 364 insertions(+)\n> > create mode 100644 arch/arm/boot/dts/hi3521a-rs-dm290e.dts\n> > create mode 100644 arch/arm/boot/dts/hi3521a.dtsi\n> > \n> > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile\n> > index faf46abaa4a2..e7b9b5dde20f 100644\n> > --- a/arch/arm/boot/dts/Makefile\n> > +++ b/arch/arm/boot/dts/Makefile\n> > @@ -189,6 +189,8 @@ dtb-$(CONFIG_ARCH_GEMINI) += \\\n> > \tgemini-sq201.dtb \\\n> > \tgemini-wbd111.dtb \\\n> > \tgemini-wbd222.dtb\n> > +dtb-$(CONFIG_ARCH_HI3521A) += \\\n> > +\thi3521a-rs-dm290e.dtb\n> > dtb-$(CONFIG_ARCH_HI3xxx) += \\\n> > \thi3620-hi4511.dtb\n> > dtb-$(CONFIG_ARCH_HIGHBANK) += \\\n> > diff --git a/arch/arm/boot/dts/hi3521a-rs-dm290e.dts b/arch/arm/boot/dts/hi3521a-rs-dm290e.dts\n> > new file mode 100644\n> > index 000000000000..b32c8392c93f\n> > --- /dev/null\n> > +++ b/arch/arm/boot/dts/hi3521a-rs-dm290e.dts\n> > @@ -0,0 +1,52 @@\n> > +/*\n> > + * Copyright (C) 2017 Marty Plummer \n> > + *\n> > + * This program is free software: you can redistribute it and/or modify\n> > + * it under the terms of the GNU General Public License as published by\n> > + * the Free Software Foundation, either version 3 of the License, or\n> > + * (at your option) any later version.\n> \n> Should be version 2 or later? Doesn't really matter to me from a DT \n> perspective, but it is in the kernel tree.\n> \n> You can use SPDX tags if you want.\n>\nOh, that's a good idea. I hadn't seen any SPDX tags in the tree that I\nnoticed before. I ended up just using the :Gpl command from neovim. \n> > + *\n> > + * This program is distributed in the hope that it will be useful,\n> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of\n> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n> > + * GNU General Public License for more details.\n> > + *\n> > + * You should have received a copy of the GNU General Public License\n> > + * along with this program. If not, see .\n> > + */\n> > +\n> > +/dts-v1/;\n> > +#include \"hi3521a.dtsi\"\n> > +\n> > +/ {\n> > +\tmodel = \"RaySharp RS-DM-290E DVR Board\";\n> > +\tcompatible = \"hisilicon,hi3521a\";\n> \n> Needs a board compatible too.\n>\nSomething like `compatible = \"hisilicon,hi3521a\", \"raysharp,rs-dm-290e\";` ? \n> > +\n> > +\taliases {\n> > +\t\tserial0 = &uart0;\n> > +\t\tserial1 = &uart1;\n> > +\t\tserial2 = &uart2;\n> > +\t};\n> > +\n> > +\tmemory {\n> \n> Needs a unit-address.\n>\nCould you explain what you mean here? As in, memory@someaddr? What would\nI use here? \n> > +\t\tdevice_type = \"memory\";\n> > +\t\treg = <0x80000000 0xf00000>;\n> > +\t};\n> > +};\n> > +\n> > +&hi_sfc {\n> > +\tstatus = \"okay\";\n> > +\tspi-nor@0 {\n> > +\t\tcompatible = \"jedec,spi-nor\";\n> \n> I don't remember offhand, but I think this should have a device specific \n> compatible too.\n>\nInstead of \"jedec,spi-nor\" ? Specific to the SPI chip? \n> > +\t\treg = <0>;\n> > +\t\tspi-max-frequency = <104000000>;\n> > +\t};\n> > +};\n> > +\n> > +&uart0 {\n> > +\tstatus = \"okay\";\n> > +};\n> > +\n> > +&dual_timer0 {\n> > +\tstatus = \"okay\";\n> > +};\n> > diff --git a/arch/arm/boot/dts/hi3521a.dtsi b/arch/arm/boot/dts/hi3521a.dtsi\n> > new file mode 100644\n> > index 000000000000..2af746fdec46\n> > --- /dev/null\n> > +++ b/arch/arm/boot/dts/hi3521a.dtsi\n> > @@ -0,0 +1,310 @@\n> > +/*\n> > + * Copyright (C) 2017 Marty Plummer \n> > + *\n> > + * This program is free software: you can redistribute it and/or modify\n> > + * it under the terms of the GNU General Public License as published by\n> > + * the Free Software Foundation, either version 3 of the License, or\n> > + * (at your option) any later version.\n> > + *\n> > + * This program is distributed in the hope that it will be useful,\n> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of\n> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n> > + * GNU General Public License for more details.\n> > + *\n> > + * You should have received a copy of the GNU General Public License\n> > + * along with this program. If not, see .\n> > + */\n> > +\n> > +#include \n> > +#include \n> > +/ {\n> > +\t#address-cells = <1>;\n> > +\t#size-cells = <1>;\n> > +\tchosen { };\n> > +\n> > +\tcpus {\n> > +\t\t#address-cells = <1>;\n> > +\t\t#size-cells = <0>;\n> > +\n> > +\t\tcpu0: cpu@0 {\n> > +\t\t\tdevice_type = \"cpu\";\n> > +\t\t\tcompatible = \"arm,cortex-a7\";\n> > +\t\t\treg = <0>;\n> > +\t\t};\n> > +\t};\n> > +\n> > +\thi_sfc: spi-nor-controller@10000000 {\n> > +\t\tcompatible = \"hisilicon,hi3521a-spi-nor\", \"hisilicon,fmc-spi-nor\";\n> > +\t\t#address-cells = <1>;\n> > +\t\t#size-cells = <0>;\n> > +\t\treg = <0x10000000 0x10000>, <0x14000000 0x1000000>;\n> > +\t\treg-names = \"control\", \"memory\";\n> > +\t\tclocks = <&crg HI3521A_FMC_CLK>;\n> > +\t\tstatus = \"disabled\";\n> > +\t};\n> > +\n> > +\tgic: interrupt-controller@10300000 {\n> > +\t\tcompatible = \"arm,pl390\";\n> > +\t\t#interrupt-cells = <3>;\n> > +\t\tinterrupt-controller;\n> > +\t\treg = <0x10301000 0x1000>, <0x10302000 0x1000>;\n> > +\t};\n> > +\n> > +\tclk_3m: clk_3m {\n> > +\t\tcompatible = \"fixed-clock\";\n> > +\t\t#clock-cells = <0>;\n> > +\t\tclock-frequency = <3000000>;\n> > +\t};\n> > +\n> > +\tcrg: clock-reset-controller@12040000 {\n> > +\t\tcompatible = \"hisilicon,hi3521a-crg\";\n> > +\t\t#clock-cells = <1>;\n> > +\t\t#reset-cells = <2>;\n> > +\t\treg = <0x12040000 0x10000>;\n> > +\t};\n> \n> These memory mapped peripherals should be under a bus node.\n>\nCrap, will fix. \n> > +\n> > +\tsoc {\n> > +\t\t#address-cells = <1>;\n> > +\t\t#size-cells = <1>;\n> > +\t\tcompatible = \"simple-bus\";\n> > +\t\tinterrupt-parent = <&gic>;\n> > +\t\tranges;\n> \n> It is preferred to have a value here and limit the range of the bus \n> addresses.\n> \nYeah, I think I've seen that before, I don't quite grok how that works.\n> > +\n> > +\t\tdmac: dma@10060000 {\n> \n> dma-controller@...\n> \nWill fix.\n> > +\t\t\tcompatible = \"arm,pl080\", \"arm,primecell\";\n> > +\t\t\treg = <0x10060000 0x1000>;\n> > +\t\t\tinterrupts = ;\n> > +\t\t\tstatus = \"disabled\";\n> \n> I wouldn't think enabling dma would be a per board decision.\n> \nI've just noticed that in general dtsi files just lay it all out and are\nmostly \"disabled\", though if you think this should be explicitly enabled\nthats fine by me.\n> > +\t\t};\n> > +\n> > +\t\tdual_timer0: timer@12000000 {\n> > +\t\t\tcompatible = \"arm,sp804\", \"arm,primecell\";\n> > +\t\t\tinterrupts = ,\n> > +\t\t\t\t ;\n> > +\t\t\treg = <0x12000000 0x1000>;\n> > +\t\t\tclocks = <&clk_3m>;\n> > +\t\t\tclock-names = \"apb_pclk\";\n> \n> IIRC, it is deprecated to have a single clock here. The h/w has 2 clock \n> inputs.\n>\nAre you meaning for the 0x0 index and 0x20 index clocks?\n> Where's the ARM architected timer?\n> \nUnsure tbqf, just doing my best to translate a datasheet into code. Do\nall ARM soc's have one?\n> > -- \n> > 2.14.1\n> >","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org header.b=\"jEEMF/Vo\"; \n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=startmail.com header.i=@startmail.com\n\theader.b=\"HnuWkCNx\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xyFkN5FLbz9sNr\n\tfor ;\n\tThu, 21 Sep 2017 09:07:08 +1000 (AEST)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1duo5B-0004C2-7q; Wed, 20 Sep 2017 23:07:05 +0000","from smx-7fb.smtp.startmail.com ([37.153.204.247])\n\tby bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux))\n\tid 1duo56-00048e-NA for linux-arm-kernel@lists.infradead.org;\n\tWed, 20 Sep 2017 23:07:03 +0000","from smx-6f5.int1.startmail.com (smx-6f5.int1.startmail.com\n\t[10.116.2.63])\n\tby smx-7fb.smtp.startmail.com (Postfix) with ESMTPS id 942DFB7CD6;\n\tThu, 21 Sep 2017 01:06:36 +0200 (CEST)"],"DKIM-Signature":["v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:In-Reply-To:Mime-Version:References:\n\tMessage-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=9VAA28iK/7miw4YOCpav28ykwCbrrkDpVPT5WreDR2A=;\n\tb=jEEMF/VoYyb41R\n\tEPjNJSrf2ZtIrIaq0c+TQGT6piqtRfc1bg0MZYpn4gzdZVd+fH3NiHPS3KF439Z4ywt2ct/yzt7ce\n\tgty0g2qxPTCTKTCWP7FT5JmZgnT23ck3A5gDXc0O2TOjWczi+wtpQfHA4RAVom6K6BydFJ3R1yIIy\n\tUuekmiKPrwPBqYT2Ht+oT7mMp1mVtYKJ4RPskD7rUKDaH9j2tV6ZheLSoLZXGatd8c6oXxJk4iF+W\n\twebv/YNE6XQSX95FkptTVGnkbDyozKF5QL3VELPicohf6/NnlfMkQP8KQVZNhrWUwQhHyYsq1W97o\n\twzxYVwEVEBHo25A6yLvw==;","v=1; a=rsa-sha256; c=relaxed/relaxed; d=startmail.com;\n\ts=dkim; t=1505948796;\n\tbh=wH/jn8vnVRbnD81bzXnYz+gnwzP1g+99B2mPOAsvfzg=;\n\th=Date:From:To:Cc:Subject:References:In-Reply-To:From;\n\tb=HnuWkCNxggf753F8gab2FcMRhYeBcUOrYmcSb2lu3q+/YYVLB9oCO7TwTNGoXUZEt\n\tXP8fKnzg1sv+wa7iEN49rKIoVatctNDIqn1NdqQWmnOFLzKRysxL8csmmbIkHxNm98\n\tNaRDOmWtGlTrkeYmdNmNoW20UMTdpKpMXWlhf96MFu2wpfqsjkZfZzUDs7nNTJK5iN\n\tvjUvyf3Sj0RbAswaytnJ1nykKf+MS/y7ex4ySo+9ANpO4YJWEfekKSWCkhIQUTScaX\n\tuQ7+tv4g5db0tg3pRlBWALjYdoYCc/lJoJTfIz06CprnSGnRgS1HZlTsFU5RZQ+9qh\n\td9Ni7vqZXbLAQ=="],"Date":"Wed, 20 Sep 2017 18:04:12 -0500","From":"\"Marty E. Plummer\" ","To":"Rob Herring ","Subject":"Re: [RFC RESEND 3/3] arm: dts: add Hi3521A dts","Message-ID":"<20170920230405.tz3vzoys2vn72rgv@proprietary-killer.fossland>","References":"<20170917082327.10058-1-hanetzer@startmail.com>\n\t<20170917082327.10058-4-hanetzer@startmail.com>\n\t<20170920205303.lcycfuai75a7namk@rob-hp-laptop>","Mime-Version":"1.0","Content-Disposition":"inline","In-Reply-To":"<20170920205303.lcycfuai75a7namk@rob-hp-laptop>","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170920_160701_071297_ABD17767 ","X-CRM114-Status":"GOOD ( 23.26 )","X-Spam-Score":"-2.0 (--)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-2.0 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/,\n\tno trust [37.153.204.247 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t-0.1 DKIM_VALID Message has at least one valid DKIM or DK signature\n\t0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n\tnot necessarily valid\n\t-0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n\tauthor's domain","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"mark.rutland@arm.com, devicetree@vger.kernel.org, arnd@arndb.de,\n\tgregkh@linuxfoundation.org, mturquette@baylibre.com,\n\tsboyd@codeaurora.org, \n\tlinux-kernel@vger.kernel.org, xuwei5@hisilicon.com,\n\tlinux@armlinux.org.uk, \n\twenpan@hisilicon.com, leo.yan@linaro.org, xuejiancheng@hisilicon.com, \n\tzhangfei.gao@linaro.org, linux-clk@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1772349,"web_url":"http://patchwork.ozlabs.org/comment/1772349/","msgid":"","list_archive_url":null,"date":"2017-09-21T01:08:39","subject":"Re: [RFC RESEND 3/3] arm: dts: add Hi3521A dts","submitter":{"id":62529,"url":"http://patchwork.ozlabs.org/api/people/62529/","name":"Rob Herring (Arm)","email":"robh@kernel.org"},"content":"On Wed, Sep 20, 2017 at 6:04 PM, Marty E. Plummer\n wrote:\n> On Wed, Sep 20, 2017 at 08:53:03PM +0000, Rob Herring wrote:\n>> On Sun, Sep 17, 2017 at 03:23:27AM -0500, Marty E. Plummer wrote:\n>> > Add hi3521a.dtsi and hi3521a-rs-dm290e.dts for RaySharp CCTV systems,\n>> > marketed under the name Samsung SDR-B74301N\n>> >\n>> > Signed-off-by: Marty E. Plummer \n>> > ---\n>> > arch/arm/boot/dts/Makefile | 2 +\n>> > arch/arm/boot/dts/hi3521a-rs-dm290e.dts | 52 ++++++\n>> > arch/arm/boot/dts/hi3521a.dtsi | 310 ++++++++++++++++++++++++++++++++\n>> > 3 files changed, 364 insertions(+)\n>> > create mode 100644 arch/arm/boot/dts/hi3521a-rs-dm290e.dts\n>> > create mode 100644 arch/arm/boot/dts/hi3521a.dtsi\n>> >\n>> > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile\n>> > index faf46abaa4a2..e7b9b5dde20f 100644\n>> > --- a/arch/arm/boot/dts/Makefile\n>> > +++ b/arch/arm/boot/dts/Makefile\n>> > @@ -189,6 +189,8 @@ dtb-$(CONFIG_ARCH_GEMINI) += \\\n>> > gemini-sq201.dtb \\\n>> > gemini-wbd111.dtb \\\n>> > gemini-wbd222.dtb\n>> > +dtb-$(CONFIG_ARCH_HI3521A) += \\\n>> > + hi3521a-rs-dm290e.dtb\n>> > dtb-$(CONFIG_ARCH_HI3xxx) += \\\n>> > hi3620-hi4511.dtb\n>> > dtb-$(CONFIG_ARCH_HIGHBANK) += \\\n>> > diff --git a/arch/arm/boot/dts/hi3521a-rs-dm290e.dts b/arch/arm/boot/dts/hi3521a-rs-dm290e.dts\n>> > new file mode 100644\n>> > index 000000000000..b32c8392c93f\n>> > --- /dev/null\n>> > +++ b/arch/arm/boot/dts/hi3521a-rs-dm290e.dts\n>> > @@ -0,0 +1,52 @@\n>> > +/*\n>> > + * Copyright (C) 2017 Marty Plummer \n>> > + *\n>> > + * This program is free software: you can redistribute it and/or modify\n>> > + * it under the terms of the GNU General Public License as published by\n>> > + * the Free Software Foundation, either version 3 of the License, or\n>> > + * (at your option) any later version.\n>>\n>> Should be version 2 or later? Doesn't really matter to me from a DT\n>> perspective, but it is in the kernel tree.\n>>\n>> You can use SPDX tags if you want.\n>>\n> Oh, that's a good idea. I hadn't seen any SPDX tags in the tree that I\n> noticed before. I ended up just using the :Gpl command from neovim.\n>> > + *\n>> > + * This program is distributed in the hope that it will be useful,\n>> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of\n>> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n>> > + * GNU General Public License for more details.\n>> > + *\n>> > + * You should have received a copy of the GNU General Public License\n>> > + * along with this program. If not, see .\n>> > + */\n>> > +\n>> > +/dts-v1/;\n>> > +#include \"hi3521a.dtsi\"\n>> > +\n>> > +/ {\n>> > + model = \"RaySharp RS-DM-290E DVR Board\";\n>> > + compatible = \"hisilicon,hi3521a\";\n>>\n>> Needs a board compatible too.\n>>\n> Something like `compatible = \"hisilicon,hi3521a\", \"raysharp,rs-dm-290e\";` ?\n\nYes, but flip the order. Most specific compatible first.\n\n>> > +\n>> > + aliases {\n>> > + serial0 = &uart0;\n>> > + serial1 = &uart1;\n>> > + serial2 = &uart2;\n>> > + };\n>> > +\n>> > + memory {\n>>\n>> Needs a unit-address.\n>>\n> Could you explain what you mean here? As in, memory@someaddr? What would\n> I use here?\n\n\"memory@80000000\". Building with W=2 will tell you.\n\n>> > + device_type = \"memory\";\n>> > + reg = <0x80000000 0xf00000>;\n>> > + };\n>> > +};\n>> > +\n>> > +&hi_sfc {\n>> > + status = \"okay\";\n>> > + spi-nor@0 {\n>> > + compatible = \"jedec,spi-nor\";\n>>\n>> I don't remember offhand, but I think this should have a device specific\n>> compatible too.\n>>\n> Instead of \"jedec,spi-nor\" ? Specific to the SPI chip?\n\nNo, both with jedec,spi-nor 2nd.\n\n>> > + reg = <0>;\n>> > + spi-max-frequency = <104000000>;\n>> > + };\n>> > +};\n>> > +\n>> > +&uart0 {\n>> > + status = \"okay\";\n>> > +};\n>> > +\n>> > +&dual_timer0 {\n>> > + status = \"okay\";\n>> > +};\n>> > diff --git a/arch/arm/boot/dts/hi3521a.dtsi b/arch/arm/boot/dts/hi3521a.dtsi\n>> > new file mode 100644\n>> > index 000000000000..2af746fdec46\n>> > --- /dev/null\n>> > +++ b/arch/arm/boot/dts/hi3521a.dtsi\n>> > @@ -0,0 +1,310 @@\n>> > +/*\n>> > + * Copyright (C) 2017 Marty Plummer \n>> > + *\n>> > + * This program is free software: you can redistribute it and/or modify\n>> > + * it under the terms of the GNU General Public License as published by\n>> > + * the Free Software Foundation, either version 3 of the License, or\n>> > + * (at your option) any later version.\n>> > + *\n>> > + * This program is distributed in the hope that it will be useful,\n>> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of\n>> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n>> > + * GNU General Public License for more details.\n>> > + *\n>> > + * You should have received a copy of the GNU General Public License\n>> > + * along with this program. If not, see .\n>> > + */\n>> > +\n>> > +#include \n>> > +#include \n>> > +/ {\n>> > + #address-cells = <1>;\n>> > + #size-cells = <1>;\n>> > + chosen { };\n>> > +\n>> > + cpus {\n>> > + #address-cells = <1>;\n>> > + #size-cells = <0>;\n>> > +\n>> > + cpu0: cpu@0 {\n>> > + device_type = \"cpu\";\n>> > + compatible = \"arm,cortex-a7\";\n>> > + reg = <0>;\n>> > + };\n>> > + };\n>> > +\n>> > + hi_sfc: spi-nor-controller@10000000 {\n>> > + compatible = \"hisilicon,hi3521a-spi-nor\", \"hisilicon,fmc-spi-nor\";\n>> > + #address-cells = <1>;\n>> > + #size-cells = <0>;\n>> > + reg = <0x10000000 0x10000>, <0x14000000 0x1000000>;\n>> > + reg-names = \"control\", \"memory\";\n>> > + clocks = <&crg HI3521A_FMC_CLK>;\n>> > + status = \"disabled\";\n>> > + };\n>> > +\n>> > + gic: interrupt-controller@10300000 {\n>> > + compatible = \"arm,pl390\";\n>> > + #interrupt-cells = <3>;\n>> > + interrupt-controller;\n>> > + reg = <0x10301000 0x1000>, <0x10302000 0x1000>;\n>> > + };\n>> > +\n>> > + clk_3m: clk_3m {\n>> > + compatible = \"fixed-clock\";\n>> > + #clock-cells = <0>;\n>> > + clock-frequency = <3000000>;\n>> > + };\n>> > +\n>> > + crg: clock-reset-controller@12040000 {\n>> > + compatible = \"hisilicon,hi3521a-crg\";\n>> > + #clock-cells = <1>;\n>> > + #reset-cells = <2>;\n>> > + reg = <0x12040000 0x10000>;\n>> > + };\n>>\n>> These memory mapped peripherals should be under a bus node.\n>>\n> Crap, will fix.\n>> > +\n>> > + soc {\n>> > + #address-cells = <1>;\n>> > + #size-cells = <1>;\n>> > + compatible = \"simple-bus\";\n>> > + interrupt-parent = <&gic>;\n>> > + ranges;\n>>\n>> It is preferred to have a value here and limit the range of the bus\n>> addresses.\n>>\n> Yeah, I think I've seen that before, I don't quite grok how that works.\n>> > +\n>> > + dmac: dma@10060000 {\n>>\n>> dma-controller@...\n>>\n> Will fix.\n>> > + compatible = \"arm,pl080\", \"arm,primecell\";\n>> > + reg = <0x10060000 0x1000>;\n>> > + interrupts = ;\n>> > + status = \"disabled\";\n>>\n>> I wouldn't think enabling dma would be a per board decision.\n>>\n> I've just noticed that in general dtsi files just lay it all out and are\n> mostly \"disabled\", though if you think this should be explicitly enabled\n> thats fine by me.\n>> > + };\n>> > +\n>> > + dual_timer0: timer@12000000 {\n>> > + compatible = \"arm,sp804\", \"arm,primecell\";\n>> > + interrupts = ,\n>> > + ;\n>> > + reg = <0x12000000 0x1000>;\n>> > + clocks = <&clk_3m>;\n>> > + clock-names = \"apb_pclk\";\n>>\n>> IIRC, it is deprecated to have a single clock here. The h/w has 2 clock\n>> inputs.\n>>\n> Are you meaning for the 0x0 index and 0x20 index clocks?\n\nYes. Maybe it's 3 clocks. Anyway, should all be in the sp804 binding doc.\n\n>> Where's the ARM architected timer?\n>>\n> Unsure tbqf, just doing my best to translate a datasheet into code. Do\n> all ARM soc's have one?\n\nAll A7's should I think.\n\nRob","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"bjkuOo6M\"; dkim-atps=neutral","mail.kernel.org;\n\tdmarc=none (p=none dis=none) header.from=kernel.org","mail.kernel.org;\n\tspf=none smtp.mailfrom=robh@kernel.org"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xyJS659FQz9s0g\n\tfor ;\n\tThu, 21 Sep 2017 11:09:58 +1000 (AEST)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dupze-0000dd-1p; Thu, 21 Sep 2017 01:09:30 +0000","from mail.kernel.org ([198.145.29.99])\n\tby bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dupzW-0000Yw-HK for linux-arm-kernel@lists.infradead.org;\n\tThu, 21 Sep 2017 01:09:25 +0000","from mail-qk0-f174.google.com (mail-qk0-f174.google.com\n\t[209.85.220.174])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128\n\tbits)) (No client certificate requested)\n\tby mail.kernel.org (Postfix) with ESMTPSA id 552C520C51\n\tfor ;\n\tThu, 21 Sep 2017 01:09:01 +0000 (UTC)","by mail-qk0-f174.google.com with SMTP id t184so4417837qke.10\n\tfor ;\n\tWed, 20 Sep 2017 18:09:01 -0700 (PDT)","by 10.12.209.75 with HTTP; Wed, 20 Sep 2017 18:08:39 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:To:Subject:Message-ID:Date:From:\n\tReferences:In-Reply-To:MIME-Version:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=UN9seM7hGGEXpp0ufOWVNP3q6c4FrwOOg/lwnVI7EFQ=;\n\tb=bjkuOo6MrFoRjP\n\t48uGBuPYOg5QrMofhh7ohD7qA44LFSO6lG2t9FdnHYvfCaafRcPHrt3ywbz+CkAQOGL6wfE2zR+C8\n\tJn5S9nYE3KAhqdJ1Qum2AWNigSfG61AjzbTsEaeVMoUGNrHBnZFG+kzZSoERPxeI1Qrg1XYbGlp8a\n\t3EYhhDllDPiXh6zMSaMbAh+DRvnATy1LJv2Rnc2MPB/9Ttn6ZamicVx+B9rYW1p0FfWQedxJ9AYq+\n\tdRYS0v+VSdYcL3aY9P4l4+BGJq+nJMp+3soFQEgzrlwSZEWRYa1cIQAB1tV0//GRsPGW80OVQr8z2\n\tmTnHH9T7WHIUT7SevtFA==;","DMARC-Filter":"OpenDMARC Filter v1.3.2 mail.kernel.org 552C520C51","X-Gm-Message-State":"AHPjjUjwHDUwA6PviVlqzso0ZMjZcUItDvlch6B2dH/RVH9hAndqUT/n\n\tezq7vwsSA5X8Y9j99hkbbQKzeLv5EGN/RoUs/w==","X-Google-Smtp-Source":"AOwi7QBa48dZga+8EJP4NPfzWC8OQUh6rmDn1yFI4066BdNKKSUCwA+JO6DbBaAdsdNTmo/y6w51mrbvfWi7AMOw7xw=","X-Received":"by 10.55.78.144 with SMTP id c138mr816533qkb.67.1505956140421;\n\tWed, 20 Sep 2017 18:09:00 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<20170920230405.tz3vzoys2vn72rgv@proprietary-killer.fossland>","References":"<20170917082327.10058-1-hanetzer@startmail.com>\n\t<20170917082327.10058-4-hanetzer@startmail.com>\n\t<20170920205303.lcycfuai75a7namk@rob-hp-laptop>\n\t<20170920230405.tz3vzoys2vn72rgv@proprietary-killer.fossland>","From":"Rob Herring ","Date":"Wed, 20 Sep 2017 20:08:39 -0500","X-Gmail-Original-Message-ID":"","Message-ID":"","Subject":"Re: [RFC RESEND 3/3] arm: dts: add Hi3521A dts","To":"\"Marty E. Plummer\" ","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170920_180922_651178_E9C4B895 ","X-CRM114-Status":"GOOD ( 24.31 )","X-Spam-Score":"-6.4 (------)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-6.4 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/,\n\thigh trust [198.145.29.99 listed in list.dnswl.org]\n\t0.5 RCVD_IN_SORBS_SPAM RBL: SORBS: sender is a spam source\n\t[209.85.220.174 listed in dnsbl.sorbs.net]\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Mark Rutland ,\n\t\"devicetree@vger.kernel.org\" ,\n\tArnd Bergmann ,\n\tGreg Kroah-Hartman , \n\tMichael Turquette ,\n\tStephen Boyd ,\n\t\"linux-kernel@vger.kernel.org\" ,\n\tWei Xu , Russell King , \n\tPan Wen , Leo Yan ,\n\tJiancheng Xue ,\n\tZhangfei Gao ,\n\tlinux-clk , \n\t\"linux-arm-kernel@lists.infradead.org\"\n\t","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1772371,"web_url":"http://patchwork.ozlabs.org/comment/1772371/","msgid":"<20170921021511.q6cbew5d5ec5cxxd@proprietary-killer.fossland>","list_archive_url":null,"date":"2017-09-21T02:15:16","subject":"Re: [RFC RESEND 3/3] arm: dts: add Hi3521A dts","submitter":{"id":72369,"url":"http://patchwork.ozlabs.org/api/people/72369/","name":"Marty E. Plummer","email":"hanetzer@startmail.com"},"content":"On Thu, Sep 21, 2017 at 01:08:39AM +0000, Rob Herring wrote:\n> On Wed, Sep 20, 2017 at 6:04 PM, Marty E. Plummer\n> wrote:\n> > On Wed, Sep 20, 2017 at 08:53:03PM +0000, Rob Herring wrote:\n> >> On Sun, Sep 17, 2017 at 03:23:27AM -0500, Marty E. Plummer wrote:\n> >> > Add hi3521a.dtsi and hi3521a-rs-dm290e.dts for RaySharp CCTV systems,\n> >> > marketed under the name Samsung SDR-B74301N\n> >> >\n> >> > Signed-off-by: Marty E. Plummer \n> >> > ---\n> >> > arch/arm/boot/dts/Makefile | 2 +\n> >> > arch/arm/boot/dts/hi3521a-rs-dm290e.dts | 52 ++++++\n> >> > arch/arm/boot/dts/hi3521a.dtsi | 310 ++++++++++++++++++++++++++++++++\n> >> > 3 files changed, 364 insertions(+)\n> >> > create mode 100644 arch/arm/boot/dts/hi3521a-rs-dm290e.dts\n> >> > create mode 100644 arch/arm/boot/dts/hi3521a.dtsi\n> >> >\n> >> > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile\n> >> > index faf46abaa4a2..e7b9b5dde20f 100644\n> >> > --- a/arch/arm/boot/dts/Makefile\n> >> > +++ b/arch/arm/boot/dts/Makefile\n> >> > @@ -189,6 +189,8 @@ dtb-$(CONFIG_ARCH_GEMINI) += \\\n> >> > gemini-sq201.dtb \\\n> >> > gemini-wbd111.dtb \\\n> >> > gemini-wbd222.dtb\n> >> > +dtb-$(CONFIG_ARCH_HI3521A) += \\\n> >> > + hi3521a-rs-dm290e.dtb\n> >> > dtb-$(CONFIG_ARCH_HI3xxx) += \\\n> >> > hi3620-hi4511.dtb\n> >> > dtb-$(CONFIG_ARCH_HIGHBANK) += \\\n> >> > diff --git a/arch/arm/boot/dts/hi3521a-rs-dm290e.dts b/arch/arm/boot/dts/hi3521a-rs-dm290e.dts\n> >> > new file mode 100644\n> >> > index 000000000000..b32c8392c93f\n> >> > --- /dev/null\n> >> > +++ b/arch/arm/boot/dts/hi3521a-rs-dm290e.dts\n> >> > @@ -0,0 +1,52 @@\n> >> > +/*\n> >> > + * Copyright (C) 2017 Marty Plummer \n> >> > + *\n> >> > + * This program is free software: you can redistribute it and/or modify\n> >> > + * it under the terms of the GNU General Public License as published by\n> >> > + * the Free Software Foundation, either version 3 of the License, or\n> >> > + * (at your option) any later version.\n> >>\n> >> Should be version 2 or later? Doesn't really matter to me from a DT\n> >> perspective, but it is in the kernel tree.\n> >>\n> >> You can use SPDX tags if you want.\n> >>\n> > Oh, that's a good idea. I hadn't seen any SPDX tags in the tree that I\n> > noticed before. I ended up just using the :Gpl command from neovim.\n> >> > + *\n> >> > + * This program is distributed in the hope that it will be useful,\n> >> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of\n> >> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n> >> > + * GNU General Public License for more details.\n> >> > + *\n> >> > + * You should have received a copy of the GNU General Public License\n> >> > + * along with this program. If not, see .\n> >> > + */\n> >> > +\n> >> > +/dts-v1/;\n> >> > +#include \"hi3521a.dtsi\"\n> >> > +\n> >> > +/ {\n> >> > + model = \"RaySharp RS-DM-290E DVR Board\";\n> >> > + compatible = \"hisilicon,hi3521a\";\n> >>\n> >> Needs a board compatible too.\n> >>\n> > Something like `compatible = \"hisilicon,hi3521a\", \"raysharp,rs-dm-290e\";` ?\n> \n> Yes, but flip the order. Most specific compatible first.\n> \n> >> > +\n> >> > + aliases {\n> >> > + serial0 = &uart0;\n> >> > + serial1 = &uart1;\n> >> > + serial2 = &uart2;\n> >> > + };\n> >> > +\n> >> > + memory {\n> >>\n> >> Needs a unit-address.\n> >>\n> > Could you explain what you mean here? As in, memory@someaddr? What would\n> > I use here?\n> \n> \"memory@80000000\". Building with W=2 will tell you.\n> \nAh, nice trick. Suppose that makes sense, as every other thing was the\nsame on that sort of thing. Not sure if I've ever seen memory@addr\nbefore.\n> >> > + device_type = \"memory\";\n> >> > + reg = <0x80000000 0xf00000>;\n> >> > + };\n> >> > +};\n> >> > +\n> >> > +&hi_sfc {\n> >> > + status = \"okay\";\n> >> > + spi-nor@0 {\n> >> > + compatible = \"jedec,spi-nor\";\n> >>\n> >> I don't remember offhand, but I think this should have a device specific\n> >> compatible too.\n> >>\n> > Instead of \"jedec,spi-nor\" ? Specific to the SPI chip?\n> \n> No, both with jedec,spi-nor 2nd.\n> \nGotcha, will fix it up.\n> >> > + reg = <0>;\n> >> > + spi-max-frequency = <104000000>;\n> >> > + };\n> >> > +};\n> >> > +\n> >> > +&uart0 {\n> >> > + status = \"okay\";\n> >> > +};\n> >> > +\n> >> > +&dual_timer0 {\n> >> > + status = \"okay\";\n> >> > +};\n> >> > diff --git a/arch/arm/boot/dts/hi3521a.dtsi b/arch/arm/boot/dts/hi3521a.dtsi\n> >> > new file mode 100644\n> >> > index 000000000000..2af746fdec46\n> >> > --- /dev/null\n> >> > +++ b/arch/arm/boot/dts/hi3521a.dtsi\n> >> > @@ -0,0 +1,310 @@\n> >> > +/*\n> >> > + * Copyright (C) 2017 Marty Plummer \n> >> > + *\n> >> > + * This program is free software: you can redistribute it and/or modify\n> >> > + * it under the terms of the GNU General Public License as published by\n> >> > + * the Free Software Foundation, either version 3 of the License, or\n> >> > + * (at your option) any later version.\n> >> > + *\n> >> > + * This program is distributed in the hope that it will be useful,\n> >> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of\n> >> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n> >> > + * GNU General Public License for more details.\n> >> > + *\n> >> > + * You should have received a copy of the GNU General Public License\n> >> > + * along with this program. If not, see .\n> >> > + */\n> >> > +\n> >> > +#include \n> >> > +#include \n> >> > +/ {\n> >> > + #address-cells = <1>;\n> >> > + #size-cells = <1>;\n> >> > + chosen { };\n> >> > +\n> >> > + cpus {\n> >> > + #address-cells = <1>;\n> >> > + #size-cells = <0>;\n> >> > +\n> >> > + cpu0: cpu@0 {\n> >> > + device_type = \"cpu\";\n> >> > + compatible = \"arm,cortex-a7\";\n> >> > + reg = <0>;\n> >> > + };\n> >> > + };\n> >> > +\n> >> > + hi_sfc: spi-nor-controller@10000000 {\n> >> > + compatible = \"hisilicon,hi3521a-spi-nor\", \"hisilicon,fmc-spi-nor\";\n> >> > + #address-cells = <1>;\n> >> > + #size-cells = <0>;\n> >> > + reg = <0x10000000 0x10000>, <0x14000000 0x1000000>;\n> >> > + reg-names = \"control\", \"memory\";\n> >> > + clocks = <&crg HI3521A_FMC_CLK>;\n> >> > + status = \"disabled\";\n> >> > + };\n> >> > +\n> >> > + gic: interrupt-controller@10300000 {\n> >> > + compatible = \"arm,pl390\";\n> >> > + #interrupt-cells = <3>;\n> >> > + interrupt-controller;\n> >> > + reg = <0x10301000 0x1000>, <0x10302000 0x1000>;\n> >> > + };\n> >> > +\n> >> > + clk_3m: clk_3m {\n> >> > + compatible = \"fixed-clock\";\n> >> > + #clock-cells = <0>;\n> >> > + clock-frequency = <3000000>;\n> >> > + };\n> >> > +\n> >> > + crg: clock-reset-controller@12040000 {\n> >> > + compatible = \"hisilicon,hi3521a-crg\";\n> >> > + #clock-cells = <1>;\n> >> > + #reset-cells = <2>;\n> >> > + reg = <0x12040000 0x10000>;\n> >> > + };\n> >>\n> >> These memory mapped peripherals should be under a bus node.\n> >>\n> > Crap, will fix.\n> >> > +\n> >> > + soc {\n> >> > + #address-cells = <1>;\n> >> > + #size-cells = <1>;\n> >> > + compatible = \"simple-bus\";\n> >> > + interrupt-parent = <&gic>;\n> >> > + ranges;\n> >>\n> >> It is preferred to have a value here and limit the range of the bus\n> >> addresses.\n> >>\n> > Yeah, I think I've seen that before, I don't quite grok how that works.\n> >> > +\n> >> > + dmac: dma@10060000 {\n> >>\n> >> dma-controller@...\n> >>\n> > Will fix.\n> >> > + compatible = \"arm,pl080\", \"arm,primecell\";\n> >> > + reg = <0x10060000 0x1000>;\n> >> > + interrupts = ;\n> >> > + status = \"disabled\";\n> >>\n> >> I wouldn't think enabling dma would be a per board decision.\n> >>\n> > I've just noticed that in general dtsi files just lay it all out and are\n> > mostly \"disabled\", though if you think this should be explicitly enabled\n> > thats fine by me.\n> >> > + };\n> >> > +\n> >> > + dual_timer0: timer@12000000 {\n> >> > + compatible = \"arm,sp804\", \"arm,primecell\";\n> >> > + interrupts = ,\n> >> > + ;\n> >> > + reg = <0x12000000 0x1000>;\n> >> > + clocks = <&clk_3m>;\n> >> > + clock-names = \"apb_pclk\";\n> >>\n> >> IIRC, it is deprecated to have a single clock here. The h/w has 2 clock\n> >> inputs.\n> >>\n> > Are you meaning for the 0x0 index and 0x20 index clocks?\n> \n> Yes. Maybe it's 3 clocks. Anyway, should all be in the sp804 binding doc.\n> \n> >> Where's the ARM architected timer?\n> >>\n> > Unsure tbqf, just doing my best to translate a datasheet into code. Do\n> > all ARM soc's have one?\n> \n> All A7's should I think.\n> \nGotcha.\n> Rob","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org header.b=\"XNMZppby\"; \n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=startmail.com header.i=@startmail.com\n\theader.b=\"iO9xgrBO\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xyKz30wS4z9sNr\n\tfor ;\n\tThu, 21 Sep 2017 12:18:23 +1000 (AEST)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dur4E-0008Mq-Uo; Thu, 21 Sep 2017 02:18:18 +0000","from smx-7fb.smtp.startmail.com ([37.153.204.247])\n\tby bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dur41-000849-8n for linux-arm-kernel@lists.infradead.org;\n\tThu, 21 Sep 2017 02:18:15 +0000","from smx-6f5.int1.startmail.com (smx-6f5.int1.startmail.com\n\t[10.116.2.63])\n\tby smx-7fb.smtp.startmail.com (Postfix) with ESMTPS id 53F5AB7B1B;\n\tThu, 21 Sep 2017 04:17:42 +0200 (CEST)"],"DKIM-Signature":["v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:In-Reply-To:Mime-Version:References:\n\tMessage-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=ON45uh/ph9GmIb+xF9Pg0s9TrvouoLorqsw60eonljw=;\n\tb=XNMZppbyALqNdT\n\tdJgzqev2hNP2idDdgqbvX5FI3pCiWBVxZJwbz0j/BqZ2ynAPHAeMuuQGXrBXv/sXcytN41NjlzcDD\n\tp2rQfH8DDW24NcvStwy+rYsqK8ozDGFgvVsqm4dvaJKNlcGZ3HXc8bAZuIW3OYtgWNIjhAxV9y6i8\n\tBBZnML+11IqX/Rzme+DfjbjHPQPFPQGu2yd0yAHA/9MyfQ0Gpv20SEs2GO8/kioBkrr3YF6mYQJNX\n\tc7AfxxbXXdELtCOMgR8sX/Sinh8+k7xiV21t/V6qVf+ttSCq95Rzg9UgImtdtdZwrDJzDua1681Ua\n\toPp3q+1XfT/92Eoyjcig==;","v=1; a=rsa-sha256; c=relaxed/relaxed; d=startmail.com;\n\ts=dkim; t=1505960262;\n\tbh=/HUCnSzFQbVK55ypapOTMIfyXbrFf5ZGraZLHe3DuLU=;\n\th=Date:From:To:Cc:Subject:References:In-Reply-To:From;\n\tb=iO9xgrBOOsVAKtMVYWBSrXIEzd0KFPSRXSOxiSDXA7WdiGLPjC0YbI3bKeWZ7p3/J\n\tJHIFnIoDhPi9/clmV58HtU1Jo87B9KkdCxZIXNoQ8fHy8IUItF/Mtfy46/oohHGir5\n\t0sLO9NtbPoZOq9Zs4UfYWokXiqwDAqtUNkV4v5RCt9nILOhOjtPrrRfOcvzm1QCcy+\n\tO9teVuegeanXoLkWstwgaxpdz5KfHMXBfOZfzISqtJJW8szP+k7+n7hyILOOTFVHW9\n\tSdLEc2udWe4ZgLh0JjYfqpc22YRHJ9hONks7U2gTd+EGWnUNePllUiRlMQKLDel+S9\n\ty5KaHebd107pA=="],"Date":"Wed, 20 Sep 2017 21:15:16 -0500","From":"\"Marty E. Plummer\" ","To":"Rob Herring ","Subject":"Re: [RFC RESEND 3/3] arm: dts: add Hi3521A dts","Message-ID":"<20170921021511.q6cbew5d5ec5cxxd@proprietary-killer.fossland>","References":"<20170917082327.10058-1-hanetzer@startmail.com>\n\t<20170917082327.10058-4-hanetzer@startmail.com>\n\t<20170920205303.lcycfuai75a7namk@rob-hp-laptop>\n\t<20170920230405.tz3vzoys2vn72rgv@proprietary-killer.fossland>\n\t","Mime-Version":"1.0","Content-Disposition":"inline","In-Reply-To":"","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170920_191806_701298_8F2E8D45 ","X-CRM114-Status":"GOOD ( 27.27 )","X-Spam-Score":"-2.0 (--)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-2.0 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/,\n\tno trust [37.153.204.247 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t-0.1 DKIM_VALID Message has at least one valid DKIM or DK signature\n\t0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n\tnot necessarily valid\n\t-0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n\tauthor's domain","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"mark.rutland@arm.com, devicetree@vger.kernel.org, arnd@arndb.de,\n\tgregkh@linuxfoundation.org, mturquette@baylibre.com,\n\tsboyd@codeaurora.org, \n\t\"linux-kernel@vger.kernel.org\" ,\n\txuwei5@hisilicon.com, linux@armlinux.org.uk, wenpan@hisilicon.com,\n\tleo.yan@linaro.org, xuejiancheng@hisilicon.com, zhangfei.gao@linaro.org, \n\tlinux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}}]