[{"id":1772650,"web_url":"http://patchwork.ozlabs.org/comment/1772650/","msgid":"<20170921101308.GA10466@mini-rhel.redhat.com>","list_archive_url":null,"date":"2017-09-21T10:13:08","subject":"Re: [PATCH v2 0/2] Support SDHCI on 8974pro devices","submitter":{"id":70034,"url":"http://patchwork.ozlabs.org/api/people/70034/","name":"Jeremy McNicoll","email":"jmcnicol@redhat.com"},"content":"On Fri, Sep 15, 2017 at 04:35:22PM -0700, Bjorn Andersson wrote:\n> The calibration clocks for the delay circut should be enabled, as done in the\n> downstream kernel, in order for reset of the SDHCI not to fail on some Qualcomm\n> platforms (e.g. 8974pro). These patches makes it possible to reference these\n> clocks.\n> \n> Bjorn Andersson (2):\n> mmc: sdhci-msm: Utilize bulk clock API\n> mmc: sdhci-msm: Enable delay circuit calibration clocks\n> \n> .../devicetree/bindings/mmc/sdhci-msm.txt | 2 +\n> drivers/mmc/host/sdhci-msm.c | 90 +++++++++++-----------\n> 2 files changed, 46 insertions(+), 46 deletions(-)\n>\n\n\nThanks! This fixes my Nexus5X (msm8992) and now expected messages such\nas:\n\n mmc0: new HS400 MMC card at address 0001\n mmcblk0: mmc0:0001 016G72 14.7 GiB \n mmcblk0boot0: mmc0:0001 016G72 partition 1 4.00 MiB\n mmcblk0boot1: mmc0:0001 016G72 partition 2 4.00 MiB\n mmcblk0rpmb: mmc0:0001 016G72 partition 3 4.00 MiB\n mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12 p13 p14 p15....\n\nare appearing in my boot messages / debug spew. \n\nTested-by: Jeremy McNicoll \n\n\n-jeremy\n\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ext-mx02.extmail.prod.ext.phx2.redhat.com;\n\tdmarc=none (p=none dis=none) header.from=redhat.com","ext-mx02.extmail.prod.ext.phx2.redhat.com;\n\tspf=fail smtp.mailfrom=jmcnicol@redhat.com"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xyXVx17pFz9t49\n\tfor ;\n\tThu, 21 Sep 2017 20:13:13 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751554AbdIUKNM (ORCPT\n\t);\n\tThu, 21 Sep 2017 06:13:12 -0400","from mx1.redhat.com ([209.132.183.28]:57968 \"EHLO mx1.redhat.com\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S1751283AbdIUKNL (ORCPT );\n\tThu, 21 Sep 2017 06:13:11 -0400","from smtp.corp.redhat.com\n\t(int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby mx1.redhat.com (Postfix) with ESMTPS id C5BC7883D7;\n\tThu, 21 Sep 2017 10:13:10 +0000 (UTC)","from mini-rhel.redhat.com (ovpn-116-57.phx2.redhat.com\n\t[10.3.116.57])\n\tby smtp.corp.redhat.com (Postfix) with ESMTPS id 36D1560F89;\n\tThu, 21 Sep 2017 10:13:10 +0000 (UTC)"],"DMARC-Filter":"OpenDMARC Filter v1.3.2 mx1.redhat.com C5BC7883D7","Date":"Thu, 21 Sep 2017 03:13:08 -0700","From":"Jeremy McNicoll ","To":"Bjorn Andersson ","Cc":"Adrian Hunter ,\n\tUlf Hansson , Rob Herring ,\n\tMark Rutland , linux-mmc@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,\n\tVenkat Gopalakrishnan ,\n\tRitesh Harjani , devicetree@vger.kernel.org","Subject":"Re: [PATCH v2 0/2] Support SDHCI on 8974pro devices","Message-ID":"<20170921101308.GA10466@mini-rhel.redhat.com>","References":"<20170915233524.1375-1-bjorn.andersson@linaro.org>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20170915233524.1375-1-bjorn.andersson@linaro.org>","User-Agent":"Mutt/1.5.24 (2015-08-30)","X-Scanned-By":"MIMEDefang 2.79 on 10.5.11.12","X-Greylist":"Sender IP whitelisted, not delayed by milter-greylist-4.5.16\n\t(mx1.redhat.com [10.5.110.26]); Thu, 21 Sep 2017 10:13:11 +0000 (UTC)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1773405,"web_url":"http://patchwork.ozlabs.org/comment/1773405/","msgid":"","list_archive_url":null,"date":"2017-09-22T09:45:32","subject":"Re: [PATCH v2 0/2] Support SDHCI on 8974pro devices","submitter":{"id":21036,"url":"http://patchwork.ozlabs.org/api/people/21036/","name":"Ulf Hansson","email":"ulf.hansson@linaro.org"},"content":"On 16 September 2017 at 01:35, Bjorn Andersson\n wrote:\n> The calibration clocks for the delay circut should be enabled, as done in the\n> downstream kernel, in order for reset of the SDHCI not to fail on some Qualcomm\n> platforms (e.g. 8974pro). These patches makes it possible to reference these\n> clocks.\n>\n> Bjorn Andersson (2):\n> mmc: sdhci-msm: Utilize bulk clock API\n> mmc: sdhci-msm: Enable delay circuit calibration clocks\n>\n> .../devicetree/bindings/mmc/sdhci-msm.txt | 2 +\n> drivers/mmc/host/sdhci-msm.c | 90 +++++++++++-----------\n> 2 files changed, 46 insertions(+), 46 deletions(-)\n>\n> --\n> 2.12.0\n>\n\nThanks, applied for next!\n\nKind regards\nUffe\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=linaro.org header.i=@linaro.org\n\theader.b=\"J4HR4pBw\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xz7rw3Wxdz9sP1\n\tfor ;\n\tFri, 22 Sep 2017 19:45:52 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1752012AbdIVJpe (ORCPT\n\t);\n\tFri, 22 Sep 2017 05:45:34 -0400","from mail-io0-f177.google.com ([209.85.223.177]:48439 \"EHLO\n\tmail-io0-f177.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751971AbdIVJpd (ORCPT\n\t); Fri, 22 Sep 2017 05:45:33 -0400","by mail-io0-f177.google.com with SMTP id n69so1826816ioi.5\n\tfor ;\n\tFri, 22 Sep 2017 02:45:32 -0700 (PDT)","by 10.2.181.165 with HTTP; Fri, 22 Sep 2017 02:45:32 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google;\n\th=mime-version:in-reply-to:references:from:date:message-id:subject:to\n\t:cc; bh=NyOk/qIBgG00KhlQxdVUdJepE2wcU2vsP+W1KcSUKfw=;\n\tb=J4HR4pBwj+tbZv/VI6vNkN8KA9FtkYNiuTrwI9mSTwEKzlwqT2fpv7wmeR9CKopWIV\n\tZHGMZu7Bme480w+Wzkk92oy+KtJpMAiVBQbSy/8WriH2rs6KP9/ZKlK46dPxIHOSXOsS\n\tggdB2nmEvPTO2r6qpY6rsHTBFBQ1xqEQgp6uk=","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:mime-version:in-reply-to:references:from:date\n\t:message-id:subject:to:cc;\n\tbh=NyOk/qIBgG00KhlQxdVUdJepE2wcU2vsP+W1KcSUKfw=;\n\tb=GNdO3k3w80XmT2Vt/lhOvG2Ld94du8OAQu0jN25eg1fxINWtVhBNLalyIn1IeBFvhY\n\tDOK6IGKx6BSesYQpqO+2MunFyOIYFDfReML6g5OPJgwjt6gjZeyfxhzyCQO5Bdu5Xj1j\n\tUp0YEdhy05cNOWYu0FXWxV6XVwHtsr+8wgJtq7yTeNLmlldbcFfSodb+zpTbjhmKTKMV\n\tDQOW2Eiua88zDzweG+D1JxD0/3Qk23SqkgLDdBnJtzNHuwgOqqaczIPmE1YDrudfmCCz\n\tP2pClpb4lJ2c6GDTRdnY8mOY04TPlBKtHHFt7+EDMwMqtBcmoC/7ni+EsC/caqAVJHbI\n\tJTkw==","X-Gm-Message-State":"AHPjjUi9i/OO6ikDZhWDjLIXxD4CSUmYuQHSesIh098Ix4UVOlcoLYx9\n\tJlKJtCGABvxx0tdRY7VryhnY9+vQUBUwVRZDh9ncXg==","X-Google-Smtp-Source":"AOwi7QCxn8b4uGwrpbfVn0TffrC+snp96ypScT707F0bEoySK5Lc/6ibJ2+iVBl9T8OzQIqcaZkQjC7Ge+Cz2kg4Jeo=","X-Received":"by 10.107.198.7 with SMTP id w7mr7229940iof.27.1506073532507;\n\tFri, 22 Sep 2017 02:45:32 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<20170915233524.1375-1-bjorn.andersson@linaro.org>","References":"<20170915233524.1375-1-bjorn.andersson@linaro.org>","From":"Ulf Hansson ","Date":"Fri, 22 Sep 2017 11:45:32 +0200","Message-ID":"","Subject":"Re: [PATCH v2 0/2] Support SDHCI on 8974pro devices","To":"Bjorn Andersson ","Cc":"Adrian Hunter , Rob Herring ,\n\tMark Rutland ,\n\t\"linux-mmc@vger.kernel.org\" ,\n\t\"linux-kernel@vger.kernel.org\" ,\n\t\"linux-arm-msm@vger.kernel.org\" ,\n\tVenkat Gopalakrishnan ,\n\tRitesh Harjani ,\n\t\"devicetree@vger.kernel.org\" ","Content-Type":"text/plain; charset=\"UTF-8\"","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1773496,"web_url":"http://patchwork.ozlabs.org/comment/1773496/","msgid":"","list_archive_url":null,"date":"2017-09-22T11:22:17","subject":"Re: [PATCH v2 1/2] mmc: sdhci-msm: Utilize bulk clock API","submitter":{"id":21036,"url":"http://patchwork.ozlabs.org/api/people/21036/","name":"Ulf Hansson","email":"ulf.hansson@linaro.org"},"content":"On 16 September 2017 at 01:35, Bjorn Andersson\n wrote:\n> By stuffing the runtime controlled clocks into a clk_bulk_data array we\n> can utilize the newly introduced bulk clock operations and clean up the\n> error paths. This allow us to handle additional clocks in subsequent\n> patch, without the added complexity.\n>\n> Cc: Ritesh Harjani \n> Signed-off-by: Bjorn Andersson \n\nApparently clk_bulk_* isn't exported, which triggers the follow build errors.\n\nhttps://storage.kernelci.org/ulfh/next/v4.14-rc1-23-g22a5146dde6b/arm64/allmodconfig/build.log\n\nCan you perhaps send a patch exporting them, and tell Mike/Stephen to\npick it up as a part of the 4.14 rcs?\n\nKind regards\nUffe\n\n> ---\n>\n> Changes since v1:\n> - Dropped \"clk\" and \"pclk\" from sdhci_msm_host\n>\n> drivers/mmc/host/sdhci-msm.c | 80 +++++++++++++++++++-------------------------\n> 1 file changed, 34 insertions(+), 46 deletions(-)\n>\n> diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c\n> index 9d601dc0d646..b9ca1b1ef9a8 100644\n> --- a/drivers/mmc/host/sdhci-msm.c\n> +++ b/drivers/mmc/host/sdhci-msm.c\n> @@ -127,10 +127,9 @@ struct sdhci_msm_host {\n> struct platform_device *pdev;\n> void __iomem *core_mem; /* MSM SDCC mapped address */\n> int pwr_irq; /* power irq */\n> - struct clk *clk; /* main SD/MMC bus clock */\n> - struct clk *pclk; /* SDHC peripheral bus clock */\n> struct clk *bus_clk; /* SDHC bus voter clock */\n> struct clk *xo_clk; /* TCXO clk needed for FLL feature of cm_dll*/\n> + struct clk_bulk_data bulk_clks[2]; /* core, iface clocks */\n> unsigned long clk_rate;\n> struct mmc_host *mmc;\n> bool use_14lpp_dll_reset;\n> @@ -164,10 +163,11 @@ static void msm_set_clock_rate_for_bus_mode(struct sdhci_host *host,\n> struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);\n> struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);\n> struct mmc_ios curr_ios = host->mmc->ios;\n> + struct clk *core_clk = msm_host->bulk_clks[0].clk;\n> int rc;\n>\n> clock = msm_get_clock_rate_for_bus_mode(host, clock);\n> - rc = clk_set_rate(msm_host->clk, clock);\n> + rc = clk_set_rate(core_clk, clock);\n> if (rc) {\n> pr_err(\"%s: Failed to set clock at rate %u at timing %d\\n\",\n> mmc_hostname(host->mmc), clock,\n> @@ -176,7 +176,7 @@ static void msm_set_clock_rate_for_bus_mode(struct sdhci_host *host,\n> }\n> msm_host->clk_rate = clock;\n> pr_debug(\"%s: Setting clock at rate %lu at timing %d\\n\",\n> - mmc_hostname(host->mmc), clk_get_rate(msm_host->clk),\n> + mmc_hostname(host->mmc), clk_get_rate(core_clk),\n> curr_ios.timing);\n> }\n>\n> @@ -1032,8 +1032,9 @@ static unsigned int sdhci_msm_get_max_clock(struct sdhci_host *host)\n> {\n> struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);\n> struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);\n> + struct clk *core_clk = msm_host->bulk_clks[0].clk;\n>\n> - return clk_round_rate(msm_host->clk, ULONG_MAX);\n> + return clk_round_rate(core_clk, ULONG_MAX);\n> }\n>\n> static unsigned int sdhci_msm_get_min_clock(struct sdhci_host *host)\n> @@ -1124,6 +1125,7 @@ static int sdhci_msm_probe(struct platform_device *pdev)\n> struct sdhci_pltfm_host *pltfm_host;\n> struct sdhci_msm_host *msm_host;\n> struct resource *core_memres;\n> + struct clk *clk;\n> int ret;\n> u16 host_version, core_minor;\n> u32 core_version, config;\n> @@ -1159,24 +1161,32 @@ static int sdhci_msm_probe(struct platform_device *pdev)\n> }\n>\n> /* Setup main peripheral bus clock */\n> - msm_host->pclk = devm_clk_get(&pdev->dev, \"iface\");\n> - if (IS_ERR(msm_host->pclk)) {\n> - ret = PTR_ERR(msm_host->pclk);\n> + clk = devm_clk_get(&pdev->dev, \"iface\");\n> + if (IS_ERR(clk)) {\n> + ret = PTR_ERR(clk);\n> dev_err(&pdev->dev, \"Peripheral clk setup failed (%d)\\n\", ret);\n> goto bus_clk_disable;\n> }\n> -\n> - ret = clk_prepare_enable(msm_host->pclk);\n> - if (ret)\n> - goto bus_clk_disable;\n> + msm_host->bulk_clks[1].clk = clk;\n>\n> /* Setup SDC MMC clock */\n> - msm_host->clk = devm_clk_get(&pdev->dev, \"core\");\n> - if (IS_ERR(msm_host->clk)) {\n> - ret = PTR_ERR(msm_host->clk);\n> + clk = devm_clk_get(&pdev->dev, \"core\");\n> + if (IS_ERR(clk)) {\n> + ret = PTR_ERR(clk);\n> dev_err(&pdev->dev, \"SDC MMC clk setup failed (%d)\\n\", ret);\n> - goto pclk_disable;\n> + goto bus_clk_disable;\n> }\n> + msm_host->bulk_clks[0].clk = clk;\n> +\n> + /* Vote for maximum clock rate for maximum performance */\n> + ret = clk_set_rate(clk, INT_MAX);\n> + if (ret)\n> + dev_warn(&pdev->dev, \"core clock boost failed\\n\");\n> +\n> + ret = clk_bulk_prepare_enable(ARRAY_SIZE(msm_host->bulk_clks),\n> + msm_host->bulk_clks);\n> + if (ret)\n> + goto bus_clk_disable;\n>\n> /*\n> * xo clock is needed for FLL feature of cm_dll.\n> @@ -1188,15 +1198,6 @@ static int sdhci_msm_probe(struct platform_device *pdev)\n> dev_warn(&pdev->dev, \"TCXO clk not present (%d)\\n\", ret);\n> }\n>\n> - /* Vote for maximum clock rate for maximum performance */\n> - ret = clk_set_rate(msm_host->clk, INT_MAX);\n> - if (ret)\n> - dev_warn(&pdev->dev, \"core clock boost failed\\n\");\n> -\n> - ret = clk_prepare_enable(msm_host->clk);\n> - if (ret)\n> - goto pclk_disable;\n> -\n> core_memres = platform_get_resource(pdev, IORESOURCE_MEM, 1);\n> msm_host->core_mem = devm_ioremap_resource(&pdev->dev, core_memres);\n>\n> @@ -1289,9 +1290,8 @@ static int sdhci_msm_probe(struct platform_device *pdev)\n> pm_runtime_set_suspended(&pdev->dev);\n> pm_runtime_put_noidle(&pdev->dev);\n> clk_disable:\n> - clk_disable_unprepare(msm_host->clk);\n> -pclk_disable:\n> - clk_disable_unprepare(msm_host->pclk);\n> + clk_bulk_disable_unprepare(ARRAY_SIZE(msm_host->bulk_clks),\n> + msm_host->bulk_clks);\n> bus_clk_disable:\n> if (!IS_ERR(msm_host->bus_clk))\n> clk_disable_unprepare(msm_host->bus_clk);\n> @@ -1314,8 +1314,8 @@ static int sdhci_msm_remove(struct platform_device *pdev)\n> pm_runtime_disable(&pdev->dev);\n> pm_runtime_put_noidle(&pdev->dev);\n>\n> - clk_disable_unprepare(msm_host->clk);\n> - clk_disable_unprepare(msm_host->pclk);\n> + clk_bulk_disable_unprepare(ARRAY_SIZE(msm_host->bulk_clks),\n> + msm_host->bulk_clks);\n> if (!IS_ERR(msm_host->bus_clk))\n> clk_disable_unprepare(msm_host->bus_clk);\n> sdhci_pltfm_free(pdev);\n> @@ -1329,8 +1329,8 @@ static int sdhci_msm_runtime_suspend(struct device *dev)\n> struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);\n> struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);\n>\n> - clk_disable_unprepare(msm_host->clk);\n> - clk_disable_unprepare(msm_host->pclk);\n> + clk_bulk_disable_unprepare(ARRAY_SIZE(msm_host->bulk_clks),\n> + msm_host->bulk_clks);\n>\n> return 0;\n> }\n> @@ -1340,21 +1340,9 @@ static int sdhci_msm_runtime_resume(struct device *dev)\n> struct sdhci_host *host = dev_get_drvdata(dev);\n> struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);\n> struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);\n> - int ret;\n>\n> - ret = clk_prepare_enable(msm_host->clk);\n> - if (ret) {\n> - dev_err(dev, \"clk_enable failed for core_clk: %d\\n\", ret);\n> - return ret;\n> - }\n> - ret = clk_prepare_enable(msm_host->pclk);\n> - if (ret) {\n> - dev_err(dev, \"clk_enable failed for iface_clk: %d\\n\", ret);\n> - clk_disable_unprepare(msm_host->clk);\n> - return ret;\n> - }\n> -\n> - return 0;\n> + return clk_bulk_prepare_enable(ARRAY_SIZE(msm_host->bulk_clks),\n> + msm_host->bulk_clks);\n> }\n> #endif\n>\n> --\n> 2.12.0\n>\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=linaro.org header.i=@linaro.org\n\theader.b=\"RJWHUesF\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xzB0P3L6lz9sPm\n\tfor ;\n\tFri, 22 Sep 2017 21:22:28 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751931AbdIVLWY (ORCPT\n\t);\n\tFri, 22 Sep 2017 07:22:24 -0400","from mail-io0-f171.google.com ([209.85.223.171]:56139 \"EHLO\n\tmail-io0-f171.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751928AbdIVLWW (ORCPT\n\t); Fri, 22 Sep 2017 07:22:22 -0400","by mail-io0-f171.google.com with SMTP id z187so2279259ioz.12\n\tfor ;\n\tFri, 22 Sep 2017 04:22:22 -0700 (PDT)","by 10.2.181.165 with HTTP; Fri, 22 Sep 2017 04:22:17 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google;\n\th=mime-version:in-reply-to:references:from:date:message-id:subject:to\n\t:cc; bh=LR+ewlo6Fy4KEs+9618kS4dALEWcH16ZJqnmZeSsTtM=;\n\tb=RJWHUesFsT9CKi2p30NYUv412EPKdr1rV9gNeZBL3fsHX3Ypm0X1BMYBulN+THiJJZ\n\tnIBfwM6T1T4WgMZx3BE8KC0LbCo+gKHxF8bcsClRFHiAgFk+P/toILkb23NLDiW6b9GJ\n\tBH3NjdAGSqe/hm+H18JrjzHHdEfiznM1UHhuY=","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:mime-version:in-reply-to:references:from:date\n\t:message-id:subject:to:cc;\n\tbh=LR+ewlo6Fy4KEs+9618kS4dALEWcH16ZJqnmZeSsTtM=;\n\tb=Rdz4tfX13ZbKT3nkyaVAlnryw3FgEAAmb+HU/OIeycnGJDm2LLct/y60tsjCPUnwIz\n\tfbLmyeTVFbGFg6bWdifPNK3GQPNf8daye6HnowWtiaFVnoVN85/88strzfY25AGyQJVR\n\tNQidvRhcEd4CsM7grFi1CVHdBHDDbEJVMYVUiXBMbRRvo4Eg8AIrj5Xi3pWmzd2u0mUc\n\tSsFM7hbc6moCGzkItnrAMOvn+uZsuWkhH6vvI6F0GuJ5Cd8/JgpJfRIJGdqJxBG1obG6\n\tVUosX/RCwt3WPdpEadNSqesQyifJ8xB3eOLDEvemKX2MI61EWuZRCQ9gF5UlPBZD9TyT\n\txRPA==","X-Gm-Message-State":"AHPjjUgaONfw8/ucYglFraBB+vnAAMCJQOMJGyIzfbP2pwqfW93WD/8X\n\tz9cs7/iF7xMK8M1a5X7ujwTG/AwCWnJ4ON63JECbVg==","X-Google-Smtp-Source":"AOwi7QAOeOpNRu2sYj7J9fOqGIjNEXduECMZc/Mqg+zwSVQnzieKHlxO8UBqK7yYq2Nw3E5SHPL+seQHIXRombDwGvE=","X-Received":"by 10.107.198.7 with SMTP id w7mr7572090iof.27.1506079337518;\n\tFri, 22 Sep 2017 04:22:17 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<20170915233524.1375-2-bjorn.andersson@linaro.org>","References":"<20170915233524.1375-1-bjorn.andersson@linaro.org>\n\t<20170915233524.1375-2-bjorn.andersson@linaro.org>","From":"Ulf Hansson ","Date":"Fri, 22 Sep 2017 13:22:17 +0200","Message-ID":"","Subject":"Re: [PATCH v2 1/2] mmc: sdhci-msm: Utilize bulk clock API","To":"Bjorn Andersson ","Cc":"Adrian Hunter , Rob Herring ,\n\tMark Rutland ,\n\t\"linux-mmc@vger.kernel.org\" ,\n\t\"linux-kernel@vger.kernel.org\" ,\n\t\"linux-arm-msm@vger.kernel.org\" ,\n\tVenkat Gopalakrishnan ,\n\tRitesh Harjani ,\n\t\"devicetree@vger.kernel.org\" ","Content-Type":"text/plain; charset=\"UTF-8\"","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}}]