[{"id":1769832,"web_url":"http://patchwork.ozlabs.org/comment/1769832/","msgid":"<4c141996-c4ed-7156-d960-58ae2d9c4d1e@amsat.org>","list_archive_url":null,"date":"2017-09-18T01:32:15","subject":"Re: [Qemu-devel] [Qemu devel v9 PATCH 0/5] Add support for\n\tSmartfusion2 SoC","submitter":{"id":70924,"url":"http://patchwork.ozlabs.org/api/people/70924/","name":"Philippe Mathieu-Daudé","email":"f4bug@amsat.org"},"content":"Hi Sundeep,\n\nOn 09/15/2017 01:59 PM, Subbaraya Sundeep wrote:\n> Hi Qemu-devel,\n> \n> I am trying to add Smartfusion2 SoC.\n> SoC is from Microsemi and System on Module(SOM)\n> board is from Emcraft systems. Smartfusion2 has hardened\n> Microcontroller(Cortex-M3)based Sub System and FPGA fabric.\n> At the moment only system timer, sysreg and SPI\n> controller are modelled.\n> \n> Tested-by: Philippe Mathieu-Daudé \n\nWhen a review tag is sent to the series cover, this means it can be \nadded to all the patches from the series.\n\n> \n> Testing:\n> ./arm-softmmu/qemu-system-arm -M emcraft-sf2 -serial mon:stdio \\\n> -kernel u-boot.bin -display none -drive file=spi.bin,if=mtd,format=raw\n> \n> Binaries u-boot.bin and spi.bin are at:\n> https://github.com/Subbaraya-Sundeep/qemu-test-binaries.git\n> \n> U-boot is from Emcraft with modified\n> - SPI driver not to use PDMA.\n> - ugly hack to pass dtb to kernel in r1.\n> @\n> https://github.com/Subbaraya-Sundeep/emcraft-uboot-sf2.git\n> \n> Linux is 4.5 linux with Smartfusion2 SoC dts and clocksource\n> driver added by myself @\n> https://github.com/Subbaraya-Sundeep/linux.git\n> \n> v9:\n\nHowever if you made significant changes to v9, please drop the R-b that \nwere left on v8 to make sure people re-review those changes. Functional \nchanges directly reset Tested-by tags.\n\n$ git backport-diff -r master..msf2_v9 -u msf2_v8\nKey:\n[----] : patches are identical\n[####] : number of functional differences between upstream/downstream patch\n[down] : patch is downstream-only\nThe flags [FC] indicate (F)unctional and (C)ontextual differences, \nrespectively\n\n001/5:[----] [--] 'msf2: Add Smartfusion2 System timer'\n002/5:[0047] [FC] 'msf2: Microsemi Smartfusion2 System Register block'\n003/5:[----] [--] 'msf2: Add Smartfusion2 SPI controller'\n004/5:[0018] [FC] 'msf2: Add Smartfusion2 SoC'\n005/5:[0001] [FC] 'msf2: Add Emcraft's Smartfusion2 SOM kit'\n\n> \tused trace instead of DB_PRINT in msf2-sysreg.c\n> \tused LOG_UNIMP for non guest errors in msf2-sysreg.c\n> \tadded unimplemented devices in msf2-soc.c\n> \tremoved .alias suffix in alias memory region name for eNVM\n\nyou also removed \"mc->ignore_memory_transaction_failures\" use.\n\n> \n> v8:\n> \tmemory_region_init_ram to memory_region_init_rom in soc\n> \t%s/emcraft_sf2_init/emcraft_sf2_s2s010_init/g in som\n> \tAdded mc->ignore_memory_transaction_failures = true in som\n> \t\tas per latest commit.\n> \tCode simplifications as suggested by Alistair in sysreg and ssi.\n\nFYI, testing outputs:\n\n- U-Boot\n\nCPU : SmartFusion2 SoC (Cortex-M3 Hard IP)\nFreqs: CORTEX-M3=142MHz,PCLK0=71MHz,PCLK1=71MHz\nBoard: M2S-FG484-SOM Rev 1A, www.emcraft.com\napb_config: unimplemented device write (size 4, value 0x0, offset 0x10)\napb_config: unimplemented device write (size 4, value 0x118, offset 0x84)\napb_config: unimplemented device write (size 4, value 0xc1, offset 0x18)\napb_config: unimplemented device write (size 4, value 0x99f, offset 0x1c)\napb_config: unimplemented device write (size 4, value 0x3333, offset 0x24)\napb_config: unimplemented device write (size 4, value 0xffff, offset 0x28)\napb_config: unimplemented device write (size 4, value 0x3300, offset 0x78)\napb_config: unimplemented device write (size 4, value 0x7777, offset 0x2c)\napb_config: unimplemented device write (size 4, value 0xfff, offset 0x30)\napb_config: unimplemented device write (size 4, value 0x580, offset 0x8)\napb_config: unimplemented device write (size 4, value 0x110, offset 0xc)\napb_config: unimplemented device write (size 4, value 0x1c00, offset 0x38)\napb_config: unimplemented device write (size 4, value 0x8, offset 0x3c)\napb_config: unimplemented device write (size 4, value 0xd23, offset 0x6c)\napb_config: unimplemented device write (size 4, value 0x240, offset 0x50)\napb_config: unimplemented device write (size 4, value 0x2, offset 0x5c)\napb_config: unimplemented device write (size 4, value 0x126, offset 0x60)\napb_config: unimplemented device write (size 4, value 0x3, offset 0xbc)\napb_config: unimplemented device write (size 4, value 0x23, offset 0x54)\napb_config: unimplemented device write (size 4, value 0x33, offset 0x40)\napb_config: unimplemented device write (size 4, value 0x20, offset 0x44)\napb_config: unimplemented device write (size 4, value 0x33, offset 0x80)\napb_config: unimplemented device write (size 4, value 0x8, offset 0x7c)\napb_config: unimplemented device write (size 4, value 0x4000, offset 0x9c)\napb_config: unimplemented device write (size 4, value 0x0, offset 0xb4)\napb_config: unimplemented device write (size 4, value 0x107, offset 0x64)\napb_config: unimplemented device write (size 4, value 0x104, offset 0x58)\napb_config: unimplemented device write (size 4, value 0x11, offset 0x68)\napb_config: unimplemented device write (size 4, value 0x80f8, offset 0xa0)\napb_config: unimplemented device write (size 4, value 0x7, offset 0xa4)\napb_config: unimplemented device write (size 4, value 0x80f8, offset 0xa8)\napb_config: unimplemented device write (size 4, value 0x7, offset 0xac)\napb_config: unimplemented device write (size 4, value 0x200, offset 0xb0)\napb_config: unimplemented device write (size 4, value 0x0, offset 0x21c)\napb_config: unimplemented device write (size 4, value 0x80, offset 0x224)\napb_config: unimplemented device write (size 4, value 0xf, offset 0x230)\napb_config: unimplemented device write (size 4, value 0xb, offset 0x248)\napb_config: unimplemented device write (size 4, value 0x0, offset 0x25c)\napb_config: unimplemented device write (size 4, value 0x0, offset 0x260)\napb_config: unimplemented device write (size 4, value 0x0, offset 0x264)\napb_config: unimplemented device write (size 4, value 0x0, offset 0x268)\napb_config: unimplemented device write (size 4, value 0x1, offset 0x280)\napb_config: unimplemented device write (size 4, value 0x40, offset 0x298)\napb_config: unimplemented device write (size 4, value 0x401, offset 0x29c)\napb_config: unimplemented device write (size 4, value 0x4010, offset 0x2a0)\napb_config: unimplemented device write (size 4, value 0x40, offset 0x2d8)\napb_config: unimplemented device write (size 4, value 0x401, offset 0x2dc)\napb_config: unimplemented device write (size 4, value 0x4010, offset 0x2e0)\napb_config: unimplemented device write (size 4, value 0x0, offset 0x2fc)\napb_config: unimplemented device write (size 4, value 0x3, offset 0x304)\napb_config: unimplemented device write (size 4, value 0x1, offset 0x308)\napb_config: unimplemented device write (size 4, value 0x1, offset 0x30c)\napb_config: unimplemented device write (size 4, value 0x9, offset 0x314)\napb_config: unimplemented device write (size 4, value 0x0, offset 0x238)\napb_config: unimplemented device write (size 4, value 0x0, offset 0x23c)\napb_config: unimplemented device write (size 4, value 0x1, offset 0x31c)\napb_config: unimplemented device write (size 4, value 0x1, offset 0x0)\nDRAM: 64 MB\npdma: unimplemented device write (size 4, value 0x1a0, offset 0x20)\npdma: unimplemented device read (size 4, offset 0x20)\npdma: unimplemented device write (size 4, value 0x3c000, offset 0x20)\npdma: unimplemented device read (size 4, offset 0x20)\npdma: unimplemented device write (size 4, value 0x2000001, offset 0x20)\npdma: unimplemented device write (size 4, value 0x1a0, offset 0x40)\npdma: unimplemented device read (size 4, offset 0x40)\npdma: unimplemented device write (size 4, value 0x3c000, offset 0x40)\npdma: unimplemented device read (size 4, offset 0x40)\npdma: unimplemented device write (size 4, value 0x2800003, offset 0x40)\npdma: unimplemented device write (size 4, value 0x20, offset 0x20)\npdma: unimplemented device write (size 4, value 0x20, offset 0x40)\n*** Warning - bad CRC, using default environment\n\nIn: serial\nOut: serial\nErr: serial\nNet: M2S_MAC\nHit any key to stop autoboot: 0\npdma: unimplemented device write (size 4, value 0x1a0, offset 0x20)\npdma: unimplemented device read (size 4, offset 0x20)\npdma: unimplemented device write (size 4, value 0x3c000, offset 0x20)\npdma: unimplemented device read (size 4, offset 0x20)\npdma: unimplemented device write (size 4, value 0x2000001, offset 0x20)\npdma: unimplemented device write (size 4, value 0x1a0, offset 0x40)\npdma: unimplemented device read (size 4, offset 0x40)\npdma: unimplemented device write (size 4, value 0x3c000, offset 0x40)\npdma: unimplemented device read (size 4, offset 0x40)\npdma: unimplemented device write (size 4, value 0x2800003, offset 0x40)\npdma: unimplemented device write (size 4, value 0x20, offset 0x20)\npdma: unimplemented device write (size 4, value 0x20, offset 0x40)\n16384 KiB S25FL128P_64K at 0:0 is now current device\npdma: unimplemented device write (size 4, value 0x1a0, offset 0x20)\npdma: unimplemented device read (size 4, offset 0x20)\npdma: unimplemented device write (size 4, value 0x3c000, offset 0x20)\npdma: unimplemented device read (size 4, offset 0x20)\npdma: unimplemented device write (size 4, value 0x2000001, offset 0x20)\npdma: unimplemented device write (size 4, value 0x1a0, offset 0x40)\npdma: unimplemented device read (size 4, offset 0x40)\npdma: unimplemented device write (size 4, value 0x3c000, offset 0x40)\npdma: unimplemented device read (size 4, offset 0x40)\npdma: unimplemented device write (size 4, value 0x2800003, offset 0x40)\npdma: unimplemented device write (size 4, value 0x20, offset 0x20)\npdma: unimplemented device write (size 4, value 0x20, offset 0x40)\n\n- tftpboot\n\nM2S-FG484-SOM> tftpboot\nemac: unimplemented device write (size 4, value 0x7, offset 0x20)\nemac: unimplemented device read (size 4, offset 0x0)\nemac: unimplemented device write (size 4, value 0x80000000, offset 0x0)\nemac: unimplemented device read (size 4, offset 0x0)\nemac: unimplemented device write (size 4, value 0x0, offset 0x0)\nemac: unimplemented device read (size 4, offset 0x0)\nemac: unimplemented device write (size 4, value 0x0, offset 0x0)\nemac: unimplemented device read (size 4, offset 0x0)\nemac: unimplemented device write (size 4, value 0x0, offset 0x0)\nemac: unimplemented device read (size 4, offset 0x0)\nemac: unimplemented device write (size 4, value 0x0, offset 0x0)\nemac: unimplemented device read (size 4, offset 0x0)\nemac: unimplemented device write (size 4, value 0x0, offset 0x0)\nemac: unimplemented device read (size 4, offset 0x38)\nemac: unimplemented device write (size 4, value 0x0, offset 0x38)\nemac: unimplemented device read (size 4, offset 0x48)\nemac: unimplemented device write (size 4, value 0x0, offset 0x48)\nemac: unimplemented device write (size 4, value 0x0, offset 0x0)\nemac: unimplemented device read (size 4, offset 0x4)\nemac: unimplemented device write (size 4, value 0x0, offset 0x4)\nemac: unimplemented device read (size 4, offset 0x4)\nemac: unimplemented device write (size 4, value 0x105, offset 0x4)\nemac: unimplemented device write (size 4, value 0x600, offset 0x10)\nemac: unimplemented device write (size 4, value 0xc0b13c83, offset 0x40)\nemac: unimplemented device write (size 4, value 0x83830000, offset 0x44)\nemac: unimplemented device write (size 4, value 0x200032e4, offset 0x190)\nemac: unimplemented device write (size 4, value 0x1, offset 0x18c)\nemac: unimplemented device read (size 4, offset 0x48)\nemac: unimplemented device write (size 4, value 0x1f, offset 0x48)\nemac: unimplemented device read (size 4, offset 0x48)\nemac: unimplemented device write (size 4, value 0x0, offset 0x48)\nemac: unimplemented device write (size 4, value 0xff00, offset 0x48)\nemac: unimplemented device read (size 4, offset 0x48)\n[...]\nemac: unimplemented device read (size 4, offset 0x48)\nm2s_eth_init: FIFO initialization timeout\n*** m2s_mac_dump_regs FIFO init:\nemac: unimplemented device read (size 4, offset 0x180)\nemac: unimplemented device read (size 4, offset 0x184)\nemac: unimplemented device read (size 4, offset 0x188)\n DMA TX CTRL=00000000;DESC=00000000;STAT=00000000\nemac: unimplemented device read (size 4, offset 0x18c)\nemac: unimplemented device read (size 4, offset 0x190)\nemac: unimplemented device read (size 4, offset 0x194)\n DMA RX CTRL=00000000;DESC=00000000;STAT=00000000\nemac: unimplemented device read (size 4, offset 0x19c)\nemac: unimplemented device read (size 4, offset 0x198)\n DMA IRQ 00000000/00000000\nemac: unimplemented device read (size 4, offset 0x0)\nemac: unimplemented device read (size 4, offset 0x4)\nemac: unimplemented device read (size 4, offset 0x8)\nemac: unimplemented device read (size 4, offset 0xc)\nemac: unimplemented device read (size 4, offset 0x10)\n CFG1=00000000;CFG2=00000000;IFG=00000000;HD=00000000;MFL=00000000\nemac: unimplemented device read (size 4, offset 0x38)\nemac: unimplemented device read (size 4, offset 0x3c)\nemac: unimplemented device read (size 4, offset 0x40)\nemac: unimplemented device read (size 4, offset 0x44)\n IFCTRL=00000000;IFSTAT=00000000;ADR1=00000000;ADR2=00000000\n FIFO CFG emac: unimplemented device read (size 4, offset 0x48)\n00000000/emac: unimplemented device read (size 4, offset 0x4c)\n00000000/emac: unimplemented device read (size 4, offset 0x50)\n00000000/emac: unimplemented device read (size 4, offset 0x54)\n00000000/emac: unimplemented device read (size 4, offset 0x58)\n00000000/emac: unimplemented device read (size 4, offset 0x5c)\n00000000/\n FIFO ACC emac: unimplemented device read (size 4, offset 0x60)\n00000000/emac: unimplemented device read (size 4, offset 0x64)\n00000000/emac: unimplemented device read (size 4, offset 0x68)\n00000000/emac: unimplemented device read (size 4, offset 0x6c)\n00000000/emac: unimplemented device read (size 4, offset 0x70)\n00000000/emac: unimplemented device read (size 4, offset 0x74)\n00000000/emac: unimplemented device read (size 4, offset 0x78)\n00000000/emac: unimplemented device read (size 4, offset 0x7c)\n00000000/\nM2S-FG484-SOM>\n\n- erase\n\nM2S-FG484-SOM> sf erase 0 0x1000\nTaking exception 4 [Data Abort]\n...with CFSR.PRECISERR and BFAR 0x10\n... as 3\nUNHANDLED EXCEPTION: HARD FAULT\n R0\t= 00848cea R1\t= 00000000\n R2\t= 00022ab0 R3\t= 00000000\n R12\t= 00000004 LR\t= 00000a27\n PC\t= 0000d418 PSR\t= 01000000\n\nGood work :)\n\nRegards,\n\nPhil.","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"XRilH/6Y\"; dkim-atps=neutral"],"Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xwT6D3clWz9s7G\n\tfor ;\n\tMon, 18 Sep 2017 11:33:02 +1000 (AEST)","from localhost ([::1]:34228 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1dtkvj-0001OI-Pk\n\tfor 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peter.maydell@linaro.org","References":"<1505494753-10837-1-git-send-email-sundeep.lkml@gmail.com>","From":"=?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= ","Message-ID":"<4c141996-c4ed-7156-d960-58ae2d9c4d1e@amsat.org>","Date":"Sun, 17 Sep 2017 22:32:15 -0300","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.3.0","MIME-Version":"1.0","In-Reply-To":"<1505494753-10837-1-git-send-email-sundeep.lkml@gmail.com>","Content-Type":"text/plain; charset=utf-8; format=flowed","Content-Language":"en-US","Content-Transfer-Encoding":"8bit","X-detected-operating-system":"by eggs.gnu.org: Genre and OS details not\n\trecognized.","X-Received-From":"2607:f8b0:400d:c09::22d","Subject":"Re: [Qemu-devel] [Qemu devel v9 PATCH 0/5] Add support for\n\tSmartfusion2 SoC","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"alistair23@gmail.com, qemu-arm@nongnu.org, qemu-devel@nongnu.org,\n\tcrosthwaite.peter@gmail.com","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"}}]