[{"id":1768373,"web_url":"http://patchwork.ozlabs.org/comment/1768373/","msgid":"","list_archive_url":null,"date":"2017-09-14T07:07:01","subject":"RE: [PATCH 8/8] ARM: drs: iwg22m: Add SPI NOR support","submitter":{"id":71731,"url":"http://patchwork.ozlabs.org/api/people/71731/","name":"Biju Das","email":"biju.das@bp.renesas.com"},"content":"Hi,\n\n> -----Original Message-----\n> From: devicetree-owner@vger.kernel.org [mailto:devicetree-\n> owner@vger.kernel.org] On Behalf Of Chris Paterson\n> Sent: 13 September 2017 18:06\n> To: Simon Horman \n> Cc: Rob Herring ; Mark Rutland\n> ; Magnus Damm ;\n> Russell King ; Fabrizio Castro\n> ; devicetree@vger.kernel.org; linux-renesas-\n> soc@vger.kernel.org; linux-arm-kernel@lists.infradead.org; Chris Paterson\n> \n> Subject: [PATCH 8/8] ARM: drs: iwg22m: Add SPI NOR support\n\nSubject should be \" ARM: dts: iwg22m: Add SPI NOR support\"\n\n> From: Fabrizio Castro \n>\n> Add support for the SPI NOR device used to boot up the system to the System on\n> Module DT.\n>\n> Signed-off-by: Fabrizio Castro \n> Signed-off-by: Chris Paterson \n\n\n\n\nRenesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. 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d=\"scan'208\";a=\"257854341\"","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=renesasgroup.onmicrosoft.com; s=selector1-bp-renesas-com;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version;\n\tbh=jWJvXaJxvUj4JdykFNIRSvd0ORwxGX5iMUYiwytSBcs=;\n\tb=QxFXLEGYOZTVI/HPdFhUTi5ukIETA3s1JRiHk18f+f3LkHjdmpfBaJowVPms4sA6oAu252LLNVlo6lltKmaaisb2eMTZFLwRKa5RP1V7xtPZfURlozDkiV+PqRXSSfVxEcKDNIW/4qhN1OjzCLLq6+Hcr+uskWQslUSmT4GP/s8=","From":"Biju Das ","To":"Chris Paterson ,\n\tSimon Horman ","CC":"Rob Herring , Mark Rutland ,\n\tMagnus Damm ,\n\tRussell King , \n\tFabrizio Castro ,\n\t\"devicetree@vger.kernel.org\" ,\n\t\"linux-renesas-soc@vger.kernel.org\" , \n\t\"linux-arm-kernel@lists.infradead.org\" \n\t,\n\tChris Paterson ","Subject":"RE: [PATCH 8/8] ARM: drs: iwg22m: Add SPI NOR support","Thread-Topic":"[PATCH 8/8] ARM: drs: iwg22m: Add SPI NOR support","Thread-Index":"AQHTLLKhRAfEgd2QhkiGMacfENGhvqKz9bRg","Date":"Thu, 14 Sep 2017 07:07:01 +0000","Message-ID":"","References":"<1505322341-9480-1-git-send-email-chris.paterson2@renesas.com>\n\t<1505322341-9480-9-git-send-email-chris.paterson2@renesas.com>","In-Reply-To":"<1505322341-9480-9-git-send-email-chris.paterson2@renesas.com>","Accept-Language":"en-GB, en-US","Content-Language":"en-US","X-MS-Has-Attach":"","X-MS-TNEF-Correlator":"","x-originating-ip":"[193.141.220.21]","x-ms-publictraffictype":"Email","x-microsoft-exchange-diagnostics":"1; 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SFP:1102; SCL:1; SRVR:KL1PR06MB1719;\n\tH:KL1PR06MB1702.apcprd06.prod.outlook.com; FPR:; SPF:None;\n\tPTR:InfoNoRecords; MX:1; A:0; LANG:en; ","received-spf":"None (protection.outlook.com: bp.renesas.com does not designate\n\tpermitted sender hosts)","spamdiagnosticoutput":"1:99","spamdiagnosticmetadata":"NSPM","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"quoted-printable","MIME-Version":"1.0","X-OriginatorOrg":"bp.renesas.com","X-MS-Exchange-CrossTenant-originalarrivaltime":"14 Sep 2017 07:07:01.1824\n\t(UTC)","X-MS-Exchange-CrossTenant-fromentityheader":"Hosted","X-MS-Exchange-CrossTenant-id":"53d82571-da19-47e4-9cb4-625a166a4a2a","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"KL1PR06MB1719","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1769001,"web_url":"http://patchwork.ozlabs.org/comment/1769001/","msgid":"<20170915074551.GF3924@verge.net.au>","list_archive_url":null,"date":"2017-09-15T07:45:51","subject":"Re: [PATCH 1/8] ARM: dts: r8a7745: Add APMU node and second CPU core","submitter":{"id":106,"url":"http://patchwork.ozlabs.org/api/people/106/","name":"Simon Horman","email":"horms@verge.net.au"},"content":"[Cc Geert]\n\nOn Wed, Sep 13, 2017 at 06:05:34PM +0100, Chris Paterson wrote:\n> From: Fabrizio Castro \n> \n> Add DT node for the Advanced Power Management Unit (APMU), add the\n> second CPU core, and use \"renesas,apmu\" as \"enable-method\".\n> \n> Signed-off-by: Fabrizio Castro \n> Signed-off-by: Chris Paterson \n> ---\n> This patch is based on renesas-devel-20170913-v4.13.\n\nHi,\n\nwith reference to \"[PATCH v3 0/3] ARM: renesas: Enable SMP on R-Car E2\"\nis the CNTVOFF initialised in the boot loader of boards (in upstream)\nfor this SoC? If not I expect you will have trouble with the arch timer\non secondary CPU cores.\n\nThe patch itself looks good to me.\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=verge.net.au header.i=@verge.net.au\n\theader.b=\"BRRS1NGt\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xtnX56R8sz9t2V\n\tfor ;\n\tFri, 15 Sep 2017 17:46:13 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1750879AbdIOHqM (ORCPT\n\t);\n\tFri, 15 Sep 2017 03:46:12 -0400","from kirsty.vergenet.net ([202.4.237.240]:52875 \"EHLO\n\tkirsty.vergenet.net\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1750841AbdIOHqL (ORCPT\n\t); Fri, 15 Sep 2017 03:46:11 -0400","from penelope.horms.nl (unknown [217.111.208.18])\n\tby kirsty.vergenet.net (Postfix) with ESMTPA id 4E0DB25B73F;\n\tFri, 15 Sep 2017 17:46:09 +1000 (AEST)","by penelope.horms.nl (Postfix, from userid 7100)\n\tid DE602E23462; Fri, 15 Sep 2017 03:45:51 -0400 (EDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; \n\tt=1505461569; bh=kSLWKQ8Pnwia3RNaT1eJui+ijQQK2klUGquY/Amcm0Y=;\n\th=Date:From:To:Cc:Subject:References:In-Reply-To:From;\n\tb=BRRS1NGtu69CtOHg1y+SppemXd/jLEOl09MeijUsU0NSX5oow8ySE9/pl33fIb5dE\n\teBuXUrmoUr08M5AFtJ4YHTSOtP4kaJgSa7b9S8q8k4ijvRGskD5xZ8+/QlT5UUTM76\n\t4K6BMig+TppBgAmzi8UnRHr4nzNWlmQJsvtvDVwc=","Date":"Fri, 15 Sep 2017 09:45:51 +0200","From":"Simon Horman ","To":"Chris Paterson ","Cc":"Rob Herring , Mark Rutland ,\n\tMagnus Damm ,\n\tRussell King , \n\tFabrizio Castro ,\n\tdevicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tGeert Uytterhoeven ","Subject":"Re: [PATCH 1/8] ARM: dts: r8a7745: Add APMU node and second CPU core","Message-ID":"<20170915074551.GF3924@verge.net.au>","References":"<1505322341-9480-1-git-send-email-chris.paterson2@renesas.com>\n\t<1505322341-9480-2-git-send-email-chris.paterson2@renesas.com>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<1505322341-9480-2-git-send-email-chris.paterson2@renesas.com>","Organisation":"Horms Solutions BV","User-Agent":"Mutt/1.5.23 (2014-03-12)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1769005,"web_url":"http://patchwork.ozlabs.org/comment/1769005/","msgid":"<20170915075415.GG3924@verge.net.au>","list_archive_url":null,"date":"2017-09-15T07:54:15","subject":"Re: [PATCH 2/8] ARM: dts: r8a7745: Add SDHI controllers","submitter":{"id":106,"url":"http://patchwork.ozlabs.org/api/people/106/","name":"Simon Horman","email":"horms@verge.net.au"},"content":"On Wed, Sep 13, 2017 at 06:05:35PM +0100, Chris Paterson wrote:\n> From: Fabrizio Castro \n> \n> Add the SDHI controllers to the r8a7745 device tree.\n> \n> Signed-off-by: Fabrizio Castro \n> Signed-off-by: Chris Paterson \n\nThanks, applied.\n\n> ---\n> This patch is based on renesas-devel-20170913-v4.13.\n> \n> This patch is dependant on:\n> - \"dt-bindings: mmc: sh_mmcif: Document r8a7745 DT bindings\"\n\nI think that should be \"[PATCH v3] mmc: renesas_sdhi: Add r8a7743/5 support\"\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=verge.net.au header.i=@verge.net.au\n\theader.b=\"ALWWkdFN\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xtnjv0yNkz9t2Z\n\tfor ;\n\tFri, 15 Sep 2017 17:54:43 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751207AbdIOHyi (ORCPT\n\t);\n\tFri, 15 Sep 2017 03:54:38 -0400","from kirsty.vergenet.net ([202.4.237.240]:53012 \"EHLO\n\tkirsty.vergenet.net\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751203AbdIOHyh (ORCPT\n\t); Fri, 15 Sep 2017 03:54:37 -0400","from penelope.horms.nl (unknown [217.111.208.18])\n\tby kirsty.vergenet.net (Postfix) with ESMTPA id 764A925B73F;\n\tFri, 15 Sep 2017 17:54:34 +1000 (AEST)","by penelope.horms.nl (Postfix, from userid 7100)\n\tid 70CB2E23462; Fri, 15 Sep 2017 03:54:15 -0400 (EDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; \n\tt=1505462075; bh=KMJm3C1wsh+EKK8pzDGT3inh6cy1yT88HNEQHVNanbc=;\n\th=Date:From:To:Cc:Subject:References:In-Reply-To:From;\n\tb=ALWWkdFNQEeLXEIEZA7h/4otEOMZ5tj+m/6E8OPybYO3IHFJ2JWUhf7GyyPkIQvME\n\t0ko3xC2C7qKyp84jt8GTNbXBax7HCRTTHhqlKEmBQaWQsbHZFkFcFbDBHsn4dWJ8Cv\n\txAGMU3bT2a1TU18/8mWOeSodA8Le1fOwfF5jDPHs=","Date":"Fri, 15 Sep 2017 09:54:15 +0200","From":"Simon Horman ","To":"Chris Paterson ","Cc":"Rob Herring , Mark Rutland ,\n\tMagnus Damm ,\n\tRussell King , \n\tFabrizio Castro ,\n\tdevicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org","Subject":"Re: [PATCH 2/8] ARM: dts: r8a7745: Add SDHI controllers","Message-ID":"<20170915075415.GG3924@verge.net.au>","References":"<1505322341-9480-1-git-send-email-chris.paterson2@renesas.com>\n\t<1505322341-9480-3-git-send-email-chris.paterson2@renesas.com>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<1505322341-9480-3-git-send-email-chris.paterson2@renesas.com>","Organisation":"Horms Solutions BV","User-Agent":"Mutt/1.5.23 (2014-03-12)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1769011,"web_url":"http://patchwork.ozlabs.org/comment/1769011/","msgid":"","list_archive_url":null,"date":"2017-09-15T08:05:23","subject":"Re: [PATCH 1/8] ARM: dts: r8a7745: Add APMU node and second CPU core","submitter":{"id":703,"url":"http://patchwork.ozlabs.org/api/people/703/","name":"Geert Uytterhoeven","email":"geert@linux-m68k.org"},"content":"Hi Simon, Fabrizio,\n\nOn Fri, Sep 15, 2017 at 9:45 AM, Simon Horman wrote:\n> On Wed, Sep 13, 2017 at 06:05:34PM +0100, Chris Paterson wrote:\n>> From: Fabrizio Castro \n>>\n>> Add DT node for the Advanced Power Management Unit (APMU), add the\n>> second CPU core, and use \"renesas,apmu\" as \"enable-method\".\n>>\n>> Signed-off-by: Fabrizio Castro \n>> Signed-off-by: Chris Paterson \n>> ---\n>> This patch is based on renesas-devel-20170913-v4.13.\n>\n> Hi,\n>\n> with reference to \"[PATCH v3 0/3] ARM: renesas: Enable SMP on R-Car E2\"\n> is the CNTVOFF initialised in the boot loader of boards (in upstream)\n> for this SoC? If not I expect you will have trouble with the arch timer\n> on secondary CPU cores.\n\nExactly my question.\n\nFabrizio: Given your feedback on \"[PATCH v3 0/3] ARM: renesas: Enable SMP on\nR-Car E2\", I think SMP enablement on RZ/G1E has to be postponed until \"ARM:\nshmobile: rcar-gen2: Make sure CNTVOFF is initialized on CA7/15\" has been\naccepted upstream.\n\nGr{oetje,eeting}s,\n\n Geert\n\n--\nGeert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org\n\nIn personal conversations with technical people, I call myself a hacker. But\nwhen I'm talking to journalists I just say \"programmer\" or something like that.\n -- Linus Torvalds\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"XPB3uVFO\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xtnyG1zlNz9sPr\n\tfor ;\n\tFri, 15 Sep 2017 18:05:26 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751143AbdIOIFY (ORCPT\n\t);\n\tFri, 15 Sep 2017 04:05:24 -0400","from mail-pg0-f68.google.com ([74.125.83.68]:33987 \"EHLO\n\tmail-pg0-f68.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751171AbdIOIFY (ORCPT\n\t); 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\n\tFri, 15 Sep 2017 01:05:23 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<20170915074551.GF3924@verge.net.au>","References":"<1505322341-9480-1-git-send-email-chris.paterson2@renesas.com>\n\t<1505322341-9480-2-git-send-email-chris.paterson2@renesas.com>\n\t<20170915074551.GF3924@verge.net.au>","From":"Geert Uytterhoeven ","Date":"Fri, 15 Sep 2017 10:05:23 +0200","X-Google-Sender-Auth":"KTSUXzx00QtFhzilEw00L1a16mk","Message-ID":"","Subject":"Re: [PATCH 1/8] ARM: dts: r8a7745: Add APMU node and second CPU core","To":"Simon Horman ,\n\tFabrizio Castro ","Cc":"Chris Paterson ,\n\tRob Herring , Mark Rutland ,\n\tMagnus Damm ,\n\tRussell King , \n\t\"devicetree@vger.kernel.org\" ,\n\tLinux-Renesas ,\n\t\"linux-arm-kernel@lists.infradead.org\" \n\t,\n\tGeert Uytterhoeven ","Content-Type":"text/plain; charset=\"UTF-8\"","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1769012,"web_url":"http://patchwork.ozlabs.org/comment/1769012/","msgid":"<20170915080530.GH3924@verge.net.au>","list_archive_url":null,"date":"2017-09-15T08:05:30","subject":"Re: [PATCH 4/8] ARM: dts: iwg22d: Enable SDHI0 controller","submitter":{"id":106,"url":"http://patchwork.ozlabs.org/api/people/106/","name":"Simon Horman","email":"horms@verge.net.au"},"content":"On Wed, Sep 13, 2017 at 06:05:37PM +0100, Chris Paterson wrote:\n> From: Fabrizio Castro \n> \n> Enable the SDHI0 controller on iWave RZ/G1E carrier board.\n\n...\n\n> @@ -63,3 +88,15 @@\n> \t\tmicrel,led-mode = <1>;\n> \t};\n> };\n> +\n> +&sdhi0 {\n> +\tpinctrl-0 = <&sdhi0_pins>;\n> +\tpinctrl-1 = <&sdhi0_pins_uhs>;\n> +\tpinctrl-names = \"default\", \"state_uhs\";\n> +\n> +\tvmmc-supply = <®_3p3v>;\n> +\tvqmmc-supply = <&vccq_sdhi0>;\n> +\tcd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;\n\nI take that the absence of a wp-gpio means that that this is a µSD slot.\nCould you help me by documenting this correctly on\nhttp://elinux.org/index.php?title=Renesas-MMC-Enabled-Speeds ?\n\nFor some reason I thought that SDHI0 wasn't exposed at all, so I guess\nmy reading of the documentation was incorrect.\n\n\nI think you also want sd-uhs-sdr50 here too.\nYou can test it by removing the sd-uhs-sdr104 property.\n\n> +\tsd-uhs-sdr104;\n> +\tstatus = \"okay\";\n> +};\n> -- \n> 1.9.1\n> \n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=verge.net.au header.i=@verge.net.au\n\theader.b=\"HaKFLg24\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xtnym3xd4z9sBZ\n\tfor ;\n\tFri, 15 Sep 2017 18:05:52 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1750871AbdIOIFv (ORCPT\n\t);\n\tFri, 15 Sep 2017 04:05:51 -0400","from kirsty.vergenet.net ([202.4.237.240]:53228 \"EHLO\n\tkirsty.vergenet.net\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1750787AbdIOIFu (ORCPT\n\t); Fri, 15 Sep 2017 04:05:50 -0400","from penelope.horms.nl (unknown [217.111.208.18])\n\tby kirsty.vergenet.net (Postfix) with ESMTPA id A9E3125B73F;\n\tFri, 15 Sep 2017 18:05:48 +1000 (AEST)","by penelope.horms.nl (Postfix, from userid 7100)\n\tid B3309E23462; Fri, 15 Sep 2017 04:05:30 -0400 (EDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; \n\tt=1505462749; bh=uMCSFemVFI5WW9mb1xpkCAAwOb5hiNS602FAhZeDKPA=;\n\th=Date:From:To:Cc:Subject:References:In-Reply-To:From;\n\tb=HaKFLg24A7m9qNdJPbDirVCPhLQlM/Kmr0fEU5+FEu5PRpi/CnFAvuTEFkTqxQZx1\n\tHMWW+Wmc/3WyYx+D5ExB7I4dZ7kpZkDfq4AIkEm8ie87vStbkXjOdlpP5PAzXCrKVF\n\t2l5U+gnem/2ZkHvPWb9ADVuhzuRYhg3949RTS0CY=","Date":"Fri, 15 Sep 2017 10:05:30 +0200","From":"Simon Horman ","To":"Chris Paterson ","Cc":"Rob Herring , Mark Rutland ,\n\tMagnus Damm ,\n\tRussell King , \n\tFabrizio Castro ,\n\tdevicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org","Subject":"Re: [PATCH 4/8] ARM: dts: iwg22d: Enable SDHI0 controller","Message-ID":"<20170915080530.GH3924@verge.net.au>","References":"<1505322341-9480-1-git-send-email-chris.paterson2@renesas.com>\n\t<1505322341-9480-5-git-send-email-chris.paterson2@renesas.com>","MIME-Version":"1.0","Content-Type":"text/plain; charset=utf-8","Content-Disposition":"inline","Content-Transfer-Encoding":"8bit","In-Reply-To":"<1505322341-9480-5-git-send-email-chris.paterson2@renesas.com>","Organisation":"Horms Solutions BV","User-Agent":"Mutt/1.5.23 (2014-03-12)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1769017,"web_url":"http://patchwork.ozlabs.org/comment/1769017/","msgid":"<20170915081144.GI3924@verge.net.au>","list_archive_url":null,"date":"2017-09-15T08:11:44","subject":"Re: [PATCH 3/8] ARM: dts: iwg22m: Enable SDHI1 controller","submitter":{"id":106,"url":"http://patchwork.ozlabs.org/api/people/106/","name":"Simon Horman","email":"horms@verge.net.au"},"content":"On Wed, Sep 13, 2017 at 06:05:36PM +0100, Chris Paterson wrote:\n> From: Fabrizio Castro \n> \n> Enable the SDHI1 controller on iWave RZ/G1E SoM.\n> \n> Signed-off-by: Fabrizio Castro \n> Signed-off-by: Chris Paterson \n> ---\n> This patch is based on renesas-devel-20170913-v4.13.\n> \n> \n> arch/arm/boot/dts/r8a7745-iwg22m.dtsi | 17 +++++++++++++++++\n> 1 file changed, 17 insertions(+)\n> \n> diff --git a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi\n> index e306e7c..f7f9cef 100644\n> --- a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi\n> +++ b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi\n> @@ -9,6 +9,7 @@\n> */\n> \n> #include \"r8a7745.dtsi\"\n> +#include \n> \n> / {\n> \tcompatible = \"iwave,g22m\", \"renesas,r8a7745\";\n> @@ -38,6 +39,12 @@\n> \t\tfunction = \"mmc\";\n> \t};\n> \n> +\tsdhi1_pins: sd1 {\n> +\t\tgroups = \"sdhi1_data4\", \"sdhi1_ctrl\";\n> +\t\tfunction = \"sdhi1\";\n> +\t\tpower-source = <3300>;\n> +\t};\n> +\n> \ti2c3_pins: i2c3 {\n> \t\tgroups = \"i2c3_b\";\n> \t\tfunction = \"i2c3\";\n> @@ -54,6 +61,16 @@\n> \tstatus = \"okay\";\n> };\n> \n> +&sdhi1 {\n> +\tpinctrl-0 = <&sdhi1_pins>;\n> +\tpinctrl-names = \"default\";\n> +\n> +\tvmmc-supply = <®_3p3v>;\n> +\tvqmmc-supply = <®_3p3v>;\n> +\tcd-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;\n\nNo wp-gpios property means this is a µSD slot, right?\n\nDo you have any plans to enable sdr-50 and sdr-104?\nIs it not supported for some reason?\n\nI don't mind if its not enabled in this patch but I would like to\nknow if it can be enabled or not and reflect that information in the wiki.\n\nhttp://elinux.org/index.php?title=Renesas-MMC-Enabled-Speeds\n\n> +\tstatus = \"okay\";\n> +};\n> +\n> &i2c3 {\n> \tpinctrl-0 = <&i2c3_pins>;\n> \tpinctrl-names = \"default\";\n> -- \n> 1.9.1\n> \n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=verge.net.au header.i=@verge.net.au\n\theader.b=\"SMn6OGQd\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xtp5y3p9Wz9sBZ\n\tfor ;\n\tFri, 15 Sep 2017 18:12:06 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1750841AbdIOIME (ORCPT\n\t);\n\tFri, 15 Sep 2017 04:12:04 -0400","from kirsty.vergenet.net ([202.4.237.240]:53307 \"EHLO\n\tkirsty.vergenet.net\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1750838AbdIOIME (ORCPT\n\t); Fri, 15 Sep 2017 04:12:04 -0400","from penelope.horms.nl (unknown [217.111.208.18])\n\tby kirsty.vergenet.net (Postfix) with ESMTPA id 719A825B77D;\n\tFri, 15 Sep 2017 18:12:02 +1000 (AEST)","by penelope.horms.nl (Postfix, from userid 7100)\n\tid 7EB41E23462; Fri, 15 Sep 2017 04:11:44 -0400 (EDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; \n\tt=1505463122; bh=Pe+i0P4bUtT29uXI6u8NSK3zWjEsEFzq6hzPBu3mqd8=;\n\th=Date:From:To:Cc:Subject:References:In-Reply-To:From;\n\tb=SMn6OGQdibSPEwlkQOtnBL2/VmEsxur5GFIW4kxI9UGbbu9URSZQeKctbyM/B6iii\n\tG+Btva2U8WopDPLHtppLkQqi37n6gb0pso6c7wXRFAag7SoNeSxCfdHRQLRFc9cJHp\n\tvRKVAF4vMq+5i3job8yzdVz5NQxtC9atVuMc/TFE=","Date":"Fri, 15 Sep 2017 10:11:44 +0200","From":"Simon Horman ","To":"Chris Paterson ","Cc":"Rob Herring , Mark Rutland ,\n\tMagnus Damm ,\n\tRussell King , \n\tFabrizio Castro ,\n\tdevicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org","Subject":"Re: [PATCH 3/8] ARM: dts: iwg22m: Enable SDHI1 controller","Message-ID":"<20170915081144.GI3924@verge.net.au>","References":"<1505322341-9480-1-git-send-email-chris.paterson2@renesas.com>\n\t<1505322341-9480-4-git-send-email-chris.paterson2@renesas.com>","MIME-Version":"1.0","Content-Type":"text/plain; charset=utf-8","Content-Disposition":"inline","Content-Transfer-Encoding":"8bit","In-Reply-To":"<1505322341-9480-4-git-send-email-chris.paterson2@renesas.com>","Organisation":"Horms Solutions BV","User-Agent":"Mutt/1.5.23 (2014-03-12)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1769042,"web_url":"http://patchwork.ozlabs.org/comment/1769042/","msgid":"<20170915083517.GJ3924@verge.net.au>","list_archive_url":null,"date":"2017-09-15T08:35:17","subject":"Re: [PATCH 6/8] ARM: dts: iwg20m: Add SPI NOR support","submitter":{"id":106,"url":"http://patchwork.ozlabs.org/api/people/106/","name":"Simon Horman","email":"horms@verge.net.au"},"content":"On Wed, Sep 13, 2017 at 06:05:39PM +0100, Chris Paterson wrote:\n> From: Fabrizio Castro \n> \n> Add support for the SPI NOR device used to boot up the system\n> to the System on Module DT.\n> \n> Signed-off-by: Fabrizio Castro \n> Signed-off-by: Chris Paterson \n> ---\n> This patch is based on renesas-devel-20170913-v4.13.\n> \n> This patch is dependant on:\n> - \"of: add vendor prefix for Silicon Storage Technology Inc.\"\n> - \"doc: dt: mtd: Add sst25vf016b to the list of supported chip names\"\n> \n> \n> arch/arm/boot/dts/r8a7743-iwg20m.dtsi | 26 ++++++++++++++++++++++++++\n> 1 file changed, 26 insertions(+)\n> \n> diff --git a/arch/arm/boot/dts/r8a7743-iwg20m.dtsi b/arch/arm/boot/dts/r8a7743-iwg20m.dtsi\n> index 4119737..75a8ca5 100644\n> --- a/arch/arm/boot/dts/r8a7743-iwg20m.dtsi\n> +++ b/arch/arm/boot/dts/r8a7743-iwg20m.dtsi\n> @@ -44,6 +44,11 @@\n> \t\tfunction = \"mmc\";\n> \t};\n> \n> +\tqspi_pins: qspi {\n> +\t\tgroups = \"qspi_ctrl\", \"qspi_data2\";\n> +\t\tfunction = \"qspi\";\n> +\t};\n> +\n> \tsdhi0_pins: sd0 {\n> \t\tgroups = \"sdhi0_data4\", \"sdhi0_ctrl\";\n> \t\tfunction = \"sdhi0\";\n> @@ -61,6 +66,27 @@\n> \tstatus = \"okay\";\n> };\n> \n> +&qspi {\n> +\tpinctrl-0 = <&qspi_pins>;\n> +\tpinctrl-names = \"default\";\n> +\n> +\tstatus = \"okay\";\n> +\n> +\t/* WARNING - This device contains the bootloader. Handle with care. */\n> +\tflash: flash@0 {\n> +\t\t#address-cells = <1>;\n> +\t\t#size-cells = <1>;\n> +\t\tcompatible = \"sst,sst25vf016b\", \"jedec,spi-nor\";\n> +\t\treg = <0>;\n> +\t\tspi-max-frequency = <50000000>;\n> +\t\tspi-tx-bus-width = <1>;\n> +\t\tspi-rx-bus-width = <1>;\n> +\t\tm25p,fast-read;\n> +\t\tspi-cpol;\n> +\t\tspi-cpha;\n> +\t};\n\nDoes the device have partitions?\nIf so, should they be described here?\n\n> +};\n> +\n> &sdhi0 {\n> \tpinctrl-0 = <&sdhi0_pins>;\n> \tpinctrl-names = \"default\";\n> -- \n> 1.9.1\n> \n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=verge.net.au header.i=@verge.net.au\n\theader.b=\"ZN8NtWFO\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xtpdJ6Sq9z9t2h\n\tfor ;\n\tFri, 15 Sep 2017 18:35:48 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751111AbdIOIfr (ORCPT\n\t);\n\tFri, 15 Sep 2017 04:35:47 -0400","from kirsty.vergenet.net ([202.4.237.240]:53553 \"EHLO\n\tkirsty.vergenet.net\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1750871AbdIOIfr (ORCPT\n\t); Fri, 15 Sep 2017 04:35:47 -0400","from penelope.horms.nl (unknown [217.111.208.18])\n\tby kirsty.vergenet.net (Postfix) with ESMTPA id B339A25B77D;\n\tFri, 15 Sep 2017 18:35:44 +1000 (AEST)","by penelope.horms.nl (Postfix, from userid 7100)\n\tid 55663E23462; Fri, 15 Sep 2017 04:35:17 -0400 (EDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; \n\tt=1505464545; bh=ihZm1nTWiVMM9QNK2bWjrYAOHJYjey+AYJnzoT9ty10=;\n\th=Date:From:To:Cc:Subject:References:In-Reply-To:From;\n\tb=ZN8NtWFOQTrjaeUS8OlnKsN4zGTjJNfeIvjBPA6facG6yqELeIijnPy2JZt09M0Xq\n\tTV/y2CT4V3DAxKAT4TZjOO/CcErLcUL7FMdRR1Mhf8++N+5a7ZR5+DHLLxqvjuhWw3\n\thgRjMkIdzYpdtKgcjnr8jcHUqbnvgilrhEmUwIOA=","Date":"Fri, 15 Sep 2017 10:35:17 +0200","From":"Simon Horman ","To":"Chris Paterson ","Cc":"Rob Herring , Mark Rutland ,\n\tMagnus Damm ,\n\tRussell King , \n\tFabrizio Castro ,\n\tdevicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org","Subject":"Re: [PATCH 6/8] ARM: dts: iwg20m: Add SPI NOR support","Message-ID":"<20170915083517.GJ3924@verge.net.au>","References":"<1505322341-9480-1-git-send-email-chris.paterson2@renesas.com>\n\t<1505322341-9480-7-git-send-email-chris.paterson2@renesas.com>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<1505322341-9480-7-git-send-email-chris.paterson2@renesas.com>","Organisation":"Horms Solutions BV","User-Agent":"Mutt/1.5.23 (2014-03-12)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1769056,"web_url":"http://patchwork.ozlabs.org/comment/1769056/","msgid":"","list_archive_url":null,"date":"2017-09-15T08:57:53","subject":"RE: [PATCH 1/8] ARM: dts: r8a7745: Add APMU node and second CPU core","submitter":{"id":72129,"url":"http://patchwork.ozlabs.org/api/people/72129/","name":"Fabrizio Castro","email":"fabrizio.castro@bp.renesas.com"},"content":"Hi Simon, Geert,\r\n\r\n> -----Original Message-----\r\n> From: linux-renesas-soc-owner@vger.kernel.org [mailto:linux-renesas-soc-owner@vger.kernel.org] On Behalf Of Geert\r\n> Uytterhoeven\r\n> Sent: 15 September 2017 09:05\r\n> To: Simon Horman ; Fabrizio Castro \r\n> Cc: Chris Paterson ; Rob Herring ; Mark Rutland ;\r\n> Magnus Damm ; Russell King ; devicetree@vger.kernel.org; Linux-Renesas\r\n> ; linux-arm-kernel@lists.infradead.org; Geert Uytterhoeven \r\n> Subject: Re: [PATCH 1/8] ARM: dts: r8a7745: Add APMU node and second CPU core\r\n>\r\n> Hi Simon, Fabrizio,\r\n>\r\n> On Fri, Sep 15, 2017 at 9:45 AM, Simon Horman wrote:\r\n> > On Wed, Sep 13, 2017 at 06:05:34PM +0100, Chris Paterson wrote:\r\n> >> From: Fabrizio Castro \r\n> >>\r\n> >> Add DT node for the Advanced Power Management Unit (APMU), add the\r\n> >> second CPU core, and use \"renesas,apmu\" as \"enable-method\".\r\n> >>\r\n> >> Signed-off-by: Fabrizio Castro \r\n> >> Signed-off-by: Chris Paterson \r\n> >> ---\r\n> >> This patch is based on renesas-devel-20170913-v4.13.\r\n> >\r\n> > Hi,\r\n> >\r\n> > with reference to \"[PATCH v3 0/3] ARM: renesas: Enable SMP on R-Car E2\"\r\n> > is the CNTVOFF initialised in the boot loader of boards (in upstream)\r\n> > for this SoC? If not I expect you will have trouble with the arch timer\r\n> > on secondary CPU cores.\r\n\r\nI can confirm that this patch relies on:\r\n* \"ARM: Add definition for monitor mode\", and\r\n* \"ARM: shmobile: rcar-gen2: Make sure CNTVOFF is initialized on CA7/15 \"\r\nas the bootloader doesn't initialize CNTVOFF.\r\n\r\n>\r\n> Exactly my question.\r\n>\r\n> Fabrizio: Given your feedback on \"[PATCH v3 0/3] ARM: renesas: Enable SMP on\r\n> R-Car E2\", I think SMP enablement on RZ/G1E has to be postponed until \"ARM:\r\n> shmobile: rcar-gen2: Make sure CNTVOFF is initialized on CA7/15\" has been\r\n> accepted upstream.\r\n\r\nYou are right, somehow we missed the comment made by Simon on Monday:\r\n\r\n\" I would like to deffer the third and last patch until v4.16 to avoid\r\nan awkward branch dependency on the above - the branches are different\r\neven though the tree is the same. Please resubmit this patch once the\r\nabove dependencies are present in an rc release, which at this stage\r\nI expect to be v4.15-rc1.\"\r\n\r\nApologies for this, we will send this patch later on, once both patches have been\r\naccepted upstream.\r\n\r\nSimon, is this going to make the application of the remaining patches problematic?\r\nPlease, let me (or Chris) know if you want us to rebase and resend without this\r\npatch.\r\n\r\nBest regards,\r\nFabrizio\r\n\r\n>\r\n> Gr{oetje,eeting}s,\r\n>\r\n> Geert\r\n>\r\n> --\r\n> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org\r\n>\r\n> In personal conversations with technical people, I call myself a hacker. But\r\n> when I'm talking to journalists I just say \"programmer\" or something like that.\r\n> -- Linus Torvalds\r\n\r\n\r\n\r\nRenesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=renesasgroup.onmicrosoft.com\n\theader.i=@renesasgroup.onmicrosoft.com header.b=\"sosBQN3j\"; \n\tdkim-atps=neutral","spf=none (sender IP is )\n\tsmtp.mailfrom=fabrizio.castro@bp.renesas.com; "],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xtq6x1MBWz9sRm\n\tfor ;\n\tFri, 15 Sep 2017 18:58:01 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751146AbdIOI57 (ORCPT\n\t);\n\tFri, 15 Sep 2017 04:57:59 -0400","from relmlor2.renesas.com ([210.160.252.172]:38641 \"EHLO\n\trelmlie1.idc.renesas.com\" rhost-flags-OK-OK-OK-FAIL)\n\tby vger.kernel.org with ESMTP id S1750879AbdIOI56 (ORCPT\n\t); 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Fri, 15 Sep 2017 08:57:53 +0000"],"X-IronPort-AV":"E=Sophos;i=\"5.42,396,1500908400\"; d=\"scan'208\";a=\"256864146\"","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=renesasgroup.onmicrosoft.com; s=selector1-bp-renesas-com;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version;\n\tbh=eMLxFuZ2h873feZb4lX6Gt4Yxs4wLjtpV3oh1O6Me+8=;\n\tb=sosBQN3jjnyRgyrx9rkdxBzQyRrS0URssJG5vZz/0eYe99V31NzIakAEjRPXEJnxE3BlyPEJwOPPxz14vJTx9kfOHLlwZJ+4nPuoPH1e7KAZU+9UOfTKJg4qgCfPThHPKTszHwsfvacljBHar+ppm1dEhxLjBP3HEHujOc/NM1I=","From":"Fabrizio Castro ","To":"Geert Uytterhoeven ,\n\tSimon Horman ","CC":"Chris Paterson ,\n\tRob Herring , Mark Rutland ,\n\tMagnus Damm ,\n\tRussell King , \n\t\"devicetree@vger.kernel.org\" ,\n\tLinux-Renesas ,\n\t\"linux-arm-kernel@lists.infradead.org\" \n\t,\n\tGeert Uytterhoeven ","Subject":"RE: [PATCH 1/8] ARM: dts: r8a7745: Add APMU node and second CPU core","Thread-Topic":"[PATCH 1/8] ARM: dts: r8a7745: Add APMU node and second CPU\n\tcore","Thread-Index":"AQHTLLKS7I4g+uf+j0WV1z0KXwpF8aK1k+iAgAAFdYCAAAZ+UA==","Date":"Fri, 15 Sep 2017 08:57:53 +0000","Message-ID":"","References":"<1505322341-9480-1-git-send-email-chris.paterson2@renesas.com>\n\t<1505322341-9480-2-git-send-email-chris.paterson2@renesas.com>\n\t<20170915074551.GF3924@verge.net.au>\n\t","In-Reply-To":"","Accept-Language":"en-GB, en-US","Content-Language":"en-US","X-MS-Has-Attach":"","X-MS-TNEF-Correlator":"","authentication-results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; 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SFP:1102; SCL:1; SRVR:TY1PR06MB0973;\n\tH:TY1PR06MB0895.apcprd06.prod.outlook.com; FPR:; SPF:None;\n\tPTR:InfoNoRecords; MX:1; A:0; LANG:en; ","received-spf":"None (protection.outlook.com: bp.renesas.com does not designate\n\tpermitted sender hosts)","spamdiagnosticoutput":"1:99","spamdiagnosticmetadata":"NSPM","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","MIME-Version":"1.0","X-OriginatorOrg":"bp.renesas.com","X-MS-Exchange-CrossTenant-originalarrivaltime":"15 Sep 2017 08:57:53.2755\n\t(UTC)","X-MS-Exchange-CrossTenant-fromentityheader":"Hosted","X-MS-Exchange-CrossTenant-id":"53d82571-da19-47e4-9cb4-625a166a4a2a","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"TY1PR06MB0973","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1769106,"web_url":"http://patchwork.ozlabs.org/comment/1769106/","msgid":"<20170915110609.GL3924@verge.net.au>","list_archive_url":null,"date":"2017-09-15T11:06:09","subject":"Re: [PATCH 1/8] ARM: dts: r8a7745: Add APMU node and second CPU core","submitter":{"id":106,"url":"http://patchwork.ozlabs.org/api/people/106/","name":"Simon Horman","email":"horms@verge.net.au"},"content":"On Fri, Sep 15, 2017 at 08:57:53AM +0000, Fabrizio Castro wrote:\n> Hi Simon, Geert,\n> \n> > -----Original Message-----\n> > From: linux-renesas-soc-owner@vger.kernel.org [mailto:linux-renesas-soc-owner@vger.kernel.org] On Behalf Of Geert\n> > Uytterhoeven\n> > Sent: 15 September 2017 09:05\n> > To: Simon Horman ; Fabrizio Castro \n> > Cc: Chris Paterson ; Rob Herring ; Mark Rutland ;\n> > Magnus Damm ; Russell King ; devicetree@vger.kernel.org; Linux-Renesas\n> > ; linux-arm-kernel@lists.infradead.org; Geert Uytterhoeven \n> > Subject: Re: [PATCH 1/8] ARM: dts: r8a7745: Add APMU node and second CPU core\n> >\n> > Hi Simon, Fabrizio,\n> >\n> > On Fri, Sep 15, 2017 at 9:45 AM, Simon Horman wrote:\n> > > On Wed, Sep 13, 2017 at 06:05:34PM +0100, Chris Paterson wrote:\n> > >> From: Fabrizio Castro \n> > >>\n> > >> Add DT node for the Advanced Power Management Unit (APMU), add the\n> > >> second CPU core, and use \"renesas,apmu\" as \"enable-method\".\n> > >>\n> > >> Signed-off-by: Fabrizio Castro \n> > >> Signed-off-by: Chris Paterson \n> > >> ---\n> > >> This patch is based on renesas-devel-20170913-v4.13.\n> > >\n> > > Hi,\n> > >\n> > > with reference to \"[PATCH v3 0/3] ARM: renesas: Enable SMP on R-Car E2\"\n> > > is the CNTVOFF initialised in the boot loader of boards (in upstream)\n> > > for this SoC? If not I expect you will have trouble with the arch timer\n> > > on secondary CPU cores.\n> \n> I can confirm that this patch relies on:\n> * \"ARM: Add definition for monitor mode\", and\n> * \"ARM: shmobile: rcar-gen2: Make sure CNTVOFF is initialized on CA7/15 \"\n> as the bootloader doesn't initialize CNTVOFF.\n> \n> >\n> > Exactly my question.\n> >\n> > Fabrizio: Given your feedback on \"[PATCH v3 0/3] ARM: renesas: Enable SMP on\n> > R-Car E2\", I think SMP enablement on RZ/G1E has to be postponed until \"ARM:\n> > shmobile: rcar-gen2: Make sure CNTVOFF is initialized on CA7/15\" has been\n> > accepted upstream.\n> \n> You are right, somehow we missed the comment made by Simon on Monday:\n> \n> \" I would like to deffer the third and last patch until v4.16 to avoid\n> an awkward branch dependency on the above - the branches are different\n> even though the tree is the same. Please resubmit this patch once the\n> above dependencies are present in an rc release, which at this stage\n> I expect to be v4.15-rc1.\"\n> \n> Apologies for this, we will send this patch later on, once both patches have been\n> accepted upstream.\n\nNo problem, I will mark this one as deferred.\n\n> Simon, is this going to make the application of the remaining patches\n> problematic? Please, let me (or Chris) know if you want us to rebase and\n> resend without this patch.\n\nNo, I don't think you need to rebase and repost due to this.\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=verge.net.au header.i=@verge.net.au\n\theader.b=\"TxcozhwO\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xtszC4Zc7z9sBZ\n\tfor ;\n\tFri, 15 Sep 2017 21:06:31 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751269AbdIOLGa (ORCPT\n\t);\n\tFri, 15 Sep 2017 07:06:30 -0400","from kirsty.vergenet.net ([202.4.237.240]:54994 \"EHLO\n\tkirsty.vergenet.net\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751213AbdIOLGa (ORCPT\n\t); Fri, 15 Sep 2017 07:06:30 -0400","from penelope.horms.nl (unknown [217.111.208.18])\n\tby kirsty.vergenet.net (Postfix) with ESMTPA id 3CF0625B77D;\n\tFri, 15 Sep 2017 21:06:28 +1000 (AEST)","by penelope.horms.nl (Postfix, from userid 7100)\n\tid EC82BE23462; Fri, 15 Sep 2017 07:06:09 -0400 (EDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; \n\tt=1505473588; bh=W3ABZuWWlk5fuEQBOBT4fzrjFi9gqCYmCJTo1+nruV0=;\n\th=Date:From:To:Cc:Subject:References:In-Reply-To:From;\n\tb=TxcozhwOPDflpnoL9cl55H0/f8qQvioXPs86SGGgz48GkfijEcbJPuVtVt2oUM5t6\n\tOU0oVvDdfs2N/Z+c5elhwqMZPrWngpKS6GFRzsba7sepDm7kiNrtmQqvfAPTatIqwq\n\tSXQ5xKx2CaTT+jLzghwSugF9MiF4PH1Hg6Uckc7M=","Date":"Fri, 15 Sep 2017 13:06:09 +0200","From":"Simon Horman ","To":"Fabrizio Castro ","Cc":"Geert Uytterhoeven ,\n\tChris Paterson ,\n\tRob Herring , Mark Rutland ,\n\tMagnus Damm ,\n\tRussell King , \n\t\"devicetree@vger.kernel.org\" ,\n\tLinux-Renesas ,\n\t\"linux-arm-kernel@lists.infradead.org\" \n\t,\n\tGeert Uytterhoeven ","Subject":"Re: [PATCH 1/8] ARM: dts: r8a7745: Add APMU node and second CPU core","Message-ID":"<20170915110609.GL3924@verge.net.au>","References":"<1505322341-9480-1-git-send-email-chris.paterson2@renesas.com>\n\t<1505322341-9480-2-git-send-email-chris.paterson2@renesas.com>\n\t<20170915074551.GF3924@verge.net.au>\n\t\n\t","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"","Organisation":"Horms Solutions BV","User-Agent":"Mutt/1.5.23 (2014-03-12)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1769245,"web_url":"http://patchwork.ozlabs.org/comment/1769245/","msgid":"","list_archive_url":null,"date":"2017-09-15T15:12:04","subject":"RE: [PATCH 6/8] ARM: dts: iwg20m: Add SPI NOR support","submitter":{"id":69002,"url":"http://patchwork.ozlabs.org/api/people/69002/","name":"Chris Paterson","email":"Chris.Paterson2@renesas.com"},"content":"Hello Simon,\n\n> From: devicetree-owner@vger.kernel.org [mailto:devicetree-\n> owner@vger.kernel.org] On Behalf Of Simon Horman\n> Sent: 15 September 2017 09:35\n> \n> On Wed, Sep 13, 2017 at 06:05:39PM +0100, Chris Paterson wrote:\n> > From: Fabrizio Castro \n> >\n> > Add support for the SPI NOR device used to boot up the system to the\n> > System on Module DT.\n> >\n> > Signed-off-by: Fabrizio Castro \n> > Signed-off-by: Chris Paterson \n> > ---\n> > This patch is based on renesas-devel-20170913-v4.13.\n> >\n> > This patch is dependant on:\n> > - \"of: add vendor prefix for Silicon Storage Technology Inc.\"\n> > - \"doc: dt: mtd: Add sst25vf016b to the list of supported chip names\"\n> >\n> >\n> > arch/arm/boot/dts/r8a7743-iwg20m.dtsi | 26\n> ++++++++++++++++++++++++++\n> > 1 file changed, 26 insertions(+)\n> >\n> > diff --git a/arch/arm/boot/dts/r8a7743-iwg20m.dtsi\n> > b/arch/arm/boot/dts/r8a7743-iwg20m.dtsi\n> > index 4119737..75a8ca5 100644\n> > --- a/arch/arm/boot/dts/r8a7743-iwg20m.dtsi\n> > +++ b/arch/arm/boot/dts/r8a7743-iwg20m.dtsi\n> > @@ -44,6 +44,11 @@\n> > \t\tfunction = \"mmc\";\n> > \t};\n> >\n> > +\tqspi_pins: qspi {\n> > +\t\tgroups = \"qspi_ctrl\", \"qspi_data2\";\n> > +\t\tfunction = \"qspi\";\n> > +\t};\n> > +\n> > \tsdhi0_pins: sd0 {\n> > \t\tgroups = \"sdhi0_data4\", \"sdhi0_ctrl\";\n> > \t\tfunction = \"sdhi0\";\n> > @@ -61,6 +66,27 @@\n> > \tstatus = \"okay\";\n> > };\n> >\n> > +&qspi {\n> > +\tpinctrl-0 = <&qspi_pins>;\n> > +\tpinctrl-names = \"default\";\n> > +\n> > +\tstatus = \"okay\";\n> > +\n> > +\t/* WARNING - This device contains the bootloader. Handle with care.\n> */\n> > +\tflash: flash@0 {\n> > +\t\t#address-cells = <1>;\n> > +\t\t#size-cells = <1>;\n> > +\t\tcompatible = \"sst,sst25vf016b\", \"jedec,spi-nor\";\n> > +\t\treg = <0>;\n> > +\t\tspi-max-frequency = <50000000>;\n> > +\t\tspi-tx-bus-width = <1>;\n> > +\t\tspi-rx-bus-width = <1>;\n> > +\t\tm25p,fast-read;\n> > +\t\tspi-cpol;\n> > +\t\tspi-cpha;\n> > +\t};\n> \n> Does the device have partitions?\n> If so, should they be described here?\n\nWe aren't confident that all devices will come with the same partitions, so decided not to add any here.\n\nKind regards, Chris\n\n> \n> > +};\n> > +\n> > &sdhi0 {\n> > \tpinctrl-0 = <&sdhi0_pins>;\n> > \tpinctrl-names = \"default\";\n> > --\n> > 1.9.1\n> >\n> --\n> To unsubscribe from this list: send the line \"unsubscribe devicetree\" in the\n> body of a message to majordomo@vger.kernel.org More majordomo info at\n> http://vger.kernel.org/majordomo-info.html\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=renesasgroup.onmicrosoft.com\n\theader.i=@renesasgroup.onmicrosoft.com header.b=\"UvRrX+s9\"; \n\tdkim-atps=neutral","spf=none (sender IP is )\n\tsmtp.mailfrom=Chris.Paterson2@renesas.com; "],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xtzQk0g7kz9sPr\n\tfor ;\n\tSat, 16 Sep 2017 01:12:14 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751370AbdIOPMM (ORCPT\n\t);\n\tFri, 15 Sep 2017 11:12:12 -0400","from relmlor4.renesas.com ([210.160.252.174]:19810 \"EHLO\n\trelmlie3.idc.renesas.com\" rhost-flags-OK-OK-OK-FAIL)\n\tby vger.kernel.org with ESMTP id S1751152AbdIOPML (ORCPT\n\t); Fri, 15 Sep 2017 11:12:11 -0400","from unknown (HELO relmlir1.idc.renesas.com) ([10.200.68.151])\n\tby relmlie3.idc.renesas.com with ESMTP; 16 Sep 2017 00:12:08 +0900","from relmlii1.idc.renesas.com (relmlii1.idc.renesas.com\n\t[10.200.68.65])\n\tby relmlir1.idc.renesas.com (Postfix) with ESMTP id 5EE7A73269;\n\tSat, 16 Sep 2017 00:12:08 +0900 (JST)","from mail-ty1jpn01lp0178.outbound.protection.outlook.com (HELO\n\tJPN01-TY1-obe.outbound.protection.outlook.com) ([23.103.139.178])\n\tby relmlii1.idc.renesas.com with ESMTP/TLS/AES256-SHA256;\n\t16 Sep 2017 00:12:08 +0900","from TY1PR06MB0702.apcprd06.prod.outlook.com (10.163.245.12) by\n\tTY1PR06MB0784.apcprd06.prod.outlook.com (10.163.245.157) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id\n\t15.20.56.11; Fri, 15 Sep 2017 15:12:05 +0000","from TY1PR06MB0702.apcprd06.prod.outlook.com ([10.163.245.12]) by\n\tTY1PR06MB0702.apcprd06.prod.outlook.com ([10.163.245.12]) with\n\tmapi id 15.20.0056.010; Fri, 15 Sep 2017 15:12:05 +0000"],"X-IronPort-AV":"E=Sophos;i=\"5.42,397,1500908400\"; d=\"scan'208\";a=\"256891859\"","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=renesasgroup.onmicrosoft.com; s=selector1-renesas-com;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version;\n\tbh=6gpGJtq2lhAGF8LW+tZcPYlxvFSReBZH5lK1VnhNIrg=;\n\tb=UvRrX+s9/s7ch/BCvliNqK2LX0/dXjxZxjHVYhjhxQHB4AVuDJhYHMFPR9UK2sQJFxzx/lOspjV7v0KcswvnNYKE8SbFb9IBWrX8KXf370apiWCYv1QFXszS2B6fVJ183yYzkGzDSXXt+gkNE7qTr9vamQrezBzQvwzZTqwtwWo=","From":"Chris Paterson ","To":"Simon Horman ","CC":"Rob Herring , Mark Rutland ,\n\tMagnus Damm ,\n\tRussell King , \n\tFabrizio Castro ,\n\t\"devicetree@vger.kernel.org\" ,\n\t\"linux-renesas-soc@vger.kernel.org\" , \n\t\"linux-arm-kernel@lists.infradead.org\" \n\t","Subject":"RE: [PATCH 6/8] ARM: dts: iwg20m: Add SPI NOR support","Thread-Topic":"[PATCH 6/8] ARM: dts: iwg20m: Add SPI NOR support","Thread-Index":"AQHTLLKbKLPeDHg1xEeA4iviuDA1n6K1obiAgABucoA=","Date":"Fri, 15 Sep 2017 15:12:04 +0000","Message-ID":"","References":"<1505322341-9480-1-git-send-email-chris.paterson2@renesas.com>\n\t<1505322341-9480-7-git-send-email-chris.paterson2@renesas.com>\n\t<20170915083517.GJ3924@verge.net.au>","In-Reply-To":"<20170915083517.GJ3924@verge.net.au>","Accept-Language":"en-GB, en-US","Content-Language":"en-US","X-MS-Has-Attach":"","X-MS-TNEF-Correlator":"","authentication-results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; 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SFP:1102; SCL:1; SRVR:TY1PR06MB0784;\n\tH:TY1PR06MB0702.apcprd06.prod.outlook.com; FPR:; SPF:None;\n\tPTR:InfoNoRecords; MX:1; A:1; LANG:en; ","received-spf":"None (protection.outlook.com: renesas.com does not designate\n\tpermitted sender hosts)","spamdiagnosticoutput":"1:99","spamdiagnosticmetadata":"NSPM","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"quoted-printable","MIME-Version":"1.0","X-OriginatorOrg":"renesas.com","X-MS-Exchange-CrossTenant-originalarrivaltime":"15 Sep 2017 15:12:04.8322\n\t(UTC)","X-MS-Exchange-CrossTenant-fromentityheader":"Hosted","X-MS-Exchange-CrossTenant-id":"53d82571-da19-47e4-9cb4-625a166a4a2a","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"TY1PR06MB0784","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1769260,"web_url":"http://patchwork.ozlabs.org/comment/1769260/","msgid":"","list_archive_url":null,"date":"2017-09-15T15:39:16","subject":"RE: [PATCH 2/8] ARM: dts: r8a7745: Add SDHI controllers","submitter":{"id":69002,"url":"http://patchwork.ozlabs.org/api/people/69002/","name":"Chris Paterson","email":"Chris.Paterson2@renesas.com"},"content":"> From: Simon Horman [mailto:horms@verge.net.au]\n> Sent: 15 September 2017 08:54\n> \n> On Wed, Sep 13, 2017 at 06:05:35PM +0100, Chris Paterson wrote:\n> > From: Fabrizio Castro \n> >\n> > Add the SDHI controllers to the r8a7745 device tree.\n> >\n> > Signed-off-by: Fabrizio Castro \n> > Signed-off-by: Chris Paterson \n> \n> Thanks, applied.\n\nThank you!\n\n> \n> > ---\n> > This patch is based on renesas-devel-20170913-v4.13.\n> >\n> > This patch is dependant on:\n> > - \"dt-bindings: mmc: sh_mmcif: Document r8a7745 DT bindings\"\n> \n> I think that should be \"[PATCH v3] mmc: renesas_sdhi: Add r8a7743/5\n> support\"\n\nCorrect. Sorry for the confusion!\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=renesasgroup.onmicrosoft.com\n\theader.i=@renesasgroup.onmicrosoft.com header.b=\"JF1sYMOd\"; \n\tdkim-atps=neutral","spf=none (sender IP is )\n\tsmtp.mailfrom=Chris.Paterson2@renesas.com; "],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xv02357dMz9sPs\n\tfor ;\n\tSat, 16 Sep 2017 01:39:23 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751259AbdIOPjW (ORCPT\n\t);\n\tFri, 15 Sep 2017 11:39:22 -0400","from relmlor3.renesas.com ([210.160.252.173]:63249 \"EHLO\n\trelmlie2.idc.renesas.com\" rhost-flags-OK-OK-OK-FAIL)\n\tby vger.kernel.org with ESMTP id S1751169AbdIOPjV (ORCPT\n\t); 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Fri, 15 Sep 2017 15:39:16 +0000"],"X-IronPort-AV":"E=Sophos;i=\"5.42,397,1500908400\"; d=\"scan'208\";a=\"256892873\"","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=renesasgroup.onmicrosoft.com; s=selector1-renesas-com;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version;\n\tbh=CIxh10uokN3+eCC27wB0e4kxuqfFlkRko2Nql8iom+Y=;\n\tb=JF1sYMOdtieNgME1R5aq1ZHAn0p+VEVH89/YQG9Ewn/m3ZvFNMHEsgNQnLHyz7i8YNfAEEbswNXAbYmA14arRyaVfYXNuMDdqsgtEVnBbPRKmzIZe9wDLV31efj+nE9CERR2A5STBejc/BGfxMJ3tTcx5oucRyQudz21eMVmSi4=","From":"Chris Paterson ","To":"Simon Horman ","CC":"Rob Herring , Mark Rutland ,\n\tMagnus Damm ,\n\tRussell King , \n\tFabrizio Castro ,\n\t\"devicetree@vger.kernel.org\" ,\n\t\"linux-renesas-soc@vger.kernel.org\" , \n\t\"linux-arm-kernel@lists.infradead.org\" \n\t","Subject":"RE: [PATCH 2/8] ARM: dts: r8a7745: Add SDHI controllers","Thread-Topic":"[PATCH 2/8] ARM: dts: r8a7745: Add SDHI controllers","Thread-Index":"AQHTLLKVirPon88AS0+2czSjp1Y7cqK1lkGAgACBmKA=","Date":"Fri, 15 Sep 2017 15:39:16 +0000","Message-ID":"","References":"<1505322341-9480-1-git-send-email-chris.paterson2@renesas.com>\n\t<1505322341-9480-3-git-send-email-chris.paterson2@renesas.com>\n\t<20170915075415.GG3924@verge.net.au>","In-Reply-To":"<20170915075415.GG3924@verge.net.au>","Accept-Language":"en-GB, en-US","Content-Language":"en-US","X-MS-Has-Attach":"","X-MS-TNEF-Correlator":"","authentication-results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; 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SFP:1102; SCL:1; SRVR:TY1PR06MB1005;\n\tH:TY1PR06MB0702.apcprd06.prod.outlook.com; FPR:; SPF:None;\n\tPTR:InfoNoRecords; A:1; MX:1; LANG:en; ","received-spf":"None (protection.outlook.com: renesas.com does not designate\n\tpermitted sender hosts)","spamdiagnosticoutput":"1:99","spamdiagnosticmetadata":"NSPM","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"quoted-printable","MIME-Version":"1.0","X-OriginatorOrg":"renesas.com","X-MS-Exchange-CrossTenant-originalarrivaltime":"15 Sep 2017 15:39:16.5140\n\t(UTC)","X-MS-Exchange-CrossTenant-fromentityheader":"Hosted","X-MS-Exchange-CrossTenant-id":"53d82571-da19-47e4-9cb4-625a166a4a2a","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"TY1PR06MB1005","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1770292,"web_url":"http://patchwork.ozlabs.org/comment/1770292/","msgid":"","list_archive_url":null,"date":"2017-09-18T16:26:24","subject":"RE: [PATCH 4/8] ARM: dts: iwg22d: Enable SDHI0 controller","submitter":{"id":72129,"url":"http://patchwork.ozlabs.org/api/people/72129/","name":"Fabrizio Castro","email":"fabrizio.castro@bp.renesas.com"},"content":"Hi Simon,\r\n\r\nApologies for the delay in getting back to you.\r\n\r\n> -----Original Message-----\r\n> From: Simon Horman [mailto:horms@verge.net.au]\r\n> Sent: 15 September 2017 09:06\r\n> To: Chris Paterson \r\n> Cc: Rob Herring ; Mark Rutland ; Magnus Damm ;\r\n> Russell King ; Fabrizio Castro ; devicetree@vger.kernel.org; linux-renesas-\r\n> soc@vger.kernel.org; linux-arm-kernel@lists.infradead.org\r\n> Subject: Re: [PATCH 4/8] ARM: dts: iwg22d: Enable SDHI0 controller\r\n>\r\n> On Wed, Sep 13, 2017 at 06:05:37PM +0100, Chris Paterson wrote:\r\n> > From: Fabrizio Castro \r\n> >\r\n> > Enable the SDHI0 controller on iWave RZ/G1E carrier board.\r\n>\r\n> ...\r\n>\r\n> > @@ -63,3 +88,15 @@\r\n> > micrel,led-mode = <1>;\r\n> > };\r\n> > };\r\n> > +\r\n> > +&sdhi0 {\r\n> > +pinctrl-0 = <&sdhi0_pins>;\r\n> > +pinctrl-1 = <&sdhi0_pins_uhs>;\r\n> > +pinctrl-names = \"default\", \"state_uhs\";\r\n> > +\r\n> > +vmmc-supply = <®_3p3v>;\r\n> > +vqmmc-supply = <&vccq_sdhi0>;\r\n> > +cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;\r\n>\r\n> I take that the absence of a wp-gpio means that that this is a µSD slot.\r\n> Could you help me by documenting this correctly on\r\n> http://elinux.org/index.php?title=Renesas-MMC-Enabled-Speeds ?\r\n>\r\n> For some reason I thought that SDHI0 wasn't exposed at all, so I guess\r\n> my reading of the documentation was incorrect.\r\n>\r\n>\r\n> I think you also want sd-uhs-sdr50 here too.\r\n> You can test it by removing the sd-uhs-sdr104 property.\r\n\r\nWhilst playing with uhs properties I have noticed that with the version of the DT I was using I couldn't put sdhi0 into an uhs mode and that was down to the fact that the driver wasn't driving the regulator to 1.8V. This happens because (in my case) the power regulator gets probed after the sdhi does, and the sdhi code doesn't seem to deal with it. Am I the only one with this problem or is it a known problem?\r\n\r\nThanks,\r\nFabrizio\r\n\r\n>\r\n> > +sd-uhs-sdr104;\r\n> > +status = \"okay\";\r\n> > +};\r\n> > --\r\n> > 1.9.1\r\n> >\r\n\r\n\r\n\r\nRenesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=renesasgroup.onmicrosoft.com\n\theader.i=@renesasgroup.onmicrosoft.com header.b=\"AncKPPzZ\"; \n\tdkim-atps=neutral","spf=none (sender IP is )\n\tsmtp.mailfrom=fabrizio.castro@bp.renesas.com; "],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xwrx86mLhz9s78\n\tfor ;\n\tTue, 19 Sep 2017 02:26:36 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1755765AbdIRQ0f (ORCPT\n\t);\n\tMon, 18 Sep 2017 12:26:35 -0400","from relmlor3.renesas.com ([210.160.252.173]:64932 \"EHLO\n\trelmlie2.idc.renesas.com\" rhost-flags-OK-OK-OK-FAIL)\n\tby vger.kernel.org with ESMTP id S1752976AbdIRQ0e (ORCPT\n\t); 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Mon, 18 Sep 2017 16:26:24 +0000"],"X-IronPort-AV":"E=Sophos;i=\"5.42,413,1500908400\"; d=\"scan'208\";a=\"257076407\"","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=renesasgroup.onmicrosoft.com; s=selector1-bp-renesas-com;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version;\n\tbh=AOgyKjA5GojLkSHac17lzLIXQM1gjKcKb8lARQ/BqJ0=;\n\tb=AncKPPzZtrQ8AYnrItPXE9aTMllFmtcdsagbyQCf2+euHvQBshsu//WJyf2K0oR+dDfaQBxvu9Wnl78u4sORwuQMfkHCUFqMIQJA+mdCl7lZ/UQ9nK8wG3PLiEpOdF66oC44tvvZsmVfXVERmpj4hOo7nrgItsYur7k16hoj3R8=","From":"Fabrizio Castro ","To":"Simon Horman ,\n\tChris Paterson ","CC":"Rob Herring , Mark Rutland ,\n\tMagnus Damm ,\n\tRussell King , \n\t\"devicetree@vger.kernel.org\" ,\n\t\"linux-renesas-soc@vger.kernel.org\" , \n\t\"linux-arm-kernel@lists.infradead.org\" \n\t","Subject":"RE: [PATCH 4/8] ARM: dts: iwg22d: Enable SDHI0 controller","Thread-Topic":"[PATCH 4/8] ARM: dts: iwg22d: Enable SDHI0 controller","Thread-Index":"AQHTLLKYPH11/Qdhw0aM1g4pHZ+rZqK1mWYAgAU9wkA=","Date":"Mon, 18 Sep 2017 16:26:24 +0000","Message-ID":"","References":"<1505322341-9480-1-git-send-email-chris.paterson2@renesas.com>\n\t<1505322341-9480-5-git-send-email-chris.paterson2@renesas.com>\n\t<20170915080530.GH3924@verge.net.au>","In-Reply-To":"<20170915080530.GH3924@verge.net.au>","Accept-Language":"en-GB, en-US","Content-Language":"en-US","X-MS-Has-Attach":"","X-MS-TNEF-Correlator":"","authentication-results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; 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SFP:1102; SCL:1; SRVR:TY1PR06MB0989;\n\tH:TY1PR06MB0895.apcprd06.prod.outlook.com; FPR:; SPF:None;\n\tPTR:InfoNoRecords; MX:1; A:0; LANG:en; ","received-spf":"None (protection.outlook.com: bp.renesas.com does not designate\n\tpermitted sender hosts)","spamdiagnosticoutput":"1:99","spamdiagnosticmetadata":"NSPM","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","MIME-Version":"1.0","X-OriginatorOrg":"bp.renesas.com","X-MS-Exchange-CrossTenant-originalarrivaltime":"18 Sep 2017 16:26:24.7675\n\t(UTC)","X-MS-Exchange-CrossTenant-fromentityheader":"Hosted","X-MS-Exchange-CrossTenant-id":"53d82571-da19-47e4-9cb4-625a166a4a2a","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"TY1PR06MB0989","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1771127,"web_url":"http://patchwork.ozlabs.org/comment/1771127/","msgid":"","list_archive_url":null,"date":"2017-09-19T15:03:12","subject":"Re: [PATCH 1/8] ARM: dts: r8a7745: Add APMU node and second CPU core","submitter":{"id":703,"url":"http://patchwork.ozlabs.org/api/people/703/","name":"Geert Uytterhoeven","email":"geert@linux-m68k.org"},"content":"On Wed, Sep 13, 2017 at 7:05 PM, Chris Paterson\n wrote:\n> From: Fabrizio Castro \n>\n> Add DT node for the Advanced Power Management Unit (APMU), add the\n> second CPU core, and use \"renesas,apmu\" as \"enable-method\".\n>\n> Signed-off-by: Fabrizio Castro \n> Signed-off-by: Chris Paterson \n\nReviewed-by: Geert Uytterhoeven \n\nGr{oetje,eeting}s,\n\n Geert\n\n--\nGeert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org\n\nIn personal conversations with technical people, I call myself a hacker. But\nwhen I'm talking to journalists I just say \"programmer\" or something like that.\n -- Linus Torvalds\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"L+8yRUYi\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xxR2W5DJxz9sBZ\n\tfor ;\n\tWed, 20 Sep 2017 01:03:15 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751775AbdISPDO (ORCPT\n\t);\n\tTue, 19 Sep 2017 11:03:14 -0400","from mail-pf0-f194.google.com ([209.85.192.194]:34685 \"EHLO\n\tmail-pf0-f194.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751728AbdISPDN (ORCPT\n\t); Tue, 19 Sep 2017 11:03:13 -0400","by mail-pf0-f194.google.com with SMTP id g65so1625917pfe.1;\n\tTue, 19 Sep 2017 08:03:13 -0700 (PDT)","by 10.100.160.13 with HTTP; Tue, 19 Sep 2017 08:03:12 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=mime-version:sender:in-reply-to:references:from:date:message-id\n\t:subject:to:cc;\n\tbh=7UYyMljM+VbNAtGbbCOqzqBFnv7+630kz6PzyP1yK8M=;\n\tb=L+8yRUYiwUi41gy/MiKgcdwHdHxgwk6f/tQfCL0CzxtWWZ4+jXJVYzus9/JFj3FzTd\n\tJ751yRwSEyfja52kCv+hBrjWaPMICLmvrg7QoMk3sltUu8w/PeuQ8+BHDR+azmIkwGqR\n\tGvNesCJBKparwEyYfDdHX8OE8aznSKHW2Ags5bjTgn8FkgodiyrlLJ5Wtod4ueqOuWer\n\tKT+y0KeZbzi5t0FJm1LbMevGUecH2yHNXmVv2KWYvghm7A2evUsd7CJs9urGtIorzrQZ\n\tR6av3YH2b3edX/fOtCQSTd4lribPGcHKH6h7/w8zGGxmQhDJ0uYVFKMAohcfiq/XzOTg\n\ttSRA==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:mime-version:sender:in-reply-to:references:from\n\t:date:message-id:subject:to:cc;\n\tbh=7UYyMljM+VbNAtGbbCOqzqBFnv7+630kz6PzyP1yK8M=;\n\tb=KILahW51WEcVNVTuakZt9oTJE7ROifJJqXxNacIz3Kg7ygnSvdPk5h8r+YuTLUjbNS\n\tfbN/ANgPHflrTfVZramQWNraYmvxQWih0vU9z5q6TjZyCgizAdfgizR8fubSNHOpV/2h\n\thFwusKPNqfDhVs2SFuYKUHBw22uXyIzylpU70EsHBvDlYSfbz4ravW9oL7neBGRrZWt9\n\t66+42wmIqpKD2AN/LM11p9YAmOZkBlqBTKx3PE6OslcxJcNSRPfIycZJStOAd4NlgGvr\n\tJ3vT8O0tMh5PPL4nNk/xsbnirz+JZSgn7sMg0GDNyLqOyQ3hcG2T7uiu+o8pFMgmCg2u\n\twN2g==","X-Gm-Message-State":"AHPjjUjB9bnVBHjZZjTAeZU1Aogi128NNwplUwiVs3xyv4INmOFULJ41\n\tGF6SYz41z89XqUDp2G5DgAY5V6Yo8Z0IgXrGXmg=","X-Google-Smtp-Source":"AOwi7QCCkhj1dLmi6eJDMm8YEni5NMkMbSwwtMGAdv4YbfQ3ZtN1n9c151F/hqiepdnJM9f3Lyq0WTHZdYQQeizIqpI=","X-Received":"by 10.98.102.142 with SMTP id s14mr1557199pfj.174.1505833392702; \n\tTue, 19 Sep 2017 08:03:12 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<1505322341-9480-2-git-send-email-chris.paterson2@renesas.com>","References":"<1505322341-9480-1-git-send-email-chris.paterson2@renesas.com>\n\t<1505322341-9480-2-git-send-email-chris.paterson2@renesas.com>","From":"Geert Uytterhoeven ","Date":"Tue, 19 Sep 2017 17:03:12 +0200","X-Google-Sender-Auth":"x6nwdnNLqJ2AFYaTGm6rzAcJLWY","Message-ID":"","Subject":"Re: [PATCH 1/8] ARM: dts: r8a7745: Add APMU node and second CPU core","To":"Chris Paterson ","Cc":"Simon Horman , Rob Herring ,\n\tMark Rutland ,\n\tMagnus Damm , \n\tRussell King ,\n\tFabrizio Castro ,\n\t\"devicetree@vger.kernel.org\" ,\n\tLinux-Renesas ,\n\t\"linux-arm-kernel@lists.infradead.org\" \n\t","Content-Type":"text/plain; charset=\"UTF-8\"","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1771134,"web_url":"http://patchwork.ozlabs.org/comment/1771134/","msgid":"","list_archive_url":null,"date":"2017-09-19T15:09:47","subject":"Re: [PATCH 5/8] ARM: dts: r8a7743: Add QSPI support","submitter":{"id":703,"url":"http://patchwork.ozlabs.org/api/people/703/","name":"Geert Uytterhoeven","email":"geert@linux-m68k.org"},"content":"On Wed, Sep 13, 2017 at 7:05 PM, Chris Paterson\n wrote:\n> From: Fabrizio Castro \n>\n> Add the DT node for the QSPI interface to the SoC dtsi.\n>\n> Signed-off-by: Fabrizio Castro \n> Signed-off-by: Chris Paterson \n\nReviewed-by: Geert Uytterhoeven \n\nGr{oetje,eeting}s,\n\n Geert\n\n--\nGeert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org\n\nIn personal conversations with technical people, I call myself a hacker. But\nwhen I'm talking to journalists I just say \"programmer\" or something like that.\n -- Linus Torvalds\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"EuALygMA\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xxRB66gq9z9s3T\n\tfor ;\n\tWed, 20 Sep 2017 01:09:50 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751791AbdISPJt (ORCPT\n\t);\n\tTue, 19 Sep 2017 11:09:49 -0400","from mail-pg0-f65.google.com ([74.125.83.65]:34561 \"EHLO\n\tmail-pg0-f65.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751165AbdISPJs (ORCPT\n\t); Tue, 19 Sep 2017 11:09:48 -0400","by mail-pg0-f65.google.com with SMTP id u18so2084615pgo.1;\n\tTue, 19 Sep 2017 08:09:48 -0700 (PDT)","by 10.100.160.13 with HTTP; Tue, 19 Sep 2017 08:09:47 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=mime-version:sender:in-reply-to:references:from:date:message-id\n\t:subject:to:cc;\n\tbh=D2U1Jrpp9wbEP9C7f2+HwQAZ3HgfhUtdTAlVsmznlfg=;\n\tb=EuALygMAqwmfOT5tSAhZdlkL+Rs1tVcRvHjho+T8ae/dT4rDiHvlYSfiOb8LDxMdH4\n\thmkx9BzKx66GNiMJ+vLeaqZYgy30IHNn64VWLNPZarZMNEhS6eZHttOul1ub84qnIsix\n\tsjtjoQsNRQAN1erohUQc0zhsvu7GrBafbgSmoviZJWVn24F7q2NzMpbDLEdsdysmHkni\n\t2FO5lnR/x0jb8yvk9GkOAtqEUOSQDumrYv7bpuYnaukrz+1Je6q9jKn/37HvNx3VeVIo\n\t9eaq9UhbDZKGK650V80R3IxSYfGxYF21B3PtZ90BLQp0KdNVeTW9oNmulVd323s/VunF\n\txyxQ==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:mime-version:sender:in-reply-to:references:from\n\t:date:message-id:subject:to:cc;\n\tbh=D2U1Jrpp9wbEP9C7f2+HwQAZ3HgfhUtdTAlVsmznlfg=;\n\tb=OMnOaIKHBFdCenFpdGrBm55QmRZu8H3ZUTWeaQ8rzFiHJej/QQYcw4sF9/mkXqph+d\n\tpfQPuPUBfEDzbaXtbncv7rs8UAvN9Qgx2HyRzCqnNlNngNjIt/jDQQtMKPHk5/S4VJ59\n\t19o6424GMKMN22atlf7CghNvnpcRwE/IqkYCa8HxUUB1zQ3qHvK8SQCgnHQ+fE2/7Tdd\n\tKR5Xz/hRE5rUw4pCQOKZWriO+ZQtMpyAm2D+htRfL7kBIx/KU6e5lKu3BBmCj7vO+u9W\n\tf5PnakMO1DI2Qck7MZeGR7eV/vKnpXQxXDMkgaQAg9H97zDfec+3MzM3rJh4rTqRYQSh\n\tqDxg==","X-Gm-Message-State":"AHPjjUherIMNQWuIPxy63Q1kjybz3XLxQONW6Qonx+r+kOKgyecjajjf\n\tySqicDUE6IiiL2NIWih6tTbN5/95uqTwfGFJOhI=","X-Google-Smtp-Source":"AOwi7QCU7hUPCP9rZLN9qfmjx6GjO4aFs9QIUf2dyDjaQGdCeTyaYCoBK9MciWnR4w0NPSwvvwgYm4EK2nIuHzSMlPY=","X-Received":"by 10.99.95.147 with SMTP id t141mr1695554pgb.340.1505833788022; \n\tTue, 19 Sep 2017 08:09:48 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<1505322341-9480-6-git-send-email-chris.paterson2@renesas.com>","References":"<1505322341-9480-1-git-send-email-chris.paterson2@renesas.com>\n\t<1505322341-9480-6-git-send-email-chris.paterson2@renesas.com>","From":"Geert Uytterhoeven ","Date":"Tue, 19 Sep 2017 17:09:47 +0200","X-Google-Sender-Auth":"4SszHGCwqN_AlhUXt9VcspXYhCw","Message-ID":"","Subject":"Re: [PATCH 5/8] ARM: dts: r8a7743: Add QSPI support","To":"Chris Paterson ","Cc":"Simon Horman , Rob Herring ,\n\tMark Rutland ,\n\tMagnus Damm , \n\tRussell King ,\n\tFabrizio Castro ,\n\t\"devicetree@vger.kernel.org\" ,\n\tLinux-Renesas ,\n\t\"linux-arm-kernel@lists.infradead.org\" \n\t","Content-Type":"text/plain; charset=\"UTF-8\"","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1771136,"web_url":"http://patchwork.ozlabs.org/comment/1771136/","msgid":"","list_archive_url":null,"date":"2017-09-19T15:10:06","subject":"Re: [PATCH 7/8] ARM: dts: r8a7745: Add QSPI support","submitter":{"id":703,"url":"http://patchwork.ozlabs.org/api/people/703/","name":"Geert Uytterhoeven","email":"geert@linux-m68k.org"},"content":"On Wed, Sep 13, 2017 at 7:05 PM, Chris Paterson\n wrote:\n> From: Fabrizio Castro \n>\n> Add the DT node for the QSPI interface to the SoC dtsi.\n>\n> Signed-off-by: Fabrizio Castro \n> Signed-off-by: Chris Paterson \n\nReviewed-by: Geert Uytterhoeven \n\nGr{oetje,eeting}s,\n\n Geert\n\n--\nGeert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org\n\nIn personal conversations with technical people, I call myself a hacker. But\nwhen I'm talking to journalists I just say \"programmer\" or something like that.\n -- Linus Torvalds\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"R0PFkPRI\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xxRBS60GYz9sBZ\n\tfor ;\n\tWed, 20 Sep 2017 01:10:08 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751391AbdISPKI (ORCPT\n\t);\n\tTue, 19 Sep 2017 11:10:08 -0400","from mail-pg0-f65.google.com ([74.125.83.65]:36095 \"EHLO\n\tmail-pg0-f65.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1750948AbdISPKH (ORCPT\n\t); Tue, 19 Sep 2017 11:10:07 -0400","by mail-pg0-f65.google.com with SMTP id d8so2198732pgt.3;\n\tTue, 19 Sep 2017 08:10:07 -0700 (PDT)","by 10.100.160.13 with HTTP; Tue, 19 Sep 2017 08:10:06 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=mime-version:sender:in-reply-to:references:from:date:message-id\n\t:subject:to:cc;\n\tbh=D2U1Jrpp9wbEP9C7f2+HwQAZ3HgfhUtdTAlVsmznlfg=;\n\tb=R0PFkPRITvlUXTSmCfS0jX0sf+jgnUx4iRGsTRfhTaCSn6BgFtzbMiURfEjgMn+jfZ\n\t7ormYr5rTNyDlcQhY54rrsjnQ1cFqYZtFUY5QG5YochYYMw7AKXp0JmzSkSUUEbtoZVh\n\tBk26Yc0RLj9mEW3UmmQDC7o+1xz6kEqTtnuXfgAqIISfaq9KH8e3nuM2SiGKCX3pV4FR\n\tDpYfZ7IKpOWql7/oqoVsm8PWxzv3kHlSuPerrOx+qHUGHtaeZbDyYQUHMVB0twFdE6L8\n\t4VIgfvcofDTqVdul5nG6pSqGtNqlWIFlg8SOklMocqVB5jpB/4w66mjtRVvBuZdk5B98\n\tC8GA==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:mime-version:sender:in-reply-to:references:from\n\t:date:message-id:subject:to:cc;\n\tbh=D2U1Jrpp9wbEP9C7f2+HwQAZ3HgfhUtdTAlVsmznlfg=;\n\tb=MUXQM6mAMlzmehLujRN82IdKXbnDFr4bSr6ED9ViPtbkHCRfOHUHHc5QE6x5f+cTl8\n\tClSlR0uB8+1aKgXD324qWJuCVJCUtxWfpjyYHG8D4D2YzGyRUwfUvTWpMMe5xpfsO53d\n\tQMcJSsFVANHtwD0+auS1E/t1+mciK8sM5YKpHFnGopXGT2GzD5Z0byVnLSkArT0THVoK\n\tsTcJnVt3By1x7sll1I9sG7/jKO/8L/9KxkbTi1vNYT9G1k8kXwDggxo86e76edYPz6dO\n\t2IXw7dQGyshJSI5ryLLEyWdGbijorSk+mKBbQuXto1nd2prKC+NOAqZTGodIGBLaz+OJ\n\t1m9w==","X-Gm-Message-State":"AHPjjUhsno4HF8MACdRpXdlgOQ7FzwBFmHU55JAGkqYbk3cUmyrQ20wh\n\tADbrLZzVnqpUuo6R/tY4KoBctwEuI5GUE9HDr+8=","X-Google-Smtp-Source":"AOwi7QDelJWb1aFxy5mJd7zdNGF/c7vGasiipX3VPpzeYza8M9VmfJ5Vq3AOVUy5pfUgrAEN9Hvm/lQjKn8sPDNJLqs=","X-Received":"by 10.159.244.132 with SMTP id y4mr1634899plr.354.1505833806722; \n\tTue, 19 Sep 2017 08:10:06 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<1505322341-9480-8-git-send-email-chris.paterson2@renesas.com>","References":"<1505322341-9480-1-git-send-email-chris.paterson2@renesas.com>\n\t<1505322341-9480-8-git-send-email-chris.paterson2@renesas.com>","From":"Geert Uytterhoeven ","Date":"Tue, 19 Sep 2017 17:10:06 +0200","X-Google-Sender-Auth":"eeEjWVUh-LKSfzLnGCnMeIRicKc","Message-ID":"","Subject":"Re: [PATCH 7/8] ARM: dts: r8a7745: Add QSPI support","To":"Chris Paterson ","Cc":"Simon Horman , Rob Herring ,\n\tMark Rutland ,\n\tMagnus Damm , \n\tRussell King ,\n\tFabrizio Castro ,\n\t\"devicetree@vger.kernel.org\" ,\n\tLinux-Renesas ,\n\t\"linux-arm-kernel@lists.infradead.org\" \n\t","Content-Type":"text/plain; charset=\"UTF-8\"","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1771743,"web_url":"http://patchwork.ozlabs.org/comment/1771743/","msgid":"","list_archive_url":null,"date":"2017-09-20T11:10:00","subject":"Re: [PATCH 8/8] ARM: drs: iwg22m: Add SPI NOR support","submitter":{"id":703,"url":"http://patchwork.ozlabs.org/api/people/703/","name":"Geert Uytterhoeven","email":"geert@linux-m68k.org"},"content":"On Wed, Sep 13, 2017 at 7:05 PM, Chris Paterson\n wrote:\n> From: Fabrizio Castro \n>\n> Add support for the SPI NOR device used to boot up the system\n> to the System on Module DT.\n>\n> Signed-off-by: Fabrizio Castro \n> Signed-off-by: Chris Paterson \n\nWith the subject fixed (s/drs/dts/):\nReviewed-by: Geert Uytterhoeven \n\nGr{oetje,eeting}s,\n\n Geert\n\n--\nGeert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org\n\nIn personal conversations with technical people, I call myself a hacker. But\nwhen I'm talking to journalists I just say \"programmer\" or something like that.\n -- Linus Torvalds\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"i3e4FbCL\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xxxq04BLkz9s7f\n\tfor ;\n\tWed, 20 Sep 2017 21:10:04 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751607AbdITLKC (ORCPT\n\t);\n\tWed, 20 Sep 2017 07:10:02 -0400","from mail-pf0-f196.google.com ([209.85.192.196]:36221 \"EHLO\n\tmail-pf0-f196.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751585AbdITLKB (ORCPT\n\t); Wed, 20 Sep 2017 07:10:01 -0400","by mail-pf0-f196.google.com with SMTP id f84so1066996pfj.3;\n\tWed, 20 Sep 2017 04:10:01 -0700 (PDT)","by 10.100.160.13 with HTTP; Wed, 20 Sep 2017 04:10:00 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=mime-version:sender:in-reply-to:references:from:date:message-id\n\t:subject:to:cc;\n\tbh=MIigxwTdlNaSQgt+ZJtCPVs+w9r5ZjPoXyMEGtcnVUw=;\n\tb=i3e4FbCLCuqwdTdXDvBk3+QR7F08aM5kc79scBysiXt269nGobMEQ0FE7X1yhXnPXs\n\t6MSZgp4f2C15xINAHkiDUBwPPMH5HV1/6vxo4sVecKPtUMOVvpinf2TLSCT1i6vSF+he\n\tWE2HZIxdBcqy2INMIePjGKYahZUX43Uqka5e2AL1P9g+THAtmQSfQp+DWEzE4Dvrwy+O\n\tkWCKndKKFXlYn6GF/B9VVBsCHw49uJ/HdDThPOiLbUVWBX3KwrbkaUVU/2oOo0srUNkl\n\tbp3vhrAQkYcsr7rRqJfjWlvWkCWKq5HNnZWNeBCEbujsotyjIngtsWoBc+bnRABvm4L7\n\tluWg==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:mime-version:sender:in-reply-to:references:from\n\t:date:message-id:subject:to:cc;\n\tbh=MIigxwTdlNaSQgt+ZJtCPVs+w9r5ZjPoXyMEGtcnVUw=;\n\tb=U5SZdEyILb9Cx+ljDM2J2XQDiOxd6Z5oTKg1AyY9ErdIpoA1cQwclg3exvUY/Cyr2y\n\tMBvPwm90M4s6KtU8RjLVrWZWqlvL4wZVXmC36AjQOD8WpIcbKOymmMtG2Ycma2YAbKeP\n\tIXYkSq0LfbTQ/qyIYRvdls4ZJr4IKU98jtlHyZ9gKowNSZdfV8lsHs0IjG4ualguMFUI\n\tk8efsc3ggY7HVv+Mv68Z+PhWl7pm+4Z200G2ZmyD/uZO6s60SMm+yNziwGdgbtWrTfQ7\n\tavby7eE6oBy2rYgjyJzsjS/wmqB3/HZ8nW8xsgDQax0iOoZThZkvGs8r2PhR41ryjY7n\n\tcxtg==","X-Gm-Message-State":"AHPjjUgRy6LAzGK9RrcPrOimKUQzJ5l+gXHZeEtGFXLtdHTFysQ5W0WY\n\t1iKFXSA0iF08dEdzjfxMAMaMSZV39Fu6dHSUVSg=","X-Google-Smtp-Source":"AOwi7QAuwpSAdUYp+YlrdOOSoKn8VQA9XSax/rdKbPeJMQAngyR2C//h49hS/ZSb6rkgc9Tj6pXNk/nHdL2H3J/vbsI=","X-Received":"by 10.99.103.2 with SMTP id b2mr1754332pgc.177.1505905800872;\n\tWed, 20 Sep 2017 04:10:00 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<1505322341-9480-9-git-send-email-chris.paterson2@renesas.com>","References":"<1505322341-9480-1-git-send-email-chris.paterson2@renesas.com>\n\t<1505322341-9480-9-git-send-email-chris.paterson2@renesas.com>","From":"Geert Uytterhoeven ","Date":"Wed, 20 Sep 2017 13:10:00 +0200","X-Google-Sender-Auth":"F9qS_zx9elQdxieTnGKfnS-iT50","Message-ID":"","Subject":"Re: [PATCH 8/8] ARM: drs: iwg22m: Add SPI NOR support","To":"Chris Paterson ","Cc":"Simon Horman , Rob Herring ,\n\tMark Rutland ,\n\tMagnus Damm , \n\tRussell King ,\n\tFabrizio Castro ,\n\t\"devicetree@vger.kernel.org\" ,\n\tLinux-Renesas ,\n\t\"linux-arm-kernel@lists.infradead.org\" \n\t","Content-Type":"text/plain; charset=\"UTF-8\"","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1771744,"web_url":"http://patchwork.ozlabs.org/comment/1771744/","msgid":"","list_archive_url":null,"date":"2017-09-20T11:10:32","subject":"Re: [PATCH 6/8] ARM: dts: iwg20m: Add SPI NOR support","submitter":{"id":703,"url":"http://patchwork.ozlabs.org/api/people/703/","name":"Geert Uytterhoeven","email":"geert@linux-m68k.org"},"content":"On Wed, Sep 13, 2017 at 7:05 PM, Chris Paterson\n wrote:\n> From: Fabrizio Castro \n>\n> Add support for the SPI NOR device used to boot up the system\n> to the System on Module DT.\n>\n> Signed-off-by: Fabrizio Castro \n> Signed-off-by: Chris Paterson \n\nReviewed-by: Geert Uytterhoeven \n\nGr{oetje,eeting}s,\n\n Geert\n\n--\nGeert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org\n\nIn personal conversations with technical people, I call myself a hacker. But\nwhen I'm talking to journalists I just say \"programmer\" or something like that.\n -- Linus Torvalds\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"pwg/xqaz\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xxxqb1R7Bz9sPs\n\tfor ;\n\tWed, 20 Sep 2017 21:10:35 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751680AbdITLKe (ORCPT\n\t);\n\tWed, 20 Sep 2017 07:10:34 -0400","from mail-pg0-f66.google.com ([74.125.83.66]:35723 \"EHLO\n\tmail-pg0-f66.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751488AbdITLKd (ORCPT\n\t); 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\n\tWed, 20 Sep 2017 04:10:32 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<1505322341-9480-7-git-send-email-chris.paterson2@renesas.com>","References":"<1505322341-9480-1-git-send-email-chris.paterson2@renesas.com>\n\t<1505322341-9480-7-git-send-email-chris.paterson2@renesas.com>","From":"Geert Uytterhoeven ","Date":"Wed, 20 Sep 2017 13:10:32 +0200","X-Google-Sender-Auth":"k5iP1I7kzPN9vuL6JxKFhvyq6Ys","Message-ID":"","Subject":"Re: [PATCH 6/8] ARM: dts: iwg20m: Add SPI NOR support","To":"Chris Paterson ","Cc":"Simon Horman , Rob Herring ,\n\tMark Rutland ,\n\tMagnus Damm , \n\tRussell King ,\n\tFabrizio Castro ,\n\t\"devicetree@vger.kernel.org\" ,\n\tLinux-Renesas ,\n\t\"linux-arm-kernel@lists.infradead.org\" \n\t","Content-Type":"text/plain; charset=\"UTF-8\"","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1771749,"web_url":"http://patchwork.ozlabs.org/comment/1771749/","msgid":"","list_archive_url":null,"date":"2017-09-20T11:16:58","subject":"Re: [PATCH 3/8] ARM: dts: iwg22m: Enable SDHI1 controller","submitter":{"id":703,"url":"http://patchwork.ozlabs.org/api/people/703/","name":"Geert Uytterhoeven","email":"geert@linux-m68k.org"},"content":"On Fri, Sep 15, 2017 at 10:11 AM, Simon Horman wrote:\n> On Wed, Sep 13, 2017 at 06:05:36PM +0100, Chris Paterson wrote:\n>> From: Fabrizio Castro \n>>\n>> Enable the SDHI1 controller on iWave RZ/G1E SoM.\n>>\n>> Signed-off-by: Fabrizio Castro \n>> Signed-off-by: Chris Paterson \n\nReviewed-by: Geert Uytterhoeven \n\n>> --- a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi\n>> +++ b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi\n\n>> @@ -54,6 +61,16 @@\n>> status = \"okay\";\n>> };\n>>\n>> +&sdhi1 {\n>> + pinctrl-0 = <&sdhi1_pins>;\n>> + pinctrl-names = \"default\";\n>> +\n>> + vmmc-supply = <®_3p3v>;\n>> + vqmmc-supply = <®_3p3v>;\n>> + cd-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;\n>\n> No wp-gpios property means this is a µSD slot, right?\n\nCorrect.\n\nGr{oetje,eeting}s,\n\n Geert\n\n--\nGeert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org\n\nIn personal conversations with technical people, I call myself a hacker. But\nwhen I'm talking to journalists I just say \"programmer\" or something like that.\n -- Linus Torvalds\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"sKkMclTd\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xxxz12GGkz9sPs\n\tfor ;\n\tWed, 20 Sep 2017 21:17:01 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751606AbdITLRA (ORCPT\n\t);\n\tWed, 20 Sep 2017 07:17:00 -0400","from mail-pg0-f68.google.com ([74.125.83.68]:37614 \"EHLO\n\tmail-pg0-f68.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751585AbdITLQ7 (ORCPT\n\t); Wed, 20 Sep 2017 07:16:59 -0400","by mail-pg0-f68.google.com with SMTP id v5so1463008pgn.4;\n\tWed, 20 Sep 2017 04:16:59 -0700 (PDT)","by 10.100.160.13 with HTTP; Wed, 20 Sep 2017 04:16:58 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=mime-version:sender:in-reply-to:references:from:date:message-id\n\t:subject:to:cc:content-transfer-encoding;\n\tbh=cAvq6kNbztI5jURq4/WUYh2SMs92h1OEiqEBF6JLQH4=;\n\tb=sKkMclTdTEwUQhZREfV91AwFfOy900qdLZMqAU6l5iYxJQFfy1pY3ntof4VDmBl09Y\n\tqqm0nepzvpj0wPLZ6nQPmhath037jpFx15lkJKdN1CXLBqC9fgk+0CUnD+KEDtCKSqrk\n\tylKh5SJ3XLViGkyt70SlIKEwQbJrcQbr0WRwPK26dACq9OSD4KOMy6f2J71Ao0t7+4Vy\n\tSWJsxrD2uZgBVYAjh6jZph3y+QMnKrmDf0P1ciuCUXnS6pss3uTBjpPa61G8dCbtjTfK\n\tx5lLv3LnjUm7LCts+BQC4zs2W1jujM8GQlUQ4WYAdgGYn3AZ3BYHDKKHl4BRCVAiO1mY\n\tJYPw==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:mime-version:sender:in-reply-to:references:from\n\t:date:message-id:subject:to:cc:content-transfer-encoding;\n\tbh=cAvq6kNbztI5jURq4/WUYh2SMs92h1OEiqEBF6JLQH4=;\n\tb=opB2of1TNNGdeNH5da1OCZRVTM1y1dVJ0OXuFmcPf1Tns/1qrgIFy7aj5ZK4U8fbli\n\tD7lxjw41fu8GThoAsXyJS/W34PjHgE90f/2ToNMIwep6qFesV20pFrzdHYlm4ow46gaY\n\tFNxa11XECYMN4aACG77bbtPEc6llM2gUxyFB5kVroEoGXbAAL7A0IZyX7KUCyWnJ2bfB\n\ttdw+BRQv8JcDIT7e46/SM4SYuac60Xap8inhcPUmFwrz0DJa8FxmIawH5+a3+Ls7VLbc\n\toPN9aMYPJDfmSCaafvQUOgLNENrQM/JYu2BC9/AV47xNCITWxnKoMFX/vBa1bf3G9uP2\n\tgBlw==","X-Gm-Message-State":"AHPjjUgK20u7/jx/Wxz0+oRzA6OvIi3dnmr4agTh/kEVZEDVZogEPoWB\n\tPLqsL66heRh6J5TDUhD5ueUwBgE53zLO1QpnGrA=","X-Google-Smtp-Source":"AOwi7QBknpE4x5xJ04giF2EZMrdi3BnjwwOeGDoggrIrAraTai7dRfabHdEuuFC7Uf1JmF6p6cIys79800DSIS/IUyw=","X-Received":"by 10.101.67.137 with SMTP id m9mr1843032pgp.63.1505906218906;\n\tWed, 20 Sep 2017 04:16:58 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<20170915081144.GI3924@verge.net.au>","References":"<1505322341-9480-1-git-send-email-chris.paterson2@renesas.com>\n\t<1505322341-9480-4-git-send-email-chris.paterson2@renesas.com>\n\t<20170915081144.GI3924@verge.net.au>","From":"Geert Uytterhoeven ","Date":"Wed, 20 Sep 2017 13:16:58 +0200","X-Google-Sender-Auth":"nkw9k9ibThBBJTI8703OWE5g8AA","Message-ID":"","Subject":"Re: [PATCH 3/8] ARM: dts: iwg22m: Enable SDHI1 controller","To":"Simon Horman ","Cc":"Chris Paterson ,\n\tRob Herring , Mark Rutland ,\n\tMagnus Damm ,\n\tRussell King , \n\tFabrizio Castro ,\n\t\"devicetree@vger.kernel.org\" ,\n\tLinux-Renesas ,\n\t\"linux-arm-kernel@lists.infradead.org\" \n\t","Content-Type":"text/plain; charset=\"UTF-8\"","Content-Transfer-Encoding":"quoted-printable","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1771768,"web_url":"http://patchwork.ozlabs.org/comment/1771768/","msgid":"","list_archive_url":null,"date":"2017-09-20T11:40:20","subject":"Re: [PATCH 4/8] ARM: dts: iwg22d: Enable SDHI0 controller","submitter":{"id":703,"url":"http://patchwork.ozlabs.org/api/people/703/","name":"Geert Uytterhoeven","email":"geert@linux-m68k.org"},"content":"On Wed, Sep 13, 2017 at 7:05 PM, Chris Paterson\n wrote:\n> From: Fabrizio Castro \n>\n> Enable the SDHI0 controller on iWave RZ/G1E carrier board.\n>\n> Signed-off-by: Fabrizio Castro \n> Signed-off-by: Chris Paterson \n\nReviewed-by: Geert Uytterhoeven \n\nGr{oetje,eeting}s,\n\n Geert\n\n--\nGeert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org\n\nIn personal conversations with technical people, I call myself a hacker. But\nwhen I'm talking to journalists I just say \"programmer\" or something like that.\n -- Linus Torvalds\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"AzAmPFbL\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xxyV01HZFz9sRm\n\tfor ;\n\tWed, 20 Sep 2017 21:40:24 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751768AbdITLkW (ORCPT\n\t);\n\tWed, 20 Sep 2017 07:40:22 -0400","from mail-pg0-f65.google.com ([74.125.83.65]:35779 \"EHLO\n\tmail-pg0-f65.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751745AbdITLkV (ORCPT\n\t); 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\n\tWed, 20 Sep 2017 04:40:21 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<1505322341-9480-5-git-send-email-chris.paterson2@renesas.com>","References":"<1505322341-9480-1-git-send-email-chris.paterson2@renesas.com>\n\t<1505322341-9480-5-git-send-email-chris.paterson2@renesas.com>","From":"Geert Uytterhoeven ","Date":"Wed, 20 Sep 2017 13:40:20 +0200","X-Google-Sender-Auth":"hdVfJcp-9bSErCtnazIqLxikTOI","Message-ID":"","Subject":"Re: [PATCH 4/8] ARM: dts: iwg22d: Enable SDHI0 controller","To":"Chris Paterson ","Cc":"Simon Horman , Rob Herring ,\n\tMark Rutland ,\n\tMagnus Damm , \n\tRussell King ,\n\tFabrizio Castro ,\n\t\"devicetree@vger.kernel.org\" ,\n\tLinux-Renesas ,\n\t\"linux-arm-kernel@lists.infradead.org\" \n\t","Content-Type":"text/plain; charset=\"UTF-8\"","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1771825,"web_url":"http://patchwork.ozlabs.org/comment/1771825/","msgid":"","list_archive_url":null,"date":"2017-09-20T13:05:07","subject":"RE: [PATCH 3/8] ARM: dts: iwg22m: Enable SDHI1 controller","submitter":{"id":69002,"url":"http://patchwork.ozlabs.org/api/people/69002/","name":"Chris Paterson","email":"Chris.Paterson2@renesas.com"},"content":"Hello Simon,\r\n\r\n> From: devicetree-owner@vger.kernel.org [mailto:devicetree-\r\n> owner@vger.kernel.org] On Behalf Of Simon Horman\r\n> Sent: 15 September 2017 09:12\r\n> To: Chris Paterson \r\n> \r\n> On Wed, Sep 13, 2017 at 06:05:36PM +0100, Chris Paterson wrote:\r\n> > From: Fabrizio Castro \r\n> >\r\n> > Enable the SDHI1 controller on iWave RZ/G1E SoM.\r\n> >\r\n> > Signed-off-by: Fabrizio Castro \r\n> > Signed-off-by: Chris Paterson \r\n> > ---\r\n> > This patch is based on renesas-devel-20170913-v4.13.\r\n> >\r\n> >\r\n> > arch/arm/boot/dts/r8a7745-iwg22m.dtsi | 17 +++++++++++++++++\r\n> > 1 file changed, 17 insertions(+)\r\n> >\r\n> > diff --git a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi\r\n> > b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi\r\n> > index e306e7c..f7f9cef 100644\r\n> > --- a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi\r\n> > +++ b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi\r\n> > @@ -9,6 +9,7 @@\r\n> > */\r\n> >\r\n> > #include \"r8a7745.dtsi\"\r\n> > +#include \r\n> >\r\n> > / {\r\n> > \tcompatible = \"iwave,g22m\", \"renesas,r8a7745\"; @@ -38,6 +39,12\r\n> @@\r\n> > \t\tfunction = \"mmc\";\r\n> > \t};\r\n> >\r\n> > +\tsdhi1_pins: sd1 {\r\n> > +\t\tgroups = \"sdhi1_data4\", \"sdhi1_ctrl\";\r\n> > +\t\tfunction = \"sdhi1\";\r\n> > +\t\tpower-source = <3300>;\r\n> > +\t};\r\n> > +\r\n> > \ti2c3_pins: i2c3 {\r\n> > \t\tgroups = \"i2c3_b\";\r\n> > \t\tfunction = \"i2c3\";\r\n> > @@ -54,6 +61,16 @@\r\n> > \tstatus = \"okay\";\r\n> > };\r\n> >\r\n> > +&sdhi1 {\r\n> > +\tpinctrl-0 = <&sdhi1_pins>;\r\n> > +\tpinctrl-names = \"default\";\r\n> > +\r\n> > +\tvmmc-supply = <®_3p3v>;\r\n> > +\tvqmmc-supply = <®_3p3v>;\r\n> > +\tcd-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;\r\n> \r\n> No wp-gpios property means this is a µSD slot, right?\r\n\r\nCorrect\r\n\r\n> \r\n> Do you have any plans to enable sdr-50 and sdr-104?\r\n> Is it not supported for some reason?\r\n\r\nNope (unless the hardware changes down the line).\r\nBoth vmmc and vqmmc are fixed to 3V3 on the iWave-E SOM module.\r\n\r\nKind regards, Chris\r\n\r\n\r\n> \r\n> I don't mind if its not enabled in this patch but I would like to know if it can be\r\n> enabled or not and reflect that information in the wiki.\r\n> \r\n> http://elinux.org/index.php?title=Renesas-MMC-Enabled-Speeds\r\n> \r\n> > +\tstatus = \"okay\";\r\n> > +};\r\n> > +\r\n> > &i2c3 {\r\n> > \tpinctrl-0 = <&i2c3_pins>;\r\n> > \tpinctrl-names = \"default\";\r\n> > --\r\n> > 1.9.1\r\n> >\r\n> --\r\n> To unsubscribe from this list: send the line \"unsubscribe devicetree\" in the\r\n> body of a message to majordomo@vger.kernel.org More majordomo info at\r\n> http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; 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a=rsa-sha256; c=relaxed/relaxed;\n\td=renesasgroup.onmicrosoft.com; s=selector1-renesas-com;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version;\n\tbh=DOwj6yOvDwhnKnOE+rbB2iF8JBOBZAbjW0UG+MmukJ4=;\n\tb=AKDcA8NfsIV1mQ9n8kiY0g6wn5xFzJ/aWARB5+Aacd+hd+BHMPeLd+ZNsZXBIAOlsqbh4flRiEfOcJ6QXGU/PmM+/wFp6Zu82ljZAR5QP1ydcZh8JSa1zRcPguU55Nab7NcT41DGmQVtiJ6vrFqgXiyU5pATRiDDucmRdpFLxyI=","From":"Chris Paterson ","To":"Simon Horman ","CC":"Rob Herring , Mark Rutland ,\n\tMagnus Damm ,\n\tRussell King , \n\tFabrizio Castro ,\n\t\"devicetree@vger.kernel.org\" ,\n\t\"linux-renesas-soc@vger.kernel.org\" , \n\t\"linux-arm-kernel@lists.infradead.org\" \n\t","Subject":"RE: [PATCH 3/8] ARM: dts: iwg22m: Enable SDHI1 controller","Thread-Topic":"[PATCH 3/8] ARM: dts: iwg22m: Enable SDHI1 controller","Thread-Index":"AQHTLLKXj8dJEVX01U6ARsgYUaJYZ6K1myQAgAgi0RA=","Date":"Wed, 20 Sep 2017 13:05:07 +0000","Message-ID":"","References":"<1505322341-9480-1-git-send-email-chris.paterson2@renesas.com>\n\t<1505322341-9480-4-git-send-email-chris.paterson2@renesas.com>\n\t<20170915081144.GI3924@verge.net.au>","In-Reply-To":"<20170915081144.GI3924@verge.net.au>","Accept-Language":"en-GB, en-US","Content-Language":"en-US","X-MS-Has-Attach":"","X-MS-TNEF-Correlator":"","authentication-results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; 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SFP:1102; SCL:1; SRVR:TY1PR06MB0894;\n\tH:TY1PR06MB0702.apcprd06.prod.outlook.com; FPR:; SPF:None;\n\tPTR:InfoNoRecords; MX:1; A:1; LANG:en; ","received-spf":"None (protection.outlook.com: renesas.com does not designate\n\tpermitted sender hosts)","spamdiagnosticoutput":"1:99","spamdiagnosticmetadata":"NSPM","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","MIME-Version":"1.0","X-OriginatorOrg":"renesas.com","X-MS-Exchange-CrossTenant-originalarrivaltime":"20 Sep 2017 13:05:07.2535\n\t(UTC)","X-MS-Exchange-CrossTenant-fromentityheader":"Hosted","X-MS-Exchange-CrossTenant-id":"53d82571-da19-47e4-9cb4-625a166a4a2a","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"TY1PR06MB0894","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1772085,"web_url":"http://patchwork.ozlabs.org/comment/1772085/","msgid":"","list_archive_url":null,"date":"2017-09-20T17:17:44","subject":"RE: [PATCH 4/8] ARM: dts: iwg22d: Enable SDHI0 controller","submitter":{"id":72129,"url":"http://patchwork.ozlabs.org/api/people/72129/","name":"Fabrizio Castro","email":"fabrizio.castro@bp.renesas.com"},"content":"Hello Simon, Geert\r\n\r\nthank you for your patience on this one. We found out that there is an HW issue on SDHI0 , SDHC_CD# and SDHC_CMD (on the carrier board) are pulled up to 3.3V, therefore we are dropping UHS on this interface, and as result we are dropping this patch. We will send a V2 shortly.\r\n\r\nThanks,\r\nFabrizio\r\n\r\n> -----Original Message-----\r\n> From: Simon Horman [mailto:horms@verge.net.au]\r\n> Sent: 15 September 2017 09:06\r\n> To: Chris Paterson \r\n> Cc: Rob Herring ; Mark Rutland ; Magnus Damm ;\r\n> Russell King ; Fabrizio Castro ; devicetree@vger.kernel.org; linux-renesas-\r\n> soc@vger.kernel.org; linux-arm-kernel@lists.infradead.org\r\n> Subject: Re: [PATCH 4/8] ARM: dts: iwg22d: Enable SDHI0 controller\r\n>\r\n> On Wed, Sep 13, 2017 at 06:05:37PM +0100, Chris Paterson wrote:\r\n> > From: Fabrizio Castro \r\n> >\r\n> > Enable the SDHI0 controller on iWave RZ/G1E carrier board.\r\n>\r\n> ...\r\n>\r\n> > @@ -63,3 +88,15 @@\r\n> > micrel,led-mode = <1>;\r\n> > };\r\n> > };\r\n> > +\r\n> > +&sdhi0 {\r\n> > +pinctrl-0 = <&sdhi0_pins>;\r\n> > +pinctrl-1 = <&sdhi0_pins_uhs>;\r\n> > +pinctrl-names = \"default\", \"state_uhs\";\r\n> > +\r\n> > +vmmc-supply = <®_3p3v>;\r\n> > +vqmmc-supply = <&vccq_sdhi0>;\r\n> > +cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;\r\n>\r\n> I take that the absence of a wp-gpio means that that this is a µSD slot.\r\n> Could you help me by documenting this correctly on\r\n> http://elinux.org/index.php?title=Renesas-MMC-Enabled-Speeds ?\r\n>\r\n> For some reason I thought that SDHI0 wasn't exposed at all, so I guess\r\n> my reading of the documentation was incorrect.\r\n>\r\n>\r\n> I think you also want sd-uhs-sdr50 here too.\r\n> You can test it by removing the sd-uhs-sdr104 property.\r\n>\r\n> > +sd-uhs-sdr104;\r\n> > +status = \"okay\";\r\n> > +};\r\n> > --\r\n> > 1.9.1\r\n> >\r\n\r\n\r\n\r\nRenesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=renesasgroup.onmicrosoft.com\n\theader.i=@renesasgroup.onmicrosoft.com header.b=\"mPbjkO1Q\"; \n\tdkim-atps=neutral","spf=none (sender IP is )\n\tsmtp.mailfrom=fabrizio.castro@bp.renesas.com; "],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xy5zP5krKz9t2V\n\tfor ;\n\tThu, 21 Sep 2017 03:17:53 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751547AbdITRRw (ORCPT\n\t);\n\tWed, 20 Sep 2017 13:17:52 -0400","from relmlor2.renesas.com ([210.160.252.172]:53290 \"EHLO\n\trelmlie1.idc.renesas.com\" rhost-flags-OK-OK-OK-FAIL)\n\tby vger.kernel.org with ESMTP id S1751785AbdITRRv (ORCPT\n\t); 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Wed, 20 Sep 2017 17:17:45 +0000"],"X-IronPort-AV":"E=Sophos;i=\"5.42,421,1500908400\"; d=\"scan'208\";a=\"258412754\"","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=renesasgroup.onmicrosoft.com; s=selector1-bp-renesas-com;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version;\n\tbh=TV9TRdKhRAcQCruKzAEej9HavFD0VHrXQaLyob72dEQ=;\n\tb=mPbjkO1QjxCq5h5Y28vcwMK6dCosF17hIOSyw4FZwghEgAVhp7AMEm3dW1CQo9NGVSfWCuro9fvDe2AXvw9AA9dG2Zp017hvmrvPcByuqMcfRLvVpyLYh08bOcrzXLTvBUltD7bvZ4Kdq44Z+4KjBR+/bWLLgVynE/FWXHm63uk=","From":"Fabrizio Castro ","To":"Simon Horman ,\n\tGeert Uytterhoeven ","CC":"Rob Herring , Mark Rutland ,\n\tMagnus Damm ,\n\tRussell King , \n\t\"devicetree@vger.kernel.org\" ,\n\t\"linux-renesas-soc@vger.kernel.org\" , \n\t\"linux-arm-kernel@lists.infradead.org\" \n\t,\n\tChris Paterson ,\n\tBiju Das ","Subject":"RE: [PATCH 4/8] ARM: dts: iwg22d: Enable SDHI0 controller","Thread-Topic":"[PATCH 4/8] ARM: dts: iwg22d: Enable SDHI0 controller","Thread-Index":"AQHTLLKYPH11/Qdhw0aM1g4pHZ+rZqK1mWYAgAhxhMA=","Date":"Wed, 20 Sep 2017 17:17:44 +0000","Message-ID":"","References":"<1505322341-9480-1-git-send-email-chris.paterson2@renesas.com>\n\t<1505322341-9480-5-git-send-email-chris.paterson2@renesas.com>\n\t<20170915080530.GH3924@verge.net.au>","In-Reply-To":"<20170915080530.GH3924@verge.net.au>","Accept-Language":"en-GB, en-US","Content-Language":"en-US","X-MS-Has-Attach":"","X-MS-TNEF-Correlator":"","authentication-results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; 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SFP:1102; SCL:1; SRVR:TY1PR06MB0798;\n\tH:TY1PR06MB0895.apcprd06.prod.outlook.com; FPR:; SPF:None;\n\tPTR:InfoNoRecords; A:0; MX:1; LANG:en; ","received-spf":"None (protection.outlook.com: bp.renesas.com does not designate\n\tpermitted sender hosts)","spamdiagnosticoutput":"1:99","spamdiagnosticmetadata":"NSPM","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","MIME-Version":"1.0","X-OriginatorOrg":"bp.renesas.com","X-MS-Exchange-CrossTenant-originalarrivaltime":"20 Sep 2017 17:17:44.6838\n\t(UTC)","X-MS-Exchange-CrossTenant-fromentityheader":"Hosted","X-MS-Exchange-CrossTenant-id":"53d82571-da19-47e4-9cb4-625a166a4a2a","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"TY1PR06MB0798","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1772539,"web_url":"http://patchwork.ozlabs.org/comment/1772539/","msgid":"<20170921083116.GE15749@verge.net.au>","list_archive_url":null,"date":"2017-09-21T08:31:16","subject":"Re: [PATCH 3/8] ARM: dts: iwg22m: Enable SDHI1 controller","submitter":{"id":106,"url":"http://patchwork.ozlabs.org/api/people/106/","name":"Simon Horman","email":"horms@verge.net.au"},"content":"On Wed, Sep 20, 2017 at 01:05:07PM +0000, Chris Paterson wrote:\n> Hello Simon,\n> \n> > From: devicetree-owner@vger.kernel.org [mailto:devicetree-\n> > owner@vger.kernel.org] On Behalf Of Simon Horman\n> > Sent: 15 September 2017 09:12\n> > To: Chris Paterson \n> > \n> > On Wed, Sep 13, 2017 at 06:05:36PM +0100, Chris Paterson wrote:\n> > > From: Fabrizio Castro \n> > >\n> > > Enable the SDHI1 controller on iWave RZ/G1E SoM.\n> > >\n> > > Signed-off-by: Fabrizio Castro \n> > > Signed-off-by: Chris Paterson \n> > > ---\n> > > This patch is based on renesas-devel-20170913-v4.13.\n> > >\n> > >\n> > > arch/arm/boot/dts/r8a7745-iwg22m.dtsi | 17 +++++++++++++++++\n> > > 1 file changed, 17 insertions(+)\n> > >\n> > > diff --git a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi\n> > > b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi\n> > > index e306e7c..f7f9cef 100644\n> > > --- a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi\n> > > +++ b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi\n> > > @@ -9,6 +9,7 @@\n> > > */\n> > >\n> > > #include \"r8a7745.dtsi\"\n> > > +#include \n> > >\n> > > / {\n> > > \tcompatible = \"iwave,g22m\", \"renesas,r8a7745\"; @@ -38,6 +39,12\n> > @@\n> > > \t\tfunction = \"mmc\";\n> > > \t};\n> > >\n> > > +\tsdhi1_pins: sd1 {\n> > > +\t\tgroups = \"sdhi1_data4\", \"sdhi1_ctrl\";\n> > > +\t\tfunction = \"sdhi1\";\n> > > +\t\tpower-source = <3300>;\n> > > +\t};\n> > > +\n> > > \ti2c3_pins: i2c3 {\n> > > \t\tgroups = \"i2c3_b\";\n> > > \t\tfunction = \"i2c3\";\n> > > @@ -54,6 +61,16 @@\n> > > \tstatus = \"okay\";\n> > > };\n> > >\n> > > +&sdhi1 {\n> > > +\tpinctrl-0 = <&sdhi1_pins>;\n> > > +\tpinctrl-names = \"default\";\n> > > +\n> > > +\tvmmc-supply = <®_3p3v>;\n> > > +\tvqmmc-supply = <®_3p3v>;\n> > > +\tcd-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;\n> > \n> > No wp-gpios property means this is a µSD slot, right?\n> \n> Correct\n> \n> > \n> > Do you have any plans to enable sdr-50 and sdr-104?\n> > Is it not supported for some reason?\n> \n> Nope (unless the hardware changes down the line).\n> Both vmmc and vqmmc are fixed to 3V3 on the iWave-E SOM module.\n\nThanks, got it.\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=verge.net.au header.i=@verge.net.au\n\theader.b=\"C0Hf28RM\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xyVFp6gTGz9t3Z\n\tfor ;\n\tThu, 21 Sep 2017 18:31:42 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751764AbdIUIbl (ORCPT\n\t);\n\tThu, 21 Sep 2017 04:31:41 -0400","from kirsty.vergenet.net ([202.4.237.240]:32885 \"EHLO\n\tkirsty.vergenet.net\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751579AbdIUIbk (ORCPT\n\t); Thu, 21 Sep 2017 04:31:40 -0400","from penelope.horms.nl (unknown [217.111.208.18])\n\tby kirsty.vergenet.net (Postfix) with ESMTPA id 4BFD725AD59;\n\tThu, 21 Sep 2017 18:31:38 +1000 (AEST)","by penelope.horms.nl (Postfix, from userid 7100)\n\tid 02293E23487; Thu, 21 Sep 2017 04:31:16 -0400 (EDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; \n\tt=1505982698; bh=umv0rWCMyyBWjYl/BX2bvct47n0f7hgVCis2OWdJ6pg=;\n\th=Date:From:To:Cc:Subject:References:In-Reply-To:From;\n\tb=C0Hf28RMKD72u31UCupS8ThzMMywzFuY8NMfc9/u3BWybIapPb05Fu+X1KaUAdFHZ\n\tkLbuSecSZslVICsRyFE4yVddT+tvxWVoAI3GRgYlALX9ifAD+50/mfKJHXebIR0oXC\n\t9roxmgyOyRJWZIq9XAQ+5ZeMO5thdyW4DnEmYmsg=","Date":"Thu, 21 Sep 2017 10:31:16 +0200","From":"Simon Horman ","To":"Chris Paterson ","Cc":"Rob Herring , Mark Rutland ,\n\tMagnus Damm ,\n\tRussell King , \n\tFabrizio Castro ,\n\t\"devicetree@vger.kernel.org\" ,\n\t\"linux-renesas-soc@vger.kernel.org\" , \n\t\"linux-arm-kernel@lists.infradead.org\" \n\t","Subject":"Re: [PATCH 3/8] ARM: dts: iwg22m: Enable SDHI1 controller","Message-ID":"<20170921083116.GE15749@verge.net.au>","References":"<1505322341-9480-1-git-send-email-chris.paterson2@renesas.com>\n\t<1505322341-9480-4-git-send-email-chris.paterson2@renesas.com>\n\t<20170915081144.GI3924@verge.net.au>\n\t","MIME-Version":"1.0","Content-Type":"text/plain; charset=utf-8","Content-Disposition":"inline","Content-Transfer-Encoding":"8bit","In-Reply-To":"","Organisation":"Horms Solutions BV","User-Agent":"Mutt/1.5.23 (2014-03-12)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1772544,"web_url":"http://patchwork.ozlabs.org/comment/1772544/","msgid":"<20170921083741.GF15749@verge.net.au>","list_archive_url":null,"date":"2017-09-21T08:37:41","subject":"Re: [PATCH 3/8] ARM: dts: iwg22m: Enable SDHI1 controller","submitter":{"id":106,"url":"http://patchwork.ozlabs.org/api/people/106/","name":"Simon Horman","email":"horms@verge.net.au"},"content":"On Wed, Sep 20, 2017 at 01:06:30PM +0000, Chris Paterson wrote:\n> \n> > From: Chris Paterson\n> > Sent: 20 September 2017 14:05\n> \n> > \n> > >\n> > > I don't mind if its not enabled in this patch but I would like to know\n> > > if it can be enabled or not and reflect that information in the wiki.\n> > >\n> > > http://elinux.org/index.php?title=Renesas-MMC-Enabled-Speeds\n> \n> Will do.\n\nThanks.\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=verge.net.au header.i=@verge.net.au\n\theader.b=\"fDsoZ8Xk\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xyVP66h3Mz9t42\n\tfor ;\n\tThu, 21 Sep 2017 18:38:02 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751953AbdIUIiB (ORCPT\n\t);\n\tThu, 21 Sep 2017 04:38:01 -0400","from kirsty.vergenet.net ([202.4.237.240]:33003 \"EHLO\n\tkirsty.vergenet.net\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751930AbdIUIiA (ORCPT\n\t); Thu, 21 Sep 2017 04:38:00 -0400","from penelope.horms.nl (unknown [217.111.208.18])\n\tby kirsty.vergenet.net (Postfix) with ESMTPA id 18F1025BDD9;\n\tThu, 21 Sep 2017 18:37:59 +1000 (AEST)","by penelope.horms.nl (Postfix, from userid 7100)\n\tid 60BA5E23487; Thu, 21 Sep 2017 04:37:41 -0400 (EDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; \n\tt=1505983079; bh=jObUtI83LSLNPJBHXRQHVCEBpjrQuWhr8BKxWt6MhG4=;\n\th=Date:From:To:Cc:Subject:References:In-Reply-To:From;\n\tb=fDsoZ8XkeW6TwMsS4yDT2Dm5h8cIGf31k32Sd2VVGAXRDePmZJ7iP8waV7vqS/fLl\n\t6ySBJQLrmJVe/y0cIx0ATBENJgn7UanL4xqFNOuhlNSc+9SlZuZRiQyxQMXD5DpvAe\n\t5msuQEO0TV7zMfBZGz8+G6f8qadt67m4Mi80VLFo=","Date":"Thu, 21 Sep 2017 10:37:41 +0200","From":"Simon Horman ","To":"Chris Paterson ","Cc":"Rob Herring , Mark Rutland ,\n\tMagnus Damm ,\n\tRussell King , \n\tFabrizio Castro ,\n\t\"devicetree@vger.kernel.org\" ,\n\t\"linux-renesas-soc@vger.kernel.org\" , \n\t\"linux-arm-kernel@lists.infradead.org\" \n\t","Subject":"Re: [PATCH 3/8] ARM: dts: iwg22m: Enable SDHI1 controller","Message-ID":"<20170921083741.GF15749@verge.net.au>","References":"<1505322341-9480-1-git-send-email-chris.paterson2@renesas.com>\n\t<1505322341-9480-4-git-send-email-chris.paterson2@renesas.com>\n\t<20170915081144.GI3924@verge.net.au>\n\t","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"","Organisation":"Horms Solutions BV","User-Agent":"Mutt/1.5.23 (2014-03-12)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1772547,"web_url":"http://patchwork.ozlabs.org/comment/1772547/","msgid":"<20170921083816.GG15749@verge.net.au>","list_archive_url":null,"date":"2017-09-21T08:38:17","subject":"Re: [PATCH 3/8] ARM: dts: iwg22m: Enable SDHI1 controller","submitter":{"id":106,"url":"http://patchwork.ozlabs.org/api/people/106/","name":"Simon Horman","email":"horms@verge.net.au"},"content":"On Thu, Sep 21, 2017 at 10:31:16AM +0200, Simon Horman wrote:\n> On Wed, Sep 20, 2017 at 01:05:07PM +0000, Chris Paterson wrote:\n> > Hello Simon,\n> > \n> > > From: devicetree-owner@vger.kernel.org [mailto:devicetree-\n> > > owner@vger.kernel.org] On Behalf Of Simon Horman\n> > > Sent: 15 September 2017 09:12\n> > > To: Chris Paterson \n> > > \n> > > On Wed, Sep 13, 2017 at 06:05:36PM +0100, Chris Paterson wrote:\n> > > > From: Fabrizio Castro \n> > > >\n> > > > Enable the SDHI1 controller on iWave RZ/G1E SoM.\n> > > >\n> > > > Signed-off-by: Fabrizio Castro \n> > > > Signed-off-by: Chris Paterson \n> > > > ---\n> > > > This patch is based on renesas-devel-20170913-v4.13.\n> > > >\n> > > >\n> > > > arch/arm/boot/dts/r8a7745-iwg22m.dtsi | 17 +++++++++++++++++\n> > > > 1 file changed, 17 insertions(+)\n> > > >\n> > > > diff --git a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi\n> > > > b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi\n> > > > index e306e7c..f7f9cef 100644\n> > > > --- a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi\n> > > > +++ b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi\n> > > > @@ -9,6 +9,7 @@\n> > > > */\n> > > >\n> > > > #include \"r8a7745.dtsi\"\n> > > > +#include \n> > > >\n> > > > / {\n> > > > \tcompatible = \"iwave,g22m\", \"renesas,r8a7745\"; @@ -38,6 +39,12\n> > > @@\n> > > > \t\tfunction = \"mmc\";\n> > > > \t};\n> > > >\n> > > > +\tsdhi1_pins: sd1 {\n> > > > +\t\tgroups = \"sdhi1_data4\", \"sdhi1_ctrl\";\n> > > > +\t\tfunction = \"sdhi1\";\n> > > > +\t\tpower-source = <3300>;\n> > > > +\t};\n> > > > +\n> > > > \ti2c3_pins: i2c3 {\n> > > > \t\tgroups = \"i2c3_b\";\n> > > > \t\tfunction = \"i2c3\";\n> > > > @@ -54,6 +61,16 @@\n> > > > \tstatus = \"okay\";\n> > > > };\n> > > >\n> > > > +&sdhi1 {\n> > > > +\tpinctrl-0 = <&sdhi1_pins>;\n> > > > +\tpinctrl-names = \"default\";\n> > > > +\n> > > > +\tvmmc-supply = <®_3p3v>;\n> > > > +\tvqmmc-supply = <®_3p3v>;\n> > > > +\tcd-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;\n> > > \n> > > No wp-gpios property means this is a µSD slot, right?\n> > \n> > Correct\n> > \n> > > \n> > > Do you have any plans to enable sdr-50 and sdr-104?\n> > > Is it not supported for some reason?\n> > \n> > Nope (unless the hardware changes down the line).\n> > Both vmmc and vqmmc are fixed to 3V3 on the iWave-E SOM module.\n> \n> Thanks, got it.\n\nThanks for the clarification above, I have applied this patch.\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=verge.net.au header.i=@verge.net.au\n\theader.b=\"I/9daMZD\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xyVPn4xcNz9t3m\n\tfor ;\n\tThu, 21 Sep 2017 18:38:37 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751962AbdIUIig (ORCPT\n\t);\n\tThu, 21 Sep 2017 04:38:36 -0400","from kirsty.vergenet.net ([202.4.237.240]:33029 \"EHLO\n\tkirsty.vergenet.net\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751798AbdIUIig (ORCPT\n\t); Thu, 21 Sep 2017 04:38:36 -0400","from penelope.horms.nl (unknown [217.111.208.18])\n\tby kirsty.vergenet.net (Postfix) with ESMTPA id 529D025AD5A;\n\tThu, 21 Sep 2017 18:38:34 +1000 (AEST)","by penelope.horms.nl (Postfix, from userid 7100)\n\tid 170B1E23487; Thu, 21 Sep 2017 04:38:17 -0400 (EDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; \n\tt=1505983114; bh=hrmsKNTM3zagXiRnHW6V86cisc/qBi86P+c7WAld4sk=;\n\th=Date:From:To:Cc:Subject:References:In-Reply-To:From;\n\tb=I/9daMZDJRtRXLGpqE/paiBSB6V7M0nWFH8kH5pnpA1uOlNgwmMSHGCPSs6ivD0RJ\n\ta1qZmSOVQCUiNdZX0syiE9WSXUbR/+YwMMKOyNbKBipAq37XnxPbvI5Mx8iHExJ+Ik\n\t9aQM7PeIZeMzpVt10IHBXeywg0JOj3L0PJStWApc=","Date":"Thu, 21 Sep 2017 10:38:17 +0200","From":"Simon Horman ","To":"Chris Paterson ","Cc":"Rob Herring , Mark Rutland ,\n\tMagnus Damm ,\n\tRussell King , \n\tFabrizio Castro ,\n\t\"devicetree@vger.kernel.org\" ,\n\t\"linux-renesas-soc@vger.kernel.org\" , \n\t\"linux-arm-kernel@lists.infradead.org\" \n\t","Subject":"Re: [PATCH 3/8] ARM: dts: iwg22m: Enable SDHI1 controller","Message-ID":"<20170921083816.GG15749@verge.net.au>","References":"<1505322341-9480-1-git-send-email-chris.paterson2@renesas.com>\n\t<1505322341-9480-4-git-send-email-chris.paterson2@renesas.com>\n\t<20170915081144.GI3924@verge.net.au>\n\t\n\t<20170921083116.GE15749@verge.net.au>","MIME-Version":"1.0","Content-Type":"text/plain; charset=utf-8","Content-Disposition":"inline","Content-Transfer-Encoding":"8bit","In-Reply-To":"<20170921083116.GE15749@verge.net.au>","Organisation":"Horms Solutions BV","User-Agent":"Mutt/1.5.23 (2014-03-12)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1772548,"web_url":"http://patchwork.ozlabs.org/comment/1772548/","msgid":"<20170921083839.GH15749@verge.net.au>","list_archive_url":null,"date":"2017-09-21T08:38:40","subject":"Re: [PATCH 4/8] ARM: dts: iwg22d: Enable SDHI0 controller","submitter":{"id":106,"url":"http://patchwork.ozlabs.org/api/people/106/","name":"Simon Horman","email":"horms@verge.net.au"},"content":"On Wed, Sep 20, 2017 at 01:40:20PM +0200, Geert Uytterhoeven wrote:\n> On Wed, Sep 13, 2017 at 7:05 PM, Chris Paterson\n> wrote:\n> > From: Fabrizio Castro \n> >\n> > Enable the SDHI0 controller on iWave RZ/G1E carrier board.\n> >\n> > Signed-off-by: Fabrizio Castro \n> > Signed-off-by: Chris Paterson \n> \n> Reviewed-by: Geert Uytterhoeven \n\nThanks, applied.\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=verge.net.au header.i=@verge.net.au\n\theader.b=\"PiALBGob\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xyVQF646nz9t3v\n\tfor ;\n\tThu, 21 Sep 2017 18:39:01 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751876AbdIUIjA (ORCPT\n\t);\n\tThu, 21 Sep 2017 04:39:00 -0400","from kirsty.vergenet.net ([202.4.237.240]:33051 \"EHLO\n\tkirsty.vergenet.net\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751635AbdIUIjA (ORCPT\n\t); Thu, 21 Sep 2017 04:39:00 -0400","from penelope.horms.nl (unknown [217.111.208.18])\n\tby kirsty.vergenet.net (Postfix) with ESMTPA id B25F025AD5A;\n\tThu, 21 Sep 2017 18:38:58 +1000 (AEST)","by penelope.horms.nl (Postfix, from userid 7100)\n\tid A1526E23487; Thu, 21 Sep 2017 04:38:40 -0400 (EDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; \n\tt=1505983139; bh=VjzrxQU5513p75LZmKqneiD+gNDG5ts71z6wP3qZG30=;\n\th=Date:From:To:Cc:Subject:References:In-Reply-To:From;\n\tb=PiALBGobU16fQ5+qKUkQmbKSO0/Uh/jFXsllSRtrzbOosiJTHx94zqB40KHRuItZq\n\tWflg73KSRT7/7tMoxluOdLCKZS8liiiXDcSvoIclSod6mzrYYdzV1wSo/C/N5fnh48\n\t46bgp9+pYJi6KVZXGVrGstaK3A0S3uateZdXDX18=","Date":"Thu, 21 Sep 2017 10:38:40 +0200","From":"Simon Horman ","To":"Geert Uytterhoeven ","Cc":"Chris Paterson ,\n\tRob Herring , Mark Rutland ,\n\tMagnus Damm ,\n\tRussell King , \n\tFabrizio Castro ,\n\t\"devicetree@vger.kernel.org\" ,\n\tLinux-Renesas ,\n\t\"linux-arm-kernel@lists.infradead.org\" \n\t","Subject":"Re: [PATCH 4/8] ARM: dts: iwg22d: Enable SDHI0 controller","Message-ID":"<20170921083839.GH15749@verge.net.au>","References":"<1505322341-9480-1-git-send-email-chris.paterson2@renesas.com>\n\t<1505322341-9480-5-git-send-email-chris.paterson2@renesas.com>\n\t","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"","Organisation":"Horms Solutions BV","User-Agent":"Mutt/1.5.23 (2014-03-12)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1772551,"web_url":"http://patchwork.ozlabs.org/comment/1772551/","msgid":"<20170921083920.GI15749@verge.net.au>","list_archive_url":null,"date":"2017-09-21T08:39:21","subject":"Re: [PATCH 5/8] ARM: dts: r8a7743: Add QSPI support","submitter":{"id":106,"url":"http://patchwork.ozlabs.org/api/people/106/","name":"Simon Horman","email":"horms@verge.net.au"},"content":"On Tue, Sep 19, 2017 at 05:09:47PM +0200, Geert Uytterhoeven wrote:\n> On Wed, Sep 13, 2017 at 7:05 PM, Chris Paterson\n> wrote:\n> > From: Fabrizio Castro \n> >\n> > Add the DT node for the QSPI interface to the SoC dtsi.\n> >\n> > Signed-off-by: Fabrizio Castro \n> > Signed-off-by: Chris Paterson \n> \n> Reviewed-by: Geert Uytterhoeven \n\nThanks, applied.\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=verge.net.au header.i=@verge.net.au\n\theader.b=\"lCeMYqmJ\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xyVR52Rmsz9t3v\n\tfor ;\n\tThu, 21 Sep 2017 18:39:45 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751786AbdIUIjm (ORCPT\n\t);\n\tThu, 21 Sep 2017 04:39:42 -0400","from kirsty.vergenet.net ([202.4.237.240]:33080 \"EHLO\n\tkirsty.vergenet.net\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751635AbdIUIjl (ORCPT\n\t); Thu, 21 Sep 2017 04:39:41 -0400","from penelope.horms.nl (unknown [217.111.208.18])\n\tby kirsty.vergenet.net (Postfix) with ESMTPA id ECB2625AD59;\n\tThu, 21 Sep 2017 18:39:39 +1000 (AEST)","by penelope.horms.nl (Postfix, from userid 7100)\n\tid A4034E23487; Thu, 21 Sep 2017 04:39:21 -0400 (EDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; \n\tt=1505983180; bh=lnDor8x4FQ5Ta0iOfIfBiW/yLqL8F1fK4IZpT8Oec54=;\n\th=Date:From:To:Cc:Subject:References:In-Reply-To:From;\n\tb=lCeMYqmJP7ghZaUh+/p/mAVhdlT4VvTezeEXAwdyTh30RSt/sLyt4acwvekK9zayn\n\tImRv9OX+w9eKLdHlYzqB7X/IK16+8bbnBtjGc7+BvtDbuwOcCtw5d39E+MBMqHka4Y\n\tPXta2JvcREXtg9Q8OEvhsW7xoCKTKtJRYBZaz9ds=","Date":"Thu, 21 Sep 2017 10:39:21 +0200","From":"Simon Horman ","To":"Geert Uytterhoeven ","Cc":"Chris Paterson ,\n\tRob Herring , Mark Rutland ,\n\tMagnus Damm ,\n\tRussell King , \n\tFabrizio Castro ,\n\t\"devicetree@vger.kernel.org\" ,\n\tLinux-Renesas ,\n\t\"linux-arm-kernel@lists.infradead.org\" \n\t","Subject":"Re: [PATCH 5/8] ARM: dts: r8a7743: Add QSPI support","Message-ID":"<20170921083920.GI15749@verge.net.au>","References":"<1505322341-9480-1-git-send-email-chris.paterson2@renesas.com>\n\t<1505322341-9480-6-git-send-email-chris.paterson2@renesas.com>\n\t","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"","Organisation":"Horms Solutions BV","User-Agent":"Mutt/1.5.23 (2014-03-12)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1772555,"web_url":"http://patchwork.ozlabs.org/comment/1772555/","msgid":"<20170921084107.GJ15749@verge.net.au>","list_archive_url":null,"date":"2017-09-21T08:41:07","subject":"Re: [PATCH 6/8] ARM: dts: iwg20m: Add SPI NOR support","submitter":{"id":106,"url":"http://patchwork.ozlabs.org/api/people/106/","name":"Simon Horman","email":"horms@verge.net.au"},"content":"On Fri, Sep 15, 2017 at 03:12:04PM +0000, Chris Paterson wrote:\n> Hello Simon,\n> \n> > From: devicetree-owner@vger.kernel.org [mailto:devicetree-\n> > owner@vger.kernel.org] On Behalf Of Simon Horman\n> > Sent: 15 September 2017 09:35\n> > \n> > On Wed, Sep 13, 2017 at 06:05:39PM +0100, Chris Paterson wrote:\n> > > From: Fabrizio Castro \n> > >\n> > > Add support for the SPI NOR device used to boot up the system to the\n> > > System on Module DT.\n> > >\n> > > Signed-off-by: Fabrizio Castro \n> > > Signed-off-by: Chris Paterson \n> > > ---\n> > > This patch is based on renesas-devel-20170913-v4.13.\n> > >\n> > > This patch is dependant on:\n> > > - \"of: add vendor prefix for Silicon Storage Technology Inc.\"\n> > > - \"doc: dt: mtd: Add sst25vf016b to the list of supported chip names\"\n> > >\n> > >\n> > > arch/arm/boot/dts/r8a7743-iwg20m.dtsi | 26\n> > ++++++++++++++++++++++++++\n> > > 1 file changed, 26 insertions(+)\n> > >\n> > > diff --git a/arch/arm/boot/dts/r8a7743-iwg20m.dtsi\n> > > b/arch/arm/boot/dts/r8a7743-iwg20m.dtsi\n> > > index 4119737..75a8ca5 100644\n> > > --- a/arch/arm/boot/dts/r8a7743-iwg20m.dtsi\n> > > +++ b/arch/arm/boot/dts/r8a7743-iwg20m.dtsi\n> > > @@ -44,6 +44,11 @@\n> > > \t\tfunction = \"mmc\";\n> > > \t};\n> > >\n> > > +\tqspi_pins: qspi {\n> > > +\t\tgroups = \"qspi_ctrl\", \"qspi_data2\";\n> > > +\t\tfunction = \"qspi\";\n> > > +\t};\n> > > +\n> > > \tsdhi0_pins: sd0 {\n> > > \t\tgroups = \"sdhi0_data4\", \"sdhi0_ctrl\";\n> > > \t\tfunction = \"sdhi0\";\n> > > @@ -61,6 +66,27 @@\n> > > \tstatus = \"okay\";\n> > > };\n> > >\n> > > +&qspi {\n> > > +\tpinctrl-0 = <&qspi_pins>;\n> > > +\tpinctrl-names = \"default\";\n> > > +\n> > > +\tstatus = \"okay\";\n> > > +\n> > > +\t/* WARNING - This device contains the bootloader. Handle with care.\n> > */\n> > > +\tflash: flash@0 {\n> > > +\t\t#address-cells = <1>;\n> > > +\t\t#size-cells = <1>;\n> > > +\t\tcompatible = \"sst,sst25vf016b\", \"jedec,spi-nor\";\n> > > +\t\treg = <0>;\n> > > +\t\tspi-max-frequency = <50000000>;\n> > > +\t\tspi-tx-bus-width = <1>;\n> > > +\t\tspi-rx-bus-width = <1>;\n> > > +\t\tm25p,fast-read;\n> > > +\t\tspi-cpol;\n> > > +\t\tspi-cpha;\n> > > +\t};\n> > \n> > Does the device have partitions?\n> > If so, should they be described here?\n> \n> We aren't confident that all devices will come with the same partitions, so decided not to add any here.\n\nThanks for the clarification, applied with Geert's tag.\n\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=verge.net.au header.i=@verge.net.au\n\theader.b=\"ndR4MwwE\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xyVT46LG8z9t3w\n\tfor ;\n\tThu, 21 Sep 2017 18:41:28 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751854AbdIUIl1 (ORCPT\n\t);\n\tThu, 21 Sep 2017 04:41:27 -0400","from kirsty.vergenet.net ([202.4.237.240]:33127 \"EHLO\n\tkirsty.vergenet.net\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751606AbdIUIl0 (ORCPT\n\t); Thu, 21 Sep 2017 04:41:26 -0400","from penelope.horms.nl (unknown [217.111.208.18])\n\tby kirsty.vergenet.net (Postfix) with ESMTPA id D266C25AD59;\n\tThu, 21 Sep 2017 18:41:24 +1000 (AEST)","by penelope.horms.nl (Postfix, from userid 7100)\n\tid 97AD8E23487; Thu, 21 Sep 2017 04:41:07 -0400 (EDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; \n\tt=1505983285; bh=6M/7bryBTdsbv9Ckafdx0CRqn9Mp2zRYSfKECDhqgdA=;\n\th=Date:From:To:Cc:Subject:References:In-Reply-To:From;\n\tb=ndR4MwwEAc50s5byfRy09Hji5020bObeFTm/HDdVFyuQbJKjQpYKGAXSZsMHlckCJ\n\tmT++2PXQGXSR4Y7bbtEk6F60/kgmQqC3bteyO+OPSzCDM4u/hJdeHdVM2pGB4IaM4F\n\tyuaEAsgR6W/xDTkiLUXnfxSvnTrQeOpKiPiAeMKE=","Date":"Thu, 21 Sep 2017 10:41:07 +0200","From":"Simon Horman ","To":"Chris Paterson ","Cc":"Rob Herring , Mark Rutland ,\n\tMagnus Damm ,\n\tRussell King , \n\tFabrizio Castro ,\n\t\"devicetree@vger.kernel.org\" ,\n\t\"linux-renesas-soc@vger.kernel.org\" , \n\t\"linux-arm-kernel@lists.infradead.org\" \n\t","Subject":"Re: [PATCH 6/8] ARM: dts: iwg20m: Add SPI NOR support","Message-ID":"<20170921084107.GJ15749@verge.net.au>","References":"<1505322341-9480-1-git-send-email-chris.paterson2@renesas.com>\n\t<1505322341-9480-7-git-send-email-chris.paterson2@renesas.com>\n\t<20170915083517.GJ3924@verge.net.au>\n\t","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"","Organisation":"Horms Solutions BV","User-Agent":"Mutt/1.5.23 (2014-03-12)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1772559,"web_url":"http://patchwork.ozlabs.org/comment/1772559/","msgid":"<20170921084219.GK15749@verge.net.au>","list_archive_url":null,"date":"2017-09-21T08:42:20","subject":"Re: [PATCH 4/8] ARM: dts: iwg22d: Enable SDHI0 controller","submitter":{"id":106,"url":"http://patchwork.ozlabs.org/api/people/106/","name":"Simon Horman","email":"horms@verge.net.au"},"content":"On Thu, Sep 21, 2017 at 10:38:40AM +0200, Simon Horman wrote:\n> On Wed, Sep 20, 2017 at 01:40:20PM +0200, Geert Uytterhoeven wrote:\n> > On Wed, Sep 13, 2017 at 7:05 PM, Chris Paterson\n> > wrote:\n> > > From: Fabrizio Castro \n> > >\n> > > Enable the SDHI0 controller on iWave RZ/G1E carrier board.\n> > >\n> > > Signed-off-by: Fabrizio Castro \n> > > Signed-off-by: Chris Paterson \n> > \n> > Reviewed-by: Geert Uytterhoeven \n> \n> Thanks, applied.\n\nSorry, I somehow overlooked Fabrizio's comments.\nI have dropped this patch for now.\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=verge.net.au header.i=@verge.net.au\n\theader.b=\"l9h+9j8y\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xyVVZ1qn0z9t3w\n\tfor ;\n\tThu, 21 Sep 2017 18:42:46 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1752004AbdIUImm (ORCPT\n\t);\n\tThu, 21 Sep 2017 04:42:42 -0400","from kirsty.vergenet.net ([202.4.237.240]:33160 \"EHLO\n\tkirsty.vergenet.net\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751649AbdIUImk (ORCPT\n\t); Thu, 21 Sep 2017 04:42:40 -0400","from penelope.horms.nl (unknown [217.111.208.18])\n\tby kirsty.vergenet.net (Postfix) with ESMTPA id E2DAC25AD59;\n\tThu, 21 Sep 2017 18:42:37 +1000 (AEST)","by penelope.horms.nl (Postfix, from userid 7100)\n\tid A11C4E23487; Thu, 21 Sep 2017 04:42:20 -0400 (EDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; \n\tt=1505983358; bh=a79/al4MmgK0LHIICxTbj8V6JaIHtBnlUUr1cEMvKJY=;\n\th=Date:From:To:Cc:Subject:References:In-Reply-To:From;\n\tb=l9h+9j8y9PYH+1LnFraxEiMjajflO8gT3ImYUIX15wYQo92r8A17CnCeo3s72b8ir\n\tAVCBJqx81L5EXW9q21tDCaNg5Vh1Ums9oDUsyxs44imeGZFbd/k5Yndhcb3LyYQlZU\n\t22Thm6/m5hkAqQUEFGWCgP8o9FmyXrNkcFEUa+Qo=","Date":"Thu, 21 Sep 2017 10:42:20 +0200","From":"Simon Horman ","To":"Geert Uytterhoeven ","Cc":"Chris Paterson ,\n\tRob Herring , Mark Rutland ,\n\tMagnus Damm ,\n\tRussell King , \n\tFabrizio Castro ,\n\t\"devicetree@vger.kernel.org\" ,\n\tLinux-Renesas ,\n\t\"linux-arm-kernel@lists.infradead.org\" \n\t","Subject":"Re: [PATCH 4/8] ARM: dts: iwg22d: Enable SDHI0 controller","Message-ID":"<20170921084219.GK15749@verge.net.au>","References":"<1505322341-9480-1-git-send-email-chris.paterson2@renesas.com>\n\t<1505322341-9480-5-git-send-email-chris.paterson2@renesas.com>\n\t\n\t<20170921083839.GH15749@verge.net.au>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20170921083839.GH15749@verge.net.au>","Organisation":"Horms Solutions BV","User-Agent":"Mutt/1.5.23 (2014-03-12)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1772562,"web_url":"http://patchwork.ozlabs.org/comment/1772562/","msgid":"<20170921084505.GL15749@verge.net.au>","list_archive_url":null,"date":"2017-09-21T08:45:06","subject":"Re: [PATCH 7/8] ARM: dts: r8a7745: Add QSPI support","submitter":{"id":106,"url":"http://patchwork.ozlabs.org/api/people/106/","name":"Simon Horman","email":"horms@verge.net.au"},"content":"On Tue, Sep 19, 2017 at 05:10:06PM +0200, Geert Uytterhoeven wrote:\n> On Wed, Sep 13, 2017 at 7:05 PM, Chris Paterson\n> wrote:\n> > From: Fabrizio Castro \n> >\n> > Add the DT node for the QSPI interface to the SoC dtsi.\n> >\n> > Signed-off-by: Fabrizio Castro \n> > Signed-off-by: Chris Paterson \n> \n> Reviewed-by: Geert Uytterhoeven \n\nThanks, applied.\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=verge.net.au header.i=@verge.net.au\n\theader.b=\"PgsQk4nh\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xyVYj0Nrsz9t3w\n\tfor ;\n\tThu, 21 Sep 2017 18:45:29 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751581AbdIUIp2 (ORCPT\n\t);\n\tThu, 21 Sep 2017 04:45:28 -0400","from kirsty.vergenet.net ([202.4.237.240]:33229 \"EHLO\n\tkirsty.vergenet.net\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1750912AbdIUIp1 (ORCPT\n\t); Thu, 21 Sep 2017 04:45:27 -0400","from penelope.horms.nl (unknown [217.111.208.18])\n\tby kirsty.vergenet.net (Postfix) with ESMTPA id 6E8AE25AD59;\n\tThu, 21 Sep 2017 18:45:25 +1000 (AEST)","by penelope.horms.nl (Postfix, from userid 7100)\n\tid 3BA0FE23487; Thu, 21 Sep 2017 04:45:06 -0400 (EDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; \n\tt=1505983525; bh=hx7xJlXtP8lz7qrCDDGOkoLkRIkANShG8ABzeVliCPE=;\n\th=Date:From:To:Cc:Subject:References:In-Reply-To:From;\n\tb=PgsQk4nh1+o+nXLGOD/WpILaeXZ3BY7gj0GWEZp+QIyL/WSBQVoxPvayQS0V19IU9\n\t8H3KW9rhudHC1ULCwuHMaw7lBJQS4AF4uwIAVIyKcyO25a/fZ1aYHUQw6+GD+xv2du\n\tlq6WwKMJco2W2QFdAZl78r/BcW9/pu164j8yFVX0=","Date":"Thu, 21 Sep 2017 10:45:06 +0200","From":"Simon Horman ","To":"Geert Uytterhoeven ","Cc":"Chris Paterson ,\n\tRob Herring , Mark Rutland ,\n\tMagnus Damm ,\n\tRussell King , \n\tFabrizio Castro ,\n\t\"devicetree@vger.kernel.org\" ,\n\tLinux-Renesas ,\n\t\"linux-arm-kernel@lists.infradead.org\" \n\t","Subject":"Re: [PATCH 7/8] ARM: dts: r8a7745: Add QSPI support","Message-ID":"<20170921084505.GL15749@verge.net.au>","References":"<1505322341-9480-1-git-send-email-chris.paterson2@renesas.com>\n\t<1505322341-9480-8-git-send-email-chris.paterson2@renesas.com>\n\t","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"","Organisation":"Horms Solutions BV","User-Agent":"Mutt/1.5.23 (2014-03-12)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1772565,"web_url":"http://patchwork.ozlabs.org/comment/1772565/","msgid":"<20170921084744.GM15749@verge.net.au>","list_archive_url":null,"date":"2017-09-21T08:47:45","subject":"Re: [PATCH 8/8] ARM: drs: iwg22m: Add SPI NOR support","submitter":{"id":106,"url":"http://patchwork.ozlabs.org/api/people/106/","name":"Simon Horman","email":"horms@verge.net.au"},"content":"On Wed, Sep 20, 2017 at 01:10:00PM +0200, Geert Uytterhoeven wrote:\n> On Wed, Sep 13, 2017 at 7:05 PM, Chris Paterson\n> wrote:\n> > From: Fabrizio Castro \n> >\n> > Add support for the SPI NOR device used to boot up the system\n> > to the System on Module DT.\n> >\n> > Signed-off-by: Fabrizio Castro \n> > Signed-off-by: Chris Paterson \n> \n> With the subject fixed (s/drs/dts/):\n> Reviewed-by: Geert Uytterhoeven \n\nThanks, applied as\n\nARM: dts: iwg22m: Add SPI NOR support\n\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=verge.net.au header.i=@verge.net.au\n\theader.b=\"ED1XSNsU\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xyVdC3zxjz9s7g\n\tfor ;\n\tThu, 21 Sep 2017 18:48:31 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751649AbdIUIsa (ORCPT\n\t);\n\tThu, 21 Sep 2017 04:48:30 -0400","from kirsty.vergenet.net ([202.4.237.240]:33280 \"EHLO\n\tkirsty.vergenet.net\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751581AbdIUIs3 (ORCPT\n\t); Thu, 21 Sep 2017 04:48:29 -0400","from penelope.horms.nl (unknown [217.111.208.18])\n\tby kirsty.vergenet.net (Postfix) with ESMTPA id AE48825AD59;\n\tThu, 21 Sep 2017 18:48:27 +1000 (AEST)","by penelope.horms.nl (Postfix, from userid 7100)\n\tid 45EE7E23487; Thu, 21 Sep 2017 04:47:45 -0400 (EDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; \n\tt=1505983708; bh=UNEr3Cdl5AKpTjQu3M89eDM2PjL1+QQ7LQ/4vek3raU=;\n\th=Date:From:To:Cc:Subject:References:In-Reply-To:From;\n\tb=ED1XSNsUB/jzV74CfAAwawzS8punx9ebKnIv4AqWGnoETFOpcEI3Xw7meLZXEZyD4\n\tdN+dgBb9rZJIhsvBXbbk0FQvFKJxI2gKgufiKlLDCHXmgdFPjUVZSJrGrQ1yGHxjH9\n\tEGjtG130N2SkspXo+WxfepcHc1ikynv7ujXI9YG0=","Date":"Thu, 21 Sep 2017 10:47:45 +0200","From":"Simon Horman ","To":"Geert Uytterhoeven ","Cc":"Chris Paterson ,\n\tRob Herring , Mark Rutland ,\n\tMagnus Damm ,\n\tRussell King , \n\tFabrizio Castro ,\n\t\"devicetree@vger.kernel.org\" ,\n\tLinux-Renesas ,\n\t\"linux-arm-kernel@lists.infradead.org\" \n\t","Subject":"Re: [PATCH 8/8] ARM: drs: iwg22m: Add SPI NOR support","Message-ID":"<20170921084744.GM15749@verge.net.au>","References":"<1505322341-9480-1-git-send-email-chris.paterson2@renesas.com>\n\t<1505322341-9480-9-git-send-email-chris.paterson2@renesas.com>\n\t","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"","Organisation":"Horms Solutions BV","User-Agent":"Mutt/1.5.23 (2014-03-12)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}}]