[{"id":1770643,"web_url":"http://patchwork.ozlabs.org/comment/1770643/","msgid":"<6b051916-c49f-f9d0-81d8-05f857e4672e@codeaurora.org>","list_archive_url":null,"date":"2017-09-19T04:31:03","subject":"Re: [PATCH v2 0/3] arm-smmu: performance optimization","submitter":{"id":69609,"url":"http://patchwork.ozlabs.org/api/people/69609/","name":"Nate Watterson","email":"nwatters@codeaurora.org"},"content":"Hi Leizhen,\n\nOn 9/12/2017 9:00 AM, Zhen Lei wrote:\n> v1 -> v2:\n> base on (add02cfdc9bc2 \"iommu: Introduce Interface for IOMMU TLB Flushing\")\n> \n> Zhen Lei (3):\n> iommu/arm-smmu-v3: put off the execution of TLBI* to reduce lock\n> confliction\n> iommu/arm-smmu-v3: add support for unmap an iova range with only one\n> tlb sync\n\nI tested these (2) patches on QDF2400 hardware and saw performance\nimprovements in line with those I reported when testing the original\nseries. I don't have any hardware close at hand to test the 3rd patch\nin the series so that will have to come from someone else.\n\nTested-by: Nate Watterson \n\nThanks,\nNate\n\n> iommu/arm-smmu: add support for unmap a memory range with only one tlb\n> sync\n> \n> drivers/iommu/arm-smmu-v3.c | 52 ++++++++++++++++++++++++++++++++++----\n> drivers/iommu/arm-smmu.c | 10 ++++++++\n> drivers/iommu/io-pgtable-arm-v7s.c | 32 +++++++++++++++--------\n> drivers/iommu/io-pgtable-arm.c | 30 ++++++++++++++--------\n> drivers/iommu/io-pgtable.h | 1 +\n> 5 files changed, 99 insertions(+), 26 deletions(-)\n>","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; 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a=rsa-sha256; c=relaxed/simple; d=codeaurora.org;\n\ts=default; t=1505795465;\n\tbh=0r5VC+0H9tlAO5LXNNfGh/UW7kI885lBWYbkqWoI1HA=;\n\th=Subject:To:Cc:References:From:Date:In-Reply-To:From;\n\tb=FULAko33z5P01q58mGeu7nMCgTpDJyHLVzIOQwxnJpH/cszoYkLeT5khMc2/xm0YQ\n\tOXoZ6jESlrT89Q6dmLf58mdm+TxYAoRorBUxrJsf1TNauX6mnziKDaz4BpJmXjYgYh\n\tVUJxsuVIZdncoAAYxlU6FeG61dzbRQeCmimi2Sgg=","v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org;\n\ts=default; t=1505795465;\n\tbh=0r5VC+0H9tlAO5LXNNfGh/UW7kI885lBWYbkqWoI1HA=;\n\th=Subject:To:Cc:References:From:Date:In-Reply-To:From;\n\tb=FULAko33z5P01q58mGeu7nMCgTpDJyHLVzIOQwxnJpH/cszoYkLeT5khMc2/xm0YQ\n\tOXoZ6jESlrT89Q6dmLf58mdm+TxYAoRorBUxrJsf1TNauX6mnziKDaz4BpJmXjYgYh\n\tVUJxsuVIZdncoAAYxlU6FeG61dzbRQeCmimi2Sgg="],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tpdx-caf-mail.web.codeaurora.org","X-Spam-Level":"","X-Spam-Status":"No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00,\n\tDKIM_SIGNED,\n\tT_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0","DMARC-Filter":"OpenDMARC Filter v1.3.2 smtp.codeaurora.org 2E8A0601C4","Subject":"Re: [PATCH v2 0/3] arm-smmu: performance optimization","To":"Zhen Lei , Will Deacon ,\n\tJoerg Roedel ,\n\tlinux-arm-kernel ,\n\tiommu , Robin Murphy\n\t, linux-kernel ","References":"<1505221238-9428-1-git-send-email-thunder.leizhen@huawei.com>","From":"Nate Watterson ","Message-ID":"<6b051916-c49f-f9d0-81d8-05f857e4672e@codeaurora.org>","Date":"Tue, 19 Sep 2017 00:31:03 -0400","User-Agent":"Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) Gecko/20100101\n\tThunderbird/52.3.0","MIME-Version":"1.0","In-Reply-To":"<1505221238-9428-1-git-send-email-thunder.leizhen@huawei.com>","Content-Language":"en-US","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170918_213126_555445_213A95B8 ","X-CRM114-Status":"GOOD ( 12.30 )","X-Spam-Score":"-4.3 (----)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-4.3 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/,\n\tmedium trust [198.145.29.96 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t-0.1 DKIM_VALID Message has at least one valid DKIM or DK signature\n\t0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n\tnot necessarily valid\n\t-0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n\tauthor's domain","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Jinyue Li , Kefeng Wang ,\n\tLibin , Hanjun Guo ","Content-Transfer-Encoding":"7bit","Content-Type":"text/plain; charset=\"us-ascii\"; Format=\"flowed\"","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1770680,"web_url":"http://patchwork.ozlabs.org/comment/1770680/","msgid":"<59C0B8AD.4010201@huawei.com>","list_archive_url":null,"date":"2017-09-19T06:26:53","subject":"Re: [PATCH v2 0/3] arm-smmu: performance optimization","submitter":{"id":67123,"url":"http://patchwork.ozlabs.org/api/people/67123/","name":"Zhen Lei","email":"thunder.leizhen@huawei.com"},"content":"On 2017/9/19 12:31, Nate Watterson wrote:\n> Hi Leizhen,\n> \n> On 9/12/2017 9:00 AM, Zhen Lei wrote:\n>> v1 -> v2:\n>> base on (add02cfdc9bc2 \"iommu: Introduce Interface for IOMMU TLB Flushing\")\n>>\n>> Zhen Lei (3):\n>> iommu/arm-smmu-v3: put off the execution of TLBI* to reduce lock\n>> confliction\n>> iommu/arm-smmu-v3: add support for unmap an iova range with only one\n>> tlb sync\n> \n> I tested these (2) patches on QDF2400 hardware and saw performance\n> improvements in line with those I reported when testing the original\n> series. I don't have any hardware close at hand to test the 3rd patch\n> in the series so that will have to come from someone else.\nThanks a lot.\n\n> \n> Tested-by: Nate Watterson \n> \n> Thanks,\n> Nate\n> \n>> iommu/arm-smmu: add support for unmap a memory range with only one tlb\n>> sync\n>>\n>> drivers/iommu/arm-smmu-v3.c | 52 ++++++++++++++++++++++++++++++++++----\n>> drivers/iommu/arm-smmu.c | 10 ++++++++\n>> drivers/iommu/io-pgtable-arm-v7s.c | 32 +++++++++++++++--------\n>> drivers/iommu/io-pgtable-arm.c | 30 ++++++++++++++--------\n>> drivers/iommu/io-pgtable.h | 1 +\n>> 5 files changed, 99 insertions(+), 26 deletions(-)\n>>\n>","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; 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Tue, 19 Sep 2017 14:27:49 +0800 (CST)","from [127.0.0.1] (10.177.23.164) by DGGEMS413-HUB.china.huawei.com\n\t(10.3.19.213) with Microsoft SMTP Server id 14.3.301.0;\n\tTue, 19 Sep 2017 14:27:38 +0800"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:\n\tMessage-ID:From:References:To:Subject:Reply-To:Content-ID:Content-Description\n\t:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=Iz/5ciaLJ1iotP3Ov1OayigM9vvxspHzsEvUw3ArbRg=;\n\tb=pq/m2NpOIbA/1i\n\t0b4+mVDPZCw50FPV8P4oNwN/lPHvmcI/d5Db3z/HpLJ97G+xtMt/no85ja9Ohp0mushHyAvvUSUy5\n\tefm0OHA4J6T05KnPqEXJ/bKTeC/q7iLMU54nEwkglOlvYBqBD3g5wF+FusOrn3abgTonX8ODRh8qq\n\tbCbvXRp6looUjbPcanwk3afUk076G7dzNK6eu232DMhRok/Z/p6Af41dqvKa92q+JX8OvfvxwIkwz\n\tmiCAOmoXVr4PdrnzbIAPX0/Ugj3PBamtZo4oV0TuSz4Jk1gNVuMwfiNmWjo+6+ZLoIOr2GHbf3eB8\n\t4IdJYjD7f8/OftqzOKnA==;","Subject":"Re: [PATCH v2 0/3] arm-smmu: performance optimization","To":"Nate Watterson , Will Deacon\n\t, Joerg Roedel , linux-arm-kernel\n\t, iommu\n\t, Robin Murphy , \n\tlinux-kernel ","References":"<1505221238-9428-1-git-send-email-thunder.leizhen@huawei.com>\n\t<6b051916-c49f-f9d0-81d8-05f857e4672e@codeaurora.org>","From":"\"Leizhen (ThunderTown)\" ","Message-ID":"<59C0B8AD.4010201@huawei.com>","Date":"Tue, 19 Sep 2017 14:26:53 +0800","User-Agent":"Mozilla/5.0 (Windows NT 6.1; WOW64; rv:38.0) Gecko/20100101\n\tThunderbird/38.5.1","MIME-Version":"1.0","In-Reply-To":"<6b051916-c49f-f9d0-81d8-05f857e4672e@codeaurora.org>","X-Originating-IP":"[10.177.23.164]","X-CFilter-Loop":"Reflected","X-Mirapoint-Virus-RAPID-Raw":"score=unknown(0),\n\trefid=str=0001.0A090201.59C0B8E5.0056, ss=1, re=0.000, recu=0.000,\n\treip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0,\n\tso=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32","X-Mirapoint-Loop-Id":"bf1150b0e65fca757f9206d03ee2980a","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170918_232821_226334_5B25581C ","X-CRM114-Status":"GOOD ( 10.81 )","X-Spam-Score":"-1.9 (-)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-1.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Jinyue Li , Kefeng Wang ,\n\tLibin , Hanjun Guo ","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1789524,"web_url":"http://patchwork.ozlabs.org/comment/1789524/","msgid":"<20171018125849.GD4077@arm.com>","list_archive_url":null,"date":"2017-10-18T12:58:49","subject":"Re: [PATCH v2 1/3] iommu/arm-smmu-v3: put off the execution of TLBI*\n\tto reduce lock confliction","submitter":{"id":7916,"url":"http://patchwork.ozlabs.org/api/people/7916/","name":"Will Deacon","email":"will.deacon@arm.com"},"content":"Hi Thunder,\n\nOn Tue, Sep 12, 2017 at 09:00:36PM +0800, Zhen Lei wrote:\n> Because all TLBI commands should be followed by a SYNC command, to make\n> sure that it has been completely finished. So we can just add the TLBI\n> commands into the queue, and put off the execution until meet SYNC or\n> other commands. To prevent the followed SYNC command waiting for a long\n> time because of too many commands have been delayed, restrict the max\n> delayed number.\n> \n> According to my test, I got the same performance data as I replaced writel\n> with writel_relaxed in queue_inc_prod.\n> \n> Signed-off-by: Zhen Lei \n> ---\n> drivers/iommu/arm-smmu-v3.c | 42 +++++++++++++++++++++++++++++++++++++-----\n> 1 file changed, 37 insertions(+), 5 deletions(-)\n\nIf we want to go down the route of explicit command batching, I'd much\nrather do it by implementing the iotlb_range_add callback in the driver,\nand have a fixed-length array of batched ranges on the domain. We could\npotentially toggle this function pointer based on the compatible string too,\nif it shows only to benefit some systems.\n\nWill","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"d72YHP/m\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yHBxX3PW4z9t4c\n\tfor ;\n\tThu, 19 Oct 2017 00:00:32 +1100 (AEDT)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e4nxU-0007va-8v; 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bh=azBPdmmU6c8TDO/zvKW3kK3HCwJwzLYcxlYWpCjnQBo=;\n\tb=d72YHP/mLWr2Tw\n\tCK1OiUvuZpzMBrbns0yCPHzCQsVJUnHv+X8NyiESctDLSQvqU1ts66ZQAGOEkQ/DkiDq3QGCumVVR\n\tzD6BLA+QfPSQSHgYXtXO84mP1ORyB9dfhLrccW3ZthZXzyy5tEoG4wXEdXYBtkJ/89ySUCza5N3K4\n\tJVpe2r6aKTVlp+KWJdcmD1lh+KPfcr8j9CI1eW86QoRaH5sA+okGong561r2CZhj3MkohimHbkeo1\n\tRnV5pxP8TAWT0fk42KElZiGee9nh8Ht/qpE6FhU3amJayjfgpCoPsV+cLHpZs6tBKmbIzat1NwtVu\n\tGWvqMUXBFaHWDcqybPfw==;","Date":"Wed, 18 Oct 2017 13:58:49 +0100","From":"Will Deacon ","To":"Zhen Lei ","Subject":"Re: [PATCH v2 1/3] iommu/arm-smmu-v3: put off the execution of TLBI*\n\tto reduce lock confliction","Message-ID":"<20171018125849.GD4077@arm.com>","References":"<1505221238-9428-1-git-send-email-thunder.leizhen@huawei.com>\n\t<1505221238-9428-2-git-send-email-thunder.leizhen@huawei.com>","MIME-Version":"1.0","Content-Disposition":"inline","In-Reply-To":"<1505221238-9428-2-git-send-email-thunder.leizhen@huawei.com>","User-Agent":"Mutt/1.5.23 (2014-03-12)","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20171018_055906_035568_1708C1B5 ","X-CRM114-Status":"GOOD ( 14.59 )","X-Spam-Score":"-6.9 (------)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-6.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/,\n\thigh trust [217.140.101.70 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Kefeng Wang , Joerg Roedel ,\n\tlinux-kernel ,\n\tJinyue Li , \n\tiommu ,\n\tLibin , \n\tHanjun Guo , Robin Murphy ,\n\tlinux-arm-kernel ","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1789532,"web_url":"http://patchwork.ozlabs.org/comment/1789532/","msgid":"<20171018130003.GE4077@arm.com>","list_archive_url":null,"date":"2017-10-18T13:00:03","subject":"Re: [PATCH v2 2/3] iommu/arm-smmu-v3: add support for unmap an iova\n\trange with only one tlb sync","submitter":{"id":7916,"url":"http://patchwork.ozlabs.org/api/people/7916/","name":"Will Deacon","email":"will.deacon@arm.com"},"content":"On Tue, Sep 12, 2017 at 09:00:37PM +0800, Zhen Lei wrote:\n> This patch is base on: \n> (add02cfdc9bc2 \"iommu: Introduce Interface for IOMMU TLB Flushing\")\n> \n> Because iotlb_sync is moved out of \".unmap = arm_smmu_unmap\", some interval\n> \".unmap\" calls should explicitly followed by a iotlb_sync operation.\n> \n> Signed-off-by: Zhen Lei \n> ---\n> drivers/iommu/arm-smmu-v3.c | 10 ++++++++++\n> drivers/iommu/io-pgtable-arm.c | 30 ++++++++++++++++++++----------\n> drivers/iommu/io-pgtable.h | 1 +\n> 3 files changed, 31 insertions(+), 10 deletions(-)\n> \n> diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c\n> index ef42c4b..e92828e 100644\n> --- a/drivers/iommu/arm-smmu-v3.c\n> +++ b/drivers/iommu/arm-smmu-v3.c\n> @@ -1772,6 +1772,15 @@ arm_smmu_unmap(struct iommu_domain *domain, unsigned long iova, size_t size)\n> \treturn ops->unmap(ops, iova, size);\n> }\n> \n> +static void arm_smmu_iotlb_sync(struct iommu_domain *domain)\n> +{\n> +\tstruct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);\n> +\tstruct io_pgtable_ops *ops = smmu_domain->pgtbl_ops;\n> +\n> +\tif (ops && ops->iotlb_sync)\n> +\t\tops->iotlb_sync(ops);\n> +}\n> +\n> static phys_addr_t\n> arm_smmu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova)\n> {\n> @@ -1991,6 +2000,7 @@ static struct iommu_ops arm_smmu_ops = {\n> \t.attach_dev\t\t= arm_smmu_attach_dev,\n> \t.map\t\t\t= arm_smmu_map,\n> \t.unmap\t\t\t= arm_smmu_unmap,\n> +\t.iotlb_sync\t\t= arm_smmu_iotlb_sync,\n> \t.map_sg\t\t\t= default_iommu_map_sg,\n> \t.iova_to_phys\t\t= arm_smmu_iova_to_phys,\n> \t.add_device\t\t= arm_smmu_add_device,\n> diff --git a/drivers/iommu/io-pgtable-arm.c b/drivers/iommu/io-pgtable-arm.c\n> index e8018a3..805efc9 100644\n> --- a/drivers/iommu/io-pgtable-arm.c\n> +++ b/drivers/iommu/io-pgtable-arm.c\n> @@ -304,6 +304,8 @@ static int arm_lpae_init_pte(struct arm_lpae_io_pgtable *data,\n> \t\tWARN_ON(!selftest_running);\n> \t\treturn -EEXIST;\n> \t} else if (iopte_type(pte, lvl) == ARM_LPAE_PTE_TYPE_TABLE) {\n> +\t\tsize_t unmapped;\n> +\n> \t\t/*\n> \t\t * We need to unmap and free the old table before\n> \t\t * overwriting it with a block entry.\n> @@ -312,7 +314,9 @@ static int arm_lpae_init_pte(struct arm_lpae_io_pgtable *data,\n> \t\tsize_t sz = ARM_LPAE_BLOCK_SIZE(lvl, data);\n> \n> \t\ttblp = ptep - ARM_LPAE_LVL_IDX(iova, lvl, data);\n> -\t\tif (WARN_ON(__arm_lpae_unmap(data, iova, sz, lvl, tblp) != sz))\n> +\t\tunmapped = __arm_lpae_unmap(data, iova, sz, lvl, tblp);\n> +\t\tio_pgtable_tlb_sync(&data->iop);\n> +\t\tif (WARN_ON(unmapped != sz))\n> \t\t\treturn -EINVAL;\n> \t}\n> \n> @@ -584,7 +588,6 @@ static int __arm_lpae_unmap(struct arm_lpae_io_pgtable *data,\n> \t\t\t/* Also flush any partial walks */\n> \t\t\tio_pgtable_tlb_add_flush(iop, iova, size,\n> \t\t\t\t\t\tARM_LPAE_GRANULE(data), false);\n> -\t\t\tio_pgtable_tlb_sync(iop);\n> \t\t\tptep = iopte_deref(pte, data);\n> \t\t\t__arm_lpae_free_pgtable(data, lvl + 1, ptep);\n> \t\t} else {\n> @@ -609,7 +612,6 @@ static int __arm_lpae_unmap(struct arm_lpae_io_pgtable *data,\n> static int arm_lpae_unmap(struct io_pgtable_ops *ops, unsigned long iova,\n> \t\t\t size_t size)\n> {\n> -\tsize_t unmapped;\n> \tstruct arm_lpae_io_pgtable *data = io_pgtable_ops_to_data(ops);\n> \tarm_lpae_iopte *ptep = data->pgd;\n> \tint lvl = ARM_LPAE_START_LVL(data);\n> @@ -617,11 +619,14 @@ static int arm_lpae_unmap(struct io_pgtable_ops *ops, unsigned long iova,\n> \tif (WARN_ON(iova >= (1ULL << data->iop.cfg.ias)))\n> \t\treturn 0;\n> \n> -\tunmapped = __arm_lpae_unmap(data, iova, size, lvl, ptep);\n> -\tif (unmapped)\n> -\t\tio_pgtable_tlb_sync(&data->iop);\n> +\treturn __arm_lpae_unmap(data, iova, size, lvl, ptep);\n> +}\n\nThis change is already queued in Joerg's tree, due to a patch from Robin.\n\nWill","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; 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charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1790066,"web_url":"http://patchwork.ozlabs.org/comment/1790066/","msgid":"<59E8155D.2070102@huawei.com>","list_archive_url":null,"date":"2017-10-19T03:00:45","subject":"Re: [PATCH v2 1/3] iommu/arm-smmu-v3: put off the execution of TLBI*\n\tto reduce lock confliction","submitter":{"id":67123,"url":"http://patchwork.ozlabs.org/api/people/67123/","name":"Zhen Lei","email":"thunder.leizhen@huawei.com"},"content":"On 2017/10/18 20:58, Will Deacon wrote:\n> Hi Thunder,\n> \n> On Tue, Sep 12, 2017 at 09:00:36PM +0800, Zhen Lei wrote:\n>> Because all TLBI commands should be followed by a SYNC command, to make\n>> sure that it has been completely finished. So we can just add the TLBI\n>> commands into the queue, and put off the execution until meet SYNC or\n>> other commands. To prevent the followed SYNC command waiting for a long\n>> time because of too many commands have been delayed, restrict the max\n>> delayed number.\n>>\n>> According to my test, I got the same performance data as I replaced writel\n>> with writel_relaxed in queue_inc_prod.\n>>\n>> Signed-off-by: Zhen Lei \n>> ---\n>> drivers/iommu/arm-smmu-v3.c | 42 +++++++++++++++++++++++++++++++++++++-----\n>> 1 file changed, 37 insertions(+), 5 deletions(-)\n> \n> If we want to go down the route of explicit command batching, I'd much\n> rather do it by implementing the iotlb_range_add callback in the driver,\n> and have a fixed-length array of batched ranges on the domain. We could\nI think even if iotlb_range_add callback is implemented, this patch is still valuable. The main purpose\nof this patch is to reduce dsb operation. So in the scenario with iotlb_range_add implemented:\n.iotlb_range_add:\nspin_lock_irqsave(&smmu->cmdq.lock, flags);\n...\nadd tlbi range-1 to cmq-queue\n...\nadd tlbi range-n to cmq-queue\t\t\t//n\ndsb\n...\nspin_unlock_irqrestore(&smmu->cmdq.lock, flags);\n\n.iotlb_sync\nspin_lock_irqsave(&smmu->cmdq.lock, flags);\n...\nadd cmd_sync to cmq-queue\ndsb\n...\nspin_unlock_irqrestore(&smmu->cmdq.lock, flags);\n\nAlthough iotlb_range_add can reduce n-1 dsb operations, but there are still 1 left. If n is not large enough,\nthis patch is helpful.\n\n\n> potentially toggle this function pointer based on the compatible string too,\n> if it shows only to benefit some systems.\n[\nOn 2017/9/19 12:31, Nate Watterson wrote:\nI tested these (2) patches on QDF2400 hardware and saw performance\nimprovements in line with those I reported when testing the original\nseries.\n]\n\nI'm not sure whether this patch can improve performance on QDF2400, because there are two patches. But at least\nit seems harmless, maybe the other hardware platforms are the same.\n\n> \n> Will\n> \n> .\n>","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"UQN4jMJs\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yHYcY36v8z9t4c\n\tfor ;\n\tThu, 19 Oct 2017 14:02:03 +1100 (AEDT)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e515r-0002eP-8S; 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bh=OoCwyqZHoTFtlSrlJCcxE43HGqkhubSxw69mqHfnhvY=;\n\tb=UQN4jMJsQZy6V5\n\tcJTbhaG50ZzBt+9UQrYx9F2m/cXa9Tq7LrxxUirtIz/VFVRT9zFo7VEnyFWRR58qqT4MWpn0v9pLI\n\toatItocXTCICqKDL85nvlH/ubvypTWuEols5nj+AMwGaifX72telJ6CjrMdAAQL+iU8/CfYiBWSgU\n\tZD5x338CE30bLC6m4/luTD60GBFN/c00YOtB/ksPtWfW+h1EJAwdiiJH9TzbjExNtje1d5Qswcndf\n\tZIXMPTx5xNe7XclpIJNbF5M2d3LssKHkB0m4plBN1uRZhSC3WpV1DlhDlw+43wltOXrTGZgf4C5uN\n\tfB+alWa8qa+VU5AQIjEw==;","Subject":"Re: [PATCH v2 1/3] iommu/arm-smmu-v3: put off the execution of TLBI*\n\tto reduce lock confliction","To":"Will Deacon ","References":"<1505221238-9428-1-git-send-email-thunder.leizhen@huawei.com>\n\t<1505221238-9428-2-git-send-email-thunder.leizhen@huawei.com>\n\t<20171018125849.GD4077@arm.com>","From":"\"Leizhen (ThunderTown)\" ","Message-ID":"<59E8155D.2070102@huawei.com>","Date":"Thu, 19 Oct 2017 11:00:45 +0800","User-Agent":"Mozilla/5.0 (Windows NT 6.1; WOW64; rv:38.0) Gecko/20100101\n\tThunderbird/38.5.1","MIME-Version":"1.0","In-Reply-To":"<20171018125849.GD4077@arm.com>","X-Originating-IP":"[10.177.23.164]","X-CFilter-Loop":"Reflected","X-Mirapoint-Virus-RAPID-Raw":"score=unknown(0),\n\trefid=str=0001.0A020204.59E81585.00F7, ss=1, re=0.000, recu=0.000,\n\treip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0,\n\tso=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32","X-Mirapoint-Loop-Id":"1fce624bdb2371485c5ddf412d1a56b7","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20171018_200155_832666_73EA49EB ","X-CRM114-Status":"GOOD ( 15.69 )","X-Spam-Score":"-1.9 (-)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-1.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/,\n\tno trust [45.249.212.190 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Kefeng Wang , Joerg Roedel ,\n\tlinux-kernel ,\n\tJinyue Li , \n\tiommu ,\n\tLibin , \n\tHanjun Guo , Robin Murphy ,\n\tlinux-arm-kernel ","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1790071,"web_url":"http://patchwork.ozlabs.org/comment/1790071/","msgid":"<59E81947.50307@huawei.com>","list_archive_url":null,"date":"2017-10-19T03:17:27","subject":"Re: [PATCH v2 2/3] iommu/arm-smmu-v3: add support for unmap an iova\n\trange with only one tlb sync","submitter":{"id":67123,"url":"http://patchwork.ozlabs.org/api/people/67123/","name":"Zhen Lei","email":"thunder.leizhen@huawei.com"},"content":"On 2017/10/18 21:00, Will Deacon wrote:\n> On Tue, Sep 12, 2017 at 09:00:37PM +0800, Zhen Lei wrote:\n>> This patch is base on: \n>> (add02cfdc9bc2 \"iommu: Introduce Interface for IOMMU TLB Flushing\")\n>>\n>> Because iotlb_sync is moved out of \".unmap = arm_smmu_unmap\", some interval\n>> \".unmap\" calls should explicitly followed by a iotlb_sync operation.\n>>\n>> Signed-off-by: Zhen Lei \n>> ---\n>> drivers/iommu/arm-smmu-v3.c | 10 ++++++++++\n>> drivers/iommu/io-pgtable-arm.c | 30 ++++++++++++++++++++----------\n>> drivers/iommu/io-pgtable.h | 1 +\n>> 3 files changed, 31 insertions(+), 10 deletions(-)\n>>\n>> diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c\n>> index ef42c4b..e92828e 100644\n>> --- a/drivers/iommu/arm-smmu-v3.c\n>> +++ b/drivers/iommu/arm-smmu-v3.c\n>> @@ -1772,6 +1772,15 @@ arm_smmu_unmap(struct iommu_domain *domain, unsigned long iova, size_t size)\n>> \treturn ops->unmap(ops, iova, size);\n>> }\n>> \n>> +static void arm_smmu_iotlb_sync(struct iommu_domain *domain)\n>> +{\n>> +\tstruct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);\n>> +\tstruct io_pgtable_ops *ops = smmu_domain->pgtbl_ops;\n>> +\n>> +\tif (ops && ops->iotlb_sync)\n>> +\t\tops->iotlb_sync(ops);\n>> +}\n>> +\n>> static phys_addr_t\n>> arm_smmu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova)\n>> {\n>> @@ -1991,6 +2000,7 @@ static struct iommu_ops arm_smmu_ops = {\n>> \t.attach_dev\t\t= arm_smmu_attach_dev,\n>> \t.map\t\t\t= arm_smmu_map,\n>> \t.unmap\t\t\t= arm_smmu_unmap,\n>> +\t.iotlb_sync\t\t= arm_smmu_iotlb_sync,\n>> \t.map_sg\t\t\t= default_iommu_map_sg,\n>> \t.iova_to_phys\t\t= arm_smmu_iova_to_phys,\n>> \t.add_device\t\t= arm_smmu_add_device,\n>> diff --git a/drivers/iommu/io-pgtable-arm.c b/drivers/iommu/io-pgtable-arm.c\n>> index e8018a3..805efc9 100644\n>> --- a/drivers/iommu/io-pgtable-arm.c\n>> +++ b/drivers/iommu/io-pgtable-arm.c\n>> @@ -304,6 +304,8 @@ static int arm_lpae_init_pte(struct arm_lpae_io_pgtable *data,\n>> \t\tWARN_ON(!selftest_running);\n>> \t\treturn -EEXIST;\n>> \t} else if (iopte_type(pte, lvl) == ARM_LPAE_PTE_TYPE_TABLE) {\n>> +\t\tsize_t unmapped;\n>> +\n>> \t\t/*\n>> \t\t * We need to unmap and free the old table before\n>> \t\t * overwriting it with a block entry.\n>> @@ -312,7 +314,9 @@ static int arm_lpae_init_pte(struct arm_lpae_io_pgtable *data,\n>> \t\tsize_t sz = ARM_LPAE_BLOCK_SIZE(lvl, data);\n>> \n>> \t\ttblp = ptep - ARM_LPAE_LVL_IDX(iova, lvl, data);\n>> -\t\tif (WARN_ON(__arm_lpae_unmap(data, iova, sz, lvl, tblp) != sz))\n>> +\t\tunmapped = __arm_lpae_unmap(data, iova, sz, lvl, tblp);\n>> +\t\tio_pgtable_tlb_sync(&data->iop);\n>> +\t\tif (WARN_ON(unmapped != sz))\n>> \t\t\treturn -EINVAL;\n>> \t}\n>> \n>> @@ -584,7 +588,6 @@ static int __arm_lpae_unmap(struct arm_lpae_io_pgtable *data,\n>> \t\t\t/* Also flush any partial walks */\n>> \t\t\tio_pgtable_tlb_add_flush(iop, iova, size,\n>> \t\t\t\t\t\tARM_LPAE_GRANULE(data), false);\n>> -\t\t\tio_pgtable_tlb_sync(iop);\n>> \t\t\tptep = iopte_deref(pte, data);\n>> \t\t\t__arm_lpae_free_pgtable(data, lvl + 1, ptep);\n>> \t\t} else {\n>> @@ -609,7 +612,6 @@ static int __arm_lpae_unmap(struct arm_lpae_io_pgtable *data,\n>> static int arm_lpae_unmap(struct io_pgtable_ops *ops, unsigned long iova,\n>> \t\t\t size_t size)\n>> {\n>> -\tsize_t unmapped;\n>> \tstruct arm_lpae_io_pgtable *data = io_pgtable_ops_to_data(ops);\n>> \tarm_lpae_iopte *ptep = data->pgd;\n>> \tint lvl = ARM_LPAE_START_LVL(data);\n>> @@ -617,11 +619,14 @@ static int arm_lpae_unmap(struct io_pgtable_ops *ops, unsigned long iova,\n>> \tif (WARN_ON(iova >= (1ULL << data->iop.cfg.ias)))\n>> \t\treturn 0;\n>> \n>> -\tunmapped = __arm_lpae_unmap(data, iova, size, lvl, ptep);\n>> -\tif (unmapped)\n>> -\t\tio_pgtable_tlb_sync(&data->iop);\n>> +\treturn __arm_lpae_unmap(data, iova, size, lvl, ptep);\n>> +}\n> \n> This change is already queued in Joerg's tree, due to a patch from Robin.\nYes, I see. So this one can be skipped.\n\n> \n> Will\n> \n> .\n>","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"XPlLw/cx\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yHZ0V5WmMz9tX7\n\tfor ;\n\tThu, 19 Oct 2017 14:19:22 +1100 (AEDT)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e51MZ-0002Br-L5; Thu, 19 Oct 2017 03:19:15 +0000","from szxga04-in.huawei.com ([45.249.212.190])\n\tby bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e51M6-0001o2-C2 for linux-arm-kernel@lists.infradead.org;\n\tThu, 19 Oct 2017 03:18:48 +0000","from 172.30.72.59 (EHLO DGGEMS403-HUB.china.huawei.com)\n\t([172.30.72.59])\n\tby dggrg04-dlp.huawei.com (MOS 4.4.6-GA FastPath queued)\n\twith ESMTP id DJI65384; Thu, 19 Oct 2017 11:18:21 +0800 (CST)","from [127.0.0.1] (10.177.23.164) by DGGEMS403-HUB.china.huawei.com\n\t(10.3.19.203) with Microsoft SMTP Server id 14.3.301.0;\n\tThu, 19 Oct 2017 11:18:12 +0800"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:\n\tMessage-ID:From:References:To:Subject:Reply-To:Content-ID:Content-Description\n\t:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=dEsegsCUcHGxXeEfym1Nvf/i6JVAk9tLkHq2nNMOdmA=;\n\tb=XPlLw/cxaigRlZ\n\tYhZzBfKYUpxLOacRLDL4ek/h75ATbQr2RyL81EJu7maig6Ywaxj6eFUntPtl4liu/KUsG42URYcvf\n\tVZgxqa1fXRzfUelHVct6pNtQRwInCYqEO6xUZ7pVc4vyYvR/Lw06KMeOmh1QssMprmwyFCaaXRYxk\n\to3wyzeBvfg1hOXVX2+Ol1UyKKLVd60a+eFLWXZOJKxER983yenUeqUYQ+0vJSuinsDDdKmrU5/0I2\n\t5nbOpWZA2KPM5ouDUvHTgXD5BcGRMknAtM+ooB7fiUdl+iJYL8a+ErcHU6MMMdAJBuDwstOricSBi\n\trqKThw7fYApAVhN36Qpg==;","Subject":"Re: [PATCH v2 2/3] iommu/arm-smmu-v3: add support for unmap an iova\n\trange with only one tlb sync","To":"Will Deacon ","References":"<1505221238-9428-1-git-send-email-thunder.leizhen@huawei.com>\n\t<1505221238-9428-3-git-send-email-thunder.leizhen@huawei.com>\n\t<20171018130003.GE4077@arm.com>","From":"\"Leizhen (ThunderTown)\" ","Message-ID":"<59E81947.50307@huawei.com>","Date":"Thu, 19 Oct 2017 11:17:27 +0800","User-Agent":"Mozilla/5.0 (Windows NT 6.1; WOW64; rv:38.0) Gecko/20100101\n\tThunderbird/38.5.1","MIME-Version":"1.0","In-Reply-To":"<20171018130003.GE4077@arm.com>","X-Originating-IP":"[10.177.23.164]","X-CFilter-Loop":"Reflected","X-Mirapoint-Virus-RAPID-Raw":"score=unknown(0),\n\trefid=str=0001.0A020206.59E8197E.002C, ss=1, re=0.000, recu=0.000,\n\treip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0,\n\tso=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32","X-Mirapoint-Loop-Id":"ee32dc83705b5c6c264f46dc2d9307a8","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20171018_201846_764680_5D1F379F ","X-CRM114-Status":"GOOD ( 13.37 )","X-Spam-Score":"-1.9 (-)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-1.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/,\n\tno trust [45.249.212.190 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Kefeng Wang , Joerg Roedel ,\n\tlinux-kernel ,\n\tJinyue Li , \n\tiommu ,\n\tLibin , \n\tHanjun Guo , Robin Murphy ,\n\tlinux-arm-kernel ","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1790273,"web_url":"http://patchwork.ozlabs.org/comment/1790273/","msgid":"<20171019091225.GA29762@arm.com>","list_archive_url":null,"date":"2017-10-19T09:12:26","subject":"Re: [PATCH v2 1/3] iommu/arm-smmu-v3: put off the execution of TLBI*\n\tto reduce lock confliction","submitter":{"id":7916,"url":"http://patchwork.ozlabs.org/api/people/7916/","name":"Will Deacon","email":"will.deacon@arm.com"},"content":"On Thu, Oct 19, 2017 at 11:00:45AM +0800, Leizhen (ThunderTown) wrote:\n> \n> \n> On 2017/10/18 20:58, Will Deacon wrote:\n> > Hi Thunder,\n> > \n> > On Tue, Sep 12, 2017 at 09:00:36PM +0800, Zhen Lei wrote:\n> >> Because all TLBI commands should be followed by a SYNC command, to make\n> >> sure that it has been completely finished. So we can just add the TLBI\n> >> commands into the queue, and put off the execution until meet SYNC or\n> >> other commands. To prevent the followed SYNC command waiting for a long\n> >> time because of too many commands have been delayed, restrict the max\n> >> delayed number.\n> >>\n> >> According to my test, I got the same performance data as I replaced writel\n> >> with writel_relaxed in queue_inc_prod.\n> >>\n> >> Signed-off-by: Zhen Lei \n> >> ---\n> >> drivers/iommu/arm-smmu-v3.c | 42 +++++++++++++++++++++++++++++++++++++-----\n> >> 1 file changed, 37 insertions(+), 5 deletions(-)\n> > \n> > If we want to go down the route of explicit command batching, I'd much\n> > rather do it by implementing the iotlb_range_add callback in the driver,\n> > and have a fixed-length array of batched ranges on the domain. We could\n> I think even if iotlb_range_add callback is implemented, this patch is still valuable. The main purpose\n> of this patch is to reduce dsb operation. So in the scenario with iotlb_range_add implemented:\n> .iotlb_range_add:\n> spin_lock_irqsave(&smmu->cmdq.lock, flags);\n> ...\n> add tlbi range-1 to cmq-queue\n> ...\n> add tlbi range-n to cmq-queue\t\t\t//n\n> dsb\n> ...\n> spin_unlock_irqrestore(&smmu->cmdq.lock, flags);\n> \n> .iotlb_sync\n> spin_lock_irqsave(&smmu->cmdq.lock, flags);\n> ...\n> add cmd_sync to cmq-queue\n> dsb\n> ...\n> spin_unlock_irqrestore(&smmu->cmdq.lock, flags);\n> \n> Although iotlb_range_add can reduce n-1 dsb operations, but there are\n> still 1 left. If n is not large enough, this patch is helpful.\n\nThen pick an n that is large enough, based on the compatible string.\n\nWill","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"kHk3D9ZP\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yHjrL6SMrz9t2d\n\tfor ;\n\tThu, 19 Oct 2017 20:12:50 +1100 (AEDT)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e56sf-0001gn-RW; Thu, 19 Oct 2017 09:12:45 +0000","from foss.arm.com ([217.140.101.70])\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e56sb-0001em-MV for linux-arm-kernel@lists.infradead.org;\n\tThu, 19 Oct 2017 09:12:43 +0000","from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249])\n\tby usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id BB6ACF;\n\tThu, 19 Oct 2017 02:12:20 -0700 (PDT)","from edgewater-inn.cambridge.arm.com\n\t(usa-sjc-imap-foss1.foss.arm.com [10.72.51.249])\n\tby usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id\n\t8CE353F483; Thu, 19 Oct 2017 02:12:20 -0700 (PDT)","by edgewater-inn.cambridge.arm.com (Postfix, from userid 1000)\n\tid 69A011AE3BD2; Thu, 19 Oct 2017 10:12:26 +0100 (BST)"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:\n\tMessage-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=wYcq3Q3XGQgmKQizLLYliGsLIL+4z26J9O/T+U6VmzI=;\n\tb=kHk3D9ZPEiKv1Q\n\t02BK5Gt3lYtlPzi2mynXucnutMhdFEyGIkwS9iMunkvBz9o8pcZzvr0YPKZqK0ul+FovbObnnyHol\n\tjXCvMzSrWsgIR7OmTqeuqGgsGmJrVcTLpOgZl4nxR3XE1wmEDpf/YNV2IvYNSHCL11L0sBKHBWmCZ\n\t/NX4MhDmTdzeOV/Vd2v+70Qu8rznprWecLcF9tD7nWfSShc5nGZ8Q+F+GpLlbANc1cX1nBwLF1py2\n\tlYhFOxX6xkbpfb8HpvYfkBWOBSmv2hqrsadTi+d+pL7F56zEb7EscErl90x2NUAwSL58+Dei+N+X7\n\trqunn0UWBK/u3TVU9Kxw==;","Date":"Thu, 19 Oct 2017 10:12:26 +0100","From":"Will Deacon ","To":"\"Leizhen (ThunderTown)\" ","Subject":"Re: [PATCH v2 1/3] iommu/arm-smmu-v3: put off the execution of TLBI*\n\tto reduce lock confliction","Message-ID":"<20171019091225.GA29762@arm.com>","References":"<1505221238-9428-1-git-send-email-thunder.leizhen@huawei.com>\n\t<1505221238-9428-2-git-send-email-thunder.leizhen@huawei.com>\n\t<20171018125849.GD4077@arm.com> <59E8155D.2070102@huawei.com>","MIME-Version":"1.0","Content-Disposition":"inline","In-Reply-To":"<59E8155D.2070102@huawei.com>","User-Agent":"Mutt/1.5.23 (2014-03-12)","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20171019_021241_744688_E4DC1A9E ","X-CRM114-Status":"GOOD ( 20.16 )","X-Spam-Score":"-6.9 (------)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-6.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/,\n\thigh trust [217.140.101.70 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Kefeng Wang , Joerg Roedel ,\n\tlinux-kernel ,\n\tJinyue Li , \n\tiommu ,\n\tLibin , \n\tHanjun Guo , Robin Murphy ,\n\tlinux-arm-kernel ","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}}]