[{"id":1766341,"web_url":"http://patchwork.ozlabs.org/comment/1766341/","msgid":"","list_archive_url":null,"date":"2017-09-11T14:38:43","subject":"Re: [PATCH v2 0/2] Renesas R8A77970 CPG/MSSR clock support","submitter":{"id":703,"url":"http://patchwork.ozlabs.org/api/people/703/","name":"Geert Uytterhoeven","email":"geert@linux-m68k.org"},"content":"Hi Sergei,\n\nOn Fri, Sep 8, 2017 at 11:34 PM, Sergei Shtylyov\n wrote:\n> Here's the set of 2 patches against the 'clk-next' branch of CLK group's\n> 'linux.git' repo.\n\nThank you, looks good!\n\n> As the DT patches in the R8A77970/Eagle board support series\n> depend on the patch #1 of this series, it might make sense to merge this patch\n> to the 'renesas.git' repo as well...\n>\n> [1/2] dt-bindings: clock: add R8A77970 CPG core clock definitions\n\nThe modern way to avoid this dependency is to use hardcoded numbers in\nthe initial submission of the DTS, cfr.\nhttps://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git/commit/?h=arm64-dt-for-v4.15&id=d917e0b24811eadeba419ba7318b967ee15933b3\n\nAfter the definitions have hit upstream, you can replace the hardcoded\nnumbers by symbols, cfr.\nhttps://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git/commit/?h=topic/r8a77995-integration&id=d3f6987db28a4657bf3304eeeb8e2cd8dd510ad0\nhttps://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git/commit/?h=topic/r8a77995-integration&id=81426223583d5575767c77684be28c40034785bd\n\nSo I don't think Simon will merge the core clock definitions patch, unless\nyou plan to submit a full DTS describing the whole SoC in the initial\nsubmissiong.\n\nGr{oetje,eeting}s,\n\n Geert\n\n--\nGeert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org\n\nIn personal conversations with technical people, I call myself a hacker. But\nwhen I'm talking to journalists I just say \"programmer\" or something like that.\n -- Linus Torvalds\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"McP+bqge\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xrVsz3xNVz9s81\n\tfor ;\n\tTue, 12 Sep 2017 00:38:47 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751049AbdIKOip (ORCPT\n\t);\n\tMon, 11 Sep 2017 10:38:45 -0400","from mail-pg0-f67.google.com ([74.125.83.67]:32787 \"EHLO\n\tmail-pg0-f67.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1750920AbdIKOio (ORCPT\n\t); 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\n\tMon, 11 Sep 2017 07:38:43 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<20170908213418.823028011@cogentembedded.com>","References":"<20170908213418.823028011@cogentembedded.com>","From":"Geert Uytterhoeven ","Date":"Mon, 11 Sep 2017 16:38:43 +0200","X-Google-Sender-Auth":"Up_q2fuiDk7S0Y1LpIdRe42cpDA","Message-ID":"","Subject":"Re: [PATCH v2 0/2] Renesas R8A77970 CPG/MSSR clock support","To":"Sergei Shtylyov ","Cc":"Michael Turquette ,\n\tStephen Boyd , Rob Herring ,\n\tMark Rutland ,\n\tGeert Uytterhoeven ,\n\tlinux-clk ,\n\t\"devicetree@vger.kernel.org\" ,\n\tLinux-Renesas ,\n\tSimon Horman ","Content-Type":"text/plain; charset=\"UTF-8\"","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1767625,"web_url":"http://patchwork.ozlabs.org/comment/1767625/","msgid":"<20170913072829.GB6756@verge.net.au>","list_archive_url":null,"date":"2017-09-13T07:28:29","subject":"Re: [PATCH v2 0/2] Renesas R8A77970 CPG/MSSR clock support","submitter":{"id":106,"url":"http://patchwork.ozlabs.org/api/people/106/","name":"Simon Horman","email":"horms@verge.net.au"},"content":"On Mon, Sep 11, 2017 at 04:38:43PM +0200, Geert Uytterhoeven wrote:\n> Hi Sergei,\n> \n> On Fri, Sep 8, 2017 at 11:34 PM, Sergei Shtylyov\n> wrote:\n> > Here's the set of 2 patches against the 'clk-next' branch of CLK group's\n> > 'linux.git' repo.\n> \n> Thank you, looks good!\n> \n> > As the DT patches in the R8A77970/Eagle board support series\n> > depend on the patch #1 of this series, it might make sense to merge this patch\n> > to the 'renesas.git' repo as well...\n> >\n> > [1/2] dt-bindings: clock: add R8A77970 CPG core clock definitions\n> \n> The modern way to avoid this dependency is to use hardcoded numbers in\n> the initial submission of the DTS, cfr.\n> https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git/commit/?h=arm64-dt-for-v4.15&id=d917e0b24811eadeba419ba7318b967ee15933b3\n> \n> After the definitions have hit upstream, you can replace the hardcoded\n> numbers by symbols, cfr.\n> https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git/commit/?h=topic/r8a77995-integration&id=d3f6987db28a4657bf3304eeeb8e2cd8dd510ad0\n> https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git/commit/?h=topic/r8a77995-integration&id=81426223583d5575767c77684be28c40034785bd\n> \n> So I don't think Simon will merge the core clock definitions patch, unless\n> you plan to submit a full DTS describing the whole SoC in the initial\n> submissiong.\n\nThanks, I would prefer if the DT patches followed the scheme described by\nGeert such that they do not depend on any part of this series. I expect\nthat will allow the smoothest path for acceptance of those patches.\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=verge.net.au header.i=@verge.net.au\n\theader.b=\"m7uG/S9x\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xsYDg3NS5z9sPs\n\tfor ;\n\tWed, 13 Sep 2017 17:28:35 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751414AbdIMH2e (ORCPT\n\t);\n\tWed, 13 Sep 2017 03:28:34 -0400","from kirsty.vergenet.net ([202.4.237.240]:51661 \"EHLO\n\tkirsty.vergenet.net\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1750949AbdIMH2d (ORCPT\n\t); Wed, 13 Sep 2017 03:28:33 -0400","from reginn.horms.nl (52D9BC73.cm-11-1c.dynamic.ziggo.nl\n\t[82.217.188.115])\n\tby kirsty.vergenet.net (Postfix) with ESMTPA id 8C66625AD59;\n\tWed, 13 Sep 2017 17:28:31 +1000 (AEST)","by reginn.horms.nl (Postfix, from userid 7100)\n\tid E9BA4940373; Wed, 13 Sep 2017 09:28:29 +0200 (CEST)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; \n\tt=1505287711; bh=aKbASEgCun6P64b4VROT1lVpSYyA2+St64qSzS5zr+A=;\n\th=Date:From:To:Cc:Subject:References:In-Reply-To:From;\n\tb=m7uG/S9xigLUWErIOP2xftO7uj4q16MbTnlT29RzZa/kso8N2XPubfljBNxFEh0Uq\n\tlwy35sZTqgY6bZXUTswxR7A2wtFAv8aoSHd86Rt6lAPifaSEbiWQ1jGhTkJostsDLh\n\tbTSaCWyiRZlrwzIyJaKqxRgEwtGGds7RSEXp2QME=","Date":"Wed, 13 Sep 2017 09:28:29 +0200","From":"Simon Horman ","To":"Geert Uytterhoeven ","Cc":"Sergei Shtylyov ,\n\tMichael Turquette ,\n\tStephen Boyd , Rob Herring ,\n\tMark Rutland ,\n\tGeert Uytterhoeven ,\n\tlinux-clk ,\n\t\"devicetree@vger.kernel.org\" ,\n\tLinux-Renesas ","Subject":"Re: [PATCH v2 0/2] Renesas R8A77970 CPG/MSSR clock support","Message-ID":"<20170913072829.GB6756@verge.net.au>","References":"<20170908213418.823028011@cogentembedded.com>\n\t","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"","Organisation":"Horms Solutions BV","User-Agent":"Mutt/1.5.23 (2014-03-12)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}}]