[{"id":1765121,"web_url":"http://patchwork.ozlabs.org/comment/1765121/","msgid":"<20170908071954.j2bhtw4wqa27fald@flea.lan>","list_archive_url":null,"date":"2017-09-08T07:19:54","subject":"Re: [PATCH v5 01/10] arm64: dts: allwinner: Restore EMAC changes","submitter":{"id":12916,"url":"http://patchwork.ozlabs.org/api/people/12916/","name":"Maxime Ripard","email":"maxime.ripard@free-electrons.com"},"content":"On Fri, Sep 08, 2017 at 09:11:47AM +0200, Corentin Labbe wrote:\n> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts\n> index 1c2387bd5df6..968908761194 100644\n> --- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts\n> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts\n> @@ -50,6 +50,7 @@\n> \tcompatible = \"friendlyarm,nanopi-neo2\", \"allwinner,sun50i-h5\";\n> \n> \taliases {\n> +\t\tethernet0 = &emac;\n> \t\tserial0 = &uart0;\n> \t};\n> \n> @@ -108,6 +109,22 @@\n> \tstatus = \"okay\";\n> };\n> \n> +&emac {\n> +\tpinctrl-names = \"default\";\n> +\tpinctrl-0 = <&emac_rgmii_pins>;\n> +\tphy-supply = <®_gmac_3v3>;\n> +\tphy-handle = <&ext_rgmii_phy>;\n> +\tphy-mode = \"rgmii\";\n> +\tstatus = \"okay\";\n> +};\n> +\n> +&mdio {\n> +\text_rgmii_phy: ethernet-phy@7 {\n> +\t\tcompatible = \"ethernet-phy-ieee802.3-c22\";\n> +\t\treg = <7>;\n> +\t};\n> +};\n> +\n\nThis won't compile, you don't have that node in the H5 DTSI.\n\nMaxime","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; 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Fri, 8 Sep 2017 09:19:53 +0200 (CEST)","from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr\n\t[90.63.216.87])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id A59F42095E;\n\tFri, 8 Sep 2017 09:19:53 +0200 (CEST)"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:Content-Type:Cc:\n\tList-Subscribe:List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:\n\tIn-Reply-To:MIME-Version:References:Message-ID:Subject:To:From:Date:Reply-To:\n\tContent-Transfer-Encoding:Content-ID:Content-Description:Resent-Date:\n\tResent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner;\n\tbh=h4XFwPeCUzcOure9H94M8nKsEfaqxFn9LGl6BwRxlTQ=;\n\tb=AfNpMrT7HyZ7Fo8ihuPwM6x9u\n\tLD4vjxXS1u3bCn+/AG90/cS4TIMGRy1fjYXjQ26/dma0AftWLfInUqHFGUsQ9c770zI27xhIH+58s\n\tQi3TV9V3RzYjMP0hvRyPMN4iNw8lZwjqsF/qwL8z+DlNUpv/ZWmZo8hyxA8SVkOqmenAmNRfpwsQA\n\t1pFG6Efqll+lwjBKAWBi2+1aq0mZWxnN+DhXqN0QLapGLD+oZ2d7+VC48PcO2UJRYdkOV9JPIzxRJ\n\tbMafcHXgGqoqDGShQQF8lEczIxTak9LK9hNG0e62JqT30nu9EU6Fe4Ni4EBJfR5KipjjqrFDXzS4Y\n\tU7fJhIuww==;","X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","Date":"Fri, 8 Sep 2017 09:19:54 +0200","From":"Maxime Ripard ","To":"Corentin Labbe ","Subject":"Re: [PATCH v5 01/10] arm64: dts: allwinner: Restore EMAC changes","Message-ID":"<20170908071954.j2bhtw4wqa27fald@flea.lan>","References":"<20170908071156.5115-1-clabbe.montjoie@gmail.com>\n\t<20170908071156.5115-2-clabbe.montjoie@gmail.com>","MIME-Version":"1.0","In-Reply-To":"<20170908071156.5115-2-clabbe.montjoie@gmail.com>","User-Agent":"NeoMutt/20170714 (1.8.3)","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170908_002018_567504_15BDF9DE ","X-CRM114-Status":"GOOD ( 10.74 )","X-Spam-Score":"-1.9 (-)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-1.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"mark.rutland@arm.com, andrew@lunn.ch, f.fainelli@gmail.com,\n\talexandre.torgue@st.com, devicetree@vger.kernel.org,\n\tcatalin.marinas@arm.com, will.deacon@arm.com, linux@armlinux.org.uk,\n\tlinux-kernel@vger.kernel.org, \n\twens@csie.org, robh+dt@kernel.org, netdev@vger.kernel.org,\n\tpeppe.cavallaro@st.com, linux-arm-kernel@lists.infradead.org","Content-Type":"multipart/mixed;\n\tboundary=\"===============5987062441323688715==\"","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1765125,"web_url":"http://patchwork.ozlabs.org/comment/1765125/","msgid":"<20170908072538.rqsp6dobwsqmzrsr@flea.lan>","list_archive_url":null,"date":"2017-09-08T07:25:38","subject":"Re: [PATCH v5 05/10] dt-bindings: net: dwmac-sun8i: update\n\tdocumentation about integrated PHY","submitter":{"id":12916,"url":"http://patchwork.ozlabs.org/api/people/12916/","name":"Maxime Ripard","email":"maxime.ripard@free-electrons.com"},"content":"On Fri, Sep 08, 2017 at 09:11:51AM +0200, Corentin Labbe wrote:\n> This patch add documentation about the MDIO switch used on sun8i-h3-emac\n> for integrated PHY.\n> \n> Signed-off-by: Corentin Labbe \n> ---\n> .../devicetree/bindings/net/dwmac-sun8i.txt | 127 +++++++++++++++++++--\n> 1 file changed, 120 insertions(+), 7 deletions(-)\n> \n> diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt\n> index 725f3b187886..3fa0e54825ea 100644\n> --- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt\n> +++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt\n> @@ -39,7 +39,7 @@ Optional properties for the following compatibles:\n> - allwinner,leds-active-low: EPHY LEDs are active low\n> \n> Required child node of emac:\n> -- mdio bus node: should be named mdio\n> +- mdio bus node: should be labelled mdio\n\nlabels do not end up in the final DT (while the names do) so why are\nyou making this change?\n\n> \n> Required properties of the mdio node:\n> - #address-cells: shall be 1\n> @@ -48,14 +48,28 @@ Required properties of the mdio node:\n> The device node referenced by \"phy\" or \"phy-handle\" should be a child node\n> of the mdio node. See phy.txt for the generic PHY bindings.\n> \n> -Required properties of the phy node with the following compatibles:\n> +The following compatibles require an mdio-mux node called \"mdio-mux\":\n> + - \"allwinner,sun8i-h3-emac\"\n> + - \"allwinner,sun8i-v3s-emac\":\n> +Required properties for the mdio-mux node:\n> + - compatible = \"mdio-mux\"\n> + - one child mdio for the integrated mdio\n> + - one child mdio for the external mdio if present (V3s have none)\n> +Required properties for the mdio-mux children node:\n> + - reg: 0 for internal MDIO bus, 1 for external MDIO bus\n> +\n> +The following compatibles require a PHY node representing the integrated\n> +PHY, under the integrated MDIO bus node if an mdio-mux node is used:\n> - \"allwinner,sun8i-h3-emac\",\n> - \"allwinner,sun8i-v3s-emac\":\n> +\n> +Required properties of the integrated phy node:\n> - clocks: a phandle to the reference clock for the EPHY\n> - resets: a phandle to the reset control for the EPHY\n> +- phy-is-integrated\n> +- Should be a child of the integrated mdio\n\nI'm not sure what you mean by that, you ask that it should (so not\nrequired?) be a child of the integrated mdio...\n\n> \n> -Example:\n> -\n> +Example with integrated PHY:\n> emac: ethernet@1c0b000 {\n> \tcompatible = \"allwinner,sun8i-h3-emac\";\n> \tsyscon = <&syscon>;\n> @@ -72,13 +86,112 @@ emac: ethernet@1c0b000 {\n> \tphy-handle = <&int_mii_phy>;\n> \tphy-mode = \"mii\";\n> \tallwinner,leds-active-low;\n> +\n> +\tmdio0: mdio {\n\n(You don't label it mdio here, unlike what was asked before)\n\n> +\t\t#address-cells = <1>;\n> +\t\t#size-cells = <0>;\n> +\t\tcompatible = \"snps,dwmac-mdio\";\n> +\t};\n\nI think Rob wanted that node gone?\n\n> +\tmdio-mux {\n> +\t\tcompatible = \"mdio-mux\";\n> +\t\t#address-cells = <1>;\n> +\t\t#size-cells = <0>;\n> +\n> +\t\tint_mdio: mdio@1 {\n> +\t\t\treg = <0>;\n> +\t\t\t#address-cells = <1>;\n> +\t\t\t#size-cells = <0>;\n> +\t\t\tint_mii_phy: ethernet-phy@1 {\n> +\t\t\t\treg = <1>;\n> +\t\t\t\tclocks = <&ccu CLK_BUS_EPHY>;\n> +\t\t\t\tresets = <&ccu RST_BUS_EPHY>;\n> +\t\t\t\tphy-is-integrated\n> +\t\t\t};\n> +\t\t};\n\n... And in your example it's a child of the mdio mux?\n\n> +\t\text_mdio: mdio@0 {\n> +\t\t\treg = <1>;\n> +\t\t\t#address-cells = <1>;\n> +\t\t\t#size-cells = <0>;\n> +\t\t};\n> +\t};\n> +};\n> +\n> +Example with external PHY:\n> +emac: ethernet@1c0b000 {\n> +\tcompatible = \"allwinner,sun8i-h3-emac\";\n> +\tsyscon = <&syscon>;\n> +\treg = <0x01c0b000 0x104>;\n> +\tinterrupts = ;\n> +\tinterrupt-names = \"macirq\";\n> +\tresets = <&ccu RST_BUS_EMAC>;\n> +\treset-names = \"stmmaceth\";\n> +\tclocks = <&ccu CLK_BUS_EMAC>;\n> +\tclock-names = \"stmmaceth\";\n> +\t#address-cells = <1>;\n> +\t#size-cells = <0>;\n> +\n> +\tphy-handle = <&ext_rgmii_phy>;\n> +\tphy-mode = \"rgmii\";\n> +\tallwinner,leds-active-low;\n> +\n> +\tmdio0: mdio {\n> +\t\t#address-cells = <1>;\n> +\t\t#size-cells = <0>;\n> +\t\tcompatible = \"snps,dwmac-mdio\";\n> +\t};\n> +\n> +\tmdio-mux {\n> +\t\tcompatible = \"mdio-mux\";\n> +\t\t#address-cells = <1>;\n> +\t\t#size-cells = <0>;\n> +\n> +\t\tint_mdio: mdio@1 {\n> +\t\t\treg = <0>;\n> +\t\t\t#address-cells = <1>;\n> +\t\t\t#size-cells = <0>;\n> +\t\t\tint_mii_phy: ethernet-phy@1 {\n> +\t\t\t\treg = <1>;\n> +\t\t\t\tclocks = <&ccu CLK_BUS_EPHY>;\n> +\t\t\t\tresets = <&ccu RST_BUS_EPHY>;\n> +\t\t\t\tphy-is-integrated\n> +\t\t\t};\n> +\t\t};\n> +\t\text_mdio: mdio@0 {\n> +\t\t\treg = <1>;\n> +\t\t\t#address-cells = <1>;\n> +\t\t\t#size-cells = <0>;\n> +\t\t\text_rgmii_phy: ethernet-phy@1 {\n> +\t\t\t\treg = <1>;\n> +\t\t\t};\n> +\t\t};\n> +\t};\n> +};\n> +\n> +Example with SoC without integrated PHY\n> +\n> +emac: ethernet@1c0b000 {\n> +\tcompatible = \"allwinner,sun8i-a83t-emac\";\n> +\tsyscon = <&syscon>;\n> +\treg = <0x01c0b000 0x104>;\n> +\tinterrupts = ;\n> +\tinterrupt-names = \"macirq\";\n> +\tresets = <&ccu RST_BUS_EMAC>;\n> +\treset-names = \"stmmaceth\";\n> +\tclocks = <&ccu CLK_BUS_EMAC>;\n> +\tclock-names = \"stmmaceth\";\n> +\t#address-cells = <1>;\n> +\t#size-cells = <0>;\n> +\n> +\tphy-handle = <&ext_rgmii_phy>;\n> +\tphy-mode = \"rgmii\";\n> +\n> \tmdio: mdio {\n> +\t\tcompatible = \"snps,dwmac-mdio\";\n> \t\t#address-cells = <1>;\n> \t\t#size-cells = <0>;\n> -\t\tint_mii_phy: ethernet-phy@1 {\n> +\t\text_rgmii_phy: ethernet-phy@1 {\n> \t\t\treg = <1>;\n> -\t\t\tclocks = <&ccu CLK_BUS_EPHY>;\n> -\t\t\tresets = <&ccu RST_BUS_EPHY>;\n> \t\t};\n> \t};\n> };\n> -- \n> 2.13.5\n>","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"l2MMLOqs\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org 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required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT\n\tshortcircuit=ham autolearn=disabled version=3.4.0","Date":"Fri, 8 Sep 2017 09:25:38 +0200","From":"Maxime Ripard ","To":"Corentin Labbe ","Subject":"Re: [PATCH v5 05/10] dt-bindings: net: dwmac-sun8i: update\n\tdocumentation about integrated PHY","Message-ID":"<20170908072538.rqsp6dobwsqmzrsr@flea.lan>","References":"<20170908071156.5115-1-clabbe.montjoie@gmail.com>\n\t<20170908071156.5115-6-clabbe.montjoie@gmail.com>","MIME-Version":"1.0","In-Reply-To":"<20170908071156.5115-6-clabbe.montjoie@gmail.com>","User-Agent":"NeoMutt/20170714 (1.8.3)","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170908_002600_482393_AD03BBF2 ","X-CRM114-Status":"GOOD ( 21.23 )","X-Spam-Score":"-1.9 (-)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-1.9 points)\n\tpts rule name description\n\t---- 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","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1765132,"web_url":"http://patchwork.ozlabs.org/comment/1765132/","msgid":"<20170908073657.GA29999@Red>","list_archive_url":null,"date":"2017-09-08T07:36:57","subject":"Re: [PATCH v5 01/10] arm64: dts: allwinner: Restore EMAC changes","submitter":{"id":64152,"url":"http://patchwork.ozlabs.org/api/people/64152/","name":"Corentin Labbe","email":"clabbe.montjoie@gmail.com"},"content":"On Fri, Sep 08, 2017 at 09:19:54AM +0200, Maxime Ripard wrote:\n> On Fri, Sep 08, 2017 at 09:11:47AM +0200, Corentin Labbe wrote:\n> > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts\n> > index 1c2387bd5df6..968908761194 100644\n> > --- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts\n> > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts\n> > @@ -50,6 +50,7 @@\n> > \tcompatible = \"friendlyarm,nanopi-neo2\", \"allwinner,sun50i-h5\";\n> > \n> > \taliases {\n> > +\t\tethernet0 = &emac;\n> > \t\tserial0 = &uart0;\n> > \t};\n> > \n> > @@ -108,6 +109,22 @@\n> > \tstatus = \"okay\";\n> > };\n> > \n> > +&emac {\n> > +\tpinctrl-names = \"default\";\n> > +\tpinctrl-0 = <&emac_rgmii_pins>;\n> > +\tphy-supply = <®_gmac_3v3>;\n> > +\tphy-handle = <&ext_rgmii_phy>;\n> > +\tphy-mode = \"rgmii\";\n> > +\tstatus = \"okay\";\n> > +};\n> > +\n> > +&mdio {\n> > +\text_rgmii_phy: ethernet-phy@7 {\n> > +\t\tcompatible = \"ethernet-phy-ieee802.3-c22\";\n> > +\t\treg = <7>;\n> > +\t};\n> > +};\n> > +\n> \n> This won't compile, you don't have that node in the H5 DTSI.\n> \n\nSince H5 DTSI include arm/sunxi-h3-h5.dtsi it compiles.\nFurthermore, I restested just now and confirm, it compiles fine.\n\nRegards","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org header.b=\"GF/sSSxX\"; \n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"hYuU312o\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xpTgP0yMkz9sBW\n\tfor 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[PATCH v5 01/10] arm64: dts: allwinner: Restore EMAC changes","Message-ID":"<20170908073657.GA29999@Red>","References":"<20170908071156.5115-1-clabbe.montjoie@gmail.com>\n\t<20170908071156.5115-2-clabbe.montjoie@gmail.com>\n\t<20170908071954.j2bhtw4wqa27fald@flea.lan>","MIME-Version":"1.0","Content-Disposition":"inline","In-Reply-To":"<20170908071954.j2bhtw4wqa27fald@flea.lan>","User-Agent":"Mutt/1.7.2 (2016-11-26)","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170908_003731_218516_D10DE840 ","X-CRM114-Status":"GOOD ( 11.21 )","X-Spam-Score":"-2.0 (--)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-2.0 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/,\n\tno\n\ttrust [2a00:1450:400c:c0c:0:0:0:243 listed in] [list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail\n\tprovider (clabbe.montjoie[at]gmail.com)\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t-0.1 DKIM_VALID Message has at least one valid DKIM or DK signature\n\t0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n\tnot necessarily valid\n\t-0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n\tauthor's domain","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"mark.rutland@arm.com, andrew@lunn.ch, f.fainelli@gmail.com,\n\talexandre.torgue@st.com, devicetree@vger.kernel.org,\n\tcatalin.marinas@arm.com, will.deacon@arm.com, linux@armlinux.org.uk,\n\tlinux-kernel@vger.kernel.org, \n\twens@csie.org, robh+dt@kernel.org, netdev@vger.kernel.org,\n\tpeppe.cavallaro@st.com, linux-arm-kernel@lists.infradead.org","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1765135,"web_url":"http://patchwork.ozlabs.org/comment/1765135/","msgid":"","list_archive_url":null,"date":"2017-09-08T07:39:04","subject":"Re: [PATCH v5 01/10] arm64: dts: allwinner: Restore EMAC changes","submitter":{"id":47154,"url":"http://patchwork.ozlabs.org/api/people/47154/","name":"Chen-Yu Tsai","email":"wens@csie.org"},"content":"On Fri, Sep 8, 2017 at 3:36 PM, Corentin Labbe\n wrote:\n> On Fri, Sep 08, 2017 at 09:19:54AM +0200, Maxime Ripard wrote:\n>> On Fri, Sep 08, 2017 at 09:11:47AM +0200, Corentin Labbe wrote:\n>> > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts\n>> > index 1c2387bd5df6..968908761194 100644\n>> > --- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts\n>> > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts\n>> > @@ -50,6 +50,7 @@\n>> > compatible = \"friendlyarm,nanopi-neo2\", \"allwinner,sun50i-h5\";\n>> >\n>> > aliases {\n>> > + ethernet0 = &emac;\n>> > serial0 = &uart0;\n>> > };\n>> >\n>> > @@ -108,6 +109,22 @@\n>> > status = \"okay\";\n>> > };\n>> >\n>> > +&emac {\n>> > + pinctrl-names = \"default\";\n>> > + pinctrl-0 = <&emac_rgmii_pins>;\n>> > + phy-supply = <®_gmac_3v3>;\n>> > + phy-handle = <&ext_rgmii_phy>;\n>> > + phy-mode = \"rgmii\";\n>> > + status = \"okay\";\n>> > +};\n>> > +\n>> > +&mdio {\n>> > + ext_rgmii_phy: ethernet-phy@7 {\n>> > + compatible = \"ethernet-phy-ieee802.3-c22\";\n>> > + reg = <7>;\n>> > + };\n>> > +};\n>> > +\n>>\n>> This won't compile, you don't have that node in the H5 DTSI.\n>>\n>\n> Since H5 DTSI include arm/sunxi-h3-h5.dtsi it compiles.\n> Furthermore, I restested just now and confirm, it compiles fine.\n\nThe order of your patches are wrong. No individual patch should\nintroduce build failures, not just the whole patch series.\n\nChenYu","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"bGm484Jc\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xpTkK5gqvz9sBd\n\tfor ;\n\tFri, 8 Sep 2017 17:40:09 +1000 (AEST)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dqDtW-0001k2-Ls; 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charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1765138,"web_url":"http://patchwork.ozlabs.org/comment/1765138/","msgid":"<20170908074325.GB29999@Red>","list_archive_url":null,"date":"2017-09-08T07:43:25","subject":"Re: [PATCH v5 05/10] dt-bindings: net: dwmac-sun8i: update\n\tdocumentation about integrated PHY","submitter":{"id":64152,"url":"http://patchwork.ozlabs.org/api/people/64152/","name":"Corentin Labbe","email":"clabbe.montjoie@gmail.com"},"content":"On Fri, Sep 08, 2017 at 09:25:38AM +0200, Maxime Ripard wrote:\n> On Fri, Sep 08, 2017 at 09:11:51AM +0200, Corentin Labbe wrote:\n> > This patch add documentation about the MDIO switch used on sun8i-h3-emac\n> > for integrated PHY.\n> > \n> > Signed-off-by: Corentin Labbe \n> > ---\n> > .../devicetree/bindings/net/dwmac-sun8i.txt | 127 +++++++++++++++++++--\n> > 1 file changed, 120 insertions(+), 7 deletions(-)\n> > \n> > diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt\n> > index 725f3b187886..3fa0e54825ea 100644\n> > --- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt\n> > +++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt\n> > @@ -39,7 +39,7 @@ Optional properties for the following compatibles:\n> > - allwinner,leds-active-low: EPHY LEDs are active low\n> > \n> > Required child node of emac:\n> > -- mdio bus node: should be named mdio\n> > +- mdio bus node: should be labelled mdio\n> \n> labels do not end up in the final DT (while the names do) so why are\n> you making this change?\n> \n\nI misunderstood label/name.\nAnyway, this contrainst should leave due to \"snps,dwmac-mdio MDIOs are automatically registered\"\n\n> > \n> > Required properties of the mdio node:\n> > - #address-cells: shall be 1\n> > @@ -48,14 +48,28 @@ Required properties of the mdio node:\n> > The device node referenced by \"phy\" or \"phy-handle\" should be a child node\n> > of the mdio node. See phy.txt for the generic PHY bindings.\n> > \n> > -Required properties of the phy node with the following compatibles:\n> > +The following compatibles require an mdio-mux node called \"mdio-mux\":\n> > + - \"allwinner,sun8i-h3-emac\"\n> > + - \"allwinner,sun8i-v3s-emac\":\n> > +Required properties for the mdio-mux node:\n> > + - compatible = \"mdio-mux\"\n> > + - one child mdio for the integrated mdio\n> > + - one child mdio for the external mdio if present (V3s have none)\n> > +Required properties for the mdio-mux children node:\n> > + - reg: 0 for internal MDIO bus, 1 for external MDIO bus\n> > +\n> > +The following compatibles require a PHY node representing the integrated\n> > +PHY, under the integrated MDIO bus node if an mdio-mux node is used:\n> > - \"allwinner,sun8i-h3-emac\",\n> > - \"allwinner,sun8i-v3s-emac\":\n> > +\n> > +Required properties of the integrated phy node:\n> > - clocks: a phandle to the reference clock for the EPHY\n> > - resets: a phandle to the reset control for the EPHY\n> > +- phy-is-integrated\n> > +- Should be a child of the integrated mdio\n> \n> I'm not sure what you mean by that, you ask that it should (so not\n> required?) be a child of the integrated mdio...\n> \n\nI will change words to \"must\"\n\n> > \n> > -Example:\n> > -\n> > +Example with integrated PHY:\n> > emac: ethernet@1c0b000 {\n> > \tcompatible = \"allwinner,sun8i-h3-emac\";\n> > \tsyscon = <&syscon>;\n> > @@ -72,13 +86,112 @@ emac: ethernet@1c0b000 {\n> > \tphy-handle = <&int_mii_phy>;\n> > \tphy-mode = \"mii\";\n> > \tallwinner,leds-active-low;\n> > +\n> > +\tmdio0: mdio {\n> \n> (You don't label it mdio here, unlike what was asked before)\n> \n> > +\t\t#address-cells = <1>;\n> > +\t\t#size-cells = <0>;\n> > +\t\tcompatible = \"snps,dwmac-mdio\";\n> > +\t};\n> \n> I think Rob wanted that node gone?\n> \n\nMDIO mux does not work without a parent MDIO, either gived by \"parent-bus\" or directly via mdio_mux_init() (like it is the case in dwmac-sun8i)\n\n> > +\tmdio-mux {\n> > +\t\tcompatible = \"mdio-mux\";\n> > +\t\t#address-cells = <1>;\n> > +\t\t#size-cells = <0>;\n> > +\n> > +\t\tint_mdio: mdio@1 {\n> > +\t\t\treg = <0>;\n> > +\t\t\t#address-cells = <1>;\n> > +\t\t\t#size-cells = <0>;\n> > +\t\t\tint_mii_phy: ethernet-phy@1 {\n> > +\t\t\t\treg = <1>;\n> > +\t\t\t\tclocks = <&ccu CLK_BUS_EPHY>;\n> > +\t\t\t\tresets = <&ccu RST_BUS_EPHY>;\n> > +\t\t\t\tphy-is-integrated\n> > +\t\t\t};\n> > +\t\t};\n> \n> ... And in your example it's a child of the mdio mux?\n> \n\nSo I confirm, integrated PHY must be a child of integrated MDIO (that must be a child of mdio-mux).\nThe example is good.\n\n> > +\t\text_mdio: mdio@0 {\n> > +\t\t\treg = <1>;\n> > +\t\t\t#address-cells = <1>;\n> > +\t\t\t#size-cells = <0>;\n> > +\t\t};\n> > +\t};\n> > +};\n> > +\n> > +Example with external PHY:\n> > +emac: ethernet@1c0b000 {\n> > +\tcompatible = \"allwinner,sun8i-h3-emac\";\n> > +\tsyscon = <&syscon>;\n> > +\treg = <0x01c0b000 0x104>;\n> > +\tinterrupts = ;\n> > +\tinterrupt-names = \"macirq\";\n> > +\tresets = <&ccu RST_BUS_EMAC>;\n> > +\treset-names = \"stmmaceth\";\n> > +\tclocks = <&ccu CLK_BUS_EMAC>;\n> > +\tclock-names = \"stmmaceth\";\n> > +\t#address-cells = <1>;\n> > +\t#size-cells = <0>;\n> > +\n> > +\tphy-handle = <&ext_rgmii_phy>;\n> > +\tphy-mode = \"rgmii\";\n> > +\tallwinner,leds-active-low;\n> > +\n> > +\tmdio0: mdio {\n> > +\t\t#address-cells = <1>;\n> > +\t\t#size-cells = <0>;\n> > +\t\tcompatible = \"snps,dwmac-mdio\";\n> > +\t};\n> > +\n> > +\tmdio-mux {\n> > +\t\tcompatible = \"mdio-mux\";\n> > +\t\t#address-cells = <1>;\n> > +\t\t#size-cells = <0>;\n> > +\n> > +\t\tint_mdio: mdio@1 {\n> > +\t\t\treg = <0>;\n> > +\t\t\t#address-cells = <1>;\n> > +\t\t\t#size-cells = <0>;\n> > +\t\t\tint_mii_phy: ethernet-phy@1 {\n> > +\t\t\t\treg = <1>;\n> > +\t\t\t\tclocks = <&ccu CLK_BUS_EPHY>;\n> > +\t\t\t\tresets = <&ccu RST_BUS_EPHY>;\n> > +\t\t\t\tphy-is-integrated\n> > +\t\t\t};\n> > +\t\t};\n> > +\t\text_mdio: mdio@0 {\n> > +\t\t\treg = <1>;\n> > +\t\t\t#address-cells = <1>;\n> > +\t\t\t#size-cells = <0>;\n> > +\t\t\text_rgmii_phy: ethernet-phy@1 {\n> > +\t\t\t\treg = <1>;\n> > +\t\t\t};\n> > +\t\t};\n> > +\t};\n> > +};\n> > +\n> > +Example with SoC without integrated PHY\n> > +\n> > +emac: ethernet@1c0b000 {\n> > +\tcompatible = \"allwinner,sun8i-a83t-emac\";\n> > +\tsyscon = <&syscon>;\n> > +\treg = <0x01c0b000 0x104>;\n> > +\tinterrupts = ;\n> > +\tinterrupt-names = \"macirq\";\n> > +\tresets = <&ccu RST_BUS_EMAC>;\n> > +\treset-names = \"stmmaceth\";\n> > +\tclocks = <&ccu CLK_BUS_EMAC>;\n> > +\tclock-names = \"stmmaceth\";\n> > +\t#address-cells = <1>;\n> > +\t#size-cells = <0>;\n> > +\n> > +\tphy-handle = <&ext_rgmii_phy>;\n> > +\tphy-mode = \"rgmii\";\n> > +\n> > \tmdio: mdio {\n> > +\t\tcompatible = \"snps,dwmac-mdio\";\n> > \t\t#address-cells = <1>;\n> > \t\t#size-cells = <0>;\n> > -\t\tint_mii_phy: ethernet-phy@1 {\n> > +\t\text_rgmii_phy: ethernet-phy@1 {\n> > \t\t\treg = <1>;\n> > -\t\t\tclocks = <&ccu CLK_BUS_EPHY>;\n> > -\t\t\tresets = <&ccu RST_BUS_EPHY>;\n> > \t\t};\n> > \t};\n> > };\n> > -- \n> > 2.13.5\n> > \n> \n> -- \n> Maxime Ripard, Free Electrons\n> Embedded Linux and Kernel engineering\n> http://free-electrons.com\n\nThanks for the review, I will fix all reported problem in next version.\n\nRegards\nCorentin Labbe","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; 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charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1765337,"web_url":"http://patchwork.ozlabs.org/comment/1765337/","msgid":"<20170908130520.GA11248@lunn.ch>","list_archive_url":null,"date":"2017-09-08T13:05:20","subject":"Re: [PATCH v5 10/10] net: stmmac: dwmac-sun8i: Handle\n\tintegrated/external MDIOs","submitter":{"id":13608,"url":"http://patchwork.ozlabs.org/api/people/13608/","name":"Andrew Lunn","email":"andrew@lunn.ch"},"content":"> +#define DWMAC_sUN8I_MDIO_MUX_INTERNAL_ID\t0\n> +#define DWMAC_sUN8I_MDIO_MUX_EXTERNAL_ID\t1\n> \n> /* H3/A64 specific bits */\n> #define SYSCON_RMII_EN\t\tBIT(13) /* 1: enable RMII (overrides EPIT) */\n> @@ -634,6 +639,76 @@ static int sun8i_dwmac_reset(struct stmmac_priv *priv)\n> \treturn 0;\n> }\n> \n> +/* MDIO multiplexing switch function\n> + * This function is called by the mdio-mux layer when it thinks the mdio bus\n> + * multiplexer needs to switch.\n> + * 'current_child' is the current value of the mux register\n> + * 'desired_child' is the value of the 'reg' property of the target child MDIO\n> + * node.\n> + * The first time this function is called, current_child == -1.\n> + * If current_child == desired_child, then the mux is already set to the\n> + * correct bus.\n> + *\n> + * Note that we do not use reg/mask like mdio-mux-mmioreg because we need to\n> + * know easily which bus is used (reset must be done only for desired bus).\n> + */\n> +static int mdio_mux_syscon_switch_fn(int current_child, int desired_child,\n> +\t\t\t\t void *data)\n> +{\n> +\tstruct stmmac_priv *priv = data;\n> +\tstruct sunxi_priv_data *gmac = priv->plat->bsp_priv;\n> +\tu32 reg, val;\n> +\tint ret = 0;\n> +\tbool need_reset = false;\n> +\n> +\tif (current_child ^ desired_child) {\n> +\t\tregmap_read(gmac->regmap, SYSCON_EMAC_REG, ®);\n> +\t\tswitch (desired_child) {\n> +\t\tcase DWMAC_sUN8I_MDIO_MUX_INTERNAL_ID:\n> +\t\t\tdev_info(priv->device, \"Switch mux to internal PHY\");\n> +\t\t\tval = (reg & ~H3_EPHY_MUX_MASK) | H3_EPHY_SELECT;\n> +\t\t\tif (gmac->use_internal_phy)\n> +\t\t\t\tneed_reset = true;\n> +\t\t\tbreak;\n\nThis i don't get. Why do you need use_internal_phy? Isn't that\nimplicit from DWMAC_sUN8I_MDIO_MUX_INTERNAL_ID? Is it even possible to\nuse an external PHY on the internal MDIO bus?\n\n> +\t\tcase DWMAC_sUN8I_MDIO_MUX_EXTERNAL_ID:\n> +\t\t\tdev_info(priv->device, \"Switch mux to external PHY\");\n> +\t\t\tval = (reg & ~H3_EPHY_MUX_MASK) | H3_EPHY_SHUTDOWN;\n> +\t\t\tif (!gmac->use_internal_phy)\n> +\t\t\t\tneed_reset = true;\n> +\t\t\tbreak;\n\nAnd is it possible to use the internal PHY on the external bus?\n\n Andrew","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org header.b=\"FyX2b+9y\"; \n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=infradead.org header.i=@infradead.org\n\theader.b=\"fldxYXaZ\"; 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charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1765352,"web_url":"http://patchwork.ozlabs.org/comment/1765352/","msgid":"<20170908132632.GA3037@Red>","list_archive_url":null,"date":"2017-09-08T13:26:32","subject":"Re: [PATCH v5 10/10] net: stmmac: dwmac-sun8i: Handle\n\tintegrated/external MDIOs","submitter":{"id":64152,"url":"http://patchwork.ozlabs.org/api/people/64152/","name":"Corentin Labbe","email":"clabbe.montjoie@gmail.com"},"content":"On Fri, Sep 08, 2017 at 03:05:20PM +0200, Andrew Lunn wrote:\n> > +#define DWMAC_sUN8I_MDIO_MUX_INTERNAL_ID\t0\n> > +#define DWMAC_sUN8I_MDIO_MUX_EXTERNAL_ID\t1\n> > \n> > /* H3/A64 specific bits */\n> > #define SYSCON_RMII_EN\t\tBIT(13) /* 1: enable RMII (overrides EPIT) */\n> > @@ -634,6 +639,76 @@ static int sun8i_dwmac_reset(struct stmmac_priv *priv)\n> > \treturn 0;\n> > }\n> > \n> > +/* MDIO multiplexing switch function\n> > + * This function is called by the mdio-mux layer when it thinks the mdio bus\n> > + * multiplexer needs to switch.\n> > + * 'current_child' is the current value of the mux register\n> > + * 'desired_child' is the value of the 'reg' property of the target child MDIO\n> > + * node.\n> > + * The first time this function is called, current_child == -1.\n> > + * If current_child == desired_child, then the mux is already set to the\n> > + * correct bus.\n> > + *\n> > + * Note that we do not use reg/mask like mdio-mux-mmioreg because we need to\n> > + * know easily which bus is used (reset must be done only for desired bus).\n> > + */\n> > +static int mdio_mux_syscon_switch_fn(int current_child, int desired_child,\n> > +\t\t\t\t void *data)\n> > +{\n> > +\tstruct stmmac_priv *priv = data;\n> > +\tstruct sunxi_priv_data *gmac = priv->plat->bsp_priv;\n> > +\tu32 reg, val;\n> > +\tint ret = 0;\n> > +\tbool need_reset = false;\n> > +\n> > +\tif (current_child ^ desired_child) {\n> > +\t\tregmap_read(gmac->regmap, SYSCON_EMAC_REG, ®);\n> > +\t\tswitch (desired_child) {\n> > +\t\tcase DWMAC_sUN8I_MDIO_MUX_INTERNAL_ID:\n> > +\t\t\tdev_info(priv->device, \"Switch mux to internal PHY\");\n> > +\t\t\tval = (reg & ~H3_EPHY_MUX_MASK) | H3_EPHY_SELECT;\n> > +\t\t\tif (gmac->use_internal_phy)\n> > +\t\t\t\tneed_reset = true;\n> > +\t\t\tbreak;\n> \n> This i don't get. Why do you need use_internal_phy? Isn't that\n> implicit from DWMAC_sUN8I_MDIO_MUX_INTERNAL_ID? Is it even possible to\n> use an external PHY on the internal MDIO bus?\n> \n\nOn my H3 box with external PHY, the MDIO mux library first select (for scan ?) the internal MDIO.\nWithout use_internal_phy usage, this board will launch a reset to use the internal MDIO... and this reset timeout/fail.\nAfter the MDIO mux select the external MDIO.\n\n> > +\t\tcase DWMAC_sUN8I_MDIO_MUX_EXTERNAL_ID:\n> > +\t\t\tdev_info(priv->device, \"Switch mux to external PHY\");\n> > +\t\t\tval = (reg & ~H3_EPHY_MUX_MASK) | H3_EPHY_SHUTDOWN;\n> > +\t\t\tif (!gmac->use_internal_phy)\n> > +\t\t\t\tneed_reset = true;\n> > +\t\t\tbreak;\n> \n> And is it possible to use the internal PHY on the external bus?\n> \n\nI need to check that.\n\nRegards","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; 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a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-disposition:in-reply-to:user-agent;\n\tbh=ABC0sceKuoEyuo2GW9tOg1Ab1KNol2XYuiqDWZ/cVrw=;\n\tb=Y5ao5ulm28rlYij+D9BedhPeUmvDyTDfj5cxH4CPOw/TAO/R/uKBuIFRGej2fw9xZr\n\tnDa9Flsbnm/uyAahqVAJYfNVstnakBFzV/W2aX9dn4X5agsS3nAq1wxF+AkoIjhRuchQ\n\tHk+/2pW+mDjTpSYL2yeqxdhkrWSn5UToV81fK3hF1AB72gjxQ1hyg36RtTc/ELFOy7xQ\n\tw1c2NtHuFHmEw27Ll5eF3OjDoexDmen+DPV3mPgnvJo4f2gFReVsNaI5XOB/42kngFKu\n\tzn73txYIb0W+lKtNLlAGkXLmsZJ3eYv7YTXCGb1OwNx2ei7pw2VKcYBGJZJaopDPu3k6\n\tsyjw==","X-Gm-Message-State":"AHPjjUiGiPXm7dOcNjoYkEcvtoRY+D8eX+02QMST8HTx+TqSJPUlodRw\n\tZ7bB7owKSAh7sQ==","X-Google-Smtp-Source":"ADKCNb7Url3OLBd39P8Yp6SrbEs1W9FY15H3CXQka4m1iHXyTVHoxnwQyl0kYFNxFNCAFi29V0+5wA==","X-Received":"by 10.223.154.120 with SMTP id\n\tz111mr2173238wrb.260.1504877200476; \n\tFri, 08 Sep 2017 06:26:40 -0700 (PDT)","Date":"Fri, 8 Sep 2017 15:26:32 +0200","From":"Corentin Labbe ","To":"Andrew Lunn ","Subject":"Re: [PATCH v5 10/10] net: stmmac: dwmac-sun8i: Handle\n\tintegrated/external MDIOs","Message-ID":"<20170908132632.GA3037@Red>","References":"<20170908071156.5115-1-clabbe.montjoie@gmail.com>\n\t<20170908071156.5115-11-clabbe.montjoie@gmail.com>\n\t<20170908130520.GA11248@lunn.ch>","MIME-Version":"1.0","Content-Disposition":"inline","In-Reply-To":"<20170908130520.GA11248@lunn.ch>","User-Agent":"Mutt/1.7.2 (2016-11-26)","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170908_062702_633387_1F01D8C6 ","X-CRM114-Status":"GOOD ( 21.26 )","X-Spam-Score":"-2.0 (--)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-2.0 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/,\n\tno\n\ttrust [2a00:1450:400c:c0c:0:0:0:229 listed in] [list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail\n\tprovider (clabbe.montjoie[at]gmail.com)\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t-0.1 DKIM_VALID Message has at least one valid DKIM or DK signature\n\t0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n\tnot necessarily valid\n\t-0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n\tauthor's domain","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"mark.rutland@arm.com, devicetree@vger.kernel.org, f.fainelli@gmail.com, \n\talexandre.torgue@st.com, catalin.marinas@arm.com, will.deacon@arm.com,\n\tlinux@armlinux.org.uk, linux-kernel@vger.kernel.org, wens@csie.org,\n\trobh+dt@kernel.org, netdev@vger.kernel.org, peppe.cavallaro@st.com,\n\tmaxime.ripard@free-electrons.com, linux-arm-kernel@lists.infradead.org","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1765389,"web_url":"http://patchwork.ozlabs.org/comment/1765389/","msgid":"<20170908140020.GC25219@lunn.ch>","list_archive_url":null,"date":"2017-09-08T14:00:20","subject":"Re: [PATCH v5 10/10] net: stmmac: dwmac-sun8i: Handle\n\tintegrated/external MDIOs","submitter":{"id":13608,"url":"http://patchwork.ozlabs.org/api/people/13608/","name":"Andrew Lunn","email":"andrew@lunn.ch"},"content":"> > > +static int mdio_mux_syscon_switch_fn(int current_child, int desired_child,\n> > > +\t\t\t\t void *data)\n> > > +{\n> > > +\tstruct stmmac_priv *priv = data;\n> > > +\tstruct sunxi_priv_data *gmac = priv->plat->bsp_priv;\n> > > +\tu32 reg, val;\n> > > +\tint ret = 0;\n> > > +\tbool need_reset = false;\n> > > +\n> > > +\tif (current_child ^ desired_child) {\n> > > +\t\tregmap_read(gmac->regmap, SYSCON_EMAC_REG, ®);\n> > > +\t\tswitch (desired_child) {\n> > > +\t\tcase DWMAC_sUN8I_MDIO_MUX_INTERNAL_ID:\n> > > +\t\t\tdev_info(priv->device, \"Switch mux to internal PHY\");\n> > > +\t\t\tval = (reg & ~H3_EPHY_MUX_MASK) | H3_EPHY_SELECT;\n> > > +\t\t\tif (gmac->use_internal_phy)\n> > > +\t\t\t\tneed_reset = true;\n> > > +\t\t\tbreak;\n> > \n> > This i don't get. Why do you need use_internal_phy? Isn't that\n> > implicit from DWMAC_sUN8I_MDIO_MUX_INTERNAL_ID? Is it even possible to\n> > use an external PHY on the internal MDIO bus?\n> > \n> \n> On my H3 box with external PHY, the MDIO mux library first select (for scan ?) the internal MDIO.\n> Without use_internal_phy usage, this board will launch a reset to use the internal MDIO... and this reset timeout/fail.\n\nDo you know why the reset times out/fails?\n\n Andrew","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"p0Xi/0tV\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xpf9d3CFdz9sBd\n\tfor ;\n\tSat, 9 Sep 2017 00:00:53 +1000 (AEST)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dqJpy-0008Vf-5Y; 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charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1765400,"web_url":"http://patchwork.ozlabs.org/comment/1765400/","msgid":"<20170908140832.GB3037@Red>","list_archive_url":null,"date":"2017-09-08T14:08:32","subject":"Re: [PATCH v5 10/10] net: stmmac: dwmac-sun8i: Handle\n\tintegrated/external MDIOs","submitter":{"id":64152,"url":"http://patchwork.ozlabs.org/api/people/64152/","name":"Corentin Labbe","email":"clabbe.montjoie@gmail.com"},"content":"On Fri, Sep 08, 2017 at 04:00:20PM +0200, Andrew Lunn wrote:\n> > > > +static int mdio_mux_syscon_switch_fn(int current_child, int desired_child,\n> > > > +\t\t\t\t void *data)\n> > > > +{\n> > > > +\tstruct stmmac_priv *priv = data;\n> > > > +\tstruct sunxi_priv_data *gmac = priv->plat->bsp_priv;\n> > > > +\tu32 reg, val;\n> > > > +\tint ret = 0;\n> > > > +\tbool need_reset = false;\n> > > > +\n> > > > +\tif (current_child ^ desired_child) {\n> > > > +\t\tregmap_read(gmac->regmap, SYSCON_EMAC_REG, ®);\n> > > > +\t\tswitch (desired_child) {\n> > > > +\t\tcase DWMAC_sUN8I_MDIO_MUX_INTERNAL_ID:\n> > > > +\t\t\tdev_info(priv->device, \"Switch mux to internal PHY\");\n> > > > +\t\t\tval = (reg & ~H3_EPHY_MUX_MASK) | H3_EPHY_SELECT;\n> > > > +\t\t\tif (gmac->use_internal_phy)\n> > > > +\t\t\t\tneed_reset = true;\n> > > > +\t\t\tbreak;\n> > > \n> > > This i don't get. Why do you need use_internal_phy? Isn't that\n> > > implicit from DWMAC_sUN8I_MDIO_MUX_INTERNAL_ID? Is it even possible to\n> > > use an external PHY on the internal MDIO bus?\n> > > \n> > \n> > On my H3 box with external PHY, the MDIO mux library first select (for scan ?) the internal MDIO.\n> > Without use_internal_phy usage, this board will launch a reset to use the internal MDIO... and this reset timeout/fail.\n> \n> Do you know why the reset times out/fails?\n> \n\nBecause there are nothing connected to it.\nI got also reset timeout on integrated MDIO when the integrated PHY is not powered.","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org header.b=\"APQ2trNs\"; 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a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-disposition:in-reply-to:user-agent;\n\tbh=p3d0mpH+Jn1o0PcmosPIASkWVhlqhXQi3UxfJu5AajI=;\n\tb=D3sLZdjrYOmItC8p10bpGlcdl/XRCzBfwTWRZS/tQYLFiPvfrhIpZlKB+BFj0fCFgS\n\tTHBpeIVVY2XxN3A8nsYMp6tPnGs7hpYIuZe1ny4CicVWBBn/N5syL8GGRXe8Vui052Gg\n\tm7/pDOM7x0Y6wTr/z0skgc4ucvaUyyRWSpXf7coyBWQRfNkuNQvcJfqar7Sfl6+Zzvj2\n\t+9AXbEe1PuIerrJbj5rW+OHHvjwyo/89w1X7yYbt9WBufeHsW1Yo9DIXP9Yjm+A6wJ9V\n\tvuZgmfPNpJ/pHKFhsPaRKZQ9Hw4a5JPn9D2u3Bl+lYXZhuxtg1pH7EVwrX3tSV2ggxzc\n\tE3xA==","X-Gm-Message-State":"AHPjjUg5vmmo6am7BEq9xPA2IIGalw6+bD+HdpaJUwVJFN40leYJWQU/\n\tOLgprHwg0xQCcw2p/trMRmw=","X-Google-Smtp-Source":"ADKCNb55ddthQdRXcOrvHLlegohEkzxYg9IdwcOuKkS16HRQDW4LzLifqrhbBWvhCknOrBvirOeg5w==","X-Received":"by 10.28.26.15 with SMTP id a15mr968911wma.16.1504879720469;\n\tFri, 08 Sep 2017 07:08:40 -0700 (PDT)","Date":"Fri, 8 Sep 2017 16:08:32 +0200","From":"Corentin Labbe ","To":"Andrew Lunn ","Subject":"Re: [PATCH v5 10/10] net: stmmac: dwmac-sun8i: Handle\n\tintegrated/external MDIOs","Message-ID":"<20170908140832.GB3037@Red>","References":"<20170908071156.5115-1-clabbe.montjoie@gmail.com>\n\t<20170908071156.5115-11-clabbe.montjoie@gmail.com>\n\t<20170908130520.GA11248@lunn.ch> <20170908132632.GA3037@Red>\n\t<20170908140020.GC25219@lunn.ch>","MIME-Version":"1.0","Content-Disposition":"inline","In-Reply-To":"<20170908140020.GC25219@lunn.ch>","User-Agent":"Mutt/1.7.2 (2016-11-26)","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170908_070902_355698_7ADFC6B4 ","X-CRM114-Status":"GOOD ( 16.34 )","X-Spam-Score":"-2.0 (--)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-2.0 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/,\n\tno\n\ttrust [2a00:1450:400c:c09:0:0:0:242 listed in] [list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail\n\tprovider (clabbe.montjoie[at]gmail.com)\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t-0.1 DKIM_VALID Message has at least one valid DKIM or DK signature\n\t0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n\tnot necessarily valid\n\t-0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n\tauthor's domain","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"mark.rutland@arm.com, devicetree@vger.kernel.org, f.fainelli@gmail.com, \n\talexandre.torgue@st.com, catalin.marinas@arm.com, will.deacon@arm.com,\n\tlinux@armlinux.org.uk, linux-kernel@vger.kernel.org, wens@csie.org,\n\trobh+dt@kernel.org, netdev@vger.kernel.org, peppe.cavallaro@st.com,\n\tmaxime.ripard@free-electrons.com, linux-arm-kernel@lists.infradead.org","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1765410,"web_url":"http://patchwork.ozlabs.org/comment/1765410/","msgid":"<20170908141736.GF25219@lunn.ch>","list_archive_url":null,"date":"2017-09-08T14:17:36","subject":"Re: [PATCH v5 10/10] net: stmmac: dwmac-sun8i: Handle\n\tintegrated/external MDIOs","submitter":{"id":13608,"url":"http://patchwork.ozlabs.org/api/people/13608/","name":"Andrew Lunn","email":"andrew@lunn.ch"},"content":"> > Do you know why the reset times out/fails?\n> > \n> \n> Because there are nothing connected to it.\n\nThat should not be an issue. A read should just return 0xffff. And it\nshould return 0xffff fast. The timing of the MDIO protocol is fixed. A\nread or a write takes a fixed number of cycles, independent of if\nthere is a device there or not. The bus data line has a pullup, so if\nyou try to access a missing device, you automatically read 0xffff.\n\n Andrew","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"g9MTf9ky\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xpfYk48lqz9s7G\n\tfor ;\n\tSat, 9 Sep 2017 00:18:18 +1000 (AEST)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dqK6n-0007o9-FD; Fri, 08 Sep 2017 14:18:13 +0000","from vps0.lunn.ch ([178.209.37.122])\n\tby bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dqK6f-0007jN-Mo for linux-arm-kernel@lists.infradead.org;\n\tFri, 08 Sep 2017 14:18:11 +0000","from andrew by vps0.lunn.ch with local (Exim 4.84_2)\n\t(envelope-from )\n\tid 1dqK6C-0007Re-MN; Fri, 08 Sep 2017 16:17:36 +0200"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:\n\tMessage-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=shnqspFqOOzqfWzS6YKHqvId1wKZEtmDJf/nVPsvWUc=;\n\tb=g9MTf9kyIJOEWi\n\tYsjDWr5hhZ6ys3pi4o1cGAMR8EBfdMijizqrMGxZph3EyTNthHoWjoELOni10YK0r5oXb+sFZ8GP/\n\tdUh/FGpqfxvhPBU8PTmtdDIhoRqbyQ+B6JjD9N40ShhjyTOK4b3rCNq9BIaEFxpVzohfoRh/BEx3v\n\tTB+PRCkXFcuKsUqdpIYd5KH6/yxNXQXErgAkFm7tY7qwfwn1VZKOuKh7pg+O/eCqlna4IlmfvhAGE\n\tIvMj7SXWqpeU9176+0ugAFddCihHbMQ7Wm1+OTxDm6tJ0X3pgK0otGuKlT+G9H+saC+1WQgDvOXFc\n\tfwW3vO/j0xAPqQt+9igg==;","Date":"Fri, 8 Sep 2017 16:17:36 +0200","From":"Andrew Lunn ","To":"Corentin Labbe ","Subject":"Re: [PATCH v5 10/10] net: stmmac: dwmac-sun8i: Handle\n\tintegrated/external MDIOs","Message-ID":"<20170908141736.GF25219@lunn.ch>","References":"<20170908071156.5115-1-clabbe.montjoie@gmail.com>\n\t<20170908071156.5115-11-clabbe.montjoie@gmail.com>\n\t<20170908130520.GA11248@lunn.ch> <20170908132632.GA3037@Red>\n\t<20170908140020.GC25219@lunn.ch> <20170908140832.GB3037@Red>","MIME-Version":"1.0","Content-Disposition":"inline","In-Reply-To":"<20170908140832.GB3037@Red>","User-Agent":"Mutt/1.5.23 (2014-03-12)","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170908_071805_917673_FFC44829 ","X-CRM114-Status":"UNSURE ( 8.27 )","X-CRM114-Notice":"Please train this message.","X-Spam-Score":"-1.9 (-)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-1.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-0.0 SPF_HELO_PASS SPF: HELO matches SPF record\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"mark.rutland@arm.com, devicetree@vger.kernel.org, f.fainelli@gmail.com, \n\talexandre.torgue@st.com, catalin.marinas@arm.com, will.deacon@arm.com,\n\tlinux@armlinux.org.uk, linux-kernel@vger.kernel.org, wens@csie.org,\n\trobh+dt@kernel.org, netdev@vger.kernel.org, peppe.cavallaro@st.com,\n\tmaxime.ripard@free-electrons.com, linux-arm-kernel@lists.infradead.org","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1765417,"web_url":"http://patchwork.ozlabs.org/comment/1765417/","msgid":"<20170908142825.GC3037@Red>","list_archive_url":null,"date":"2017-09-08T14:28:25","subject":"Re: [PATCH v5 10/10] net: stmmac: dwmac-sun8i: Handle\n\tintegrated/external MDIOs","submitter":{"id":64152,"url":"http://patchwork.ozlabs.org/api/people/64152/","name":"Corentin Labbe","email":"clabbe.montjoie@gmail.com"},"content":"On Fri, Sep 08, 2017 at 04:17:36PM +0200, Andrew Lunn wrote:\n> > > Do you know why the reset times out/fails?\n> > > \n> > \n> > Because there are nothing connected to it.\n> \n> That should not be an issue. A read should just return 0xffff. And it\n> should return 0xffff fast. The timing of the MDIO protocol is fixed. A\n> read or a write takes a fixed number of cycles, independent of if\n> there is a device there or not. The bus data line has a pullup, so if\n> you try to access a missing device, you automatically read 0xffff.\n> \n\nPerhaps, but the reality is that with nothing connected to it, the reset of the MAC timeout.\nCertainly, the MAC does not support finding no PHY.\n\nSo, to prevent an error message, and a \"freeze\" of the net process, the need_reset trick is necessary.\n\nRegards\nCorentin Labbe","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org header.b=\"rIq4FBQ9\"; \n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"g45+HDhj\"; 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charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1765993,"web_url":"http://patchwork.ozlabs.org/comment/1765993/","msgid":"<20170910185640.GA17417@Red>","list_archive_url":null,"date":"2017-09-10T18:56:40","subject":"Re: [PATCH v5 01/10] arm64: dts: allwinner: Restore EMAC changes","submitter":{"id":64152,"url":"http://patchwork.ozlabs.org/api/people/64152/","name":"Corentin Labbe","email":"clabbe.montjoie@gmail.com"},"content":"On Fri, Sep 08, 2017 at 03:39:04PM +0800, Chen-Yu Tsai wrote:\n> On Fri, Sep 8, 2017 at 3:36 PM, Corentin Labbe\n> wrote:\n> > On Fri, Sep 08, 2017 at 09:19:54AM +0200, Maxime Ripard wrote:\n> >> On Fri, Sep 08, 2017 at 09:11:47AM +0200, Corentin Labbe wrote:\n> >> > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts\n> >> > index 1c2387bd5df6..968908761194 100644\n> >> > --- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts\n> >> > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts\n> >> > @@ -50,6 +50,7 @@\n> >> > compatible = \"friendlyarm,nanopi-neo2\", \"allwinner,sun50i-h5\";\n> >> >\n> >> > aliases {\n> >> > + ethernet0 = &emac;\n> >> > serial0 = &uart0;\n> >> > };\n> >> >\n> >> > @@ -108,6 +109,22 @@\n> >> > status = \"okay\";\n> >> > };\n> >> >\n> >> > +&emac {\n> >> > + pinctrl-names = \"default\";\n> >> > + pinctrl-0 = <&emac_rgmii_pins>;\n> >> > + phy-supply = <®_gmac_3v3>;\n> >> > + phy-handle = <&ext_rgmii_phy>;\n> >> > + phy-mode = \"rgmii\";\n> >> > + status = \"okay\";\n> >> > +};\n> >> > +\n> >> > +&mdio {\n> >> > + ext_rgmii_phy: ethernet-phy@7 {\n> >> > + compatible = \"ethernet-phy-ieee802.3-c22\";\n> >> > + reg = <7>;\n> >> > + };\n> >> > +};\n> >> > +\n> >>\n> >> This won't compile, you don't have that node in the H5 DTSI.\n> >>\n> >\n> > Since H5 DTSI include arm/sunxi-h3-h5.dtsi it compiles.\n> > Furthermore, I restested just now and confirm, it compiles fine.\n> \n> The order of your patches are wrong. No individual patch should\n> introduce build failures, not just the whole patch series.\n> \n\nYes, I just miss-understood the reason of build failure.\nI will fix the order in the next serie.\n\nThanks\nCorentin Labbe","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org header.b=\"O00IsJss\"; \n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"fgohQPO8\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xr0g31sD0z9t2l\n\tfor ;\n\tMon, 11 Sep 2017 04:57:30 +1000 (AEST)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dr7Q5-00076P-Ot; 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charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1766379,"web_url":"http://patchwork.ozlabs.org/comment/1766379/","msgid":"<20170911161124.GD27599@lunn.ch>","list_archive_url":null,"date":"2017-09-11T16:11:24","subject":"Re: [PATCH v5 10/10] net: stmmac: dwmac-sun8i: Handle\n\tintegrated/external MDIOs","submitter":{"id":13608,"url":"http://patchwork.ozlabs.org/api/people/13608/","name":"Andrew Lunn","email":"andrew@lunn.ch"},"content":"On Fri, Sep 08, 2017 at 04:28:25PM +0200, Corentin Labbe wrote:\n> On Fri, Sep 08, 2017 at 04:17:36PM +0200, Andrew Lunn wrote:\n> > > > Do you know why the reset times out/fails?\n> > > > \n> > > \n> > > Because there are nothing connected to it.\n> > \n> > That should not be an issue. A read should just return 0xffff. And it\n> > should return 0xffff fast. The timing of the MDIO protocol is fixed. A\n> > read or a write takes a fixed number of cycles, independent of if\n> > there is a device there or not. The bus data line has a pullup, so if\n> > you try to access a missing device, you automatically read 0xffff.\n> > \n> \n> Perhaps, but the reality is that with nothing connected to it, the reset of the MAC timeout.\n> Certainly, the MAC does not support finding no PHY.\n\nAre you sure this is not because of the clock and reset?\n\n+ #address-cells = <1>;\n+ #size-cells = <0>;\n+ int_mii_phy: ethernet-phy@1 {\n+ compatible = \"ethernet-phy-ieee802.3-c22\";\n+ reg = <1>;\n+ clocks = <&ccu CLK_BUS_EPHY>;\n+ resets = <&ccu RST_BUS_EPHY>;\n\nThe way you describe it here, the clock and reset are for the PHY. But\nmaybe it is actually for the bus? I can understand a bus timing out if\nit has no clock, or it is held in reset. Try enabling the clock and\nreset when the internal bus is selected, not when the PHY on the bus\nis selected.\n\n\tAndrew","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org header.b=\"f2CNW8sr\"; \n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=infradead.org header.i=@infradead.org\n\theader.b=\"cN3AjtPn\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xrXyh3Zb4z9s7f\n\tfor ;\n\tTue, 12 Sep 2017 02:12:57 +1000 (AEST)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1drRKP-0004fj-JY; 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bh=u5ndSKaT1DYFnke5vInw7LxC3ACBYV8pKdYsT6kCQlo=;\n\tb=f2CNW8sr8zQ+2q\n\tgYvtn7a9gyYQJ5UfccsFXfBWvaKaSL9Qb/x6jOPsVkWWjsUQzqOzl3Mmn7hlkBu1q/qe0SQWrA7KS\n\t7w1RgNRWTSSxQz+FEJ/mL/DsK3jmrLohVBuGxL9jn76+Tp0uVeKO2ZaLgVPLtqolwnooA/4OpFH+1\n\tIDaJWgggfWFPMKJWc/xpxM4mBlyCEs//bkkg9SjvzytGHsmUyKM6yiygQIZpCjMyYE5bCrbXo8Hwv\n\tcFL065q/Kb86iwLcjmR1aMUbAtN3payMKBMA7ASBFyB2qGpVKyJjK1QHUBnev/PthcZCypdrPfgOF\n\tWutEeL8Ca8soOskyCS9A==;","v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=infradead.org; s=merlin.20170209;\n\th=In-Reply-To:Content-Type:MIME-Version:\n\tReferences:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To:\n\tContent-Transfer-Encoding:Content-ID:Content-Description:Resent-Date:\n\tResent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:\n\tList-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive;\n\tbh=Xvgf6djCKeImgVYmFn0YYXtM29iSF9wOkTQXa5PokSA=;\n\tb=cN3AjtPnw5maJENGr+aRSyTCJ\n\tJFoq8rjzwHsOAignX+zib1lS7AhxZ/Cu4C5YueEqG+AIjApGrnlXS15gByrqgsmy/LNDa+XhMWyMg\n\tG/4EpWuNk1vs8zJwEQzIx4IcsU9YG8CuLAzApBx+GCjjojYw4uajN9XonW2I4q0a+A7BMuPSbvukx\n\tI5qIwecqwRE5JEBG+unc6CSYdPAgJxCWxbMxDmUBBdjSEkZszBS1IWLdHmfDYhtHTQUIaTX+ex5lb\n\tOxp1eTNP1AUCGkAG8T/hkyP4yG18oNPKZq+/KK1giXd2SUf07NNQlLCm6dweUdxfO3yke0ZbBT4TK\n\tuH1C2mneg==;"],"Date":"Mon, 11 Sep 2017 18:11:24 +0200","From":"Andrew Lunn ","To":"Corentin Labbe ","Subject":"Re: [PATCH v5 10/10] net: stmmac: dwmac-sun8i: Handle\n\tintegrated/external MDIOs","Message-ID":"<20170911161124.GD27599@lunn.ch>","References":"<20170908071156.5115-1-clabbe.montjoie@gmail.com>\n\t<20170908071156.5115-11-clabbe.montjoie@gmail.com>\n\t<20170908130520.GA11248@lunn.ch> <20170908132632.GA3037@Red>\n\t<20170908140020.GC25219@lunn.ch> <20170908140832.GB3037@Red>\n\t<20170908141736.GF25219@lunn.ch> <20170908142825.GC3037@Red>","MIME-Version":"1.0","Content-Disposition":"inline","In-Reply-To":"<20170908142825.GC3037@Red>","User-Agent":"Mutt/1.5.23 (2014-03-12)","X-Spam-Note":"CRM114 invocation failed","X-Spam-Score":"-1.9 (-)","X-Spam-Report":"SpamAssassin version 3.4.1 on merlin.infradead.org summary:\n\tContent analysis details: (-1.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 SPF_HELO_PASS SPF: HELO matches SPF record\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"mark.rutland@arm.com, devicetree@vger.kernel.org, f.fainelli@gmail.com, \n\talexandre.torgue@st.com, catalin.marinas@arm.com, will.deacon@arm.com,\n\tlinux@armlinux.org.uk, linux-kernel@vger.kernel.org, wens@csie.org,\n\trobh+dt@kernel.org, netdev@vger.kernel.org, peppe.cavallaro@st.com,\n\tmaxime.ripard@free-electrons.com, linux-arm-kernel@lists.infradead.org","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1766515,"web_url":"http://patchwork.ozlabs.org/comment/1766515/","msgid":"<20170911201920.GA5983@lunn.ch>","list_archive_url":null,"date":"2017-09-11T20:19:20","subject":"Re: [PATCH v5 10/10] net: stmmac: dwmac-sun8i: Handle\n\tintegrated/external MDIOs","submitter":{"id":13608,"url":"http://patchwork.ozlabs.org/api/people/13608/","name":"Andrew Lunn","email":"andrew@lunn.ch"},"content":"> Even with CLK_BUS_EPHY/RST_BUS_EPHY enabled, the MAC reset timeout.\n> So no the CLK/RST are really for the PHY.\n\nThanks for trying that.\n\nYou said it was probably during scanning of the bus it times out. What\naddress is causing the timeout? 0 or 1? If the internal bus can only\nhave one PHY on it, maybe we need to set bus->phy_mask to 0x1?\n\n Andrew","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org header.b=\"Q35rzLEu\"; \n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=infradead.org header.i=@infradead.org\n\theader.b=\"f1dwZFfb\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xrfSC0QN9z9s5L\n\tfor ;\n\tTue, 12 Sep 2017 06:20:27 +1000 (AEST)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1drVBv-0007gT-KJ; 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charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1766737,"web_url":"http://patchwork.ozlabs.org/comment/1766737/","msgid":"<20170912075415.GA1358@Red>","list_archive_url":null,"date":"2017-09-12T07:54:15","subject":"Re: [PATCH v5 10/10] net: stmmac: dwmac-sun8i: Handle\n\tintegrated/external MDIOs","submitter":{"id":64152,"url":"http://patchwork.ozlabs.org/api/people/64152/","name":"Corentin Labbe","email":"clabbe.montjoie@gmail.com"},"content":"On Mon, Sep 11, 2017 at 10:19:20PM +0200, Andrew Lunn wrote:\n> > Even with CLK_BUS_EPHY/RST_BUS_EPHY enabled, the MAC reset timeout.\n> > So no the CLK/RST are really for the PHY.\n> \n> Thanks for trying that.\n> \n> You said it was probably during scanning of the bus it times out. What\n> address is causing the timeout? 0 or 1? If the internal bus can only\n> have one PHY on it, maybe we need to set bus->phy_mask to 0x1?\n> \n\nI have added a trace in begin and end of stmmac_mdio_read()\n\n[ 18.145451] libphy: stmmac: probed\n[ 18.148398] libphy: mdio_mux: probed\n[ 18.148650] dwmac-sun8i 1c30000.ethernet: Switch mux to internal PHY\n[ 18.248751] dwmac-sun8i 1c30000.ethernet: EMAC reset timeout\n[ 18.249297] libphy: mdio_mux: probed\n[ 18.249362] dwmac-sun8i 1c30000.ethernet: Switch mux to external PHY\n[ 18.249391] stmmac_mdio_read 0 2\n[ 18.249598] stmmac_mdio_read 0 2 1c\n[ 18.249623] stmmac_mdio_read 0 3\n[ 18.249811] stmmac_mdio_read 0 3 c915\n[ 20.737271] EXT4-fs (mmcblk0p1): re-mounted. Opts: (null)\n[ 31.294868] stmmac_mdio_read 0 0\n[ 31.295311] stmmac_mdio_read 0 0 1140\n\nIt seems that the timeout is unrelated to MDIO bus.\n\nRegards","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org header.b=\"WbXdPkjV\"; \n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"Dp0EP04w\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xrxsS6Gvvz9s7B\n\tfor ;\n\tTue, 12 Sep 2017 17:54:52 +1000 (AEST)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1drg1w-0001UP-Qr; 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a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-disposition:in-reply-to:user-agent;\n\tbh=YIBazUM2EgCh0VN8t9kDwV+QxrDefETvCWH0it0C/NU=;\n\tb=KI7z1Wvu6sp3Qr6jXR6k95EiGC6WK6ttqGkYo0XaCoR8YwYuNdoaU22ftnyW12OqFD\n\t21Igy1fI+xnIh1EH+igJWEbN6NdjFdR5XiAbJWcUYl9n7EG/uYwiR6XO6EULdtcQA0Yt\n\tFWYjlSH3LuKWYrgZqRHgEsQJGVGbm3ICFILfLxd+7uyRclSJqdwzzlYW4oFxX08OGB2x\n\tA2T6YnUT5jsFUjUD9NDoH5OPWKDkN9sUhuMiZMUStC4ANmFJs/W2ZdyvTjAZXx0Pg8yP\n\t3y0DUNKWM97oqRVdGfq27Xrg27BG97WDguV+s6077wDJsqg9SWA/l4AdBiKa+dkaHtQp\n\tD2hw==","X-Gm-Message-State":"AHPjjUix3DngjZBhyzBIXf7DL7pxwCDluO1qSaS5g04KdwqPQQR+PDE0\n\tKn/w4M+7L2RytA==","X-Google-Smtp-Source":"ADKCNb6rFYmG9ggRqEQqniuu0MYwRO1263fhZcUTBm2rC8ARePwUqgplXVukpMJb3e7Zwwmppc05+Q==","X-Received":"by 10.223.177.18 with SMTP id l18mr9086184wra.167.1505202862812; \n\tTue, 12 Sep 2017 00:54:22 -0700 (PDT)","Date":"Tue, 12 Sep 2017 09:54:15 +0200","From":"Corentin Labbe ","To":"Andrew Lunn ","Subject":"Re: [PATCH v5 10/10] net: stmmac: dwmac-sun8i: Handle\n\tintegrated/external MDIOs","Message-ID":"<20170912075415.GA1358@Red>","References":"<20170908071156.5115-11-clabbe.montjoie@gmail.com>\n\t<20170908130520.GA11248@lunn.ch> <20170908132632.GA3037@Red>\n\t<20170908140020.GC25219@lunn.ch> <20170908140832.GB3037@Red>\n\t<20170908141736.GF25219@lunn.ch> <20170908142825.GC3037@Red>\n\t<20170911161124.GD27599@lunn.ch> <20170911190850.GA2291@Red>\n\t<20170911201920.GA5983@lunn.ch>","MIME-Version":"1.0","Content-Disposition":"inline","In-Reply-To":"<20170911201920.GA5983@lunn.ch>","User-Agent":"Mutt/1.7.2 (2016-11-26)","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170912_005444_882157_6CBEF010 ","X-CRM114-Status":"GOOD ( 12.74 )","X-Spam-Score":"-2.0 (--)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-2.0 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/,\n\tno\n\ttrust [2a00:1450:400c:c0c:0:0:0:232 listed in] [list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail\n\tprovider (clabbe.montjoie[at]gmail.com)\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t-0.1 DKIM_VALID Message has at least one valid DKIM or DK signature\n\t0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n\tnot necessarily valid\n\t-0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n\tauthor's domain","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"mark.rutland@arm.com, devicetree@vger.kernel.org, f.fainelli@gmail.com, \n\talexandre.torgue@st.com, catalin.marinas@arm.com, will.deacon@arm.com,\n\tlinux@armlinux.org.uk, linux-kernel@vger.kernel.org, wens@csie.org,\n\trobh+dt@kernel.org, netdev@vger.kernel.org, peppe.cavallaro@st.com,\n\tmaxime.ripard@free-electrons.com, linux-arm-kernel@lists.infradead.org","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1768073,"web_url":"http://patchwork.ozlabs.org/comment/1768073/","msgid":"<20170913180734.xvazvf7thpqtssgz@rob-hp-laptop>","list_archive_url":null,"date":"2017-09-13T18:07:34","subject":"Re: [PATCH v5 02/10] dt-bindings: net: Restore sun8i dwmac binding","submitter":{"id":62529,"url":"http://patchwork.ozlabs.org/api/people/62529/","name":"Rob Herring (Arm)","email":"robh@kernel.org"},"content":"On Fri, Sep 08, 2017 at 09:11:48AM +0200, Corentin Labbe wrote:\n> This patch restore dt-bindings documentation about dwmac-sun8i\n> This reverts commit 8aa33ec2f481 (\"dt-bindings: net: Revert sun8i dwmac binding\")\n\nWhy?\n\n> \n> Signed-off-by: Corentin Labbe \n> ---\n> .../devicetree/bindings/net/dwmac-sun8i.txt | 84 ++++++++++++++++++++++\n> 1 file changed, 84 insertions(+)\n> create mode 100644 Documentation/devicetree/bindings/net/dwmac-sun8i.txt\n\nOtherwise,\n\nAcked-by: Rob Herring ","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; 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\n\tWed, 13 Sep 2017 11:07:35 -0700 (PDT)","Date":"Wed, 13 Sep 2017 13:07:34 -0500","From":"Rob Herring ","To":"Corentin Labbe ","Subject":"Re: [PATCH v5 02/10] dt-bindings: net: Restore sun8i dwmac binding","Message-ID":"<20170913180734.xvazvf7thpqtssgz@rob-hp-laptop>","References":"<20170908071156.5115-1-clabbe.montjoie@gmail.com>\n\t<20170908071156.5115-3-clabbe.montjoie@gmail.com>","MIME-Version":"1.0","Content-Disposition":"inline","In-Reply-To":"<20170908071156.5115-3-clabbe.montjoie@gmail.com>","User-Agent":"NeoMutt/20170113 (1.7.2)","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170913_110757_427933_114E9107 ","X-CRM114-Status":"UNSURE ( 9.26 )","X-CRM114-Notice":"Please train this message.","X-Spam-Score":"-3.8 (---)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-3.8 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/,\n\tno trust [209.85.223.193 listed in list.dnswl.org]\n\t0.5 RCVD_IN_SORBS_SPAM RBL: SORBS: sender is a spam source\n\t[209.85.223.193 listed in dnsbl.sorbs.net]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends\n\tin digit (robherring2[at]gmail.com)\n\t0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail\n\tprovider (robherring2[at]gmail.com)\n\t0.0 HEADER_FROM_DIFFERENT_DOMAINS From and EnvelopeFrom 2nd level\n\tmail domains are different\n\t-2.8 RCVD_IN_MSPIKE_H2 RBL: Average reputation (+2)\n\t[209.85.223.193 listed in wl.mailspike.net]\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t0.2 FREEMAIL_FORGED_FROMDOMAIN 2nd level domains in From and\n\tEnvelopeFrom freemail headers are different","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"mark.rutland@arm.com, andrew@lunn.ch, f.fainelli@gmail.com,\n\talexandre.torgue@st.com, devicetree@vger.kernel.org,\n\tcatalin.marinas@arm.com, will.deacon@arm.com, linux@armlinux.org.uk,\n\tlinux-kernel@vger.kernel.org, \n\twens@csie.org, netdev@vger.kernel.org, peppe.cavallaro@st.com,\n\tmaxime.ripard@free-electrons.com, linux-arm-kernel@lists.infradead.org","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1768078,"web_url":"http://patchwork.ozlabs.org/comment/1768078/","msgid":"<20170913182004.uniyo5opeilcfk7r@rob-hp-laptop>","list_archive_url":null,"date":"2017-09-13T18:20:04","subject":"Re: [PATCH v5 05/10] dt-bindings: net: dwmac-sun8i: update\n\tdocumentation about integrated PHY","submitter":{"id":62529,"url":"http://patchwork.ozlabs.org/api/people/62529/","name":"Rob Herring (Arm)","email":"robh@kernel.org"},"content":"On Fri, Sep 08, 2017 at 09:43:25AM +0200, Corentin Labbe wrote:\n> On Fri, Sep 08, 2017 at 09:25:38AM +0200, Maxime Ripard wrote:\n> > On Fri, Sep 08, 2017 at 09:11:51AM +0200, Corentin Labbe wrote:\n> > > This patch add documentation about the MDIO switch used on sun8i-h3-emac\n> > > for integrated PHY.\n> > > \n> > > Signed-off-by: Corentin Labbe \n> > > ---\n> > > .../devicetree/bindings/net/dwmac-sun8i.txt | 127 +++++++++++++++++++--\n> > > 1 file changed, 120 insertions(+), 7 deletions(-)\n> > > \n> > > diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt\n> > > index 725f3b187886..3fa0e54825ea 100644\n> > > --- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt\n> > > +++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt\n> > > @@ -39,7 +39,7 @@ Optional properties for the following compatibles:\n> > > - allwinner,leds-active-low: EPHY LEDs are active low\n> > > \n> > > Required child node of emac:\n> > > -- mdio bus node: should be named mdio\n> > > +- mdio bus node: should be labelled mdio\n> > \n> > labels do not end up in the final DT (while the names do) so why are\n> > you making this change?\n> > \n> \n> I misunderstood label/name.\n> Anyway, this contrainst should leave due to \"snps,dwmac-mdio MDIOs are automatically registered\"\n> \n> > > \n> > > Required properties of the mdio node:\n> > > - #address-cells: shall be 1\n> > > @@ -48,14 +48,28 @@ Required properties of the mdio node:\n> > > The device node referenced by \"phy\" or \"phy-handle\" should be a child node\n> > > of the mdio node. See phy.txt for the generic PHY bindings.\n> > > \n> > > -Required properties of the phy node with the following compatibles:\n> > > +The following compatibles require an mdio-mux node called \"mdio-mux\":\n> > > + - \"allwinner,sun8i-h3-emac\"\n> > > + - \"allwinner,sun8i-v3s-emac\":\n> > > +Required properties for the mdio-mux node:\n> > > + - compatible = \"mdio-mux\"\n> > > + - one child mdio for the integrated mdio\n> > > + - one child mdio for the external mdio if present (V3s have none)\n> > > +Required properties for the mdio-mux children node:\n> > > + - reg: 0 for internal MDIO bus, 1 for external MDIO bus\n> > > +\n> > > +The following compatibles require a PHY node representing the integrated\n> > > +PHY, under the integrated MDIO bus node if an mdio-mux node is used:\n> > > - \"allwinner,sun8i-h3-emac\",\n> > > - \"allwinner,sun8i-v3s-emac\":\n> > > +\n> > > +Required properties of the integrated phy node:\n> > > - clocks: a phandle to the reference clock for the EPHY\n> > > - resets: a phandle to the reset control for the EPHY\n> > > +- phy-is-integrated\n> > > +- Should be a child of the integrated mdio\n> > \n> > I'm not sure what you mean by that, you ask that it should (so not\n> > required?) be a child of the integrated mdio...\n> > \n> \n> I will change words to \"must\"\n> \n> > > \n> > > -Example:\n> > > -\n> > > +Example with integrated PHY:\n> > > emac: ethernet@1c0b000 {\n> > > \tcompatible = \"allwinner,sun8i-h3-emac\";\n> > > \tsyscon = <&syscon>;\n> > > @@ -72,13 +86,112 @@ emac: ethernet@1c0b000 {\n> > > \tphy-handle = <&int_mii_phy>;\n> > > \tphy-mode = \"mii\";\n> > > \tallwinner,leds-active-low;\n> > > +\n> > > +\tmdio0: mdio {\n> > \n> > (You don't label it mdio here, unlike what was asked before)\n> > \n> > > +\t\t#address-cells = <1>;\n> > > +\t\t#size-cells = <0>;\n> > > +\t\tcompatible = \"snps,dwmac-mdio\";\n> > > +\t};\n> > \n> > I think Rob wanted that node gone?\n> > \n> \n> MDIO mux does not work without a parent MDIO, either gived by \"parent-bus\" or directly via mdio_mux_init() (like it is the case in dwmac-sun8i)\n\nIs the MDIO controller \"allwinner,sun8i-h3-emac\" or \"snps,dwmac-mdio\"? \nIf the latter, then I think the node is fine, but then the mux should be \na child node of it. IOW, the child of an MDIO controller should either \nbe a mux node or slave devices.\n\n> \n> > > +\tmdio-mux {\n> > > +\t\tcompatible = \"mdio-mux\";\n> > > +\t\t#address-cells = <1>;\n> > > +\t\t#size-cells = <0>;\n> > > +\n> > > +\t\tint_mdio: mdio@1 {\n> > > +\t\t\treg = <0>;\n\nunit address of 1 and reg prop of 0 don't match. Build your dtb with \nW=2.\n\n> > > +\t\t\t#address-cells = <1>;\n> > > +\t\t\t#size-cells = <0>;\n> > > +\t\t\tint_mii_phy: ethernet-phy@1 {\n> > > +\t\t\t\treg = <1>;\n> > > +\t\t\t\tclocks = <&ccu CLK_BUS_EPHY>;\n> > > +\t\t\t\tresets = <&ccu RST_BUS_EPHY>;\n> > > +\t\t\t\tphy-is-integrated\n\nMissing ;\n\n> > > +\t\t\t};\n> > > +\t\t};\n> > \n> > ... And in your example it's a child of the mdio mux?\n> > \n> \n> So I confirm, integrated PHY must be a child of integrated MDIO (that must be a child of mdio-mux).\n> The example is good.\n> \n> > > +\t\text_mdio: mdio@0 {\n> > > +\t\t\treg = <1>;\n\nAnother unit address mismatch.\n\nRob","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"NJtiWK7h\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xsqj32DLtz9sNr\n\tfor ;\n\tThu, 14 Sep 2017 04:20:37 +1000 (AEST)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dsCH2-0002JJ-9K; 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\n\tWed, 13 Sep 2017 11:20:05 -0700 (PDT)","Date":"Wed, 13 Sep 2017 13:20:04 -0500","From":"Rob Herring ","To":"Corentin Labbe ","Subject":"Re: [PATCH v5 05/10] dt-bindings: net: dwmac-sun8i: update\n\tdocumentation about integrated PHY","Message-ID":"<20170913182004.uniyo5opeilcfk7r@rob-hp-laptop>","References":"<20170908071156.5115-1-clabbe.montjoie@gmail.com>\n\t<20170908071156.5115-6-clabbe.montjoie@gmail.com>\n\t<20170908072538.rqsp6dobwsqmzrsr@flea.lan>\n\t<20170908074325.GB29999@Red>","MIME-Version":"1.0","Content-Disposition":"inline","In-Reply-To":"<20170908074325.GB29999@Red>","User-Agent":"NeoMutt/20170113 (1.7.2)","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170913_112028_096575_7902C0CD ","X-CRM114-Status":"GOOD ( 29.03 )","X-Spam-Score":"-3.8 (---)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-3.8 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t0.5 RCVD_IN_SORBS_SPAM RBL: SORBS: sender is a spam source\n\t[209.85.223.194 listed in dnsbl.sorbs.net]\n\t-2.8 RCVD_IN_MSPIKE_H2 RBL: Average reputation (+2)\n\t[209.85.223.194 listed in wl.mailspike.net]\n\t-0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/,\n\tno trust [209.85.223.194 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends\n\tin digit (robherring2[at]gmail.com)\n\t0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail\n\tprovider (robherring2[at]gmail.com)\n\t0.0 HEADER_FROM_DIFFERENT_DOMAINS From and EnvelopeFrom 2nd level\n\tmail domains are different\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t0.2 FREEMAIL_FORGED_FROMDOMAIN 2nd level domains in From and\n\tEnvelopeFrom freemail headers are different","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"mark.rutland@arm.com, andrew@lunn.ch, f.fainelli@gmail.com,\n\talexandre.torgue@st.com, devicetree@vger.kernel.org,\n\tcatalin.marinas@arm.com, will.deacon@arm.com, linux@armlinux.org.uk,\n\tlinux-kernel@vger.kernel.org, \n\twens@csie.org, netdev@vger.kernel.org, peppe.cavallaro@st.com,\n\tMaxime Ripard ,\n\tlinux-arm-kernel@lists.infradead.org","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1768773,"web_url":"http://patchwork.ozlabs.org/comment/1768773/","msgid":"<20170914183136.GA4021@Red>","list_archive_url":null,"date":"2017-09-14T18:31:36","subject":"Re: [PATCH v5 02/10] dt-bindings: net: Restore sun8i dwmac binding","submitter":{"id":64152,"url":"http://patchwork.ozlabs.org/api/people/64152/","name":"Corentin Labbe","email":"clabbe.montjoie@gmail.com"},"content":"On Wed, Sep 13, 2017 at 01:07:34PM -0500, Rob Herring wrote:\n> On Fri, Sep 08, 2017 at 09:11:48AM +0200, Corentin Labbe wrote:\n> > This patch restore dt-bindings documentation about dwmac-sun8i\n> > This reverts commit 8aa33ec2f481 (\"dt-bindings: net: Revert sun8i dwmac binding\")\n> \n> Why?\n> \n\nI have put the reason in cover-letter and forget to put it in here also.\nI fix that in next series.\n\nThanks","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; 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charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1768790,"web_url":"http://patchwork.ozlabs.org/comment/1768790/","msgid":"<20170914191949.GA3796@lunn.ch>","list_archive_url":null,"date":"2017-09-14T19:19:49","subject":"Re: [PATCH v5 05/10] dt-bindings: net: dwmac-sun8i: update\n\tdocumentation about integrated PHY","submitter":{"id":13608,"url":"http://patchwork.ozlabs.org/api/people/13608/","name":"Andrew Lunn","email":"andrew@lunn.ch"},"content":"> > Is the MDIO controller \"allwinner,sun8i-h3-emac\" or \"snps,dwmac-mdio\"? \n> > If the latter, then I think the node is fine, but then the mux should be \n> > a child node of it. IOW, the child of an MDIO controller should either \n> > be a mux node or slave devices.\n\nHi Rob\n\nUp until now, children of an MDIO bus have been MDIO devices. Those\nMDIO devices are either Ethernet PHYs, Ethernet Switches, or the\noddball devices that Broadcom iProc has, like generic PHYs.\n\nWe have never had MDIO-muxes as MDIO children. A Mux is not an MDIO\ndevice, and does not have the properties of an MDIO device. It is not\naddressable on the MDIO bus. The current MUXes are addressed via GPIOs\nor MMIO.\n\nThere other similar cases. i2c-mux-gpio is not a child of an i2c bus,\nnor i2c-mux-reg or gpio-mux. nxp,pca9548 is however a child of the i2c\nbus, because it is an i2c device itself...\n\nIf the MDIO mux was an MDIO device, i would agree with you. Bit it is\nnot, so lets not make it a child.\n\n\t Andrew","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"rDbCtTR1\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xtSzh5qZkz9t3H\n\tfor ;\n\tFri, 15 Sep 2017 05:20:32 +1000 (AEST)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dsZgV-0003uP-VK; Thu, 14 Sep 2017 19:20:23 +0000","from vps0.lunn.ch ([185.16.172.187])\n\tby bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dsZgS-0002gj-KS for linux-arm-kernel@lists.infradead.org;\n\tThu, 14 Sep 2017 19:20:22 +0000","from andrew by vps0.lunn.ch with local (Exim 4.84_2)\n\t(envelope-from )\n\tid 1dsZfx-00016S-FE; Thu, 14 Sep 2017 21:19:49 +0200"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:\n\tMessage-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=t792F7FAfcNVFYIYMd1PPDbVG+VVeOADxFJ2lyZBNYs=;\n\tb=rDbCtTR1k62g1V\n\twvWn13mYO4IBlSNvhlus0L5nrbPLNqD5oeAoxPLrriGoPRHWboYTkNGLcg8S+YdmtOhUZe/EyBMW6\n\tAh6ubNfPWIrcK8pn4Ca56GnGO7+1+2Z1v948Eh+/szNevbUdZh982GF46LAajmtz/w24PiAax4+wf\n\tEJRNzcR2NlKllNuzhTn8l1cLdEMHhZMXq31P/yhfBsuzhGRGAXl86mYoS+gF/aDuAPbXCg09XhK/Q\n\t0khbQ7ffDvVLNZiBi0IgaCKT1wzvfLy/qWh4bow9d9Iy8uM0CADYv8AsVCAaYmP84a77tjm8ORuMV\n\t+/Dwqbs1SshsP0HoLRpg==;","Date":"Thu, 14 Sep 2017 21:19:49 +0200","From":"Andrew Lunn ","To":"Corentin Labbe ","Subject":"Re: [PATCH v5 05/10] dt-bindings: net: dwmac-sun8i: update\n\tdocumentation about integrated PHY","Message-ID":"<20170914191949.GA3796@lunn.ch>","References":"<20170908071156.5115-1-clabbe.montjoie@gmail.com>\n\t<20170908071156.5115-6-clabbe.montjoie@gmail.com>\n\t<20170908072538.rqsp6dobwsqmzrsr@flea.lan>\n\t<20170908074325.GB29999@Red>\n\t<20170913182004.uniyo5opeilcfk7r@rob-hp-laptop>\n\t<20170914185301.GB4021@Red>","MIME-Version":"1.0","Content-Disposition":"inline","In-Reply-To":"<20170914185301.GB4021@Red>","User-Agent":"Mutt/1.5.23 (2014-03-12)","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170914_122020_837543_FBBC5751 ","X-CRM114-Status":"UNSURE ( 8.65 )","X-CRM114-Notice":"Please train this message.","X-Spam-Score":"-1.9 (-)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-1.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-0.0 SPF_HELO_PASS SPF: HELO matches SPF record\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"mark.rutland@arm.com, Rob Herring , f.fainelli@gmail.com,\n\talexandre.torgue@st.com, devicetree@vger.kernel.org,\n\tcatalin.marinas@arm.com, will.deacon@arm.com, linux@armlinux.org.uk,\n\tlinux-kernel@vger.kernel.org, \n\twens@csie.org, netdev@vger.kernel.org, peppe.cavallaro@st.com,\n\tMaxime Ripard ,\n\tlinux-arm-kernel@lists.infradead.org","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1768805,"web_url":"http://patchwork.ozlabs.org/comment/1768805/","msgid":"<20170914185301.GB4021@Red>","list_archive_url":null,"date":"2017-09-14T18:53:01","subject":"Re: [PATCH v5 05/10] dt-bindings: net: dwmac-sun8i: update\n\tdocumentation about integrated PHY","submitter":{"id":64152,"url":"http://patchwork.ozlabs.org/api/people/64152/","name":"Corentin Labbe","email":"clabbe.montjoie@gmail.com"},"content":"On Wed, Sep 13, 2017 at 01:20:04PM -0500, Rob Herring wrote:\n> On Fri, Sep 08, 2017 at 09:43:25AM +0200, Corentin Labbe wrote:\n> > On Fri, Sep 08, 2017 at 09:25:38AM +0200, Maxime Ripard wrote:\n> > > On Fri, Sep 08, 2017 at 09:11:51AM +0200, Corentin Labbe wrote:\n> > > > This patch add documentation about the MDIO switch used on sun8i-h3-emac\n> > > > for integrated PHY.\n> > > > \n> > > > Signed-off-by: Corentin Labbe \n> > > > ---\n> > > > .../devicetree/bindings/net/dwmac-sun8i.txt | 127 +++++++++++++++++++--\n> > > > 1 file changed, 120 insertions(+), 7 deletions(-)\n> > > > \n> > > > diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt\n> > > > index 725f3b187886..3fa0e54825ea 100644\n> > > > --- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt\n> > > > +++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt\n> > > > @@ -39,7 +39,7 @@ Optional properties for the following compatibles:\n> > > > - allwinner,leds-active-low: EPHY LEDs are active low\n> > > > \n> > > > Required child node of emac:\n> > > > -- mdio bus node: should be named mdio\n> > > > +- mdio bus node: should be labelled mdio\n> > > \n> > > labels do not end up in the final DT (while the names do) so why are\n> > > you making this change?\n> > > \n> > \n> > I misunderstood label/name.\n> > Anyway, this contrainst should leave due to \"snps,dwmac-mdio MDIOs are automatically registered\"\n> > \n> > > > \n> > > > Required properties of the mdio node:\n> > > > - #address-cells: shall be 1\n> > > > @@ -48,14 +48,28 @@ Required properties of the mdio node:\n> > > > The device node referenced by \"phy\" or \"phy-handle\" should be a child node\n> > > > of the mdio node. See phy.txt for the generic PHY bindings.\n> > > > \n> > > > -Required properties of the phy node with the following compatibles:\n> > > > +The following compatibles require an mdio-mux node called \"mdio-mux\":\n> > > > + - \"allwinner,sun8i-h3-emac\"\n> > > > + - \"allwinner,sun8i-v3s-emac\":\n> > > > +Required properties for the mdio-mux node:\n> > > > + - compatible = \"mdio-mux\"\n> > > > + - one child mdio for the integrated mdio\n> > > > + - one child mdio for the external mdio if present (V3s have none)\n> > > > +Required properties for the mdio-mux children node:\n> > > > + - reg: 0 for internal MDIO bus, 1 for external MDIO bus\n> > > > +\n> > > > +The following compatibles require a PHY node representing the integrated\n> > > > +PHY, under the integrated MDIO bus node if an mdio-mux node is used:\n> > > > - \"allwinner,sun8i-h3-emac\",\n> > > > - \"allwinner,sun8i-v3s-emac\":\n> > > > +\n> > > > +Required properties of the integrated phy node:\n> > > > - clocks: a phandle to the reference clock for the EPHY\n> > > > - resets: a phandle to the reset control for the EPHY\n> > > > +- phy-is-integrated\n> > > > +- Should be a child of the integrated mdio\n> > > \n> > > I'm not sure what you mean by that, you ask that it should (so not\n> > > required?) be a child of the integrated mdio...\n> > > \n> > \n> > I will change words to \"must\"\n> > \n> > > > \n> > > > -Example:\n> > > > -\n> > > > +Example with integrated PHY:\n> > > > emac: ethernet@1c0b000 {\n> > > > \tcompatible = \"allwinner,sun8i-h3-emac\";\n> > > > \tsyscon = <&syscon>;\n> > > > @@ -72,13 +86,112 @@ emac: ethernet@1c0b000 {\n> > > > \tphy-handle = <&int_mii_phy>;\n> > > > \tphy-mode = \"mii\";\n> > > > \tallwinner,leds-active-low;\n> > > > +\n> > > > +\tmdio0: mdio {\n> > > \n> > > (You don't label it mdio here, unlike what was asked before)\n> > > \n> > > > +\t\t#address-cells = <1>;\n> > > > +\t\t#size-cells = <0>;\n> > > > +\t\tcompatible = \"snps,dwmac-mdio\";\n> > > > +\t};\n> > > \n> > > I think Rob wanted that node gone?\n> > > \n> > \n> > MDIO mux does not work without a parent MDIO, either gived by \"parent-bus\" or directly via mdio_mux_init() (like it is the case in dwmac-sun8i)\n> \n> Is the MDIO controller \"allwinner,sun8i-h3-emac\" or \"snps,dwmac-mdio\"? \n> If the latter, then I think the node is fine, but then the mux should be \n> a child node of it. IOW, the child of an MDIO controller should either \n> be a mux node or slave devices.\n> \n\nIt will be snps,dwmac-mdio but putting mdio-mux as a child of it (the mdio node) give me:\n[ 18.175338] libphy: stmmac: probed\n[ 18.175379] mdio_bus stmmac-0: /soc/ethernet@1c30000/mdio/mdio-mux has invalid PHY address\n[ 18.175408] mdio_bus stmmac-0: scan phy mdio-mux at address 0\n[ 18.175450] mdio_bus stmmac-0: scan phy mdio-mux at address 1\n[ 18.175482] mdio_bus stmmac-0: scan phy mdio-mux at address 2\n[ 18.175513] mdio_bus stmmac-0: scan phy mdio-mux at address 3\n[ 18.175544] mdio_bus stmmac-0: scan phy mdio-mux at address 4\n[ 18.175575] mdio_bus stmmac-0: scan phy mdio-mux at address 5\n[ 18.175607] mdio_bus stmmac-0: scan phy mdio-mux at address 6\n[ 18.175638] mdio_bus stmmac-0: scan phy mdio-mux at address 7\n[ 18.175669] mdio_bus stmmac-0: scan phy mdio-mux at address 8\n[ 18.175700] mdio_bus stmmac-0: scan phy mdio-mux at address 9\n[ 18.175731] mdio_bus stmmac-0: scan phy mdio-mux at address 10\n[ 18.175762] mdio_bus stmmac-0: scan phy mdio-mux at address 11\n[ 18.175795] mdio_bus stmmac-0: scan phy mdio-mux at address 12\n[ 18.175827] mdio_bus stmmac-0: scan phy mdio-mux at address 13\n[ 18.175858] mdio_bus stmmac-0: scan phy mdio-mux at address 14\n[ 18.175889] mdio_bus stmmac-0: scan phy mdio-mux at address 15\n[ 18.175919] mdio_bus stmmac-0: scan phy mdio-mux at address 16\n[ 18.175951] mdio_bus stmmac-0: scan phy mdio-mux at address 17\n[ 18.175982] mdio_bus stmmac-0: scan phy mdio-mux at address 18\n[ 18.176014] mdio_bus stmmac-0: scan phy mdio-mux at address 19\n[ 18.176045] mdio_bus stmmac-0: scan phy mdio-mux at address 20\n[ 18.176076] mdio_bus stmmac-0: scan phy mdio-mux at address 21\n[ 18.176107] mdio_bus stmmac-0: scan phy mdio-mux at address 22\n[ 18.176139] mdio_bus stmmac-0: scan phy mdio-mux at address 23\n[ 18.176170] mdio_bus stmmac-0: scan phy mdio-mux at address 24\n[ 18.176202] mdio_bus stmmac-0: scan phy mdio-mux at address 25\n[ 18.176233] mdio_bus stmmac-0: scan phy mdio-mux at address 26\n[ 18.176271] mdio_bus stmmac-0: scan phy mdio-mux at address 27\n[ 18.176320] mdio_bus stmmac-0: scan phy mdio-mux at address 28\n[ 18.176371] mdio_bus stmmac-0: scan phy mdio-mux at address 29\n[ 18.176420] mdio_bus stmmac-0: scan phy mdio-mux at address 30\n[ 18.176452] mdio_bus stmmac-0: scan phy mdio-mux at address 31\n\nAdding a fake to mdio-mux remove it.\nDoes it is acceptable ? or perhaps patching of_mdiobus_register() to not scan node with compatible \"mdio-mux\".\n\n> > \n> > > > +\tmdio-mux {\n> > > > +\t\tcompatible = \"mdio-mux\";\n> > > > +\t\t#address-cells = <1>;\n> > > > +\t\t#size-cells = <0>;\n> > > > +\n> > > > +\t\tint_mdio: mdio@1 {\n> > > > +\t\t\treg = <0>;\n> \n> unit address of 1 and reg prop of 0 don't match. Build your dtb with \n> W=2.\n> \n\nreg are arbitrary value (like mdio-mux-mmioreg), but in our case it is easy to fix this warning.\n\nThanks","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org header.b=\"RVp6o6l9\"; \n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=infradead.org header.i=@infradead.org\n\theader.b=\"yGnLTmwd\"; \n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"u3a/BJoT\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xtTcy6mZDz9s7f\n\tfor ;\n\tFri, 15 Sep 2017 05:49:20 +1000 (AEST)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dsa8Q-0008Lq-SX; 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\n\tThu, 14 Sep 2017 11:53:09 -0700 (PDT)","Date":"Thu, 14 Sep 2017 20:53:01 +0200","From":"Corentin Labbe ","To":"Rob Herring ","Subject":"Re: [PATCH v5 05/10] dt-bindings: net: dwmac-sun8i: update\n\tdocumentation about integrated PHY","Message-ID":"<20170914185301.GB4021@Red>","References":"<20170908071156.5115-1-clabbe.montjoie@gmail.com>\n\t<20170908071156.5115-6-clabbe.montjoie@gmail.com>\n\t<20170908072538.rqsp6dobwsqmzrsr@flea.lan>\n\t<20170908074325.GB29999@Red>\n\t<20170913182004.uniyo5opeilcfk7r@rob-hp-laptop>","MIME-Version":"1.0","Content-Disposition":"inline","In-Reply-To":"<20170913182004.uniyo5opeilcfk7r@rob-hp-laptop>","User-Agent":"Mutt/1.7.2 (2016-11-26)","X-Spam-Note":"CRM114 invocation failed","X-Spam-Score":"-2.0 (--)","X-Spam-Report":"SpamAssassin version 3.4.1 on merlin.infradead.org summary:\n\tContent analysis details: (-2.0 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/,\n\tno\n\ttrust [2a00:1450:400c:c0c:0:0:0:241 listed in] [list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail\n\tprovider (clabbe.montjoie[at]gmail.com)\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n\tnot necessarily valid\n\t-0.1 DKIM_VALID Message has at least one valid DKIM or DK signature\n\t-0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n\tauthor's domain","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"mark.rutland@arm.com, andrew@lunn.ch, f.fainelli@gmail.com,\n\talexandre.torgue@st.com, devicetree@vger.kernel.org,\n\tcatalin.marinas@arm.com, will.deacon@arm.com, linux@armlinux.org.uk,\n\tlinux-kernel@vger.kernel.org, \n\twens@csie.org, netdev@vger.kernel.org, peppe.cavallaro@st.com,\n\tMaxime Ripard ,\n\tlinux-arm-kernel@lists.infradead.org","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1770663,"web_url":"http://patchwork.ozlabs.org/comment/1770663/","msgid":"<20170919053112.GA15105@Red>","list_archive_url":null,"date":"2017-09-19T05:31:12","subject":"Re: [PATCH v5 05/10] dt-bindings: net: dwmac-sun8i: update\n\tdocumentation about integrated PHY","submitter":{"id":64152,"url":"http://patchwork.ozlabs.org/api/people/64152/","name":"Corentin Labbe","email":"clabbe.montjoie@gmail.com"},"content":"On Thu, Sep 14, 2017 at 09:19:49PM +0200, Andrew Lunn wrote:\n> > > Is the MDIO controller \"allwinner,sun8i-h3-emac\" or \"snps,dwmac-mdio\"? \n> > > If the latter, then I think the node is fine, but then the mux should be \n> > > a child node of it. IOW, the child of an MDIO controller should either \n> > > be a mux node or slave devices.\n> \n> Hi Rob\n> \n> Up until now, children of an MDIO bus have been MDIO devices. Those\n> MDIO devices are either Ethernet PHYs, Ethernet Switches, or the\n> oddball devices that Broadcom iProc has, like generic PHYs.\n> \n> We have never had MDIO-muxes as MDIO children. A Mux is not an MDIO\n> device, and does not have the properties of an MDIO device. It is not\n> addressable on the MDIO bus. The current MUXes are addressed via GPIOs\n> or MMIO.\n> \n> There other similar cases. i2c-mux-gpio is not a child of an i2c bus,\n> nor i2c-mux-reg or gpio-mux. nxp,pca9548 is however a child of the i2c\n> bus, because it is an i2c device itself...\n> \n> If the MDIO mux was an MDIO device, i would agree with you. Bit it is\n> not, so lets not make it a child.\n> \n> \t Andrew\n\nHello Rob, could you anwser/confirm please.\nI wait on this for sending the next version.\n\nThanks\nRegards\nCorentin Labbe","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org header.b=\"ccj7oOK6\"; \n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"njT8Mud9\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xxBM92dVfz9s78\n\tfor ;\n\tTue, 19 Sep 2017 15:31:49 +1000 (AEST)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1duB8M-0003eo-4h; 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charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1771516,"web_url":"http://patchwork.ozlabs.org/comment/1771516/","msgid":"","list_archive_url":null,"date":"2017-09-20T02:49:52","subject":"Re: [PATCH v5 05/10] dt-bindings: net: dwmac-sun8i: update\n\tdocumentation about integrated PHY","submitter":{"id":62529,"url":"http://patchwork.ozlabs.org/api/people/62529/","name":"Rob Herring (Arm)","email":"robh@kernel.org"},"content":"On Thu, Sep 14, 2017 at 2:19 PM, Andrew Lunn wrote:\n>> > Is the MDIO controller \"allwinner,sun8i-h3-emac\" or \"snps,dwmac-mdio\"?\n>> > If the latter, then I think the node is fine, but then the mux should be\n>> > a child node of it. IOW, the child of an MDIO controller should either\n>> > be a mux node or slave devices.\n>\n> Hi Rob\n>\n> Up until now, children of an MDIO bus have been MDIO devices. Those\n> MDIO devices are either Ethernet PHYs, Ethernet Switches, or the\n> oddball devices that Broadcom iProc has, like generic PHYs.\n>\n> We have never had MDIO-muxes as MDIO children. A Mux is not an MDIO\n> device, and does not have the properties of an MDIO device. It is not\n> addressable on the MDIO bus. The current MUXes are addressed via GPIOs\n> or MMIO.\n\nThe DT parent/child relationship defines the bus topology. We describe\nMDIO buses in that way and if a mux is sitting between the controller\nand the devices, then the DT hierarchy should reflect that. Now\nsometimes we have 2 options for what interface has the parent/child\nrelationship (e.g. an I2C controlled USB hub chip), but in this case\nwe don't.\n\n> There other similar cases. i2c-mux-gpio is not a child of an i2c bus,\n> nor i2c-mux-reg or gpio-mux. nxp,pca9548 is however a child of the i2c\n> bus, because it is an i2c device itself...\n\nSome are i2c controlled mux devices, but some can be GPIO controlled.\n\n>\n> If the MDIO mux was an MDIO device, i would agree with you. Bit it is\n> not, so lets not make it a child.\n>\n> Andrew\n>\n> _______________________________________________\n> linux-arm-kernel mailing list\n> linux-arm-kernel@lists.infradead.org\n> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"ZJOdQimT\"; dkim-atps=neutral","mail.kernel.org;\n\tdmarc=none (p=none dis=none) header.from=kernel.org","mail.kernel.org;\n\tspf=none smtp.mailfrom=robh@kernel.org"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xxkkt5F5cz9s78\n\tfor ;\n\tWed, 20 Sep 2017 12:50:46 +1000 (AEST)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1duV61-00036t-LM; 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charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1772147,"web_url":"http://patchwork.ozlabs.org/comment/1772147/","msgid":"<20170920182350.GA21482@Red>","list_archive_url":null,"date":"2017-09-20T18:23:50","subject":"Re: [PATCH v5 05/10] dt-bindings: net: dwmac-sun8i: update\n\tdocumentation about integrated PHY","submitter":{"id":64152,"url":"http://patchwork.ozlabs.org/api/people/64152/","name":"Corentin Labbe","email":"clabbe.montjoie@gmail.com"},"content":"On Tue, Sep 19, 2017 at 09:49:52PM -0500, Rob Herring wrote:\n> On Thu, Sep 14, 2017 at 2:19 PM, Andrew Lunn wrote:\n> >> > Is the MDIO controller \"allwinner,sun8i-h3-emac\" or \"snps,dwmac-mdio\"?\n> >> > If the latter, then I think the node is fine, but then the mux should be\n> >> > a child node of it. IOW, the child of an MDIO controller should either\n> >> > be a mux node or slave devices.\n> >\n> > Hi Rob\n> >\n> > Up until now, children of an MDIO bus have been MDIO devices. Those\n> > MDIO devices are either Ethernet PHYs, Ethernet Switches, or the\n> > oddball devices that Broadcom iProc has, like generic PHYs.\n> >\n> > We have never had MDIO-muxes as MDIO children. A Mux is not an MDIO\n> > device, and does not have the properties of an MDIO device. It is not\n> > addressable on the MDIO bus. The current MUXes are addressed via GPIOs\n> > or MMIO.\n> \n> The DT parent/child relationship defines the bus topology. We describe\n> MDIO buses in that way and if a mux is sitting between the controller\n> and the devices, then the DT hierarchy should reflect that. Now\n> sometimes we have 2 options for what interface has the parent/child\n> relationship (e.g. an I2C controlled USB hub chip), but in this case\n> we don't.\n> \n\nPutting mdio-mux as a child of it (the mdio node) give me:\n[ 18.175338] libphy: stmmac: probed\n[ 18.175379] mdio_bus stmmac-0: /soc/ethernet@1c30000/mdio/mdio-mux has invalid PHY address\n[ 18.175408] mdio_bus stmmac-0: scan phy mdio-mux at address 0\n[ 18.175450] mdio_bus stmmac-0: scan phy mdio-mux at address 1\n[ 18.175482] mdio_bus stmmac-0: scan phy mdio-mux at address 2\n[ 18.175513] mdio_bus stmmac-0: scan phy mdio-mux at address 3\n[ 18.175544] mdio_bus stmmac-0: scan phy mdio-mux at address 4\n[ 18.175575] mdio_bus stmmac-0: scan phy mdio-mux at address 5\n[ 18.175607] mdio_bus stmmac-0: scan phy mdio-mux at address 6\n[ 18.175638] mdio_bus stmmac-0: scan phy mdio-mux at address 7\n[ 18.175669] mdio_bus stmmac-0: scan phy mdio-mux at address 8\n[ 18.175700] mdio_bus stmmac-0: scan phy mdio-mux at address 9\n[ 18.175731] mdio_bus stmmac-0: scan phy mdio-mux at address 10\n[ 18.175762] mdio_bus stmmac-0: scan phy mdio-mux at address 11\n[ 18.175795] mdio_bus stmmac-0: scan phy mdio-mux at address 12\n[ 18.175827] mdio_bus stmmac-0: scan phy mdio-mux at address 13\n[ 18.175858] mdio_bus stmmac-0: scan phy mdio-mux at address 14\n[ 18.175889] mdio_bus stmmac-0: scan phy mdio-mux at address 15\n[ 18.175919] mdio_bus stmmac-0: scan phy mdio-mux at address 16\n[ 18.175951] mdio_bus stmmac-0: scan phy mdio-mux at address 17\n[ 18.175982] mdio_bus stmmac-0: scan phy mdio-mux at address 18\n[ 18.176014] mdio_bus stmmac-0: scan phy mdio-mux at address 19\n[ 18.176045] mdio_bus stmmac-0: scan phy mdio-mux at address 20\n[ 18.176076] mdio_bus stmmac-0: scan phy mdio-mux at address 21\n[ 18.176107] mdio_bus stmmac-0: scan phy mdio-mux at address 22\n[ 18.176139] mdio_bus stmmac-0: scan phy mdio-mux at address 23\n[ 18.176170] mdio_bus stmmac-0: scan phy mdio-mux at address 24\n[ 18.176202] mdio_bus stmmac-0: scan phy mdio-mux at address 25\n[ 18.176233] mdio_bus stmmac-0: scan phy mdio-mux at address 26\n[ 18.176271] mdio_bus stmmac-0: scan phy mdio-mux at address 27\n[ 18.176320] mdio_bus stmmac-0: scan phy mdio-mux at address 28\n[ 18.176371] mdio_bus stmmac-0: scan phy mdio-mux at address 29\n[ 18.176420] mdio_bus stmmac-0: scan phy mdio-mux at address 30\n[ 18.176452] mdio_bus stmmac-0: scan phy mdio-mux at address 31\n\nAdding a fake to mdio-mux remove it, but I found that a bit ugly.\nOr perhaps patching of_mdiobus_register() to not scan node with compatible \"mdio-mux\".\n\nWhat do you think ?\n\nRegards","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; 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