[{"id":1764698,"web_url":"http://patchwork.ozlabs.org/comment/1764698/","msgid":"","list_archive_url":null,"date":"2017-09-07T12:39:11","subject":"Re: [PATCH v4 0/6] irqdomain, gpio: expand irq_domain_push_irq() for\n\tDT use and use it for GPIO","submitter":{"id":7353,"url":"http://patchwork.ozlabs.org/api/people/7353/","name":"Marc Zyngier","email":"marc.zyngier@arm.com"},"content":"On 07/09/17 12:41, Masahiro Yamada wrote:\n> \n> This series adds a GPIO controller for UniPhier SoC family.\n> It also works as an irqchip in hierarchy domain manner.\n> \n> My problem is mapping of IRQ from this controller to the parent\n> irqchip is not contiguous.\n> \n> IRQ line of GPIO ---> Parent interrupt\n> 0 ---> 48\n> 1 ---> 49\n> ...\n> 15 ---> 63\n> 16 ---> 154\n> 17 ---> 155\n> ...\n> 20 ---> 158\n> 21 ---> 217\n> 22 ---> 218\n> ...\n> \n> So, I need to have an array of parent hwirqs somehow.\n> \n> Probably, most of people will try to use \"interrupts\" DT property,\n> but I noticed a potential problem for hierarchy IRQ domain.\n> If \"interrupts\" property exists in the device node, IRQ resource\n> may be statically allocated when platform devices are populated\n> from DT. I asked this question some time ago:\n> https://lkml.org/lkml/2017/7/6/758\n> \n> After I tackled this, I decided to put the array in the driver,\n> but I could not get a positive response for this.\n> The discussion mostly happened in v1 thread:\n> http://patchwork.ozlabs.org/patch/797145/\n> \n> Recently, the new API irq_domain_push_irq() was merged in the\n> mainline. I thought this might be useful to solve the hierarchy\n> domain issue. Hence, here is a trial.\n> \n> I found patch 2 is needed to avoid \"type mismatch\" error.\n> \n> One more thing, I am worried about a race condition.\n> \n> I think there is a possibility where a device tries to get IRQ\n> after irq_domain_create_hierarchy(), but before irq_domain_push_irq().\n> \n> \tpriv->domain = irq_domain_create_hierarchy(...)\n> \tif (!priv->domain)\n> \t\treturn -ENOMEM;\n> \n> [ *** What if a irq consumer device request the irq here? *** ]\n\nWe've explicitly forbidden such a use case. There is a (not exactly fool\nproof) check in irq_domain_push_irq(), but it is pretty easy to bypass\nit. \"Don't do it\" is the conclusion we reached with David Daney.\n\nIf you don't want these interrupts to be requested, you might as well\nflag them as IRQ_NOREQUEST, and unflag them when the hierarchy is ready.\n\nWould that work for you?\n\nThanks,\n\n\tM.","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"CacN922l\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xp0QZ1KQtz9s9Y\n\tfor ;\n\tThu, 7 Sep 2017 22:39:47 +1000 (AEST)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dpw5s-0003xI-LU; Thu, 07 Sep 2017 12:39:40 +0000","from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]\n\thelo=foss.arm.com)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dpw5o-0003rs-6e for linux-arm-kernel@lists.infradead.org;\n\tThu, 07 Sep 2017 12:39:38 +0000","from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249])\n\tby usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5D01713D5;\n\tThu, 7 Sep 2017 05:39:15 -0700 (PDT)","from [10.1.206.41] (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249])\n\tby usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id\n\t332743F578; Thu, 7 Sep 2017 05:39:13 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:\n\tMessage-ID:From:References:To:Subject:Reply-To:Content-ID:Content-Description\n\t:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=BXqVTp+g1ctJKNNoifA8+0Z4+R0jUFLDXmLxydlcuEo=;\n\tb=CacN922lIVkQ9L\n\tgtN0LP2WeXhYgW1m3WOJFnG07CLS44NNlBn3R571mPatdMNMD4lRIcNhN88XO+l8JW679GIsbatco\n\tdR/fingx0lLyDDrdeNiB2MwsSCSND42s9/waV4lCRno4tfFGVne+l4HdzKAcfvb/MaK49hbFO4/E0\n\th4j41YPQBoCz1ErWvhZ18m8r84WzZHuuGIZYf59lfxyUFgMP//64KR/TGYPVwbbFPgByDdLeMKjJK\n\t+F+7BhDz0/AwR95ZnydVXJCZ+diBsgpK60Kpdk3e0odKmPnc/rjOhQ9NKhF/NzkozRCSQTzkGQqQo\n\tzHX+qw8/l90meisjalGQ==;","Subject":"Re: [PATCH v4 0/6] irqdomain, gpio: expand irq_domain_push_irq() for\n\tDT use and use it for GPIO","To":"Masahiro Yamada ,\n\tThomas Gleixner ,\n\tLinus Walleij , linux-gpio@vger.kernel.org, \n\tRob Herring ","References":"<1504784522-26841-1-git-send-email-yamada.masahiro@socionext.com>","From":"Marc Zyngier ","Organization":"ARM Ltd","Message-ID":"","Date":"Thu, 7 Sep 2017 13:39:11 +0100","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.2.1","MIME-Version":"1.0","In-Reply-To":"<1504784522-26841-1-git-send-email-yamada.masahiro@socionext.com>","Content-Language":"en-GB","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170907_053936_286319_77EC7C50 ","X-CRM114-Status":"GOOD ( 20.69 )","X-Spam-Score":"-6.9 (------)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-6.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/,\n\thigh trust [217.140.101.70 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Mark Rutland , devicetree@vger.kernel.org,\n\tJason Cooper ,\n\tDavid Daney , \n\tlinux-kernel@vger.kernel.org, Jassi Brar ,\n\tMasami Hiramatsu ,\n\tlinux-arm-kernel@lists.infradead.org","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1764912,"web_url":"http://patchwork.ozlabs.org/comment/1764912/","msgid":"","list_archive_url":null,"date":"2017-09-07T19:41:40","subject":"Re: [PATCH v4 6/6] gpio: uniphier: add UniPhier GPIO controller\n\tdriver","submitter":{"id":67416,"url":"http://patchwork.ozlabs.org/api/people/67416/","name":"Rob Herring","email":"robh+dt@kernel.org"},"content":"On Thu, Sep 7, 2017 at 6:42 AM, Masahiro Yamada\n wrote:\n> This GPIO controller device is used on UniPhier SoCs.\n>\n> It also serves as an interrupt controller, but interrupt signals are\n> just delivered to the parent irqchip without any latching or OR'ing.\n> This is implemented by using hierarchy IRQ domain.\n>\n> Implementation note:\n> Unfortunately, the IRQ mapping from this controller to the parent is\n> random. (48, 49, ..., 63, 154, 155, ...)\n> If \"interrupts\" property is used, IRQ resources may be statically\n> allocated when platform devices are populated from DT. This can be\n> a problem for the hierarchy IRQ domain because IRQ allocation must\n> happen from the outer-most domain up to the root domain in order to\n> build up the stacked IRQ. (https://lkml.org/lkml/2017/7/6/758)\n> Solutions to work around it could be to hard-code parent hwirqs or\n> to invent a driver-specific DT property.\n>\n> Here, the new API irq_domain_push_irq() was merged by v4.14-rc1.\n> It allows to add irq_data to the existing hierarchy. It will help\n> to make this driver work whether the parent has already initialized\n> the hierarchy or not.\n>\n> Signed-off-by: Masahiro Yamada \n> ---\n>\n> Changes in v4:\n> - Add COMPILE_TEST and select IRQ_DOMAIN_HIERARCHY\n> - Reimplement irqchip part by using irq_domain_push_irq()\n>\n> Changes in v3:\n> - Add .irq_set_affinity() hook\n> - Use irq_domain_create_hierarchy() instead of legacy\n> irq_domain_add_hierarchy()\n>\n> Changes in v2:\n> - Remove +32 offset for parent interrupts to follow the GIC\n> binding convention\n> - Let uniphier_gpio_irq_alloc() fail if nr_irqs != 1\n> - Allocate gpio_chip statically because just one instance is\n> supported\n> - Fix suspend and resume hooks\n>\n> .../devicetree/bindings/gpio/gpio-uniphier.txt | 43 ++\n\nWhat happened to my ack? One line here more that before, but I'm not\ngoing to diff your patches for you.\n\nBTW, it is preferred to split bindings to a separate patch.\n\n> MAINTAINERS | 1 +\n> drivers/gpio/Kconfig | 8 +\n> drivers/gpio/Makefile | 1 +\n> drivers/gpio/gpio-uniphier.c | 486 +++++++++++++++++++++\n> include/dt-bindings/gpio/uniphier-gpio.h | 18 +\n> 6 files changed, 557 insertions(+)\n> create mode 100644 Documentation/devicetree/bindings/gpio/gpio-uniphier.txt\n> create mode 100644 drivers/gpio/gpio-uniphier.c\n> create mode 100644 include/dt-bindings/gpio/uniphier-gpio.h","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"K+sZt7mR\"; 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Thu, 7 Sep 2017 12:41:40 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:To:Subject:Message-ID:Date:From:\n\tReferences:In-Reply-To:MIME-Version:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=1LJk/U33l3TNwfCYQdxIoK68rbeV9TyRBYcTeVKgKac=;\n\tb=K+sZt7mRLUDUdQ\n\tIYIKHmn6ZW83zFwadmyYtNKQqwR/ipY3qzU30n0wNmm9aVuSw3ebHbW7BPcsPHlPZRSM/g7cW0aY0\n\tVkVxysaN+GhvN4Bb+nRcevfxG7QFR622VhBYMvMOqzKFqfDOypXGrSYTWNFt1aBZ2RiNTua4K6RV/\n\tfDAjUzQHll20XLqau+kugdHHVZc7SPrUgN9QTP0vy6Ydp2yIaa8O9g7Vkvq0hXLG3hhu3suupCh8f\n\tvd6PqBhpw41Dmg2GuCzHs/MIncSETYe6ACWPTVwe1x9QaOedMTY8aQiEBRYNZQYc/y4vby4rphXkm\n\t5/O8PysPjksCz7pn12Jw==;","DMARC-Filter":"OpenDMARC Filter v1.3.2 mail.kernel.org 0187321EA8","X-Gm-Message-State":"AHPjjUj6Sb4j1xhFopo8rbk1q2ItQoADBoTFo9lj8TDLnoUz3A8+i0UF\n\tfUns47Yqe+IMDhhzK4SHLguVRQn0LQ==","X-Google-Smtp-Source":"AOwi7QDtzaPSfQ/GjDy/HhKpsnghiyaE4TrO+oN33nQo3u2wYZYG9qS+SeBKGXugKY9K9Blf2pEEuqhFtALzF6CZ69A=","X-Received":"by 10.55.33.75 with SMTP id h72mr626150qkh.132.1504813321115;\n\tThu, 07 Sep 2017 12:42:01 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<1504784522-26841-7-git-send-email-yamada.masahiro@socionext.com>","References":"<1504784522-26841-1-git-send-email-yamada.masahiro@socionext.com>\n\t<1504784522-26841-7-git-send-email-yamada.masahiro@socionext.com>","From":"Rob Herring ","Date":"Thu, 7 Sep 2017 14:41:40 -0500","X-Gmail-Original-Message-ID":"","Message-ID":"","Subject":"Re: [PATCH v4 6/6] gpio: uniphier: add UniPhier GPIO controller\n\tdriver","To":"Masahiro Yamada ","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170907_124223_557404_40F3BB61 ","X-CRM114-Status":"GOOD ( 21.30 )","X-Spam-Score":"-6.4 (------)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-6.4 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/,\n\thigh trust [198.145.29.99 listed in list.dnswl.org]\n\t0.5 RCVD_IN_SORBS_SPAM RBL: SORBS: sender is a spam source\n\t[209.85.220.174 listed in dnsbl.sorbs.net]\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Mark Rutland ,\n\t\"devicetree@vger.kernel.org\" ,\n\tJason Cooper ,\n\tJassi Brar , \n\tMarc Zyngier ,\n\tLinus Walleij , \n\tDavid Daney ,\n\t\"linux-kernel@vger.kernel.org\" ,\n\t\"linux-gpio@vger.kernel.org\" ,\n\tMasami Hiramatsu ,\n\tThomas Gleixner , \n\t\"linux-arm-kernel@lists.infradead.org\"\n\t","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1765447,"web_url":"http://patchwork.ozlabs.org/comment/1765447/","msgid":"","list_archive_url":null,"date":"2017-09-08T15:06:48","subject":"Re: [PATCH v4 0/6] irqdomain, gpio: expand irq_domain_push_irq() for\n\tDT use and use it for GPIO","submitter":{"id":65882,"url":"http://patchwork.ozlabs.org/api/people/65882/","name":"Masahiro Yamada","email":"yamada.masahiro@socionext.com"},"content":"Hi Marc.\n\n2017-09-07 21:39 GMT+09:00 Marc Zyngier :\n>> I think there is a possibility where a device tries to get IRQ\n>> after irq_domain_create_hierarchy(), but before irq_domain_push_irq().\n>>\n>> priv->domain = irq_domain_create_hierarchy(...)\n>> if (!priv->domain)\n>> return -ENOMEM;\n>>\n>> [ *** What if a irq consumer device request the irq here? *** ]\n>\n> We've explicitly forbidden such a use case. There is a (not exactly fool\n> proof) check in irq_domain_push_irq(), but it is pretty easy to bypass\n> it. \"Don't do it\" is the conclusion we reached with David Daney.\n>\n> If you don't want these interrupts to be requested, you might as well\n> flag them as IRQ_NOREQUEST, and unflag them when the hierarchy is ready.\n>\n> Would that work for you?\n\n\nSorry if my description was unclear.\n\nI do not think IRQ_NOREQUEST is equivalent\nto IRQ_DOMAIN_FLAG_NO_CREATE I am trying to add in 5/6.\n\n\nMy intention is to prevent platform_get_irq()\nfrom allocating a new virq.\n\nI think IRQ_NOREQUEST only affects request_irq().\n\n\n\nHaving said that, this series got negative response\nas a whole.\n\nMy motivation is to get my GPIO driver (6/6) in\nby hook or by crook.\nIf you do not like this series, please feel free to throw it away.","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; 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\n\tFri, 08 Sep 2017 08:07:28 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"","References":"<1504784522-26841-1-git-send-email-yamada.masahiro@socionext.com>\n\t","From":"Masahiro Yamada ","Date":"Sat, 9 Sep 2017 00:06:48 +0900","X-Gmail-Original-Message-ID":"","Message-ID":"","Subject":"Re: [PATCH v4 0/6] irqdomain, gpio: expand irq_domain_push_irq() for\n\tDT use and use it for GPIO","To":"Marc Zyngier ","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170908_080808_679328_22E0646D ","X-CRM114-Status":"GOOD ( 14.10 )","X-Spam-Score":"-0.7 (/)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-0.7 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t0.5 RCVD_IN_SORBS_SPAM RBL: SORBS: sender is a spam source\n\t[209.85.161.175 listed in dnsbl.sorbs.net]\n\t0.7 SPF_SOFTFAIL SPF: sender does not match SPF record (softfail)\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t-0.1 DKIM_VALID Message has at least one valid DKIM or DK signature\n\t0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n\tnot necessarily valid","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Mark Rutland , devicetree@vger.kernel.org,\n\tJason Cooper ,\n\tJassi Brar , \n\tLinus Walleij ,\n\tDavid Daney , \n\tLinux Kernel Mailing List ,\n\tlinux-gpio@vger.kernel.org, Rob Herring ,\n\tMasami Hiramatsu ,\n\tThomas Gleixner , \n\tlinux-arm-kernel ","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1765454,"web_url":"http://patchwork.ozlabs.org/comment/1765454/","msgid":"","list_archive_url":null,"date":"2017-09-08T15:14:45","subject":"Re: [PATCH v4 6/6] gpio: uniphier: add UniPhier GPIO controller\n\tdriver","submitter":{"id":65882,"url":"http://patchwork.ozlabs.org/api/people/65882/","name":"Masahiro Yamada","email":"yamada.masahiro@socionext.com"},"content":"Hi Rob,\n\n\n2017-09-08 4:41 GMT+09:00 Rob Herring :\n> On Thu, Sep 7, 2017 at 6:42 AM, Masahiro Yamada\n> wrote:\n>> This GPIO controller device is used on UniPhier SoCs.\n>>\n>> It also serves as an interrupt controller, but interrupt signals are\n>> just delivered to the parent irqchip without any latching or OR'ing.\n>> This is implemented by using hierarchy IRQ domain.\n>>\n>> Implementation note:\n>> Unfortunately, the IRQ mapping from this controller to the parent is\n>> random. (48, 49, ..., 63, 154, 155, ...)\n>> If \"interrupts\" property is used, IRQ resources may be statically\n>> allocated when platform devices are populated from DT. This can be\n>> a problem for the hierarchy IRQ domain because IRQ allocation must\n>> happen from the outer-most domain up to the root domain in order to\n>> build up the stacked IRQ. (https://lkml.org/lkml/2017/7/6/758)\n>> Solutions to work around it could be to hard-code parent hwirqs or\n>> to invent a driver-specific DT property.\n>>\n>> Here, the new API irq_domain_push_irq() was merged by v4.14-rc1.\n>> It allows to add irq_data to the existing hierarchy. It will help\n>> to make this driver work whether the parent has already initialized\n>> the hierarchy or not.\n>>\n>> Signed-off-by: Masahiro Yamada \n>> ---\n>>\n>> Changes in v4:\n>> - Add COMPILE_TEST and select IRQ_DOMAIN_HIERARCHY\n>> - Reimplement irqchip part by using irq_domain_push_irq()\n>>\n>> Changes in v3:\n>> - Add .irq_set_affinity() hook\n>> - Use irq_domain_create_hierarchy() instead of legacy\n>> irq_domain_add_hierarchy()\n>>\n>> Changes in v2:\n>> - Remove +32 offset for parent interrupts to follow the GIC\n>> binding convention\n>> - Let uniphier_gpio_irq_alloc() fail if nr_irqs != 1\n>> - Allocate gpio_chip statically because just one instance is\n>> supported\n>> - Fix suspend and resume hooks\n>>\n>> .../devicetree/bindings/gpio/gpio-uniphier.txt | 43 ++\n>\n> What happened to my ack? One line here more that before, but I'm not\n> going to diff your patches for you.\n\nI changed the binding for this version.\nIt includes a new one you have not acked yet.\n\nMaybe I was too worried about it.\n\n\n> BTW, it is preferred to split bindings to a separate patch.\n\nI will do so next time.","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org header.b=\"AXnsX9ir\"; \n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=nifty.com header.i=@nifty.com\n\theader.b=\"gRmvelnp\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xpgrd1Pwxz9sBZ\n\tfor ;\n\tSat, 9 Sep 2017 01:16:14 +1000 (AEST)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dqL0t-00062l-Cv; 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charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1766508,"web_url":"http://patchwork.ozlabs.org/comment/1766508/","msgid":"<20170911201515.d4vki3yhrywpmdvc@rob-hp-laptop>","list_archive_url":null,"date":"2017-09-11T20:15:15","subject":"Re: [PATCH v4 6/6] gpio: uniphier: add UniPhier GPIO controller\n\tdriver","submitter":{"id":62529,"url":"http://patchwork.ozlabs.org/api/people/62529/","name":"Rob Herring (Arm)","email":"robh@kernel.org"},"content":"On Sat, Sep 09, 2017 at 12:14:45AM +0900, Masahiro Yamada wrote:\n> Hi Rob,\n> \n> \n> 2017-09-08 4:41 GMT+09:00 Rob Herring :\n> > On Thu, Sep 7, 2017 at 6:42 AM, Masahiro Yamada\n> > wrote:\n> >> This GPIO controller device is used on UniPhier SoCs.\n> >>\n> >> It also serves as an interrupt controller, but interrupt signals are\n> >> just delivered to the parent irqchip without any latching or OR'ing.\n> >> This is implemented by using hierarchy IRQ domain.\n> >>\n> >> Implementation note:\n> >> Unfortunately, the IRQ mapping from this controller to the parent is\n> >> random. (48, 49, ..., 63, 154, 155, ...)\n> >> If \"interrupts\" property is used, IRQ resources may be statically\n> >> allocated when platform devices are populated from DT. This can be\n> >> a problem for the hierarchy IRQ domain because IRQ allocation must\n> >> happen from the outer-most domain up to the root domain in order to\n> >> build up the stacked IRQ. (https://lkml.org/lkml/2017/7/6/758)\n> >> Solutions to work around it could be to hard-code parent hwirqs or\n> >> to invent a driver-specific DT property.\n> >>\n> >> Here, the new API irq_domain_push_irq() was merged by v4.14-rc1.\n> >> It allows to add irq_data to the existing hierarchy. It will help\n> >> to make this driver work whether the parent has already initialized\n> >> the hierarchy or not.\n> >>\n> >> Signed-off-by: Masahiro Yamada \n> >> ---\n> >>\n> >> Changes in v4:\n> >> - Add COMPILE_TEST and select IRQ_DOMAIN_HIERARCHY\n> >> - Reimplement irqchip part by using irq_domain_push_irq()\n> >>\n> >> Changes in v3:\n> >> - Add .irq_set_affinity() hook\n> >> - Use irq_domain_create_hierarchy() instead of legacy\n> >> irq_domain_add_hierarchy()\n> >>\n> >> Changes in v2:\n> >> - Remove +32 offset for parent interrupts to follow the GIC\n> >> binding convention\n> >> - Let uniphier_gpio_irq_alloc() fail if nr_irqs != 1\n> >> - Allocate gpio_chip statically because just one instance is\n> >> supported\n> >> - Fix suspend and resume hooks\n> >>\n> >> .../devicetree/bindings/gpio/gpio-uniphier.txt | 43 ++\n> >\n> > What happened to my ack? One line here more that before, but I'm not\n> > going to diff your patches for you.\n> \n> I changed the binding for this version.\n> It includes a new one you have not acked yet.\n> \n> Maybe I was too worried about it.\n\nProbably so, but I still don't know what you changed.\n\nRob","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"KSRL9NSZ\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xrfLp737zz9s5L\n\tfor ;\n\tTue, 12 Sep 2017 06:15:46 +1000 (AEST)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1drV7P-0005Da-KW; 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\n\tMon, 11 Sep 2017 13:15:16 -0700 (PDT)","Date":"Mon, 11 Sep 2017 15:15:15 -0500","From":"Rob Herring ","To":"Masahiro Yamada ","Subject":"Re: [PATCH v4 6/6] gpio: uniphier: add UniPhier GPIO controller\n\tdriver","Message-ID":"<20170911201515.d4vki3yhrywpmdvc@rob-hp-laptop>","References":"<1504784522-26841-1-git-send-email-yamada.masahiro@socionext.com>\n\t<1504784522-26841-7-git-send-email-yamada.masahiro@socionext.com>\n\t\n\t","MIME-Version":"1.0","Content-Disposition":"inline","In-Reply-To":"","User-Agent":"NeoMutt/20170113 (1.7.2)","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170911_131539_457981_FF1770DC ","X-CRM114-Status":"GOOD ( 22.78 )","X-Spam-Score":"-3.8 (---)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-3.8 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t0.5 RCVD_IN_SORBS_SPAM RBL: SORBS: sender is a spam source\n\t[209.85.223.195 listed in dnsbl.sorbs.net]\n\t-0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/,\n\tno trust [209.85.223.195 listed in list.dnswl.org]\n\t-2.8 RCVD_IN_MSPIKE_H2 RBL: Average reputation (+2)\n\t[209.85.223.195 listed in wl.mailspike.net]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends\n\tin digit (robherring2[at]gmail.com)\n\t0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail\n\tprovider (robherring2[at]gmail.com)\n\t0.0 HEADER_FROM_DIFFERENT_DOMAINS From and EnvelopeFrom 2nd level\n\tmail domains are different\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t0.2 FREEMAIL_FORGED_FROMDOMAIN 2nd level domains in From and\n\tEnvelopeFrom freemail headers are different","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Mark Rutland ,\n\t\"devicetree@vger.kernel.org\" ,\n\tJason Cooper ,\n\tJassi Brar , \n\tMarc Zyngier ,\n\tLinus Walleij , \n\tDavid Daney ,\n\t\"linux-kernel@vger.kernel.org\" ,\n\t\"linux-gpio@vger.kernel.org\" ,\n\tMasami Hiramatsu ,\n\tThomas Gleixner , \n\t\"linux-arm-kernel@lists.infradead.org\"\n\t","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1767092,"web_url":"http://patchwork.ozlabs.org/comment/1767092/","msgid":"","list_archive_url":null,"date":"2017-09-12T14:03:56","subject":"Re: [PATCH v4 6/6] gpio: uniphier: add UniPhier GPIO controller\n\tdriver","submitter":{"id":7055,"url":"http://patchwork.ozlabs.org/api/people/7055/","name":"Linus Walleij","email":"linus.walleij@linaro.org"},"content":"On Thu, Sep 7, 2017 at 1:42 PM, Masahiro Yamada\n wrote:\n\n> This GPIO controller device is used on UniPhier SoCs.\n>\n> It also serves as an interrupt controller, but interrupt signals are\n> just delivered to the parent irqchip without any latching or OR'ing.\n> This is implemented by using hierarchy IRQ domain.\n>\n> Implementation note:\n> Unfortunately, the IRQ mapping from this controller to the parent is\n> random. (48, 49, ..., 63, 154, 155, ...)\n> If \"interrupts\" property is used, IRQ resources may be statically\n> allocated when platform devices are populated from DT. This can be\n> a problem for the hierarchy IRQ domain because IRQ allocation must\n> happen from the outer-most domain up to the root domain in order to\n> build up the stacked IRQ. (https://lkml.org/lkml/2017/7/6/758)\n> Solutions to work around it could be to hard-code parent hwirqs or\n> to invent a driver-specific DT property.\n>\n> Here, the new API irq_domain_push_irq() was merged by v4.14-rc1.\n> It allows to add irq_data to the existing hierarchy. It will help\n> to make this driver work whether the parent has already initialized\n> the hierarchy or not.\n>\n> Signed-off-by: Masahiro Yamada \n> ---\n>\n> Changes in v4:\n> - Add COMPILE_TEST and select IRQ_DOMAIN_HIERARCHY\n> - Reimplement irqchip part by using irq_domain_push_irq()\n\nAwesome improvement. There was a build error and I also\nwould like David Daney to have a look at this so we know we\nuse things the right way, but overall I am happy after this\nso I hope I will be able to apply next version.\n\nYours,\nLinus Walleij","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org header.b=\"RVEvDs8c\"; \n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=linaro.org header.i=@linaro.org\n\theader.b=\"WfrqYiQh\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xs6423TjZz9s7B\n\tfor ;\n\tWed, 13 Sep 2017 00:04:31 +1000 (AEST)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1drlne-0007Nf-2w; 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charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1767177,"web_url":"http://patchwork.ozlabs.org/comment/1767177/","msgid":"<7e46f2a3-114f-0c34-d3c5-49e6422b9200@caviumnetworks.com>","list_archive_url":null,"date":"2017-09-12T15:44:09","subject":"Re: [PATCH v4 6/6] gpio: uniphier: add UniPhier GPIO controller\n\tdriver","submitter":{"id":721,"url":"http://patchwork.ozlabs.org/api/people/721/","name":"David Daney","email":"ddaney@caviumnetworks.com"},"content":"On 09/12/2017 07:03 AM, Linus Walleij wrote:\n> On Thu, Sep 7, 2017 at 1:42 PM, Masahiro Yamada\n> wrote:\n> \n>> This GPIO controller device is used on UniPhier SoCs.\n>>\n>> It also serves as an interrupt controller, but interrupt signals are\n>> just delivered to the parent irqchip without any latching or OR'ing.\n>> This is implemented by using hierarchy IRQ domain.\n>>\n>> Implementation note:\n>> Unfortunately, the IRQ mapping from this controller to the parent is\n>> random. (48, 49, ..., 63, 154, 155, ...)\n>> If \"interrupts\" property is used, IRQ resources may be statically\n>> allocated when platform devices are populated from DT. This can be\n>> a problem for the hierarchy IRQ domain because IRQ allocation must\n>> happen from the outer-most domain up to the root domain in order to\n>> build up the stacked IRQ. (https://lkml.org/lkml/2017/7/6/758)\n>> Solutions to work around it could be to hard-code parent hwirqs or\n>> to invent a driver-specific DT property.\n>>\n>> Here, the new API irq_domain_push_irq() was merged by v4.14-rc1.\n>> It allows to add irq_data to the existing hierarchy. It will help\n>> to make this driver work whether the parent has already initialized\n>> the hierarchy or not.\n>>\n>> Signed-off-by: Masahiro Yamada \n>> ---\n>>\n>> Changes in v4:\n>> - Add COMPILE_TEST and select IRQ_DOMAIN_HIERARCHY\n>> - Reimplement irqchip part by using irq_domain_push_irq()\n> \n> Awesome improvement. There was a build error and I also\n> would like David Daney to have a look at this so we know we\n> use things the right way,\n\nIt looks correct to me.\n\nI haven't verified it, but I think the OF device-tree probing code for \nthe platform devices will automatically xlat-and-map all those irqs, so \nthat the irq_domain_push_irq() is required to get the domain hierarchy \nproperly configured. It would be similar to the PCI case where we \nconfigure all the MSI-X and then do the irq_domain_push_irq() in the \nCavium ThunderX driver.\n\nIf interrupt handling has been verified to work with this driver, I \nwould say that we are probably using things \"the right way\".\n\nDavid.\n\n\n\n> but overall I am happy after this\n> so I hope I will be able to apply next version.\n> \n> Yours,\n> Linus Walleij\n>","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org header.b=\"bYX9Obi4\"; \n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=CAVIUMNETWORKS.onmicrosoft.com\n\theader.i=@CAVIUMNETWORKS.onmicrosoft.com header.b=\"ggHxa2Cr\"; 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charset=\"us-ascii\"; Format=\"flowed\"","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1767676,"web_url":"http://patchwork.ozlabs.org/comment/1767676/","msgid":"","list_archive_url":null,"date":"2017-09-13T08:31:26","subject":"Re: [PATCH v4 6/6] gpio: uniphier: add UniPhier GPIO controller\n\tdriver","submitter":{"id":65882,"url":"http://patchwork.ozlabs.org/api/people/65882/","name":"Masahiro Yamada","email":"yamada.masahiro@socionext.com"},"content":"Hi.\n\n2017-09-13 0:44 GMT+09:00 David Daney :\n> On 09/12/2017 07:03 AM, Linus Walleij wrote:\n>>\n>> On Thu, Sep 7, 2017 at 1:42 PM, Masahiro Yamada\n>> wrote:\n>>\n>>> This GPIO controller device is used on UniPhier SoCs.\n>>>\n>>> It also serves as an interrupt controller, but interrupt signals are\n>>> just delivered to the parent irqchip without any latching or OR'ing.\n>>> This is implemented by using hierarchy IRQ domain.\n>>>\n>>> Implementation note:\n>>> Unfortunately, the IRQ mapping from this controller to the parent is\n>>> random. (48, 49, ..., 63, 154, 155, ...)\n>>> If \"interrupts\" property is used, IRQ resources may be statically\n>>> allocated when platform devices are populated from DT. This can be\n>>> a problem for the hierarchy IRQ domain because IRQ allocation must\n>>> happen from the outer-most domain up to the root domain in order to\n>>> build up the stacked IRQ. (https://lkml.org/lkml/2017/7/6/758)\n>>> Solutions to work around it could be to hard-code parent hwirqs or\n>>> to invent a driver-specific DT property.\n>>>\n>>> Here, the new API irq_domain_push_irq() was merged by v4.14-rc1.\n>>> It allows to add irq_data to the existing hierarchy. It will help\n>>> to make this driver work whether the parent has already initialized\n>>> the hierarchy or not.\n>>>\n>>> Signed-off-by: Masahiro Yamada \n>>> ---\n>>>\n>>> Changes in v4:\n>>> - Add COMPILE_TEST and select IRQ_DOMAIN_HIERARCHY\n>>> - Reimplement irqchip part by using irq_domain_push_irq()\n>>\n>>\n>> Awesome improvement. There was a build error and I also\n>> would like David Daney to have a look at this so we know we\n>> use things the right way,\n>\n>\n> It looks correct to me.\n>\n> I haven't verified it, but I think the OF device-tree probing code for the\n> platform devices will automatically xlat-and-map all those irqs, so that the\n> irq_domain_push_irq() is required to get the domain hierarchy properly\n> configured. It would be similar to the PCI case where we configure all the\n> MSI-X and then do the irq_domain_push_irq() in the Cavium ThunderX driver.\n>\n> If interrupt handling has been verified to work with this driver, I would\n> say that we are probably using things \"the right way\".\n>\n> David.\n>\n\nV4 depends on 5 patches that got negative feedback in irqdomain subsystem.\nOne more problem for this approach is to virtual IRQs are statically\nallocated during the driver probe.\nThis looks a step backward to me.\nRecently, gpio_irqchip migrated to on-the-fly allocation in case some\ncontrollers may have lots of\nGPIO lines.\n\n\nFinally, I came up with another (I think, better) solution.\nI think v5 is less controversial,\nand works very well in on-the-fly manner.\n\nI am sending it shortly...","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; 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Wed, 13 Sep 2017 01:31:26 -0700 (PDT)"],"DKIM-Signature":["v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:To:Subject:Message-ID:Date:From:\n\tReferences:In-Reply-To:MIME-Version:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=VKzswTWF5YoL6S487ilfo5mA5JDit7/KBaKoCW7ryaE=;\n\tb=Kamjty0ldU+JR+\n\tcSYA4NXJiZRX3IgSNHCGOs7XjJXLqy6xfcgSROptTvoJ+PWvNKWJqaCY8W6TwDYlgqasa2DVNKVA2\n\tOLprVboBEXBN7lOaBX1B0LdLpGEki11iga8fSxVYRzYbSKCvT6CVacfPvUT8Rs2JFJxHl5roGlf5P\n\tlcmAK81grj3f2Y02j2Vc+QdPpGyzWo/WuLxk0Q8QP8vUPsNnBT+jPVwpss8DajwvzIKyE5scNYQ4t\n\tL7JXtOMfVWlHwCiuv+iBAbBPD2YGUvl9O3pj3EM7nsA7kNV+2QNbOfxDZ5bgwjAxkiI3uWrjmTwPO\n\td5D8XqKWeP6icpRFYTIQ==;","v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com;\n\ts=dec2015msa; t=1505291528;\n\tbh=6jso4SJE47ANfjin7Zg4Us+F2DlIXHfRfZ0EMmEjCjY=;\n\th=In-Reply-To:References:From:Date:Subject:To:Cc:From;\n\tb=PoejE+eb3pBoAWJx2O7jPBD6ip/wflVr1ljKkPPP+TW/ZGsx8WZhN074Qu4W687pe\n\tgkOYomqCylHCCQbXLBBpbUumTUQtm5yGgPliMaOB09TPd3AaZzaRNyJRKPBoDTe3Xm\n\tD88YApIvCIzUrmVemsRwccMzFi6kR474Rmxiu6ODX3VG68j83ma5BGMEnFqmK32Ogl\n\t08qpf1GcZThIaMbvRQRBvDradAjs1n154+fZ/n8Cu95/LbCiYy9oW9zU6MvPDCh/6j\n\t258/+HCU++Pp4VCme/dlbN6Trl9cQwgaHebwrFgvYjO0XcHyL+Z6q0Gr/ZecsVmPqu\n\t0U1ZBqF52KZLw=="],"DKIM-Filter":"OpenDKIM Filter v2.10.3 conssluserg-03.nifty.com v8D8W7v7026010","X-Nifty-SrcIP":"[209.85.161.175]","X-Gm-Message-State":"AHPjjUhUZiA0GhqZ7jJtnPuAtt0bmwyqA2qceAqJtSEMvPqCUVDwkeJs\n\tif0T5Y2u2yGN4zIc3ZvI8YkMnVaXLnkCuWB9llo=","X-Google-Smtp-Source":"AOwi7QA06Z11d52UtW6GwTyVF4fipIwETMuTMFzMK+5W6d1A254cTsWWSvGmWSFHzbJWXgycLVN/Qu2/wXlr+YpMyR8=","X-Received":"by 10.37.234.68 with SMTP id o4mr14277233ybe.119.1505291526446; \n\tWed, 13 Sep 2017 01:32:06 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<7e46f2a3-114f-0c34-d3c5-49e6422b9200@caviumnetworks.com>","References":"<1504784522-26841-1-git-send-email-yamada.masahiro@socionext.com>\n\t<1504784522-26841-7-git-send-email-yamada.masahiro@socionext.com>\n\t\n\t<7e46f2a3-114f-0c34-d3c5-49e6422b9200@caviumnetworks.com>","From":"Masahiro Yamada ","Date":"Wed, 13 Sep 2017 17:31:26 +0900","X-Gmail-Original-Message-ID":"","Message-ID":"","Subject":"Re: [PATCH v4 6/6] gpio: uniphier: add UniPhier GPIO controller\n\tdriver","To":"David Daney ","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170913_013243_538120_6D4FD409 ","X-CRM114-Status":"GOOD ( 19.33 )","X-Spam-Score":"-0.7 (/)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-0.7 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t0.5 RCVD_IN_SORBS_SPAM RBL: SORBS: sender is a spam source\n\t[209.85.161.175 listed in dnsbl.sorbs.net]\n\t0.7 SPF_SOFTFAIL SPF: sender does not match SPF record (softfail)\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t-0.1 DKIM_VALID Message has at least one valid DKIM or DK signature\n\t0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n\tnot necessarily valid","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Mark Rutland ,\n\t\"devicetree@vger.kernel.org\" ,\n\tJason Cooper ,\n\tDavid Daney , \n\tMarc Zyngier ,\n\tLinus Walleij , \n\t\"linux-kernel@vger.kernel.org\" ,\n\t\"linux-gpio@vger.kernel.org\" ,\n\tRob Herring ,\n\tMasami Hiramatsu , \n\tJassi Brar ,\n\tThomas Gleixner , \n\t\"linux-arm-kernel@lists.infradead.org\"\n\t","Content-Type":"text/plain; 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