[{"id":1763223,"web_url":"http://patchwork.ozlabs.org/comment/1763223/","msgid":"<20170905111031.u4damueklnuliqt4@phenom.ffwll.local>","list_archive_url":null,"date":"2017-09-05T11:10:31","subject":"Re: [PATCH v2 0/6] Host1x and VIC support for Tegra186","submitter":{"id":1959,"url":"http://patchwork.ozlabs.org/api/people/1959/","name":"Daniel Vetter","email":"daniel@ffwll.ch"},"content":"On Tue, Sep 05, 2017 at 11:43:00AM +0300, Mikko Perttunen wrote:\n> Hi,\n> \n> not many changes in v2:\n> \n> Changed address-cells and size-cells for the Host1x device tree node\n> to have value 1, since all subdevices fit in the lower 4G. Also dropped\n> the incorrect change about this from the dt-bindings patch. Thanks to\n> Rob for pointing this out.\n> \n> Mikko\n> \n> Notes for v1:\n> \n> Hi everyone,\n> \n> this series adds basic support for the Host1x channel engine and the\n> VIC 2d compositor unit on Tegra186. The first three patches do the\n> required device tree changes, the fourth patch updates the device tree\n> binding documentation, and the two remaining patches add the actual\n> implementation, almost all of which is in Host1x itself.\n> \n> The Tegra186 Host1x is a relatively large update over previous\n> generations, which can be seen in the diffstat. The biggest change is\n> that Host1x is now contains separate hypervisor and vm register\n> apertures to support virtualization at the hardware level. This driver,\n> however, currently assumes that this instance of Linux is the sole\n> operating system having access to the hardware.\n> \n> This combined with increased numbers of supported channels and\n> syncpoints have caused a number of register space changes that are\n> responsible for most of the updated code.\n> \n> The series has been tested on the Jetson TX1 (T210) and TX2 (T186)\n> using the host1x_test test suite available at\n> \n> http://github.com/cyndis/host1x_test\n> \n> The series itself is available at\n> \n> http://github.com/cyndis/linux, branch host1x-t186-1\n\nSince this is new hw support, is there also open source userspace using\nall this?\n\nThanks, Daniel\n\n> \n> Cheers,\n> Mikko\n> \n> Mikko Perttunen (6):\n>   arm64: tegra: Add #power-domain-cells for BPMP\n>   arm64: tegra: Add host1x on Tegra186\n>   arm64: tegra: Add VIC on Tegra186\n>   dt-bindings: host1x: Add Tegra186 information\n>   gpu: host1x: Add Tegra186 support\n>   drm/tegra: Add Tegra186 support for VIC\n> \n>  .../display/tegra/nvidia,tegra20-host1x.txt        |   4 +\n>  arch/arm64/boot/dts/nvidia/tegra186.dtsi           |  31 ++++\n>  drivers/gpu/drm/tegra/drm.c                        |   1 +\n>  drivers/gpu/drm/tegra/vic.c                        |  10 ++\n>  drivers/gpu/host1x/Makefile                        |   3 +-\n>  drivers/gpu/host1x/dev.c                           |  60 ++++++-\n>  drivers/gpu/host1x/dev.h                           |   4 +\n>  drivers/gpu/host1x/hw/cdma_hw.c                    |  49 +++---\n>  drivers/gpu/host1x/hw/debug_hw.c                   | 137 +---------------\n>  drivers/gpu/host1x/hw/debug_hw_1x01.c              | 154 ++++++++++++++++++\n>  drivers/gpu/host1x/hw/debug_hw_1x06.c              | 133 +++++++++++++++\n>  drivers/gpu/host1x/hw/host1x01.c                   |   2 +\n>  drivers/gpu/host1x/hw/host1x02.c                   |   2 +\n>  drivers/gpu/host1x/hw/host1x04.c                   |   2 +\n>  drivers/gpu/host1x/hw/host1x05.c                   |   2 +\n>  drivers/gpu/host1x/hw/host1x06.c                   |  44 +++++\n>  drivers/gpu/host1x/hw/host1x06.h                   |  26 +++\n>  drivers/gpu/host1x/hw/host1x06_hardware.h          | 142 ++++++++++++++++\n>  drivers/gpu/host1x/hw/hw_host1x06_hypervisor.h     |  32 ++++\n>  drivers/gpu/host1x/hw/hw_host1x06_uclass.h         | 181 +++++++++++++++++++++\n>  drivers/gpu/host1x/hw/hw_host1x06_vm.h             |  47 ++++++\n>  drivers/gpu/host1x/hw/intr_hw.c                    |  29 ++--\n>  22 files changed, 926 insertions(+), 169 deletions(-)\n>  create mode 100644 drivers/gpu/host1x/hw/debug_hw_1x01.c\n>  create mode 100644 drivers/gpu/host1x/hw/debug_hw_1x06.c\n>  create mode 100644 drivers/gpu/host1x/hw/host1x06.c\n>  create mode 100644 drivers/gpu/host1x/hw/host1x06.h\n>  create mode 100644 drivers/gpu/host1x/hw/host1x06_hardware.h\n>  create mode 100644 drivers/gpu/host1x/hw/hw_host1x06_hypervisor.h\n>  create mode 100644 drivers/gpu/host1x/hw/hw_host1x06_uclass.h\n>  create mode 100644 drivers/gpu/host1x/hw/hw_host1x06_vm.h\n> \n> -- \n> 2.14.1\n> \n> _______________________________________________\n> dri-devel mailing list\n> dri-devel@lists.freedesktop.org\n> https://lists.freedesktop.org/mailman/listinfo/dri-devel","headers":{"Return-Path":"<devicetree-owner@vger.kernel.org>","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; 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charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20170905084306.19318-1-mperttunen@nvidia.com>","X-Operating-System":"Linux phenom 4.12.0-1-amd64 ","User-Agent":"NeoMutt/20170609 (1.8.3)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<devicetree.vger.kernel.org>","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1763248,"web_url":"http://patchwork.ozlabs.org/comment/1763248/","msgid":"<408624d4-9e69-661a-950f-b8d8386d6a27@kapsi.fi>","list_archive_url":null,"date":"2017-09-05T11:28:59","subject":"Re: [PATCH v2 0/6] Host1x and VIC support for Tegra186","submitter":{"id":64745,"url":"http://patchwork.ozlabs.org/api/people/64745/","name":"Mikko Perttunen","email":"cyndis@kapsi.fi"},"content":"On 05.09.2017 14:10, Daniel Vetter wrote:\n>\n> Since this is new hw support, is there also open source userspace using\n> all this?\n\nThe VIC HW in Tegra186 is backwards compatible with the one in Tegra210, \nwhich has open userspace (https://github.com/cyndis/vaapi-tegra-driver), \nso that userspace should remain compatible. The old firmware is not \ncompatible so we need a new compatibility string for that.\n\n>\n> Thanks, Daniel\n\nThanks,\nMikko\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at  http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"<devicetree-owner@vger.kernel.org>","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=<UNKNOWN>)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tsecure) header.d=kapsi.fi header.i=@kapsi.fi header.b=\"ycqcZBOa\"; \n\tdkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xmky65GT7z9sPs\n\tfor <incoming-dt@patchwork.ozlabs.org>;\n\tTue,  5 Sep 2017 21:29:18 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1750944AbdIEL3Q (ORCPT\n\t<rfc822;incoming-dt@patchwork.ozlabs.org>);\n\tTue, 5 Sep 2017 07:29:16 -0400","from mail.kapsi.fi ([91.232.154.25]:56646 \"EHLO mail.kapsi.fi\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S1750731AbdIEL3P (ORCPT <rfc822;devicetree@vger.kernel.org>);\n\tTue, 5 Sep 2017 07:29:15 -0400","from [62.209.167.43] (helo=[10.21.26.144])\n\tby mail.kapsi.fi with esmtpsa\n\t(TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n\t(Exim 4.84_2) (envelope-from <cyndis@kapsi.fi>)\n\tid 1dpC2T-0008G3-QN; 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Linux x86_64; rv:45.0) Gecko/20100101\n\tThunderbird/45.2.0","MIME-Version":"1.0","In-Reply-To":"<20170905111031.u4damueklnuliqt4@phenom.ffwll.local>","Content-Type":"text/plain; charset=windows-1252; format=flowed","Content-Transfer-Encoding":"7bit","X-SA-Exim-Connect-IP":"62.209.167.43","X-SA-Exim-Mail-From":"cyndis@kapsi.fi","X-SA-Exim-Scanned":"No (on mail.kapsi.fi); SAEximRunCond expanded to false","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<devicetree.vger.kernel.org>","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1790380,"web_url":"http://patchwork.ozlabs.org/comment/1790380/","msgid":"<20171019104952.GL9005@ulmo>","list_archive_url":null,"date":"2017-10-19T10:49:52","subject":"Re: [PATCH v2 1/6] arm64: tegra: Add #power-domain-cells for BPMP","submitter":{"id":26234,"url":"http://patchwork.ozlabs.org/api/people/26234/","name":"Thierry Reding","email":"thierry.reding@gmail.com"},"content":"On Tue, Sep 05, 2017 at 11:43:01AM +0300, Mikko Perttunen wrote:\n> Add #power-domain-cells for the BPMP node on Tegra186 so that the power\n> domain provider may be used.\n> \n> Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>\n> ---\n>  arch/arm64/boot/dts/nvidia/tegra186.dtsi | 1 +\n>  1 file changed, 1 insertion(+)\n\nApplied, thanks.\n\nThierry","headers":{"Return-Path":"<devicetree-owner@vger.kernel.org>","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; 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\n\tThu, 19 Oct 2017 03:49:54 -0700 (PDT)","Date":"Thu, 19 Oct 2017 12:49:52 +0200","From":"Thierry Reding <thierry.reding@gmail.com>","To":"Mikko Perttunen <mperttunen@nvidia.com>","Cc":"jonathanh@nvidia.com, robh+dt@kernel.org, mark.rutland@arm.com,\n\tdigetx@gmail.com, amerilainen@nvidia.com, dnibade@nvidia.com,\n\tsgurrappadi@nvidia.com, dri-devel@lists.freedesktop.org,\n\tdevicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org","Subject":"Re: [PATCH v2 1/6] arm64: tegra: Add #power-domain-cells for BPMP","Message-ID":"<20171019104952.GL9005@ulmo>","References":"<20170905084306.19318-1-mperttunen@nvidia.com>\n\t<20170905084306.19318-2-mperttunen@nvidia.com>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha256;\n\tprotocol=\"application/pgp-signature\"; boundary=\"+svXpSx+RSEd8UhP\"","Content-Disposition":"inline","In-Reply-To":"<20170905084306.19318-2-mperttunen@nvidia.com>","User-Agent":"Mutt/1.9.1 (2017-09-22)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<devicetree.vger.kernel.org>","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1790382,"web_url":"http://patchwork.ozlabs.org/comment/1790382/","msgid":"<20171019105017.GN9005@ulmo>","list_archive_url":null,"date":"2017-10-19T10:50:17","subject":"Re: [PATCH v2 3/6] arm64: tegra: Add VIC on Tegra186","submitter":{"id":26234,"url":"http://patchwork.ozlabs.org/api/people/26234/","name":"Thierry Reding","email":"thierry.reding@gmail.com"},"content":"On Tue, Sep 05, 2017 at 11:43:03AM +0300, Mikko Perttunen wrote:\n> Add a node for the Video Image Compositor on the Tegra186.\n> \n> Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>\n> ---\n> v2:\n> - Fixed reg property in accordance with changed parent cells.\n> \n>  arch/arm64/boot/dts/nvidia/tegra186.dtsi | 12 ++++++++++++\n>  1 file changed, 12 insertions(+)\n\nApplied, thanks.\n\nThierry","headers":{"Return-Path":"<devicetree-owner@vger.kernel.org>","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; 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micalg=pgp-sha256;\n\tprotocol=\"application/pgp-signature\"; boundary=\"l3ej7W/Jb2pB3qL2\"","Content-Disposition":"inline","In-Reply-To":"<20170905084306.19318-4-mperttunen@nvidia.com>","User-Agent":"Mutt/1.9.1 (2017-09-22)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<devicetree.vger.kernel.org>","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1790386,"web_url":"http://patchwork.ozlabs.org/comment/1790386/","msgid":"<20171019105005.GM9005@ulmo>","list_archive_url":null,"date":"2017-10-19T10:50:05","subject":"Re: [PATCH v2 2/6] arm64: tegra: Add host1x on Tegra186","submitter":{"id":26234,"url":"http://patchwork.ozlabs.org/api/people/26234/","name":"Thierry Reding","email":"thierry.reding@gmail.com"},"content":"On Tue, Sep 05, 2017 at 11:43:02AM +0300, Mikko Perttunen wrote:\n> Add the node for Host1x on the Tegra186, without any subdevices\n> for now.\n> \n> Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>\n> ---\n> v2:\n> - Changed address-cells and size-cells to 1 and fixed the ranges\n>   property correspondingly.\n> \n>  arch/arm64/boot/dts/nvidia/tegra186.dtsi | 18 ++++++++++++++++++\n>  1 file changed, 18 insertions(+)\n\nApplied, thanks.\n\nThierry","headers":{"Return-Path":"<devicetree-owner@vger.kernel.org>","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; 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\n\tThu, 19 Oct 2017 03:50:08 -0700 (PDT)","Date":"Thu, 19 Oct 2017 12:50:05 +0200","From":"Thierry Reding <thierry.reding@gmail.com>","To":"Mikko Perttunen <mperttunen@nvidia.com>","Cc":"jonathanh@nvidia.com, robh+dt@kernel.org, mark.rutland@arm.com,\n\tdigetx@gmail.com, amerilainen@nvidia.com, dnibade@nvidia.com,\n\tsgurrappadi@nvidia.com, dri-devel@lists.freedesktop.org,\n\tdevicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org","Subject":"Re: [PATCH v2 2/6] arm64: tegra: Add host1x on Tegra186","Message-ID":"<20171019105005.GM9005@ulmo>","References":"<20170905084306.19318-1-mperttunen@nvidia.com>\n\t<20170905084306.19318-3-mperttunen@nvidia.com>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha256;\n\tprotocol=\"application/pgp-signature\"; boundary=\"NZtAI5QFBF0GmLcW\"","Content-Disposition":"inline","In-Reply-To":"<20170905084306.19318-3-mperttunen@nvidia.com>","User-Agent":"Mutt/1.9.1 (2017-09-22)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<devicetree.vger.kernel.org>","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1790438,"web_url":"http://patchwork.ozlabs.org/comment/1790438/","msgid":"<20171019113945.GP9005@ulmo>","list_archive_url":null,"date":"2017-10-19T11:39:45","subject":"Re: [PATCH v2 5/6] gpu: host1x: Add Tegra186 support","submitter":{"id":26234,"url":"http://patchwork.ozlabs.org/api/people/26234/","name":"Thierry Reding","email":"thierry.reding@gmail.com"},"content":"On Tue, Sep 05, 2017 at 11:43:05AM +0300, Mikko Perttunen wrote:\n> Add support for the implementation of Host1x present on the Tegra186.\n> The register space has been shuffled around a little bit, requiring\n> addition of some chip-specific code sections. Tegra186 also adds\n> several new features, most importantly the hypervisor, but those are\n> not yet supported with this commit.\n> \n> Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>\n> Reviewed-by: Dmitry Osipenko <digetx@gmail.com>\n> Tested-by: Dmitry Osipenko <digetx@gmail.com>\n> ---\n>  drivers/gpu/host1x/Makefile                    |   3 +-\n>  drivers/gpu/host1x/dev.c                       |  60 +++++++-\n>  drivers/gpu/host1x/dev.h                       |   4 +\n>  drivers/gpu/host1x/hw/cdma_hw.c                |  49 ++++---\n>  drivers/gpu/host1x/hw/debug_hw.c               | 137 +------------------\n>  drivers/gpu/host1x/hw/debug_hw_1x01.c          | 154 +++++++++++++++++++++\n>  drivers/gpu/host1x/hw/debug_hw_1x06.c          | 133 ++++++++++++++++++\n>  drivers/gpu/host1x/hw/host1x01.c               |   2 +\n>  drivers/gpu/host1x/hw/host1x02.c               |   2 +\n>  drivers/gpu/host1x/hw/host1x04.c               |   2 +\n>  drivers/gpu/host1x/hw/host1x05.c               |   2 +\n>  drivers/gpu/host1x/hw/host1x06.c               |  44 ++++++\n>  drivers/gpu/host1x/hw/host1x06.h               |  26 ++++\n>  drivers/gpu/host1x/hw/host1x06_hardware.h      | 142 +++++++++++++++++++\n>  drivers/gpu/host1x/hw/hw_host1x06_hypervisor.h |  32 +++++\n>  drivers/gpu/host1x/hw/hw_host1x06_uclass.h     | 181 +++++++++++++++++++++++++\n>  drivers/gpu/host1x/hw/hw_host1x06_vm.h         |  47 +++++++\n>  drivers/gpu/host1x/hw/intr_hw.c                |  29 ++--\n>  18 files changed, 880 insertions(+), 169 deletions(-)\n>  create mode 100644 drivers/gpu/host1x/hw/debug_hw_1x01.c\n>  create mode 100644 drivers/gpu/host1x/hw/debug_hw_1x06.c\n>  create mode 100644 drivers/gpu/host1x/hw/host1x06.c\n>  create mode 100644 drivers/gpu/host1x/hw/host1x06.h\n>  create mode 100644 drivers/gpu/host1x/hw/host1x06_hardware.h\n>  create mode 100644 drivers/gpu/host1x/hw/hw_host1x06_hypervisor.h\n>  create mode 100644 drivers/gpu/host1x/hw/hw_host1x06_uclass.h\n>  create mode 100644 drivers/gpu/host1x/hw/hw_host1x06_vm.h\n\nApplied, thanks.\n\nThierry","headers":{"Return-Path":"<devicetree-owner@vger.kernel.org>","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; 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\n\tThu, 19 Oct 2017 04:39:47 -0700 (PDT)","Date":"Thu, 19 Oct 2017 13:39:45 +0200","From":"Thierry Reding <thierry.reding@gmail.com>","To":"Mikko Perttunen <mperttunen@nvidia.com>","Cc":"jonathanh@nvidia.com, robh+dt@kernel.org, mark.rutland@arm.com,\n\tdigetx@gmail.com, amerilainen@nvidia.com, dnibade@nvidia.com,\n\tsgurrappadi@nvidia.com, dri-devel@lists.freedesktop.org,\n\tdevicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org","Subject":"Re: [PATCH v2 5/6] gpu: host1x: Add Tegra186 support","Message-ID":"<20171019113945.GP9005@ulmo>","References":"<20170905084306.19318-1-mperttunen@nvidia.com>\n\t<20170905084306.19318-6-mperttunen@nvidia.com>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha256;\n\tprotocol=\"application/pgp-signature\"; boundary=\"s2lX4GznBIrto1wi\"","Content-Disposition":"inline","In-Reply-To":"<20170905084306.19318-6-mperttunen@nvidia.com>","User-Agent":"Mutt/1.9.1 (2017-09-22)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<devicetree.vger.kernel.org>","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1790442,"web_url":"http://patchwork.ozlabs.org/comment/1790442/","msgid":"<20171019114002.GQ9005@ulmo>","list_archive_url":null,"date":"2017-10-19T11:40:02","subject":"Re: [PATCH v2 6/6] drm/tegra: Add Tegra186 support for VIC","submitter":{"id":26234,"url":"http://patchwork.ozlabs.org/api/people/26234/","name":"Thierry Reding","email":"thierry.reding@gmail.com"},"content":"On Tue, Sep 05, 2017 at 11:43:06AM +0300, Mikko Perttunen wrote:\n> Add Tegra186 support for VIC - no changes are required except for new\n> firmware and compatibility string.\n> \n> Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>\n> ---\n>  drivers/gpu/drm/tegra/drm.c |  1 +\n>  drivers/gpu/drm/tegra/vic.c | 10 ++++++++++\n>  2 files changed, 11 insertions(+)\n\nApplied, thanks.\n\nThierry","headers":{"Return-Path":"<devicetree-owner@vger.kernel.org>","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; 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\n\tThu, 19 Oct 2017 04:40:04 -0700 (PDT)","Date":"Thu, 19 Oct 2017 13:40:02 +0200","From":"Thierry Reding <thierry.reding@gmail.com>","To":"Mikko Perttunen <mperttunen@nvidia.com>","Cc":"jonathanh@nvidia.com, robh+dt@kernel.org, mark.rutland@arm.com,\n\tdigetx@gmail.com, amerilainen@nvidia.com, dnibade@nvidia.com,\n\tsgurrappadi@nvidia.com, dri-devel@lists.freedesktop.org,\n\tdevicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org","Subject":"Re: [PATCH v2 6/6] drm/tegra: Add Tegra186 support for VIC","Message-ID":"<20171019114002.GQ9005@ulmo>","References":"<20170905084306.19318-1-mperttunen@nvidia.com>\n\t<20170905084306.19318-7-mperttunen@nvidia.com>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha256;\n\tprotocol=\"application/pgp-signature\"; boundary=\"HAv5+T9jbwMPl6Kw\"","Content-Disposition":"inline","In-Reply-To":"<20170905084306.19318-7-mperttunen@nvidia.com>","User-Agent":"Mutt/1.9.1 (2017-09-22)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<devicetree.vger.kernel.org>","X-Mailing-List":"devicetree@vger.kernel.org"}}]