[{"id":1761596,"web_url":"http://patchwork.ozlabs.org/comment/1761596/","msgid":"<20170901111526.plpslddmrjerkxtv@pd.tnic>","list_archive_url":null,"date":"2017-09-01T11:15:26","subject":"Re: [RFC PATCH v1 2/3] apei: add ghes param for\n\tarch_apei_report_mem_error","submitter":{"id":47897,"url":"http://patchwork.ozlabs.org/api/people/47897/","name":"Borislav Petkov","email":"bp@suse.de"},"content":"n Fri, Sep 01, 2017 at 06:32:00PM +0800, Xie XiuQi wrote:\n> Add ghes param for arch_apei_report_mem_error, with which\n> we could do more arch-specific processing.\n> \n> Signed-off-by: Xie XiuQi \n> ---\n> arch/x86/kernel/acpi/apei.c | 2 +-\n> drivers/acpi/apei/apei-base.c | 4 +++-\n> drivers/acpi/apei/ghes.c | 2 +-\n> include/acpi/apei.h | 4 +++-\n> include/acpi/ghes.h | 3 ++-\n> 5 files changed, 10 insertions(+), 5 deletions(-)\n> \n> diff --git a/arch/x86/kernel/acpi/apei.c b/arch/x86/kernel/acpi/apei.c\n> index ea3046e..1bf1c9b 100644\n> --- a/arch/x86/kernel/acpi/apei.c\n> +++ b/arch/x86/kernel/acpi/apei.c\n> @@ -46,7 +46,7 @@ int arch_apei_enable_cmcff(struct acpi_hest_header *hest_hdr, void *data)\n> \treturn 1;\n> }\n> \n> -void arch_apei_report_mem_error(int sev, struct cper_sec_mem_err *mem_err)\n> +void arch_apei_report_mem_error(struct ghes *ghes, int sev, struct cper_sec_mem_err *mem_err)\n> {\n> #ifdef CONFIG_X86_MCE\n> \tapei_mce_report_mem_error(sev, mem_err);\n> diff --git a/drivers/acpi/apei/apei-base.c b/drivers/acpi/apei/apei-base.c\n> index da370e1..317169b 100644\n> --- a/drivers/acpi/apei/apei-base.c\n> +++ b/drivers/acpi/apei/apei-base.c\n> @@ -38,6 +38,8 @@\n> #include \n> #include \n> \n> +#include \n> +\n> #include \"apei-internal.h\"\n> \n> #define APEI_PFX \"APEI: \"\n> @@ -770,7 +772,7 @@ int __weak arch_apei_enable_cmcff(struct acpi_hest_header *hest_hdr,\n> }\n> EXPORT_SYMBOL_GPL(arch_apei_enable_cmcff);\n> \n> -void __weak arch_apei_report_mem_error(int sev,\n> +void __weak arch_apei_report_mem_error(struct ghes *ghes, int sev,\n> \t\t\t\t struct cper_sec_mem_err *mem_err)\n> {\n> }\n> diff --git a/drivers/acpi/apei/ghes.c b/drivers/acpi/apei/ghes.c\n> index fa9400d..996d16c4 100644\n> --- a/drivers/acpi/apei/ghes.c\n> +++ b/drivers/acpi/apei/ghes.c\n> @@ -483,7 +483,7 @@ static void ghes_do_proc(struct ghes *ghes,\n> \n> \t\t\tghes_edac_report_mem_error(ghes, sev, mem_err);\n> \n> -\t\t\tarch_apei_report_mem_error(sev, mem_err);\n> +\t\t\tarch_apei_report_mem_error(ghes, sev, mem_err);\n\nAnd next time you want to pass something else, you'll have to touch all\nthose files again...\n\nInstead, make that a notifier to which consumers register and define\na separate struct mem_err or ghes_err or whatnot and populate it with\ncper_sec_mem_err data and whatever else is needed by the consumers.\nInstead of passing that struct ghes * which consumers don't need to\nknow.\n\nThx.","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"bH+riOuT\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xkGrk1ljxz9sRV\n\tfor ;\n\tFri, 1 Sep 2017 21:16:06 +1000 (AEST)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dnjve-0006za-Lc; Fri, 01 Sep 2017 11:16:02 +0000","from mx2.suse.de ([195.135.220.15] helo=mx1.suse.de)\n\tby bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dnjva-0006wN-9o for linux-arm-kernel@lists.infradead.org;\n\tFri, 01 Sep 2017 11:16:00 +0000","from relay2.suse.de (charybdis-ext.suse.de [195.135.220.254])\n\tby mx1.suse.de (Postfix) with ESMTP id 34070ACD7;\n\tFri, 1 Sep 2017 11:15:34 +0000 (UTC)"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:\n\tMessage-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=SdN+d0PIPx3H86CaMAVG2OWuAj4D8WIlseok7P9JZCU=;\n\tb=bH+riOuTsbxEeb\n\tNixWxmkPLuvLaqGElAmE3pVqq4pmFfSRkmrsvJOGBt6yQXzcTROxAR/D1+D69IiBjAfKp0aK3+v45\n\tlVZYKNGxtb8MPXgNUKXMctb9+ktCmCfZ9wkLkHZV9W7YEBYGpFdqFfpz54xZ5fcLzsk1gt3RgIyPs\n\tupNiFNDwMF6wlgINIDIJ/eyBC4utED35aiRvKwRf/hBfp/mA8B3/b0uANAOWX+xYozolm+SjqhxYc\n\tWkBAH1gwnsR9A+Eqe61qJehuteroogmn+aj7zGeUa/RFwUHrJEyxsLvUGGQ7ow+YV3DtLPnwMLhp4\n\tjpSoCQhg85vf6BNjXntw==;","X-Virus-Scanned":"by amavisd-new at test-mx.suse.de","Date":"Fri, 1 Sep 2017 13:15:26 +0200","From":"Borislav Petkov ","To":"Xie XiuQi ","Subject":"Re: [RFC PATCH v1 2/3] apei: add ghes param for\n\tarch_apei_report_mem_error","Message-ID":"<20170901111526.plpslddmrjerkxtv@pd.tnic>","References":"<1504261921-39308-1-git-send-email-xiexiuqi@huawei.com>\n\t<1504261921-39308-3-git-send-email-xiexiuqi@huawei.com>","MIME-Version":"1.0","Content-Disposition":"inline","In-Reply-To":"<1504261921-39308-3-git-send-email-xiexiuqi@huawei.com>","User-Agent":"NeoMutt/20170113 (1.7.2)","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170901_041558_516938_AAE0C9FD ","X-CRM114-Status":"GOOD ( 11.61 )","X-Spam-Score":"-4.2 (----)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-4.2 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/,\n\tmedium trust [195.135.220.15 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"mark.rutland@arm.com, tbaicar@codeaurora.org, linux-acpi@vger.kernel.org,\n\tard.biesheuvel@linaro.org, catalin.marinas@arm.com, x86@kernel.org,\n\twill.deacon@arm.com, linux-kernel@vger.kernel.org,\n\tgengdongjiu@huawei.com, \n\ttakahiro.akashi@linaro.org, mingo@redhat.com, james.morse@arm.com,\n\tzjzhang@codeaurora.org, zhengqiang10@huawei.com,\n\twangxiongfeng2@huawei.com, \n\tlinux-arm-kernel@lists.infradead.org, shiju.jose@huawei.com","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1761597,"web_url":"http://patchwork.ozlabs.org/comment/1761597/","msgid":"<20170901111648.jrb3picf5m4clu3s@pd.tnic>","list_archive_url":null,"date":"2017-09-01T11:16:48","subject":"Re: [RFC PATCH v1 1/3] arm64/ras: support sea error recovery","submitter":{"id":47897,"url":"http://patchwork.ozlabs.org/api/people/47897/","name":"Borislav Petkov","email":"bp@suse.de"},"content":"On Fri, Sep 01, 2017 at 06:31:59PM +0800, Xie XiuQi wrote:\n> diff --git a/drivers/acpi/apei/ghes.c b/drivers/acpi/apei/ghes.c\n> index d661d45..fa9400d 100644\n> --- a/drivers/acpi/apei/ghes.c\n> +++ b/drivers/acpi/apei/ghes.c\n> @@ -52,6 +52,7 @@\n> #include \n> #include \n> #include \n> +#include \n> #include \n> \n> #include \"apei-internal.h\"\n> @@ -520,6 +521,7 @@ static void ghes_do_proc(struct ghes *ghes,\n> \t\telse if (guid_equal(sec_type, &CPER_SEC_PROC_ARM)) {\n> \t\t\tstruct cper_sec_proc_arm *err = acpi_hest_get_payload(gdata);\n> \n> +\t\t\tarm_proc_error_check(ghes, err);\n> \t\t\tlog_arm_hw_error(err);\n\nWrap those two in a single arm_process_error() which does everything\nneeded on ARM.","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; 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a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:\n\tMessage-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=lr3e65MnsBrBMwgTi0PPmoQSB4dVQAkYmqmSJNaLgS0=;\n\tb=NH2Ou+blyN5+zH\n\toSiz1MYm138UEk5Q+OTQd10koVe9mpXDJ4isYSB4S6YPgAmNm1t6LU2g2KXe05SV3EfCuu7fIcd/x\n\taoKrmkWkvgT5RrK8FNZR4Ko9z4y68rKmLiG8i4Wz1d8wid+UwSZ7MK8iE/77A6FzjstM9EvsR4mkV\n\tQw0AMCENgJzF+rmP4It0Htn7+30Qqa6857jGDFGf+I2X3D4o7e/QK+3+Y+4c+CXO9eCvcGzJyN2Zj\n\tr2OeUcQldZDgBa5Jb+ZIMKWjpSnw/q8zTLWluINLQbqh7rbG2FK6BWkD8D5D2lCdwbRuUMI8SgyDc\n\tq0KKiGWdS75iXp7IL3EA==;","X-Virus-Scanned":"by amavisd-new at test-mx.suse.de","Date":"Fri, 1 Sep 2017 13:16:48 +0200","From":"Borislav Petkov ","To":"Xie XiuQi ","Subject":"Re: [RFC PATCH v1 1/3] arm64/ras: support sea error recovery","Message-ID":"<20170901111648.jrb3picf5m4clu3s@pd.tnic>","References":"<1504261921-39308-1-git-send-email-xiexiuqi@huawei.com>\n\t<1504261921-39308-2-git-send-email-xiexiuqi@huawei.com>","MIME-Version":"1.0","Content-Disposition":"inline","In-Reply-To":"<1504261921-39308-2-git-send-email-xiexiuqi@huawei.com>","User-Agent":"NeoMutt/20170113 (1.7.2)","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170901_041711_372955_B9B4994D ","X-CRM114-Status":"UNSURE ( 7.36 )","X-CRM114-Notice":"Please train this message.","X-Spam-Score":"-4.2 (----)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-4.2 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/,\n\tmedium trust [195.135.220.15 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"mark.rutland@arm.com, tbaicar@codeaurora.org, linux-acpi@vger.kernel.org,\n\tard.biesheuvel@linaro.org, catalin.marinas@arm.com, x86@kernel.org,\n\twill.deacon@arm.com, linux-kernel@vger.kernel.org,\n\tgengdongjiu@huawei.com, \n\ttakahiro.akashi@linaro.org, mingo@redhat.com, james.morse@arm.com,\n\tzjzhang@codeaurora.org, zhengqiang10@huawei.com,\n\twangxiongfeng2@huawei.com, \n\tlinux-arm-kernel@lists.infradead.org, shiju.jose@huawei.com","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1761776,"web_url":"http://patchwork.ozlabs.org/comment/1761776/","msgid":"<7deab964-40a7-cb7d-5742-7dd837e22878@arm.com>","list_archive_url":null,"date":"2017-09-01T15:51:37","subject":"Re: [RFC PATCH v1 1/3] arm64/ras: support sea error recovery","submitter":{"id":72256,"url":"http://patchwork.ozlabs.org/api/people/72256/","name":"Julien Thierry","email":"julien.thierry@arm.com"},"content":"Hi Xie,\n\nOn 01/09/17 11:31, Xie XiuQi wrote:\n> With ARM v8.2 RAS Extension, SEA are usually triggered when memory errors\n> are consumed. In some cases, if the error address is in a clean page or a\n> read-only page, there is a chance to recover. Such as error occurs in a\n> instruction page, we can reread this page from disk instead of killing process.\n> \n> Because memory_failure() may sleep, we can not call it directly in SEA exception\n> context. So we saved faulting physical address associated with a process in the\n> ghes handler and set __TIF_SEA_NOTIFY. When we return from SEA exception context\n> and get into do_notify_resume() before the process running, we could check it\n> and call memory_failure() to do recovery. It's safe, because we are in process\n> context.\n> \n> Signed-off-by: Xie XiuQi \n> Signed-off-by: Wang Xiongfeng \n> ---\n> arch/arm64/Kconfig | 11 +++\n> arch/arm64/include/asm/ras.h | 27 +++++++\n> arch/arm64/include/asm/thread_info.h | 4 +-\n> arch/arm64/kernel/Makefile | 1 +\n> arch/arm64/kernel/ras.c | 138 +++++++++++++++++++++++++++++++++++\n> arch/arm64/kernel/signal.c | 8 ++\n> arch/arm64/mm/fault.c | 27 +++++--\n> drivers/acpi/apei/ghes.c | 2 +\n> 8 files changed, 209 insertions(+), 9 deletions(-)\n> create mode 100644 arch/arm64/include/asm/ras.h\n> create mode 100644 arch/arm64/kernel/ras.c\n> \n> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig\n> index dfd9086..7d44589 100644\n> --- a/arch/arm64/Kconfig\n> +++ b/arch/arm64/Kconfig\n> @@ -640,6 +640,17 @@ config HOTPLUG_CPU\n> \t Say Y here to experiment with turning CPUs off and on. CPUs\n> \t can be controlled through /sys/devices/system/cpu.\n> \n> +config ARM64_ERR_RECOV\n> +\tbool \"Support arm64 RAS error recovery\"\n> +\tdepends on ACPI_APEI_SEA && MEMORY_FAILURE\n> +\thelp\n> +\t With ARM v8.2 RAS Extension, SEA are usually triggered when memory errors\n> +\t are consumed. In some cases, if the error address is in a clean page or a\n> +\t read-only page, there is a chance to recover. Such as error occurs in a\n> +\t instruction page, we can reread this page from disk instead of killing process.\n> +\n> +\t Say Y if unsure.\n> +\n> # Common NUMA Features\n> config NUMA\n> \tbool \"Numa Memory Allocation and Scheduler Support\"\n> diff --git a/arch/arm64/include/asm/ras.h b/arch/arm64/include/asm/ras.h\n> new file mode 100644\n> index 0000000..8c4f6a8\n> --- /dev/null\n> +++ b/arch/arm64/include/asm/ras.h\n> @@ -0,0 +1,27 @@\n> +/*\n> + * ARM64 SEA error recoery support\n> + *\n> + * Copyright 2017 Huawei Technologies Co., Ltd.\n> + * Author: Xie XiuQi \n> + * Author: Wang Xiongfeng \n> + *\n> + * This program is free software; you can redistribute it and/or\n> + * modify it under the terms of the GNU General Public License version\n> + * 2 as published by the Free Software Foundation;\n> + *\n> + * This program is distributed in the hope that it will be useful,\n> + * but WITHOUT ANY WARRANTY; without even the implied warranty of\n> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n> + * GNU General Public License for more details.\n> + */\n> +\n> +#ifndef _ASM_RAS_H\n> +#define _ASM_RAS_H\n> +\n> +#include \n> +#include \n> +\n> +extern void sea_notify_process(void);\n> +extern void arm_proc_error_check(struct ghes *ghes, struct cper_sec_proc_arm *err);\n> +\n> +#endif /*_ASM_RAS_H*/\n> diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h\n> index 46c3b93..4b10131 100644\n> --- a/arch/arm64/include/asm/thread_info.h\n> +++ b/arch/arm64/include/asm/thread_info.h\n> @@ -86,6 +86,7 @@ struct thread_info {\n> #define TIF_NOTIFY_RESUME\t2\t/* callback before returning to user */\n> #define TIF_FOREIGN_FPSTATE\t3\t/* CPU's FP state is not current's */\n> #define TIF_UPROBE\t\t4\t/* uprobe breakpoint or singlestep */\n> +#define TIF_SEA_NOTIFY 5 /* notify to do an error recovery */\n> #define TIF_NOHZ\t\t7\n> #define TIF_SYSCALL_TRACE\t8\n> #define TIF_SYSCALL_AUDIT\t9\n> @@ -102,6 +103,7 @@ struct thread_info {\n> #define _TIF_NOTIFY_RESUME\t(1 << TIF_NOTIFY_RESUME)\n> #define _TIF_FOREIGN_FPSTATE\t(1 << TIF_FOREIGN_FPSTATE)\n> #define _TIF_NOHZ\t\t(1 << TIF_NOHZ)\n> +#define _TIF_SEA_NOTIFY (1 << TIF_SEA_NOTIFY)\n> #define _TIF_SYSCALL_TRACE\t(1 << TIF_SYSCALL_TRACE)\n> #define _TIF_SYSCALL_AUDIT\t(1 << TIF_SYSCALL_AUDIT)\n> #define _TIF_SYSCALL_TRACEPOINT\t(1 << TIF_SYSCALL_TRACEPOINT)\n> @@ -111,7 +113,7 @@ struct thread_info {\n> \n> #define _TIF_WORK_MASK\t\t(_TIF_NEED_RESCHED | _TIF_SIGPENDING | \\\n> \t\t\t\t _TIF_NOTIFY_RESUME | _TIF_FOREIGN_FPSTATE | \\\n> -\t\t\t\t _TIF_UPROBE)\n> +\t\t\t\t _TIF_UPROBE|_TIF_SEA_NOTIFY)\n> \n> #define _TIF_SYSCALL_WORK\t(_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | \\\n> \t\t\t\t _TIF_SYSCALL_TRACEPOINT | _TIF_SECCOMP | \\\n> diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile\n> index f2b4e81..ba3abf8 100644\n> --- a/arch/arm64/kernel/Makefile\n> +++ b/arch/arm64/kernel/Makefile\n> @@ -43,6 +43,7 @@ arm64-obj-$(CONFIG_EFI)\t\t\t+= efi.o efi-entry.stub.o\n> arm64-obj-$(CONFIG_PCI)\t\t\t+= pci.o\n> arm64-obj-$(CONFIG_ARMV8_DEPRECATED)\t+= armv8_deprecated.o\n> arm64-obj-$(CONFIG_ACPI)\t\t+= acpi.o\n> +arm64-obj-$(CONFIG_ARM64_ERR_RECOV)\t+= ras.o\n> arm64-obj-$(CONFIG_ACPI_NUMA)\t\t+= acpi_numa.o\n> arm64-obj-$(CONFIG_ARM64_ACPI_PARKING_PROTOCOL)\t+= acpi_parking_protocol.o\n> arm64-obj-$(CONFIG_PARAVIRT)\t\t+= paravirt.o\n> diff --git a/arch/arm64/kernel/ras.c b/arch/arm64/kernel/ras.c\n> new file mode 100644\n> index 0000000..8562ec7\n> --- /dev/null\n> +++ b/arch/arm64/kernel/ras.c\n> @@ -0,0 +1,138 @@\n> +/*\n> + * ARM64 SEA error recoery support\n> + *\n> + * Copyright 2017 Huawei Technologies Co., Ltd.\n> + * Author: Xie XiuQi \n> + * Author: Wang Xiongfeng \n> + *\n> + * This program is free software; you can redistribute it and/or\n> + * modify it under the terms of the GNU General Public License version\n> + * 2 as published by the Free Software Foundation;\n> + *\n> + * This program is distributed in the hope that it will be useful,\n> + * but WITHOUT ANY WARRANTY; without even the implied warranty of\n> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n> + * GNU General Public License for more details.\n> + */\n> +\n> +#include \n> +#include \n> +#include \n> +#include \n> +#include \n> +#include \n> +\n> +#include \n> +#include \n> +#include \n> +\n> +#include \n> +#include \n> +#include \n> +\n> +/*\n> + * Need to save faulting physical address associated with a process\n> + * in the sea ghes handler some place where we can grab it back\n> + * later in sea_notify_process()\n> + */\n> +#define SEA_INFO_MAX 16\n> +\n> +struct sea_info {\n> + atomic_t inuse;\n> + struct task_struct *t;\n> + __u64 paddr;\n> +} sea_info[SEA_INFO_MAX];\n> +\n> +static int sea_save_info(__u64 addr)\n> +{\n> + struct sea_info *si;\n> +\n> + for (si = sea_info; si < &sea_info[SEA_INFO_MAX]; si++) {\n> + if (atomic_cmpxchg(&si->inuse, 0, 1) == 0) {\n> + si->t = current;\n> + si->paddr = addr;\n> + return 0;\n> + }\n> + }\n> +\n> +\tpr_err(\"Too many concurrent recoverable errors\\n\");\n> +\treturn -ENOMEM;\n> +}\n> +\n> +static struct sea_info *sea_find_info(void)\n> +{\n> + struct sea_info *si;\n> +\n> + for (si = sea_info; si < &sea_info[SEA_INFO_MAX]; si++)\n> + if (atomic_read(&si->inuse) && si->t == current)\n> + return si;\n> + return NULL;\n> +}\n> +\n> +static void sea_clear_info(struct sea_info *si)\n> +{\n> + atomic_set(&si->inuse, 0);\n> +}\n> +\n> +/*\n> + * Called in process context that interrupted by SEA and marked with\n> + * TIF_SEA_NOTIFY, just before returning to erroneous userland.\n> + * This code is allowed to sleep.\n> + * Attempt possible recovery such as calling the high level VM handler to\n> + * process any corrupted pages, and kill/signal current process if required.\n> + * Action required errors are handled here.\n> + */\n> +void sea_notify_process(void)\n> +{\n> +\tunsigned long pfn;\n> +\tint fail = 0, flags = MF_ACTION_REQUIRED;\n> +\tstruct sea_info *si = sea_find_info();\n> +\n> +\tif (!si)\n> +\t\tpanic(\"Lost physical address for consumed uncorrectable error\");\n> +\n> +\tclear_thread_flag(TIF_SEA_NOTIFY);\n> +\tdo {\n> +\t\tpfn = si->paddr >> PAGE_SHIFT;\n> +\n> +\n> +\t\tpr_err(\"Uncorrected hardware memory error in user-access at %llx\\n\",\n> +\t\t\tsi->paddr);\n> +\t\t/*\n> +\t\t * We must call memory_failure() here even if the current process is\n> +\t\t * doomed. We still need to mark the page as poisoned and alert any\n> +\t\t * other users of the page.\n> +\t\t */\n> +\t\tif (memory_failure(pfn, 0, flags) < 0) {\n> +\t\t\tfail++;\n> +\t\t}\n> +\t\tsea_clear_info(si);\n> +\n> +\t\tsi = sea_find_info();\n> +\t} while (si);\n> +\n> +\tif (fail) {\n> +\t\tpr_err(\"Memory error not recovered\\n\");\n> +\t\tforce_sig(SIGBUS, current);\n> +\t}\n> +}\n> +\n> +void arm_proc_error_check(struct ghes *ghes, struct cper_sec_proc_arm *err)\n> +{\n> +\tint i, ret = -1;\n> +\tstruct cper_arm_err_info *err_info;\n> +\n> +\tif ((ghes->generic->notify.type != ACPI_HEST_NOTIFY_SEA) ||\n> +\t (ghes->estatus->error_severity != CPER_SEV_RECOVERABLE))\n> +\t\treturn;\n> +\n> +\terr_info = (struct cper_arm_err_info *)(err + 1);\n> +\tfor (i = 0; i < err->err_info_num; i++, err_info++) {\n> +\t\tif (err_info->validation_bits & CPER_ARM_INFO_VALID_PHYSICAL_ADDR) {\n> +\t\t\tret |= sea_save_info(err_info->physical_fault_addr);\n> +\t\t}\n> +\t}\n> +\n> +\tif (!ret)\n\nIf ret is initialized to -1, this is never true since you only OR bits \nin ret.\n\nShould the body of the loop be:\n\tret &= sea_save_info(err_info->physical_fault_addr);\n\nso as long as you as you manage to store 1 sea_info you set the thread flag?\n\nBut if that's the case a boolean might make more sense:\n\nbool info_saved = false;\n[...]\n\tinfo_saved |= !sea_save_info(err_info->physical_fault_addr);\n[...]\nif (info_saved)\n\t\t[...]\n\n\n> +\t\tset_thread_flag(TIF_SEA_NOTIFY);\n> +}\n> diff --git a/arch/arm64/kernel/signal.c b/arch/arm64/kernel/signal.c\n> index 089c3747..71e314e 100644\n> --- a/arch/arm64/kernel/signal.c\n> +++ b/arch/arm64/kernel/signal.c\n> @@ -38,6 +38,7 @@\n> #include \n> #include \n> #include \n> +#include \n> \n> /*\n> * Do a signal return; undo the signal stack. These are aligned to 128-bit.\n> @@ -749,6 +750,13 @@ asmlinkage void do_notify_resume(struct pt_regs *regs,\n> \t * Update the trace code with the current status.\n> \t */\n> \ttrace_hardirqs_off();\n> +\n> +#ifdef CONFIG_ARM64_ERR_RECOV\n> +\t\t/* notify userspace of pending SEAs */\n> +\t\tif (thread_flags & _TIF_SEA_NOTIFY)\n> +\t\t\tsea_notify_process();\n> +#endif /* CONFIG_ARM64_ERR_RECOV */\n> +\n> \tdo {\n> \t\tif (thread_flags & _TIF_NEED_RESCHED) {\n> \t\t\tschedule();\n> diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c\n> index 1f22a41..b38476d 100644\n> --- a/arch/arm64/mm/fault.c\n> +++ b/arch/arm64/mm/fault.c\n> @@ -594,14 +594,25 @@ static int do_sea(unsigned long addr, unsigned int esr, struct pt_regs *regs)\n> \t\t\tnmi_exit();\n> \t}\n> \n> -\tinfo.si_signo = SIGBUS;\n> -\tinfo.si_errno = 0;\n> -\tinfo.si_code = 0;\n> -\tif (esr & ESR_ELx_FnV)\n> -\t\tinfo.si_addr = NULL;\n> -\telse\n> -\t\tinfo.si_addr = (void __user *)addr;\n> -\tarm64_notify_die(\"\", regs, &info, esr);\n> +\tif (user_mode(regs)) {\n> +\t\tif (test_thread_flag(TIF_SEA_NOTIFY))\n> +\t\t\treturn ret;\n> +\n> +\t\tinfo.si_signo = SIGBUS;\n> +\t\tinfo.si_errno = 0;\n> +\t\tinfo.si_code = 0;\n> +\t\tif (esr & ESR_ELx_FnV)\n> +\t\t\tinfo.si_addr = NULL;\n> +\t\telse\n> +\t\t\tinfo.si_addr = (void __user *)addr;\n> +\n> +\t\tcurrent->thread.fault_address = 0;\n> +\t\tcurrent->thread.fault_code = esr;\n> +\t\tforce_sig_info(info.si_signo, &info, current);\n> +\t} else {\n> +\t\tdie(\"Uncorrected hardware memory error in kernel-access\\n\",\n> +\t\t regs, esr);\n> +\t}\n> \n> \treturn ret;\n> }\n> diff --git a/drivers/acpi/apei/ghes.c b/drivers/acpi/apei/ghes.c\n> index d661d45..fa9400d 100644\n> --- a/drivers/acpi/apei/ghes.c\n> +++ b/drivers/acpi/apei/ghes.c\n> @@ -52,6 +52,7 @@\n> #include \n> #include \n> #include \n> +#include \n> #include \n> \n> #include \"apei-internal.h\"\n> @@ -520,6 +521,7 @@ static void ghes_do_proc(struct ghes *ghes,\n> \t\telse if (guid_equal(sec_type, &CPER_SEC_PROC_ARM)) {\n> \t\t\tstruct cper_sec_proc_arm *err = acpi_hest_get_payload(gdata);\n> \n> +\t\t\tarm_proc_error_check(ghes, err);\n\nIf I understand the Makefile change correctly, arm_proc_error_check is \ncompiled only when CONFIG_ARM64_ERR_RECOV, don't you get a linker error \nhere if this config is not selected?\n\nOtherwise patch looks fine.\n\nCheers,","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; 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Fri, 1 Sep 2017 08:51:38 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:Content-Type:\n\tContent-Transfer-Encoding:Cc:List-Subscribe:List-Help:List-Post:List-Archive:\n\tList-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From:\n\tReferences:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date:\n\tResent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner;\n\tbh=a57DGzAhP7qsMYlbFUXDSWz4cYIHO3YR0IYyejBTWhg=;\n\tb=BwSGQIJv8QR6Vdsx5VLmwWNqe\n\tC7tH6xLy0JXNDN2yXYk/OePVwCg8rPX0uI0yIH+oWndIL62PMGnUucOjfHTpNcR8aprtHZWcZkOAr\n\tM3WsVoAzhFfXh4IW85GQLkARioUIv3UVFbZC4/4bjOdx4EH/NKB7wCGWHTdK6PxJsqn5XM9kZNXsk\n\tjAtCtN7Wa5zhbpgjlmdhoPw1ug7Nsc+pj2vtJBLlmYISfs72nunzplRES6sIWXU+5rGekqPNzDT01\n\tHf7lkTzzwY3prFgtXtL7mihlVvd9LjFvAXtFAEoH6BgZKF2kcKMuChi5W3DAJ//KkQb/w4ISwDehx\n\t1/W91xhOA==;","Subject":"Re: [RFC PATCH v1 1/3] arm64/ras: support sea error recovery","To":"Xie XiuQi , catalin.marinas@arm.com,\n\twill.deacon@arm.com, mingo@redhat.com, x86@kernel.org,\n\tmark.rutland@arm.com, ard.biesheuvel@linaro.org, james.morse@arm.com,\n\ttakahiro.akashi@linaro.org, \n\ttbaicar@codeaurora.org, bp@suse.de, shiju.jose@huawei.com,\n\tzjzhang@codeaurora.org","References":"<1504261921-39308-1-git-send-email-xiexiuqi@huawei.com>\n\t<1504261921-39308-2-git-send-email-xiexiuqi@huawei.com>","From":"Julien Thierry ","Message-ID":"<7deab964-40a7-cb7d-5742-7dd837e22878@arm.com>","Date":"Fri, 1 Sep 2017 16:51:37 +0100","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.2.1","MIME-Version":"1.0","In-Reply-To":"<1504261921-39308-2-git-send-email-xiexiuqi@huawei.com>","Content-Language":"en-US","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170901_085203_919160_8825BB60 ","X-CRM114-Status":"GOOD ( 34.26 )","X-Spam-Score":"-6.9 (------)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-6.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/,\n\thigh trust [217.140.101.70 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"linux-kernel@vger.kernel.org, gengdongjiu@huawei.com,\n\tlinux-acpi@vger.kernel.org, zhengqiang10@huawei.com,\n\twangxiongfeng2@huawei.com, linux-arm-kernel@lists.infradead.org","Content-Transfer-Encoding":"7bit","Content-Type":"text/plain; charset=\"us-ascii\"; Format=\"flowed\"","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1762399,"web_url":"http://patchwork.ozlabs.org/comment/1762399/","msgid":"<471744b2-843c-949c-9888-e02544a3088c@huawei.com>","list_archive_url":null,"date":"2017-09-04T02:58:40","subject":"Re: [RFC PATCH v1 1/3] arm64/ras: support sea error recovery","submitter":{"id":24815,"url":"http://patchwork.ozlabs.org/api/people/24815/","name":"Xie XiuQi","email":"xiexiuqi@huawei.com"},"content":"Hi Julien,\n\nOn 2017/9/1 23:51, Julien Thierry wrote:\n> Hi Xie,\n> \n> On 01/09/17 11:31, Xie XiuQi wrote:\n>> With ARM v8.2 RAS Extension, SEA are usually triggered when memory errors\n>> are consumed. In some cases, if the error address is in a clean page or a\n>> read-only page, there is a chance to recover. Such as error occurs in a\n>> instruction page, we can reread this page from disk instead of killing process.\n>>\n>> Because memory_failure() may sleep, we can not call it directly in SEA exception\n>> context. So we saved faulting physical address associated with a process in the\n>> ghes handler and set __TIF_SEA_NOTIFY. When we return from SEA exception context\n>> and get into do_notify_resume() before the process running, we could check it\n>> and call memory_failure() to do recovery. It's safe, because we are in process\n>> context.\n>>\n>> Signed-off-by: Xie XiuQi \n>> Signed-off-by: Wang Xiongfeng \n\n...\n\n>> +\n>> +void arm_proc_error_check(struct ghes *ghes, struct cper_sec_proc_arm *err)\n>> +{\n>> + int i, ret = -1;\n>> + struct cper_arm_err_info *err_info;\n>> +\n>> + if ((ghes->generic->notify.type != ACPI_HEST_NOTIFY_SEA) ||\n>> + (ghes->estatus->error_severity != CPER_SEV_RECOVERABLE))\n>> + return;\n>> +\n>> + err_info = (struct cper_arm_err_info *)(err + 1);\n>> + for (i = 0; i < err->err_info_num; i++, err_info++) {\n>> + if (err_info->validation_bits & CPER_ARM_INFO_VALID_PHYSICAL_ADDR) {\n>> + ret |= sea_save_info(err_info->physical_fault_addr);\n>> + }\n>> + }\n>> +\n>> + if (!ret)\n> \n> If ret is initialized to -1, this is never true since you only OR bits in ret.\n> \n> Should the body of the loop be:\n> ret &= sea_save_info(err_info->physical_fault_addr);\n> \n> so as long as you as you manage to store 1 sea_info you set the thread flag?\n> \n> But if that's the case a boolean might make more sense:\n> \n> bool info_saved = false;\n> [...]\n> info_saved |= !sea_save_info(err_info->physical_fault_addr);\n> [...]\n> if (info_saved)\n> [...]\n> \n\nYou are right, I'll fix this issue, thanks.\n\n> \n>> + set_thread_flag(TIF_SEA_NOTIFY);\n>> +}\n>> diff --git a/arch/arm64/kernel/signal.c b/arch/arm64/kernel/signal.c\n>> index 089c3747..71e314e 100644\n>> --- a/arch/arm64/kernel/signal.c\n>> +++ b/arch/arm64/kernel/signal.c\n>> @@ -38,6 +38,7 @@\n>> #include \n>> #include \n>> #include \n>> +#include \n>> /*\n>> * Do a signal return; undo the signal stack. These are aligned to 128-bit.\n>> @@ -749,6 +750,13 @@ asmlinkage void do_notify_resume(struct pt_regs *regs,\n>> * Update the trace code with the current status.\n>> */\n>> trace_hardirqs_off();\n>> +\n>> +#ifdef CONFIG_ARM64_ERR_RECOV\n>> + /* notify userspace of pending SEAs */\n>> + if (thread_flags & _TIF_SEA_NOTIFY)\n>> + sea_notify_process();\n>> +#endif /* CONFIG_ARM64_ERR_RECOV */\n>> +\n>> do {\n>> if (thread_flags & _TIF_NEED_RESCHED) {\n>> schedule();\n>> diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c\n>> index 1f22a41..b38476d 100644\n>> --- a/arch/arm64/mm/fault.c\n>> +++ b/arch/arm64/mm/fault.c\n>> @@ -594,14 +594,25 @@ static int do_sea(unsigned long addr, unsigned int esr, struct pt_regs *regs)\n>> nmi_exit();\n>> }\n>> - info.si_signo = SIGBUS;\n>> - info.si_errno = 0;\n>> - info.si_code = 0;\n>> - if (esr & ESR_ELx_FnV)\n>> - info.si_addr = NULL;\n>> - else\n>> - info.si_addr = (void __user *)addr;\n>> - arm64_notify_die(\"\", regs, &info, esr);\n>> + if (user_mode(regs)) {\n>> + if (test_thread_flag(TIF_SEA_NOTIFY))\n>> + return ret;\n>> +\n>> + info.si_signo = SIGBUS;\n>> + info.si_errno = 0;\n>> + info.si_code = 0;\n>> + if (esr & ESR_ELx_FnV)\n>> + info.si_addr = NULL;\n>> + else\n>> + info.si_addr = (void __user *)addr;\n>> +\n>> + current->thread.fault_address = 0;\n>> + current->thread.fault_code = esr;\n>> + force_sig_info(info.si_signo, &info, current);\n>> + } else {\n>> + die(\"Uncorrected hardware memory error in kernel-access\\n\",\n>> + regs, esr);\n>> + }\n>> return ret;\n>> }\n>> diff --git a/drivers/acpi/apei/ghes.c b/drivers/acpi/apei/ghes.c\n>> index d661d45..fa9400d 100644\n>> --- a/drivers/acpi/apei/ghes.c\n>> +++ b/drivers/acpi/apei/ghes.c\n>> @@ -52,6 +52,7 @@\n>> #include \n>> #include \n>> #include \n>> +#include \n>> #include \n>> #include \"apei-internal.h\"\n>> @@ -520,6 +521,7 @@ static void ghes_do_proc(struct ghes *ghes,\n>> else if (guid_equal(sec_type, &CPER_SEC_PROC_ARM)) {\n>> struct cper_sec_proc_arm *err = acpi_hest_get_payload(gdata);\n>> + arm_proc_error_check(ghes, err);\n> \n> If I understand the Makefile change correctly, arm_proc_error_check is compiled only when CONFIG_ARM64_ERR_RECOV, don't you get a linker error here if this config is not selected?\n> \n\nYes, it's a problem if CONFIG_ARM64_ERR_RECOV is not selected.\nI'll fix it in next version.\n\n> Otherwise patch looks fine.\n> \n\nThanks for your comments.\n\n> Cheers,\n>","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; 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charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1762914,"web_url":"http://patchwork.ozlabs.org/comment/1762914/","msgid":"<98147131-acb6-0a9f-2fd6-043cb2ff410e@huawei.com>","list_archive_url":null,"date":"2017-09-05T02:20:12","subject":"Re: [RFC PATCH v1 2/3] apei: add ghes param for\n\tarch_apei_report_mem_error","submitter":{"id":24815,"url":"http://patchwork.ozlabs.org/api/people/24815/","name":"Xie XiuQi","email":"xiexiuqi@huawei.com"},"content":"Hi Borislav,\n\nOn 2017/9/1 19:15, Borislav Petkov wrote:\n> n Fri, Sep 01, 2017 at 06:32:00PM +0800, Xie XiuQi wrote:\n>> Add ghes param for arch_apei_report_mem_error, with which\n>> we could do more arch-specific processing.\n>>\n>> Signed-off-by: Xie XiuQi \n>> ---\n>> arch/x86/kernel/acpi/apei.c | 2 +-\n>> drivers/acpi/apei/apei-base.c | 4 +++-\n>> drivers/acpi/apei/ghes.c | 2 +-\n>> include/acpi/apei.h | 4 +++-\n>> include/acpi/ghes.h | 3 ++-\n>> 5 files changed, 10 insertions(+), 5 deletions(-)\n>>\n>> diff --git a/arch/x86/kernel/acpi/apei.c b/arch/x86/kernel/acpi/apei.c\n>> index ea3046e..1bf1c9b 100644\n>> --- a/arch/x86/kernel/acpi/apei.c\n>> +++ b/arch/x86/kernel/acpi/apei.c\n>> @@ -46,7 +46,7 @@ int arch_apei_enable_cmcff(struct acpi_hest_header *hest_hdr, void *data)\n>> \treturn 1;\n>> }\n>> \n>> -void arch_apei_report_mem_error(int sev, struct cper_sec_mem_err *mem_err)\n>> +void arch_apei_report_mem_error(struct ghes *ghes, int sev, struct cper_sec_mem_err *mem_err)\n>> {\n>> #ifdef CONFIG_X86_MCE\n>> \tapei_mce_report_mem_error(sev, mem_err);\n>> diff --git a/drivers/acpi/apei/apei-base.c b/drivers/acpi/apei/apei-base.c\n>> index da370e1..317169b 100644\n>> --- a/drivers/acpi/apei/apei-base.c\n>> +++ b/drivers/acpi/apei/apei-base.c\n>> @@ -38,6 +38,8 @@\n>> #include \n>> #include \n>> \n>> +#include \n>> +\n>> #include \"apei-internal.h\"\n>> \n>> #define APEI_PFX \"APEI: \"\n>> @@ -770,7 +772,7 @@ int __weak arch_apei_enable_cmcff(struct acpi_hest_header *hest_hdr,\n>> }\n>> EXPORT_SYMBOL_GPL(arch_apei_enable_cmcff);\n>> \n>> -void __weak arch_apei_report_mem_error(int sev,\n>> +void __weak arch_apei_report_mem_error(struct ghes *ghes, int sev,\n>> \t\t\t\t struct cper_sec_mem_err *mem_err)\n>> {\n>> }\n>> diff --git a/drivers/acpi/apei/ghes.c b/drivers/acpi/apei/ghes.c\n>> index fa9400d..996d16c4 100644\n>> --- a/drivers/acpi/apei/ghes.c\n>> +++ b/drivers/acpi/apei/ghes.c\n>> @@ -483,7 +483,7 @@ static void ghes_do_proc(struct ghes *ghes,\n>> \n>> \t\t\tghes_edac_report_mem_error(ghes, sev, mem_err);\n>> \n>> -\t\t\tarch_apei_report_mem_error(sev, mem_err);\n>> +\t\t\tarch_apei_report_mem_error(ghes, sev, mem_err);\n> \n> And next time you want to pass something else, you'll have to touch all\n> those files again...\n> \n> Instead, make that a notifier to which consumers register and define\n> a separate struct mem_err or ghes_err or whatnot and populate it with\n> cper_sec_mem_err data and whatever else is needed by the consumers.\n> Instead of passing that struct ghes * which consumers don't need to\n> know.\n\nOK, I'll add a notify chain here, thanks.\n\n> \n> Thx.\n>","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; 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Tue, 05 Sep 2017 10:20:32 +0800 (CST)","from [127.0.0.1] (10.177.19.210) by DGGEMS401-HUB.china.huawei.com\n\t(10.3.19.201) with Microsoft SMTP Server id 14.3.301.0;\n\tTue, 5 Sep 2017 10:20:26 +0800"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:\n\tMessage-ID:From:References:To:Subject:Reply-To:Content-ID:Content-Description\n\t:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=e9oXlNMn8NlQxdWwz4rqpG11+3dcSFDyYjYhsd/qsbM=;\n\tb=KfkVVHZ6St/yDh\n\tdPhai7E3EfSC7jstJ+Z4mZLNIJmjhInaH3cWFz+QEfgMLnMyP46pRrxwwd3guo9W8rBz4gvK/ZS0l\n\tYBbk1Xf1RbrINDoaio6QxPo/3edZDDzpZFhk237CyiDmUID7Fnsu80b65GFSxzbGrQeVv69Ne8h73\n\tHK2s3i0b1IK/xC7jtao5yDVQ8XAcxTSP9wi3JGu+VbnTkBhT/SyZiZOji/E/q8vv7WSkcha2MZByQ\n\tBcveBgZA7pH9/rh6z5V0c636/oqUY7qC58GOiFn2jHPeSYxFGtHhE9D1nrBClEdi5nMXjxsXlgY7G\n\t39zwui3Fh2uQ1oaqgEfg==;","Subject":"Re: [RFC PATCH v1 2/3] apei: add ghes param for\n\tarch_apei_report_mem_error","To":"Borislav Petkov ","References":"<1504261921-39308-1-git-send-email-xiexiuqi@huawei.com>\n\t<1504261921-39308-3-git-send-email-xiexiuqi@huawei.com>\n\t<20170901111526.plpslddmrjerkxtv@pd.tnic>","From":"Xie XiuQi ","Message-ID":"<98147131-acb6-0a9f-2fd6-043cb2ff410e@huawei.com>","Date":"Tue, 5 Sep 2017 10:20:12 +0800","User-Agent":"Mozilla/5.0 (Windows NT 6.1; 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