[{"id":1761521,"web_url":"http://patchwork.ozlabs.org/comment/1761521/","msgid":"<20170901084243.GB14918@verge.net.au>","list_archive_url":null,"date":"2017-09-01T08:42:44","subject":"Re: [PATCH v3 0/3] ARM: renesas: Enable SMP on R-Car E2","submitter":{"id":106,"url":"http://patchwork.ozlabs.org/api/people/106/","name":"Simon Horman","email":"horms@verge.net.au"},"content":"On Fri, Sep 01, 2017 at 10:37:43AM +0200, Geert Uytterhoeven wrote:\n>         Hi all,\n> \n> This patch series enables SMP on R-Car E2 (r8a7794).\n> The main hurdle here is that R-Car Gen2 boot loaders do not initialize the\n> arch_timer CNTVOFF register, which thus needs workarounds on Linux.\n> \n>   - The first patch adds a definition for MON_MODE, as suggested by Marc\n>     Zyngier,\n>   - The second patch makes sure CNTVOFF is initialized for boot and\n>     secondary Cortex-A15 and Cortex-A7 CPU cores, like is already done\n>     for the boot Cortex-A7 CPU core.  Without this, the ARM arch timer\n>     does not work on secondary CPU cores.\n>     This patch depends on \"[PATCH v2] ARM: shmobile: rcar-gen2: Correct\n>     arch timer frequency on RZ/G1E\".\n>   - The third patch adds the required infrastructure (APMU device node\n>     and corresponding enable-method) to DT.\n>     Obviously this must not be applied on a branch that does not contain\n>     the first two patches!\n> \n> Due to dependencies, I think it is easiest if the ARM maintainers provide\n> their Acked-by for patch 1, so the whole series can go in through Simon's\n> Renesas tree.\n\nThanks Geert, this merge strategy is fine by me.\n\n> \n> Changes compared to v2:\n>   - Replace \"isb\" by \"instr_sync\" to fix the arm v6 build (e.g.\n>     allmodconfig),\n> \n> Changes compared to v1:\n>   - New patch \"[PATCH v2 1/3] ARM: Add definition for monitor mode\",\n>   - Initialize CNTVOFF on Cortex-A15, too,\n>   - Use *_MODE definitions instead of hardcoded values,\n>   - Reduce duplication by calling the asm version from C,\n>   - Always build headsmp-apmu.o on R-Car Gen2.\n> \n> This has been tested on r8a7794/alt (dual Cortex-A7), and regression-tested\n> on r8a7790/lager (quad Cortex-A15), and r8a7791/koelsch, r8a7791/porter,\n> r8a7792/blanche, and r8a7793/gose (dual Cortex-A15).\n> \n> Thanks!\n> \n> Geert Uytterhoeven (2):\n>   ARM: Add definition for monitor mode\n>   ARM: shmobile: rcar-gen2: Make sure CNTVOFF is initialized on CA7/15\n> \n> Sergei Shtylyov (1):\n>   ARM: dts: r8a7794: Add SMP support\n> \n>  arch/arm/boot/dts/r8a7794.dtsi           |  7 ++++++\n>  arch/arm/include/uapi/asm/ptrace.h       |  1 +\n>  arch/arm/mach-shmobile/Makefile          |  1 +\n>  arch/arm/mach-shmobile/common.h          |  2 ++\n>  arch/arm/mach-shmobile/headsmp-apmu.S    | 37 ++++++++++++++++++++++++++++++++\n>  arch/arm/mach-shmobile/platsmp-apmu.c    |  2 +-\n>  arch/arm/mach-shmobile/setup-rcar-gen2.c | 20 ++---------------\n>  7 files changed, 51 insertions(+), 19 deletions(-)\n>  create mode 100644 arch/arm/mach-shmobile/headsmp-apmu.S\n> \n> -- \n> 2.7.4\n>","headers":{"Return-Path":"<linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org>","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=<UNKNOWN>)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org header.b=\"uLhAof/S\"; \n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=verge.net.au header.i=@verge.net.au\n\theader.b=\"IhEIcdtT\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xkCSk1fxVz9t2c\n\tfor <incoming-imx@patchwork.ozlabs.org>;\n\tFri,  1 Sep 2017 18:43:34 +1000 (AEST)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dnhY3-0001Hp-B9; Fri, 01 Sep 2017 08:43:31 +0000","from kirsty.vergenet.net ([202.4.237.240])\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dnhXz-0001Fy-D1 for linux-arm-kernel@lists.infradead.org;\n\tFri, 01 Sep 2017 08:43:29 +0000","from penelope.horms.nl (unknown [217.111.208.18])\n\tby kirsty.vergenet.net (Postfix) with ESMTPA id 185F225B82C;\n\tFri,  1 Sep 2017 18:43:02 +1000 (AEST)","by penelope.horms.nl (Postfix, from userid 7100)\n\tid 16F27E2313A; Fri,  1 Sep 2017 04:42:44 -0400 (EDT)"],"DKIM-Signature":["v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:\n\tMessage-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=M+ophCTveWr0Kz62fX4rmmwUnw18Icxw9vhJfGgrk8g=;\n\tb=uLhAof/S7HLnWy\n\tF2oCEUmWsb9Q0RecOHofVU29txLfyaJxERaB5iPurNq2pxK8KVE6RQ5wa91dEmw7ZR2qAzGcp63BH\n\t/ugpnOqTI6bEqTLcybVPUAymrZjnrA7SKe7Eid+d5tT+j8TEPwvIGLqBSNrrFiI82iPL76ceCqWwB\n\txXkakn9KhY21hB3ECk0I0VGA5umMcqmqZ1sLa1FOnMoEkjxKY2CAtfkxGvD783KAntS58RPrbakpM\n\tIagJJoF6N9TOKvQy5O8Vr5H++slrgL02SRatEKuVgrawyQngmajZs+ZRG4Bb5H5nyuYs2rJj4gvao\n\tmbLD6Sj6bSRby7dA0Axg==;","v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; \n\tt=1504255382; bh=aNoP6FzN5WuekTxQbt0ovcMJ8qEXm7etKMhagJAw47Y=;\n\th=Date:From:To:Cc:Subject:References:In-Reply-To:From;\n\tb=IhEIcdtTfb+HN3xgrm3u7WylRn8d9tRxHQOawEVgL4kPES8zpUlgPiQVJRUHE07d8\n\ta/UNQkuE7w7+DNqe8DgV2A7QKo4ldjoO8DY9jqq/6GKnSw8hRiWPjpogFUmrbgtmDc\n\txlczmIvPHM0dmkBf2B5PhXo0/aoI5mCvjojY3fRs="],"Date":"Fri, 1 Sep 2017 10:42:44 +0200","From":"Simon Horman <horms@verge.net.au>","To":"Geert Uytterhoeven <geert+renesas@glider.be>","Subject":"Re: [PATCH v3 0/3] ARM: renesas: Enable SMP on R-Car E2","Message-ID":"<20170901084243.GB14918@verge.net.au>","References":"<1504255066-5103-1-git-send-email-geert+renesas@glider.be>","MIME-Version":"1.0","Content-Disposition":"inline","In-Reply-To":"<1504255066-5103-1-git-send-email-geert+renesas@glider.be>","Organisation":"Horms Solutions BV","User-Agent":"Mutt/1.5.23 (2014-03-12)","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170901_014327_797357_89E1AA07 ","X-CRM114-Status":"GOOD (  21.27  )","X-Spam-Score":"-4.3 (----)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details:   (-4.3 points)\n\tpts rule name              description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 SPF_PASS               SPF: sender matches SPF record\n\t-2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/,\n\tmedium trust [202.4.237.240 listed in list.dnswl.org]\n\t-1.9 BAYES_00               BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t-0.1 DKIM_VALID Message has at least one valid DKIM or DK signature\n\t0.1 DKIM_SIGNED            Message has a DKIM or DK signature,\n\tnot necessarily valid\n\t-0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n\tauthor's domain","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":"<http://lists.infradead.org/mailman/options/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=unsubscribe>","List-Archive":"<http://lists.infradead.org/pipermail/linux-arm-kernel/>","List-Post":"<mailto:linux-arm-kernel@lists.infradead.org>","List-Help":"<mailto:linux-arm-kernel-request@lists.infradead.org?subject=help>","List-Subscribe":"<http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=subscribe>","Cc":"Mark Rutland <mark.rutland@arm.com>, Marc Zyngier <marc.zyngier@arm.com>,\n\tCatalin Marinas <catalin.marinas@arm.com>,\n\tMagnus Damm <magnus.damm@gmail.com>, \n\tRussell King <linux@armlinux.org.uk>, linux-renesas-soc@vger.kernel.org, \n\tlinux-arm-kernel@lists.infradead.org","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" <linux-arm-kernel-bounces@lists.infradead.org>","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1761832,"web_url":"http://patchwork.ozlabs.org/comment/1761832/","msgid":"<TY1PR06MB0895EB3FDC2C1A9647C51D80C0920@TY1PR06MB0895.apcprd06.prod.outlook.com>","list_archive_url":null,"date":"2017-09-01T17:04:17","subject":"RE: [PATCH v3 0/3] ARM: renesas: Enable SMP on R-Car E2","submitter":{"id":72129,"url":"http://patchwork.ozlabs.org/api/people/72129/","name":"Fabrizio Castro","email":"fabrizio.castro@bp.renesas.com"},"content":"> -----Original Message-----\n> From: linux-renesas-soc-owner@vger.kernel.org [mailto:linux-renesas-soc-owner@vger.kernel.org] On Behalf Of Geert\n> Uytterhoeven\n> Sent: 01 September 2017 09:38\n> To: Simon Horman <horms@verge.net.au>; Magnus Damm <magnus.damm@gmail.com>; Russell King <linux@armlinux.org.uk>;\n> Catalin Marinas <catalin.marinas@arm.com>; Marc Zyngier <marc.zyngier@arm.com>; Mark Rutland <mark.rutland@arm.com>\n> Cc: linux-renesas-soc@vger.kernel.org; linux-arm-kernel@lists.infradead.org; Geert Uytterhoeven <geert+renesas@glider.be>\n> Subject: [PATCH v3 0/3] ARM: renesas: Enable SMP on R-Car E2\n>\n>         Hi all,\n>\n> This patch series enables SMP on R-Car E2 (r8a7794).\n> The main hurdle here is that R-Car Gen2 boot loaders do not initialize the arch_timer CNTVOFF register, which thus needs\n> workarounds on Linux.\n>\n>   - The first patch adds a definition for MON_MODE, as suggested by Marc\n>     Zyngier,\n>   - The second patch makes sure CNTVOFF is initialized for boot and\n>     secondary Cortex-A15 and Cortex-A7 CPU cores, like is already done\n>     for the boot Cortex-A7 CPU core.  Without this, the ARM arch timer\n>     does not work on secondary CPU cores.\n>     This patch depends on \"[PATCH v2] ARM: shmobile: rcar-gen2: Correct\n>     arch timer frequency on RZ/G1E\".\n>   - The third patch adds the required infrastructure (APMU device node\n>     and corresponding enable-method) to DT.\n>     Obviously this must not be applied on a branch that does not contain\n>     the first two patches!\n>\n> Due to dependencies, I think it is easiest if the ARM maintainers provide their Acked-by for patch 1, so the whole series can go in\n> through Simon's Renesas tree.\n>\n> Changes compared to v2:\n>   - Replace \"isb\" by \"instr_sync\" to fix the arm v6 build (e.g.\n>     allmodconfig),\n>\n> Changes compared to v1:\n>   - New patch \"[PATCH v2 1/3] ARM: Add definition for monitor mode\",\n>   - Initialize CNTVOFF on Cortex-A15, too,\n>   - Use *_MODE definitions instead of hardcoded values,\n>   - Reduce duplication by calling the asm version from C,\n>   - Always build headsmp-apmu.o on R-Car Gen2.\n>\n> This has been tested on r8a7794/alt (dual Cortex-A7), and regression-tested on r8a7790/lager (quad Cortex-A15), and\n> r8a7791/koelsch, r8a7791/porter, r8a7792/blanche, and r8a7793/gose (dual Cortex-A15).\n\nHello Geert,\n\nlast week we tried to enable APMU/SMP on the iWave RZG1E (r8a7745, dual Cortex-A7) G22D-SODIMM board unsuccessfully, this patch series fixes the problems we have been experiencing.\n\nThanks,\nFabrizio\n\nTested-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>\n\n>\n> Thanks!\n>\n> Geert Uytterhoeven (2):\n>   ARM: Add definition for monitor mode\n>   ARM: shmobile: rcar-gen2: Make sure CNTVOFF is initialized on CA7/15\n>\n> Sergei Shtylyov (1):\n>   ARM: dts: r8a7794: Add SMP support\n>\n>  arch/arm/boot/dts/r8a7794.dtsi           |  7 ++++++\n>  arch/arm/include/uapi/asm/ptrace.h       |  1 +\n>  arch/arm/mach-shmobile/Makefile          |  1 +\n>  arch/arm/mach-shmobile/common.h          |  2 ++\n>  arch/arm/mach-shmobile/headsmp-apmu.S    | 37 ++++++++++++++++++++++++++++++++\n>  arch/arm/mach-shmobile/platsmp-apmu.c    |  2 +-\n>  arch/arm/mach-shmobile/setup-rcar-gen2.c | 20 ++---------------\n>  7 files changed, 51 insertions(+), 19 deletions(-)  create mode 100644 arch/arm/mach-shmobile/headsmp-apmu.S\n>\n> --\n> 2.7.4\n\n\n\n\nRenesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.","headers":{"Return-Path":"<linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org>","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=<UNKNOWN>)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org header.b=\"gJy2vkd2\"; \n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=renesasgroup.onmicrosoft.com\n\theader.i=@renesasgroup.onmicrosoft.com header.b=\"OYrrhrEe\"; \n\tdkim-atps=neutral","spf=none (sender IP is )\n\tsmtp.mailfrom=fabrizio.castro@bp.renesas.com; "],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xkQbC1LqFz9t3k\n\tfor <incoming-imx@patchwork.ozlabs.org>;\n\tSat,  2 Sep 2017 03:04:55 +1000 (AEST)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dnpNE-0000Jt-3D; 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a=rsa-sha256; c=relaxed/relaxed;\n\td=renesasgroup.onmicrosoft.com; s=selector1-bp-renesas-com;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version;\n\tbh=yjYBMd1zNDIKbZIjHQxcXD9GcVCZyTNXVoXCkxwx2oA=;\n\tb=OYrrhrEec9kvJnvNTz5frii8HKd0VCOuGtJARhbhoCB7Nt7EOdVRAPQjCK0CcGT6G6g/zTZNEExZ6Vd1ZybyWnOiSkSA2Mnqb+6m66GroeQK9xtqlPGZ+wxBA4AJkoKvPG1307/s41wohOKCBlZEabLlmYKC/c1+hORc9c67wPo="],"X-IronPort-AV":"E=Sophos;i=\"5.41,459,1498489200\"; d=\"scan'208\";a=\"255582723\"","From":"Fabrizio Castro <fabrizio.castro@bp.renesas.com>","To":"Geert Uytterhoeven <geert+renesas@glider.be>, Simon Horman\n\t<horms@verge.net.au>, Magnus Damm <magnus.damm@gmail.com>, Russell King\n\t<linux@armlinux.org.uk>, Catalin Marinas <catalin.marinas@arm.com>, \"Marc\n\tZyngier\" <marc.zyngier@arm.com>, Mark Rutland <mark.rutland@arm.com>","Subject":"RE: [PATCH v3 0/3] ARM: renesas: Enable SMP on R-Car E2","Thread-Topic":"[PATCH v3 0/3] ARM: renesas: Enable SMP on R-Car E2","Thread-Index":"AQHTIv2klOYkyYNvZkieXa1TwP2p3KKgQdvg","Date":"Fri, 1 Sep 2017 17:04:17 +0000","Message-ID":"<TY1PR06MB0895EB3FDC2C1A9647C51D80C0920@TY1PR06MB0895.apcprd06.prod.outlook.com>","References":"<1504255066-5103-1-git-send-email-geert+renesas@glider.be>","In-Reply-To":"<1504255066-5103-1-git-send-email-geert+renesas@glider.be>","Accept-Language":"en-GB, en-US","Content-Language":"en-US","X-MS-Has-Attach":"","X-MS-TNEF-Correlator":"","authentication-results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; 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charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" <linux-arm-kernel-bounces@lists.infradead.org>","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1763237,"web_url":"http://patchwork.ozlabs.org/comment/1763237/","msgid":"<TY1PR06MB0895C42C10E4222993A5575EC0960@TY1PR06MB0895.apcprd06.prod.outlook.com>","list_archive_url":null,"date":"2017-09-05T11:07:19","subject":"RE: [PATCH v3 0/3] ARM: renesas: Enable SMP on R-Car E2","submitter":{"id":72129,"url":"http://patchwork.ozlabs.org/api/people/72129/","name":"Fabrizio Castro","email":"fabrizio.castro@bp.renesas.com"},"content":"> -----Original Message-----\n> From: linux-renesas-soc-owner@vger.kernel.org [mailto:linux-renesas-soc-owner@vger.kernel.org] On Behalf Of Fabrizio Castro\n> Sent: 01 September 2017 18:04\n> To: Geert Uytterhoeven <geert+renesas@glider.be>; Simon Horman <horms@verge.net.au>; Magnus Damm\n> <magnus.damm@gmail.com>; Russell King <linux@armlinux.org.uk>; Catalin Marinas <catalin.marinas@arm.com>; Marc Zyngier\n> <marc.zyngier@arm.com>; Mark Rutland <mark.rutland@arm.com>\n> Cc: linux-renesas-soc@vger.kernel.org; linux-arm-kernel@lists.infradead.org\n> Subject: RE: [PATCH v3 0/3] ARM: renesas: Enable SMP on R-Car E2\n>\n> > -----Original Message-----\n> > From: linux-renesas-soc-owner@vger.kernel.org [mailto:linux-renesas-soc-owner@vger.kernel.org] On Behalf Of Geert\n> > Uytterhoeven\n> > Sent: 01 September 2017 09:38\n> > To: Simon Horman <horms@verge.net.au>; Magnus Damm <magnus.damm@gmail.com>; Russell King <linux@armlinux.org.uk>;\n> > Catalin Marinas <catalin.marinas@arm.com>; Marc Zyngier <marc.zyngier@arm.com>; Mark Rutland <mark.rutland@arm.com>\n> > Cc: linux-renesas-soc@vger.kernel.org; linux-arm-kernel@lists.infradead.org; Geert Uytterhoeven <geert+renesas@glider.be>\n> > Subject: [PATCH v3 0/3] ARM: renesas: Enable SMP on R-Car E2\n> >\n> >         Hi all,\n> >\n> > This patch series enables SMP on R-Car E2 (r8a7794).\n> > The main hurdle here is that R-Car Gen2 boot loaders do not initialize the arch_timer CNTVOFF register, which thus needs\n> > workarounds on Linux.\n> >\n> >   - The first patch adds a definition for MON_MODE, as suggested by Marc\n> >     Zyngier,\n> >   - The second patch makes sure CNTVOFF is initialized for boot and\n> >     secondary Cortex-A15 and Cortex-A7 CPU cores, like is already done\n> >     for the boot Cortex-A7 CPU core.  Without this, the ARM arch timer\n> >     does not work on secondary CPU cores.\n> >     This patch depends on \"[PATCH v2] ARM: shmobile: rcar-gen2: Correct\n> >     arch timer frequency on RZ/G1E\".\n> >   - The third patch adds the required infrastructure (APMU device node\n> >     and corresponding enable-method) to DT.\n> >     Obviously this must not be applied on a branch that does not contain\n> >     the first two patches!\n> >\n> > Due to dependencies, I think it is easiest if the ARM maintainers provide their Acked-by for patch 1, so the whole series can go in\n> > through Simon's Renesas tree.\n> >\n> > Changes compared to v2:\n> >   - Replace \"isb\" by \"instr_sync\" to fix the arm v6 build (e.g.\n> >     allmodconfig),\n> >\n> > Changes compared to v1:\n> >   - New patch \"[PATCH v2 1/3] ARM: Add definition for monitor mode\",\n> >   - Initialize CNTVOFF on Cortex-A15, too,\n> >   - Use *_MODE definitions instead of hardcoded values,\n> >   - Reduce duplication by calling the asm version from C,\n> >   - Always build headsmp-apmu.o on R-Car Gen2.\n> >\n> > This has been tested on r8a7794/alt (dual Cortex-A7), and regression-tested on r8a7790/lager (quad Cortex-A15), and\n> > r8a7791/koelsch, r8a7791/porter, r8a7792/blanche, and r8a7793/gose (dual Cortex-A15).\n>\n> Hello Geert,\n>\n> last week we tried to enable APMU/SMP on the iWave RZG1E (r8a7745, dual Cortex-A7) G22D-SODIMM board unsuccessfully, this\n> patch series fixes the problems we have been experiencing.\n\nHello Geert,\n\nwe tested your patch series on the RZG1M (r8a7743, dual Cortex-A15) too which was working well already, and it looks like the system keeps behaving properly.\n\nThanks,\nFabrizio\n\n>\n> Thanks,\n> Fabrizio\n>\n> Tested-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>\n>\n> >\n> > Thanks!\n> >\n> > Geert Uytterhoeven (2):\n> >   ARM: Add definition for monitor mode\n> >   ARM: shmobile: rcar-gen2: Make sure CNTVOFF is initialized on CA7/15\n> >\n> > Sergei Shtylyov (1):\n> >   ARM: dts: r8a7794: Add SMP support\n> >\n> >  arch/arm/boot/dts/r8a7794.dtsi           |  7 ++++++\n> >  arch/arm/include/uapi/asm/ptrace.h       |  1 +\n> >  arch/arm/mach-shmobile/Makefile          |  1 +\n> >  arch/arm/mach-shmobile/common.h          |  2 ++\n> >  arch/arm/mach-shmobile/headsmp-apmu.S    | 37 ++++++++++++++++++++++++++++++++\n> >  arch/arm/mach-shmobile/platsmp-apmu.c    |  2 +-\n> >  arch/arm/mach-shmobile/setup-rcar-gen2.c | 20 ++---------------\n> >  7 files changed, 51 insertions(+), 19 deletions(-)  create mode 100644 arch/arm/mach-shmobile/headsmp-apmu.S\n> >\n> > --\n> > 2.7.4\n>\n>\n>\n>\n> Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England &\n> Wales under Registered No. 04586709.\n\n\n\nRenesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. 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a=rsa-sha256; c=relaxed/relaxed;\n\td=renesasgroup.onmicrosoft.com; s=selector1-bp-renesas-com;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version;\n\tbh=M8QzepWIlA+H12n8KPtGlzKeTqnllKFc3LJbJAXNMDg=;\n\tb=rExeu0+LEHSSBozYd0m1rdeMgzstQfbh1K5RUeOZJa71+1XXFpM6E/6RmBmPhiY1NuOIcYEu1PYEhbBuZah71opBANk+FL/qDCF+R4qdKkoJr3+IIdHKfO6JJLJ8C3H/k6gBnp/ve57Plc8Hde5uO/pgCXKIo+dmwjEuaXMQ5u8="],"X-IronPort-AV":"E=Sophos;i=\"5.41,479,1498489200\"; d=\"scan'208\";a=\"256990564\"","From":"Fabrizio Castro <fabrizio.castro@bp.renesas.com>","To":"Fabrizio Castro <fabrizio.castro@bp.renesas.com>, Geert Uytterhoeven\n\t<geert+renesas@glider.be>, Simon Horman <horms@verge.net.au>, Magnus Damm\n\t<magnus.damm@gmail.com>, Russell King <linux@armlinux.org.uk>, \"Catalin\n\tMarinas\" <catalin.marinas@arm.com>, Marc Zyngier <marc.zyngier@arm.com>, \n\t\"Mark Rutland\" <mark.rutland@arm.com>, Chris Paterson\n\t<Chris.Paterson2@renesas.com>, Biju Das <biju.das@bp.renesas.com>","Subject":"RE: [PATCH v3 0/3] ARM: renesas: Enable SMP on R-Car E2","Thread-Topic":"[PATCH v3 0/3] ARM: renesas: Enable SMP on R-Car E2","Thread-Index":"AQHTIv2klOYkyYNvZkieXa1TwP2p3KKgQdvggAW0RWA=","Date":"Tue, 5 Sep 2017 11:07:19 +0000","Message-ID":"<TY1PR06MB0895C42C10E4222993A5575EC0960@TY1PR06MB0895.apcprd06.prod.outlook.com>","References":"<1504255066-5103-1-git-send-email-geert+renesas@glider.be>\n\t<TY1PR06MB0895EB3FDC2C1A9647C51D80C0920@TY1PR06MB0895.apcprd06.prod.outlook.com>","In-Reply-To":"<TY1PR06MB0895EB3FDC2C1A9647C51D80C0920@TY1PR06MB0895.apcprd06.prod.outlook.com>","Accept-Language":"en-GB, en-US","Content-Language":"en-US","X-MS-Has-Attach":"","X-MS-TNEF-Correlator":"","authentication-results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; 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charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" <linux-arm-kernel-bounces@lists.infradead.org>","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1766099,"web_url":"http://patchwork.ozlabs.org/comment/1766099/","msgid":"<20170911073936.GA19090@verge.net.au>","list_archive_url":null,"date":"2017-09-11T07:39:36","subject":"Re: [PATCH v3 0/3] ARM: renesas: Enable SMP on R-Car E2","submitter":{"id":106,"url":"http://patchwork.ozlabs.org/api/people/106/","name":"Simon Horman","email":"horms@verge.net.au"},"content":"On Fri, Sep 01, 2017 at 10:42:44AM +0200, Simon Horman wrote:\n> On Fri, Sep 01, 2017 at 10:37:43AM +0200, Geert Uytterhoeven wrote:\n> >         Hi all,\n> > \n> > This patch series enables SMP on R-Car E2 (r8a7794).\n> > The main hurdle here is that R-Car Gen2 boot loaders do not initialize the\n> > arch_timer CNTVOFF register, which thus needs workarounds on Linux.\n> > \n> >   - The first patch adds a definition for MON_MODE, as suggested by Marc\n> >     Zyngier,\n> >   - The second patch makes sure CNTVOFF is initialized for boot and\n> >     secondary Cortex-A15 and Cortex-A7 CPU cores, like is already done\n> >     for the boot Cortex-A7 CPU core.  Without this, the ARM arch timer\n> >     does not work on secondary CPU cores.\n> >     This patch depends on \"[PATCH v2] ARM: shmobile: rcar-gen2: Correct\n> >     arch timer frequency on RZ/G1E\".\n> >   - The third patch adds the required infrastructure (APMU device node\n> >     and corresponding enable-method) to DT.\n> >     Obviously this must not be applied on a branch that does not contain\n> >     the first two patches!\n> > \n> > Due to dependencies, I think it is easiest if the ARM maintainers provide\n> > their Acked-by for patch 1, so the whole series can go in through Simon's\n> > Renesas tree.\n> \n> Thanks Geert, this merge strategy is fine by me.\n\nThis patch-set has been floating around one form or another for quite\nsome time now and this version is now well over a week old.\n\nI've gone ahead and applied the first two patches for v4.15:\n* ARM: Add definition for monitor mode\n* ARM: shmobile: rcar-gen2: Make sure CNTVOFF is initialized on CA7/15\n\nI will push those to the devel branch of the renesas tree later today.\n\nI would like to deffer the third and last patch until v4.16 to avoid\nan awkward branch dependency on the above - the branches are different\neven though the tree is the same. Please resubmit this patch once the\nabove dependencies are present in an rc release, which at this stage\nI expect to be v4.15-rc1.\n\n* ARM: dts: r8a7794: Add SMP support","headers":{"Return-Path":"<linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org>","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=<UNKNOWN>)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org header.b=\"ozBFvjq4\"; \n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=verge.net.au header.i=@verge.net.au\n\theader.b=\"sMGphol3\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xrKbF3pY6z9s83\n\tfor <incoming-imx@patchwork.ozlabs.org>;\n\tMon, 11 Sep 2017 17:40:25 +1000 (AEST)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1drJKP-0004Xa-G9; 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a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; \n\tt=1505115594; bh=amSp7Oha+v+k/OU4wInP/1vabhVltelbN5xTLsnnfNU=;\n\th=Date:From:To:Cc:Subject:References:In-Reply-To:From;\n\tb=sMGphol3X/ozJ+LKqDhhxE0xx/lkTl2qR3MskhxGERhDzo1bSpDlKDL+c6Z6Dx+lt\n\t2AcOVwrKT4zsEk6J6SGA3RQHW0ABBBOdpP4LYNjnrDnMBF4oq/hByFTwoU0TT8ZlbH\n\thoRd8BgXEopxlpEQxeCK4cjqCcHSFolToHHgLzXk="],"Date":"Mon, 11 Sep 2017 09:39:36 +0200","From":"Simon Horman <horms@verge.net.au>","To":"Geert Uytterhoeven <geert+renesas@glider.be>","Subject":"Re: [PATCH v3 0/3] ARM: renesas: Enable SMP on R-Car E2","Message-ID":"<20170911073936.GA19090@verge.net.au>","References":"<1504255066-5103-1-git-send-email-geert+renesas@glider.be>\n\t<20170901084243.GB14918@verge.net.au>","MIME-Version":"1.0","Content-Disposition":"inline","In-Reply-To":"<20170901084243.GB14918@verge.net.au>","Organisation":"Horms Solutions BV","User-Agent":"Mutt/1.5.23 (2014-03-12)","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170911_004016_631092_B1BD70AC ","X-CRM114-Status":"GOOD (  20.03  )","X-Spam-Score":"-4.3 (----)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details:   (-4.3 points)\n\tpts rule name              description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/,\n\tmedium trust [202.4.237.240 listed in list.dnswl.org]\n\t-0.0 SPF_PASS               SPF: sender matches SPF record\n\t-1.9 BAYES_00               BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t-0.1 DKIM_VALID Message has at least one valid DKIM or DK signature\n\t0.1 DKIM_SIGNED            Message has a DKIM or DK signature,\n\tnot necessarily valid\n\t-0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n\tauthor's domain","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":"<http://lists.infradead.org/mailman/options/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=unsubscribe>","List-Archive":"<http://lists.infradead.org/pipermail/linux-arm-kernel/>","List-Post":"<mailto:linux-arm-kernel@lists.infradead.org>","List-Help":"<mailto:linux-arm-kernel-request@lists.infradead.org?subject=help>","List-Subscribe":"<http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=subscribe>","Cc":"Mark Rutland <mark.rutland@arm.com>, Marc Zyngier <marc.zyngier@arm.com>,\n\tCatalin Marinas <catalin.marinas@arm.com>,\n\tMagnus Damm <magnus.damm@gmail.com>, \n\tRussell King <linux@armlinux.org.uk>, linux-renesas-soc@vger.kernel.org, \n\tlinux-arm-kernel@lists.infradead.org","Content-Type":"text/plain; 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