[{"id":1761423,"web_url":"http://patchwork.ozlabs.org/comment/1761423/","msgid":"<20170901013301.GN21656@codeaurora.org>","list_archive_url":null,"date":"2017-09-01T01:33:01","subject":"Re: [PATCH 0/2] Add support for Hi6220 coresight","submitter":{"id":6071,"url":"http://patchwork.ozlabs.org/api/people/6071/","name":"Stephen Boyd","email":"sboyd@codeaurora.org"},"content":"On 09/01, Leo Yan wrote:\n> This patch series adds support for coresight on Hi6220; the first patch\n> is to fix coresight PLL so can avoid system hang after we enable\n> coresight, the second patch is to add DT binding according to coresight\n> topology.\n> \n> The patch has been tested on Hikey; By using OpenCSD snapshot mode, it\n> can successfully decode ETF and ETB trace data.\n> \n\nI can take the first one and second one goes through arm-soc?","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; 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charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<1504226835-2115-1-git-send-email-leo.yan@linaro.org>","User-Agent":"Mutt/1.5.21 (2010-09-15)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1782087,"web_url":"http://patchwork.ozlabs.org/comment/1782087/","msgid":"<20171007121802.GC23080@leoy-linaro>","list_archive_url":null,"date":"2017-10-07T12:18:02","subject":"Re: [PATCH 0/2] Add support for Hi6220 coresight","submitter":{"id":66057,"url":"http://patchwork.ozlabs.org/api/people/66057/","name":"Leo Yan","email":"leo.yan@linaro.org"},"content":"Hi Stephen, Wei,\n\nOn Thu, Aug 31, 2017 at 06:33:01PM -0700, Stephen Boyd wrote:\n> On 09/01, Leo Yan wrote:\n> > This patch series adds support for coresight on Hi6220; the first patch\n> > is to fix coresight PLL so can avoid system hang after we enable\n> > coresight, the second patch is to add DT binding according to coresight\n> > topology.\n> > \n> > The patch has been tested on Hikey; By using OpenCSD snapshot mode, it\n> > can successfully decode ETF and ETB trace data.\n> > \n> \n> I can take the first one and second one goes through arm-soc?\n\nCould you pick these two patches for Hi6220 coresight enabling for\nthis merge window? Or need me resend these two patches?\n\nThanks,\nLeo Yan\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=linaro.org header.i=@linaro.org\n\theader.b=\"Teh+j42B\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y8QX13ZNhz9t61\n\tfor ;\n\tSat, 7 Oct 2017 23:18:25 +1100 (AEDT)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1752758AbdJGMSN (ORCPT\n\t);\n\tSat, 7 Oct 2017 08:18:13 -0400","from mail-pf0-f176.google.com ([209.85.192.176]:56774 \"EHLO\n\tmail-pf0-f176.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751309AbdJGMSL (ORCPT\n\t); Sat, 7 Oct 2017 08:18:11 -0400","by mail-pf0-f176.google.com with SMTP id g65so10729231pfe.13\n\tfor ;\n\tSat, 07 Oct 2017 05:18:11 -0700 (PDT)","from leoy-linaro (li1068-205.members.linode.com. [106.184.3.205])\n\tby smtp.gmail.com with ESMTPSA id\n\tf131sm8814271pfc.27.2017.10.07.05.18.05\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tSat, 07 Oct 2017 05:18:09 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google;\n\th=date:from:to:cc:subject:message-id:references:mime-version\n\t:content-disposition:in-reply-to:user-agent;\n\tbh=V74NC6PbMdvKU02dAeR+x/oKKZgfQ1rwsIsKXbF16aM=;\n\tb=Teh+j42BWCM1f7xnTOJX1KTkfkufTcVtnTSF2cXoJblyHE0EobD+1PgWsX1vvCgDNk\n\tKx6qUhLPFIco5x9hnWVIAEaBhghCu0e/VLJIrJpLA9+HXc7jPYAESMhMNXOZG3lJSwMo\n\trwc7AjANook/5Li9PLpiQvdc+1TiVv8NSyfoo=","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-disposition:in-reply-to:user-agent;\n\tbh=V74NC6PbMdvKU02dAeR+x/oKKZgfQ1rwsIsKXbF16aM=;\n\tb=VeFZ5X0EMsg+OKSzB0cWayKER6gVPnxwn34OYzwK77ZBt19m/0XJtHbjKnDji5Sm+O\n\tLgX+zGL1VjO8btzDrRmljvK/z7FYRopQx9Onp9ezpKVGrz9P+0LP7tZjfjtB/Mk0JB/t\n\tToSUW/btpBQH+wRYF3dfmk+NHDqAGh32rqTDjL1Y4MOheeY+Mj0IVEKRzuo2Axb55oHX\n\tamRDOb0xYn02OEyVOG0j3ikkVHAl2QmkEs3t7VrZnCFZXsLu6MRGxFe4ikvyMx/Ab+Yt\n\tJ6vKLHjPKh165vBJfJ6OFFqRlOp2rbtAEoAz91/vzzu4QVH18E7trfNQqXu4y7z4tH10\n\tNRng==","X-Gm-Message-State":"AMCzsaUEABROb43QkYr0PlALK39k1ktN2OMKu1BmggEv5TERXfKC7/+c\n\tYdxtAPvuq4Q7XX+bcwvIbKkGOw==","X-Google-Smtp-Source":"AOwi7QD2oybtuUB+XekJFmYY7Wqe1wbobwmFUDXieH7XLY+qcjPLMbWZblR7ax8ZZRfPzvESfTD36Q==","X-Received":"by 10.84.160.204 with SMTP id v12mr4462442plg.382.1507378690676; \n\tSat, 07 Oct 2017 05:18:10 -0700 (PDT)","Date":"Sat, 7 Oct 2017 20:18:02 +0800","From":"Leo Yan ","To":"Stephen Boyd ","Cc":"Wei Xu , Rob Herring ,\n\tMark Rutland ,\n\tMichael Turquette ,\n\tLi Pengcheng ,\n\tZhangfei Gao ,\n\tlinux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org, linux-clk@vger.kernel.org","Subject":"Re: [PATCH 0/2] Add support for Hi6220 coresight","Message-ID":"<20171007121802.GC23080@leoy-linaro>","References":"<1504226835-2115-1-git-send-email-leo.yan@linaro.org>\n\t<20170901013301.GN21656@codeaurora.org>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20170901013301.GN21656@codeaurora.org>","User-Agent":"Mutt/1.5.24 (2015-08-30)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1786110,"web_url":"http://patchwork.ozlabs.org/comment/1786110/","msgid":"<59E07FDE.40307@hisilicon.com>","list_archive_url":null,"date":"2017-10-13T08:57:02","subject":"Re: [PATCH 0/2] Add support for Hi6220 coresight","submitter":{"id":64381,"url":"http://patchwork.ozlabs.org/api/people/64381/","name":"Wei Xu","email":"xuwei5@hisilicon.com"},"content":"Hi Leo,\n\nOn 2017/10/7 13:18, Leo Yan wrote:\n> Hi Stephen, Wei,\n> \n> On Thu, Aug 31, 2017 at 06:33:01PM -0700, Stephen Boyd wrote:\n>> On 09/01, Leo Yan wrote:\n>>> This patch series adds support for coresight on Hi6220; the first patch\n>>> is to fix coresight PLL so can avoid system hang after we enable\n>>> coresight, the second patch is to add DT binding according to coresight\n>>> topology.\n>>>\n>>> The patch has been tested on Hikey; By using OpenCSD snapshot mode, it\n>>> can successfully decode ETF and ETB trace data.\n>>>\n>>\n>> I can take the first one and second one goes through arm-soc?\n> \n> Could you pick these two patches for Hi6220 coresight enabling for\n> this merge window? Or need me resend these two patches?\n\nApplied patch 2 into hisilicon dt tree with slight fix.\nThanks!\n\nBR,\nWei\n\n> \n> Thanks,\n> Leo Yan\n> \n> .\n> \n\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3yD1sK00Vvz9t2S\n\tfor ;\n\tFri, 13 Oct 2017 20:00:52 +1100 (AEDT)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1754188AbdJMJAu (ORCPT\n\t);\n\tFri, 13 Oct 2017 05:00:50 -0400","from szxga05-in.huawei.com ([45.249.212.191]:8027 \"EHLO\n\tszxga05-in.huawei.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1753135AbdJMJAt (ORCPT\n\t); Fri, 13 Oct 2017 05:00:49 -0400","from 172.30.72.58 (EHLO DGGEMS414-HUB.china.huawei.com)\n\t([172.30.72.58])\n\tby dggrg05-dlp.huawei.com (MOS 4.4.6-GA FastPath queued)\n\twith ESMTP id DJB16064; Fri, 13 Oct 2017 16:57:19 +0800 (CST)","from [127.0.0.1] (10.202.227.247) by DGGEMS414-HUB.china.huawei.com\n\t(10.3.19.214) with Microsoft SMTP Server id 14.3.301.0;\n\tFri, 13 Oct 2017 16:57:09 +0800"],"Subject":"Re: [PATCH 0/2] Add support for Hi6220 coresight","To":"Leo Yan , Stephen Boyd ","References":"<1504226835-2115-1-git-send-email-leo.yan@linaro.org>\n\t<20170901013301.GN21656@codeaurora.org>\n\t<20171007121802.GC23080@leoy-linaro>","CC":"Rob Herring , Mark Rutland ,\n\tMichael Turquette ,\n\tLi Pengcheng ,\n\tZhangfei Gao ,\n\t,\n\t, ,\n\t","From":"Wei Xu ","Message-ID":"<59E07FDE.40307@hisilicon.com>","Date":"Fri, 13 Oct 2017 09:57:02 +0100","User-Agent":"Mozilla/5.0 (Windows NT 6.1; WOW64; rv:38.0) Gecko/20100101\n\tThunderbird/38.6.0","MIME-Version":"1.0","In-Reply-To":"<20171007121802.GC23080@leoy-linaro>","Content-Type":"text/plain; charset=\"windows-1252\"","Content-Transfer-Encoding":"7bit","X-Originating-IP":"[10.202.227.247]","X-CFilter-Loop":"Reflected","X-Mirapoint-Virus-RAPID-Raw":"score=unknown(0),\n\trefid=str=0001.0A020203.59E07FF0.0099, ss=1, re=0.000, recu=0.000,\n\treip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0,\n\tso=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32","X-Mirapoint-Loop-Id":"00ba6bf76398dc3516776bd96abb1936","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1797333,"web_url":"http://patchwork.ozlabs.org/comment/1797333/","msgid":"<150955133019.90597.6277114786385559431@resonance>","list_archive_url":null,"date":"2017-11-01T15:48:50","subject":"Re: [PATCH 0/2] Add support for Hi6220 coresight","submitter":{"id":66738,"url":"http://patchwork.ozlabs.org/api/people/66738/","name":"Michael Turquette","email":"mturquette@baylibre.com"},"content":"Quoting Wei Xu (2017-10-13 10:57:02)\n> Hi Leo,\n> \n> On 2017/10/7 13:18, Leo Yan wrote:\n> > Hi Stephen, Wei,\n> > \n> > On Thu, Aug 31, 2017 at 06:33:01PM -0700, Stephen Boyd wrote:\n> >> On 09/01, Leo Yan wrote:\n> >>> This patch series adds support for coresight on Hi6220; the first patch\n> >>> is to fix coresight PLL so can avoid system hang after we enable\n> >>> coresight, the second patch is to add DT binding according to coresight\n> >>> topology.\n> >>>\n> >>> The patch has been tested on Hikey; By using OpenCSD snapshot mode, it\n> >>> can successfully decode ETF and ETB trace data.\n> >>>\n> >>\n> >> I can take the first one and second one goes through arm-soc?\n> > \n> > Could you pick these two patches for Hi6220 coresight enabling for\n> > this merge window? Or need me resend these two patches?\n> \n> Applied patch 2 into hisilicon dt tree with slight fix.\n> Thanks!\n\nCool. Patch #1 applied to clk tree.\n\nRegards,\nMike\n\n> \n> BR,\n> Wei\n> \n> > \n> > Thanks,\n> > Leo Yan\n> > \n> > .\n> > \n> \n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=baylibre-com.20150623.gappssmtp.com\n\theader.i=@baylibre-com.20150623.gappssmtp.com header.b=\"nwmXASlf\"; \n\tdkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3yRt1g69rdz9sQl\n\tfor ;\n\tThu, 2 Nov 2017 02:49:11 +1100 (AEDT)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1754686AbdKAPs6 (ORCPT\n\t);\n\tWed, 1 Nov 2017 11:48:58 -0400","from mail-wr0-f178.google.com ([209.85.128.178]:47182 \"EHLO\n\tmail-wr0-f178.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1754716AbdKAPsz (ORCPT\n\t); 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the first patch\n> > >>> is to fix coresight PLL so can avoid system hang after we enable\n> > >>> coresight, the second patch is to add DT binding according to coresight\n> > >>> topology.\n> > >>>\n> > >>> The patch has been tested on Hikey; By using OpenCSD snapshot mode, it\n> > >>> can successfully decode ETF and ETB trace data.\n> > >>>\n> > >>\n> > >> I can take the first one and second one goes through arm-soc?\n> > > \n> > > Could you pick these two patches for Hi6220 coresight enabling for\n> > > this merge window? Or need me resend these two patches?\n> > \n> > Applied patch 2 into hisilicon dt tree with slight fix.\n> > Thanks!\n> \n> Cool. Patch #1 applied to clk tree.\n\nThanks, Mike and Wei.\n\n> Regards,\n> Mike\n> \n> > \n> > BR,\n> > Wei\n> > \n> > > \n> > > Thanks,\n> > > Leo Yan\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=linaro.org header.i=@linaro.org\n\theader.b=\"S+HdpeF3\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3ySM8V0pvBz9sRW\n\tfor ;\n\tThu, 2 Nov 2017 21:41:46 +1100 (AEDT)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1752237AbdKBKlc (ORCPT\n\t);\n\tThu, 2 Nov 2017 06:41:32 -0400","from mail-wm0-f46.google.com ([74.125.82.46]:52514 \"EHLO\n\tmail-wm0-f46.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1752970AbdKBKlb (ORCPT\n\t); Thu, 2 Nov 2017 06:41:31 -0400","by mail-wm0-f46.google.com with SMTP id t139so10349919wmt.1\n\tfor ;\n\tThu, 02 Nov 2017 03:41:30 -0700 (PDT)","from leoy-linaro (li1530-42.members.linode.com. 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