[{"id":1760560,"web_url":"http://patchwork.ozlabs.org/comment/1760560/","msgid":"<150413405890.81.12489808558602609525@b5667b65043c>","list_archive_url":null,"date":"2017-08-30T23:01:01","subject":"Re: [Qemu-devel] [PATCH v2 0/7] QOMify MIPS cpu","submitter":{"id":69632,"url":"http://patchwork.ozlabs.org/api/people/69632/","name":null,"email":"no-reply@patchew.org"},"content":"Hi,\n\nThis series seems to have some coding style problems. See output below for\nmore information:\n\nMessage-id: 20170830225225.27925-1-f4bug@amsat.org\nSubject: [Qemu-devel] [PATCH v2 0/7] QOMify MIPS cpu\nType: series\n\n=== TEST SCRIPT BEGIN ===\n#!/bin/bash\n\nBASE=base\nn=1\ntotal=$(git log --oneline $BASE.. | wc -l)\nfailed=0\n\ngit config --local diff.renamelimit 0\ngit config --local diff.renames True\n\ncommits=\"$(git log --format=%H --reverse $BASE..)\"\nfor c in $commits; do\n echo \"Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)...\"\n if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then\n failed=1\n echo\n fi\n n=$((n+1))\ndone\n\nexit $failed\n=== TEST SCRIPT END ===\n\nUpdating 3c8cf5a9c21ff8782164d1def7f44bd888713384\nFrom https://github.com/patchew-project/qemu\n * [new tag] patchew/20170830225225.27925-1-f4bug@amsat.org -> patchew/20170830225225.27925-1-f4bug@amsat.org\n t [tag update] patchew/cover.1504111803.git.jcody@redhat.com -> patchew/cover.1504111803.git.jcody@redhat.com\nSwitched to a new branch 'test'\n2eba874055 mips: update mips_cpu_list() to use object_class_get_list()\nc9170c27df mips: replace cpu_mips_init() with cpu_generic_init()\nbd1c0e43a2 mips: MIPSCPU model subclasses\ne77d1d74ea mips: call cpu_mips_realize_env() from mips_cpu_realizefn()\n4f1073d8be mips: split cpu_mips_realize_env() out of cpu_mips_init()\n22f783eb50 mips: introduce internal.h and cleanup cpu.h\nf846c7bfc6 mips: move hw/mips/cputimer.c to target/mips/\n\n=== OUTPUT BEGIN ===\nChecking PATCH 1/7: mips: move hw/mips/cputimer.c to target/mips/...\nChecking PATCH 2/7: mips: introduce internal.h and cleanup cpu.h...\nERROR: space prohibited after that '&' (ctx:WxW)\n#727: FILE: target/mips/internal.h:230:\n+ if ((env->CP0_VPControl >> CP0VPCtl_DIS) & 1) {\n ^\n\nERROR: space prohibited after that '&' (ctx:WxW)\n#735: FILE: target/mips/internal.h:238:\n+ ((other_cpu->env.CP0_VPControl >> CP0VPCtl_DIS) & 1)) {\n ^\n\nERROR: space prohibited after that '&' (ctx:WxW)\n#755: FILE: target/mips/internal.h:258:\n+ env->hflags |= (env->CP0_Status >> CP0St_KSU) & MIPS_HFLAG_KSU;\n ^\n\ntotal: 3 errors, 0 warnings, 842 lines checked\n\nYour patch has style problems, please review. If any of these errors\nare false positives report them to the maintainer, see\nCHECKPATCH in MAINTAINERS.\n\nChecking PATCH 3/7: mips: split cpu_mips_realize_env() out of cpu_mips_init()...\nChecking PATCH 4/7: mips: call cpu_mips_realize_env() from mips_cpu_realizefn()...\nChecking PATCH 5/7: mips: MIPSCPU model subclasses...\nChecking PATCH 6/7: mips: replace cpu_mips_init() with cpu_generic_init()...\nChecking PATCH 7/7: mips: update mips_cpu_list() to use object_class_get_list()...\n=== OUTPUT END ===\n\nTest command exited with code: 1\n\n\n---\nEmail generated automatically by Patchew [http://patchew.org/].\nPlease send your feedback to patchew-devel@freelists.org","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xjLc91H0Gz9s83\n\tfor ;\n\tThu, 31 Aug 2017 09:01:55 +1000 (AEST)","from localhost ([::1]:53147 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1dnBzb-0001am-Rb\n\tfor incoming@patchwork.ozlabs.org; Wed, 30 Aug 2017 19:01:51 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:37490)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1dnBz1-0001YD-UO\n\tfor qemu-devel@nongnu.org; Wed, 30 Aug 2017 19:01:17 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from ) id 1dnByy-00050E-1s\n\tfor qemu-devel@nongnu.org; Wed, 30 Aug 2017 19:01:16 -0400","from sender-of-o52.zoho.com ([135.84.80.217]:21499)\n\tby eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from )\n\tid 1dnByx-0004yq-Q7\n\tfor qemu-devel@nongnu.org; Wed, 30 Aug 2017 19:01:11 -0400","from [172.17.0.2] (23.253.156.214 [23.253.156.214]) by\n\tmx.zohomail.com with SMTPS id 1504134061133981.4887843345348;\n\tWed, 30 Aug 2017 16:01:01 -0700 (PDT)"],"Resent-Date":"Wed, 30 Aug 2017 19:01:16 -0400","Resent-Message-Id":"","In-Reply-To":"<20170830225225.27925-1-f4bug@amsat.org>","Message-ID":"<150413405890.81.12489808558602609525@b5667b65043c>","MIME-Version":"1.0","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Resent-From":"","From":"no-reply@patchew.org","To":"f4bug@amsat.org","Date":"Wed, 30 Aug 2017 16:01:01 -0700 (PDT)","X-ZohoMailClient":"External","X-detected-operating-system":"by eggs.gnu.org: GNU/Linux 3.x [fuzzy]","X-Received-From":"135.84.80.217","Subject":"Re: [Qemu-devel] [PATCH v2 0/7] QOMify MIPS cpu","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Reply-To":"qemu-devel@nongnu.org","Cc":"peter.maydell@linaro.org, thuth@redhat.com, famz@redhat.com,\n\tehabkost@redhat.com, f4bug@amsat.org, qemu-devel@nongnu.org,\n\tmarcel@redhat.com, imammedo@redhat.com","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"}},{"id":1760623,"web_url":"http://patchwork.ozlabs.org/comment/1760623/","msgid":"","list_archive_url":null,"date":"2017-08-31T03:57:14","subject":"Re: [Qemu-devel] [PATCH v2 0/7] QOMify MIPS cpu","submitter":{"id":70924,"url":"http://patchwork.ozlabs.org/api/people/70924/","name":"Philippe Mathieu-Daudé","email":"f4bug@amsat.org"},"content":"Cc'ing Xiaoqiang Zhao, I forgot to include him.\n\nOn 08/30/2017 07:52 PM, Philippe Mathieu-Daudé wrote:\n> Hi,\n> \n> This series is based on Igor's \"complete cpu QOMification\" [1] but only modify\n> the MIPS part. Igor posted an updated series [2], both series should apply\n> separately.\n> \n> Igor suggested on IRC this series could enter via the Machine core tree, so\n> I added Eduardo and Marcel.\n> \n> Regards,\n> \n> Phil.\n> \n> [1]: http://lists.nongnu.org/archive/html/qemu-devel/2017-07/msg04414.html\n> [2]: http://lists.nongnu.org/archive/html/qemu-devel/2017-08/msg03364.html\n> \n> v2:\n> - added Igor and James Tested-by\n> - squashed \"!fixup mips: now than MIPSCPU is QOMified, mark it abstract\"\n> \n> PS: code movement somehow triggers a \"binary vs unary operators\" confusion\n> in checkpatch: \"ERROR: space prohibited after that '&' (ctx:WxW)\"\n> \n> Igor Mammedov (2):\n> mips: MIPSCPU model subclasses\n> mips: replace cpu_mips_init() with cpu_generic_init()\n> \n> Philippe Mathieu-Daudé (5):\n> mips: move hw/mips/cputimer.c to target/mips/\n> mips: introduce internal.h and cleanup cpu.h\n> mips: split cpu_mips_realize_env() out of cpu_mips_init()\n> mips: call cpu_mips_realize_env() from mips_cpu_realizefn()\n> mips: update mips_cpu_list() to use object_class_get_list()\n> \n> target/mips/cpu-qom.h | 1 +\n> target/mips/cpu.h | 357 +---------------------\n> target/mips/internal.h | 422 ++++++++++++++++++++++++++\n> hw/mips/cps.c | 2 +-\n> hw/mips/mips_fulong2e.c | 2 +-\n> hw/mips/mips_jazz.c | 2 +-\n> hw/mips/mips_malta.c | 2 +-\n> hw/mips/mips_mipssim.c | 2 +-\n> hw/mips/mips_r4k.c | 2 +-\n> hw/mips/cputimer.c => target/mips/cp0_timer.c | 2 +-\n> target/mips/cpu.c | 57 +++-\n> target/mips/gdbstub.c | 1 +\n> target/mips/helper.c | 47 +++\n> target/mips/kvm.c | 1 +\n> target/mips/machine.c | 1 +\n> target/mips/msa_helper.c | 1 +\n> target/mips/op_helper.c | 1 +\n> target/mips/translate.c | 23 +-\n> target/mips/translate_init.c | 68 +----\n> hw/mips/Makefile.objs | 2 +-\n> target/mips/Makefile.objs | 2 +-\n> 21 files changed, 549 insertions(+), 449 deletions(-)\n> create mode 100644 target/mips/internal.h\n> rename hw/mips/cputimer.c => target/mips/cp0_timer.c (99%)\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; 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Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.3.0","MIME-Version":"1.0","In-Reply-To":"<20170830225225.27925-1-f4bug@amsat.org>","Content-Type":"text/plain; charset=utf-8; format=flowed","Content-Language":"en-US","Content-Transfer-Encoding":"8bit","X-detected-operating-system":"by eggs.gnu.org: Genre and OS details not\n\trecognized.","X-Received-From":"2607:f8b0:400d:c09::243","Subject":"Re: [Qemu-devel] [PATCH v2 0/7] QOMify MIPS cpu","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Peter Maydell , Thomas Huth ,\n\tqemu-devel@nongnu.org","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"}},{"id":1761758,"web_url":"http://patchwork.ozlabs.org/comment/1761758/","msgid":"<20170901151850.GD17184@localhost.localdomain>","list_archive_url":null,"date":"2017-09-01T15:18:50","subject":"Re: [Qemu-devel] [PATCH v2 0/7] QOMify MIPS cpu","submitter":{"id":195,"url":"http://patchwork.ozlabs.org/api/people/195/","name":"Eduardo Habkost","email":"ehabkost@redhat.com"},"content":"On Wed, Aug 30, 2017 at 07:52:18PM -0300, Philippe Mathieu-Daudé wrote:\n> Hi,\n> \n> This series is based on Igor's \"complete cpu QOMification\" [1] but only modify\n> the MIPS part. Igor posted an updated series [2], both series should apply\n> separately.\n> \n> Igor suggested on IRC this series could enter via the Machine core tree, so\n> I added Eduardo and Marcel.\n\nI would do that only if the MIPS maintainers (CCed) aren't\nwilling to merge the series themselves.\n\n\n> \n> Regards,\n> \n> Phil.\n> \n> [1]: http://lists.nongnu.org/archive/html/qemu-devel/2017-07/msg04414.html\n> [2]: http://lists.nongnu.org/archive/html/qemu-devel/2017-08/msg03364.html\n> \n> v2: \n> - added Igor and James Tested-by\n> - squashed \"!fixup mips: now than MIPSCPU is QOMified, mark it abstract\"\n> \n> PS: code movement somehow triggers a \"binary vs unary operators\" confusion\n> in checkpatch: \"ERROR: space prohibited after that '&' (ctx:WxW)\"\n> \n> Igor Mammedov (2):\n> mips: MIPSCPU model subclasses\n> mips: replace cpu_mips_init() with cpu_generic_init()\n> \n> Philippe Mathieu-Daudé (5):\n> mips: move hw/mips/cputimer.c to target/mips/\n> mips: introduce internal.h and cleanup cpu.h\n> mips: split cpu_mips_realize_env() out of cpu_mips_init()\n> mips: call cpu_mips_realize_env() from mips_cpu_realizefn()\n> mips: update mips_cpu_list() to use object_class_get_list()\n> \n> target/mips/cpu-qom.h | 1 +\n> target/mips/cpu.h | 357 +---------------------\n> target/mips/internal.h | 422 ++++++++++++++++++++++++++\n> hw/mips/cps.c | 2 +-\n> hw/mips/mips_fulong2e.c | 2 +-\n> hw/mips/mips_jazz.c | 2 +-\n> hw/mips/mips_malta.c | 2 +-\n> hw/mips/mips_mipssim.c | 2 +-\n> hw/mips/mips_r4k.c | 2 +-\n> hw/mips/cputimer.c => target/mips/cp0_timer.c | 2 +-\n> target/mips/cpu.c | 57 +++-\n> target/mips/gdbstub.c | 1 +\n> target/mips/helper.c | 47 +++\n> target/mips/kvm.c | 1 +\n> target/mips/machine.c | 1 +\n> target/mips/msa_helper.c | 1 +\n> target/mips/op_helper.c | 1 +\n> target/mips/translate.c | 23 +-\n> target/mips/translate_init.c | 68 +----\n> hw/mips/Makefile.objs | 2 +-\n> target/mips/Makefile.objs | 2 +-\n> 21 files changed, 549 insertions(+), 449 deletions(-)\n> create mode 100644 target/mips/internal.h\n> rename hw/mips/cputimer.c => target/mips/cp0_timer.c (99%)\n> \n> -- \n> 2.14.1\n> \n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; 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charset=iso-8859-1","Content-Disposition":"inline","In-Reply-To":"<20170830225225.27925-1-f4bug@amsat.org>","X-Fnord":"you can see the fnord","User-Agent":"Mutt/1.8.3 (2017-05-23)","X-Scanned-By":"MIMEDefang 2.79 on 10.5.11.16","X-Greylist":"Sender IP whitelisted, not delayed by milter-greylist-4.5.16\n\t(mx1.redhat.com [10.5.110.29]);\n\tFri, 01 Sep 2017 15:18:55 +0000 (UTC)","Content-Transfer-Encoding":"quoted-printable","X-detected-operating-system":"by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic]\n\t[fuzzy]","X-Received-From":"209.132.183.28","Subject":"Re: [Qemu-devel] [PATCH v2 0/7] QOMify MIPS cpu","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Peter Maydell , Thomas Huth ,\n\tqemu-devel@nongnu.org, Yongbok Kim ,\n\tMarcel Apfelbaum ,\n\tIgor Mammedov , \n\tAurelien Jarno ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"}},{"id":1761785,"web_url":"http://patchwork.ozlabs.org/comment/1761785/","msgid":"","list_archive_url":null,"date":"2017-09-01T15:44:42","subject":"Re: [Qemu-devel] [PATCH v2 0/7] QOMify MIPS cpu","submitter":{"id":70924,"url":"http://patchwork.ozlabs.org/api/people/70924/","name":"Philippe Mathieu-Daudé","email":"f4bug@amsat.org"},"content":"On 09/01/2017 12:18 PM, Eduardo Habkost wrote:\n> On Wed, Aug 30, 2017 at 07:52:18PM -0300, Philippe Mathieu-Daudé wrote:\n>> Hi,\n>>\n>> This series is based on Igor's \"complete cpu QOMification\" [1] but only modify\n>> the MIPS part. Igor posted an updated series [2], both series should apply\n>> separately.\n>>\n>> Igor suggested on IRC this series could enter via the Machine core tree, so\n>> I added Eduardo and Marcel.\n> \n> I would do that only if the MIPS maintainers (CCed) aren't\n> willing to merge the series themselves.\n\nAurelien told me he looked at the series but isn't comfortable with \nreviewing QOM code. Anyway since all patches are reviewed/tested and \nthis is MIPS only series it also makes sens to me this enters via their \ntree.\n\nEduardo can you Ack this series from the QOM part to help Aurelien?\n\nThanks,\n\nPhil.\n\n> \n>>\n>> Regards,\n>>\n>> Phil.\n>>\n>> [1]: http://lists.nongnu.org/archive/html/qemu-devel/2017-07/msg04414.html\n>> [2]: http://lists.nongnu.org/archive/html/qemu-devel/2017-08/msg03364.html\n>>\n>> v2:\n>> - added Igor and James Tested-by\n>> - squashed \"!fixup mips: now than MIPSCPU is QOMified, mark it abstract\"\n>>\n>> PS: code movement somehow triggers a \"binary vs unary operators\" confusion\n>> in checkpatch: \"ERROR: space prohibited after that '&' (ctx:WxW)\"\n>>\n>> Igor Mammedov (2):\n>> mips: MIPSCPU model subclasses\n>> mips: replace cpu_mips_init() with cpu_generic_init()\n>>\n>> Philippe Mathieu-Daudé (5):\n>> mips: move hw/mips/cputimer.c to target/mips/\n>> mips: introduce internal.h and cleanup cpu.h\n>> mips: split cpu_mips_realize_env() out of cpu_mips_init()\n>> mips: call cpu_mips_realize_env() from mips_cpu_realizefn()\n>> mips: update mips_cpu_list() to use object_class_get_list()\n>>\n>> target/mips/cpu-qom.h | 1 +\n>> target/mips/cpu.h | 357 +---------------------\n>> target/mips/internal.h | 422 ++++++++++++++++++++++++++\n>> hw/mips/cps.c | 2 +-\n>> hw/mips/mips_fulong2e.c | 2 +-\n>> hw/mips/mips_jazz.c | 2 +-\n>> hw/mips/mips_malta.c | 2 +-\n>> hw/mips/mips_mipssim.c | 2 +-\n>> hw/mips/mips_r4k.c | 2 +-\n>> hw/mips/cputimer.c => target/mips/cp0_timer.c | 2 +-\n>> target/mips/cpu.c | 57 +++-\n>> target/mips/gdbstub.c | 1 +\n>> target/mips/helper.c | 47 +++\n>> target/mips/kvm.c | 1 +\n>> target/mips/machine.c | 1 +\n>> target/mips/msa_helper.c | 1 +\n>> target/mips/op_helper.c | 1 +\n>> target/mips/translate.c | 23 +-\n>> target/mips/translate_init.c | 68 +----\n>> hw/mips/Makefile.objs | 2 +-\n>> target/mips/Makefile.objs | 2 +-\n>> 21 files changed, 549 insertions(+), 449 deletions(-)\n>> create mode 100644 target/mips/internal.h\n>> rename hw/mips/cputimer.c => target/mips/cp0_timer.c (99%)\n>>\n>> -- \n>> 2.14.1\n>>\n>>\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=208.118.235.17; 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Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.3.0","MIME-Version":"1.0","In-Reply-To":"<20170901151850.GD17184@localhost.localdomain>","Content-Type":"text/plain; charset=utf-8; format=flowed","Content-Language":"en-US","Content-Transfer-Encoding":"8bit","X-detected-operating-system":"by eggs.gnu.org: Genre and OS details not\n\trecognized.","X-Received-From":"2607:f8b0:400d:c0d::243","Subject":"Re: [Qemu-devel] [PATCH v2 0/7] QOMify MIPS cpu","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Peter Maydell , Thomas Huth ,\n\tqemu-devel@nongnu.org, Yongbok Kim ,\n\tMarcel Apfelbaum ,\n\tIgor Mammedov , \n\tAurelien Jarno ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"}},{"id":1761786,"web_url":"http://patchwork.ozlabs.org/comment/1761786/","msgid":"<20170901154850.GP7570@localhost.localdomain>","list_archive_url":null,"date":"2017-09-01T15:48:50","subject":"Re: [Qemu-devel] [PATCH v2 0/7] QOMify MIPS cpu","submitter":{"id":195,"url":"http://patchwork.ozlabs.org/api/people/195/","name":"Eduardo Habkost","email":"ehabkost@redhat.com"},"content":"On Fri, Sep 01, 2017 at 12:44:42PM -0300, Philippe Mathieu-Daudé wrote:\n> On 09/01/2017 12:18 PM, Eduardo Habkost wrote:\n> > On Wed, Aug 30, 2017 at 07:52:18PM -0300, Philippe Mathieu-Daudé wrote:\n> > > Hi,\n> > > \n> > > This series is based on Igor's \"complete cpu QOMification\" [1] but only modify\n> > > the MIPS part. Igor posted an updated series [2], both series should apply\n> > > separately.\n> > > \n> > > Igor suggested on IRC this series could enter via the Machine core tree, so\n> > > I added Eduardo and Marcel.\n> > \n> > I would do that only if the MIPS maintainers (CCed) aren't\n> > willing to merge the series themselves.\n> \n> Aurelien told me he looked at the series but isn't comfortable with\n> reviewing QOM code. Anyway since all patches are reviewed/tested and this is\n> MIPS only series it also makes sens to me this enters via their tree.\n> \n> Eduardo can you Ack this series from the QOM part to help Aurelien?\n\nAbsolutely:\n\nAcked-by: Eduardo Habkost \n\nI will try to review the QOM code more closely and send\nReviewed-by lines too.","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=208.118.235.17; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","ext-mx01.extmail.prod.ext.phx2.redhat.com;\n\tdmarc=none (p=none dis=none) header.from=redhat.com","ext-mx01.extmail.prod.ext.phx2.redhat.com;\n\tspf=fail smtp.mailfrom=ehabkost@redhat.com"],"Received":["from lists.gnu.org (lists.gnu.org [208.118.235.17])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xkPP329rPz9sRV\n\tfor ;\n\tSat, 2 Sep 2017 02:11:03 +1000 (AEST)","from localhost ([::1]:46875 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1dnoX7-0005dC-5b\n\tfor incoming@patchwork.ozlabs.org; Fri, 01 Sep 2017 12:11:01 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:55137)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1dnoBo-0001yn-U0\n\tfor qemu-devel@nongnu.org; Fri, 01 Sep 2017 11:49:03 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from ) id 1dnoBk-0006PP-29\n\tfor qemu-devel@nongnu.org; Fri, 01 Sep 2017 11:49:00 -0400","from mx1.redhat.com ([209.132.183.28]:49564)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from ) id 1dnoBj-0006PH-Rw\n\tfor qemu-devel@nongnu.org; Fri, 01 Sep 2017 11:48:55 -0400","from smtp.corp.redhat.com\n\t(int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby mx1.redhat.com (Postfix) with ESMTPS id BFF317F3F0;\n\tFri, 1 Sep 2017 15:48:54 +0000 (UTC)","from localhost (ovpn-116-66.gru2.redhat.com [10.97.116.66])\n\tby smtp.corp.redhat.com (Postfix) with ESMTP id 054C76A57B;\n\tFri, 1 Sep 2017 15:48:51 +0000 (UTC)"],"DMARC-Filter":"OpenDMARC Filter v1.3.2 mx1.redhat.com BFF317F3F0","Date":"Fri, 1 Sep 2017 12:48:50 -0300","From":"Eduardo Habkost ","To":"Philippe =?iso-8859-1?q?Mathieu-Daud=E9?= ","Message-ID":"<20170901154850.GP7570@localhost.localdomain>","References":"<20170830225225.27925-1-f4bug@amsat.org>\n\t<20170901151850.GD17184@localhost.localdomain>\n\t","MIME-Version":"1.0","Content-Type":"text/plain; charset=iso-8859-1","Content-Disposition":"inline","In-Reply-To":"","X-Fnord":"you can see the fnord","User-Agent":"Mutt/1.8.3 (2017-05-23)","X-Scanned-By":"MIMEDefang 2.79 on 10.5.11.16","X-Greylist":"Sender IP whitelisted, not delayed by milter-greylist-4.5.16\n\t(mx1.redhat.com [10.5.110.25]);\n\tFri, 01 Sep 2017 15:48:54 +0000 (UTC)","Content-Transfer-Encoding":"quoted-printable","X-detected-operating-system":"by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic]\n\t[fuzzy]","X-Received-From":"209.132.183.28","Subject":"Re: [Qemu-devel] [PATCH v2 0/7] QOMify MIPS cpu","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Peter Maydell , Thomas Huth ,\n\tqemu-devel@nongnu.org, Yongbok Kim ,\n\tMarcel Apfelbaum ,\n\tIgor Mammedov , \n\tAurelien Jarno ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"}},{"id":1761794,"web_url":"http://patchwork.ozlabs.org/comment/1761794/","msgid":"","list_archive_url":null,"date":"2017-09-01T16:09:05","subject":"Re: [Qemu-devel] [PATCH v2 0/7] QOMify MIPS cpu","submitter":{"id":70924,"url":"http://patchwork.ozlabs.org/api/people/70924/","name":"Philippe Mathieu-Daudé","email":"f4bug@amsat.org"},"content":"On 09/01/2017 12:48 PM, Eduardo Habkost wrote:\n> On Fri, Sep 01, 2017 at 12:44:42PM -0300, Philippe Mathieu-Daudé wrote:\n>> On 09/01/2017 12:18 PM, Eduardo Habkost wrote:\n>>> On Wed, Aug 30, 2017 at 07:52:18PM -0300, Philippe Mathieu-Daudé wrote:\n>>>> Hi,\n>>>>\n>>>> This series is based on Igor's \"complete cpu QOMification\" [1] but only modify\n>>>> the MIPS part. Igor posted an updated series [2], both series should apply\n>>>> separately.\n>>>>\n>>>> Igor suggested on IRC this series could enter via the Machine core tree, so\n>>>> I added Eduardo and Marcel.\n>>>\n>>> I would do that only if the MIPS maintainers (CCed) aren't\n>>> willing to merge the series themselves.\n>>\n>> Aurelien told me he looked at the series but isn't comfortable with\n>> reviewing QOM code. Anyway since all patches are reviewed/tested and this is\n>> MIPS only series it also makes sens to me this enters via their tree.\n>>\n>> Eduardo can you Ack this series from the QOM part to help Aurelien?\n> \n> Absolutely:\n> \n> Acked-by: Eduardo Habkost \n> \n> I will try to review the QOM code more closely and send\n> Reviewed-by lines too.\n\nThank you!","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=208.118.235.17; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"QuoLMh06\"; dkim-atps=neutral"],"Received":["from lists.gnu.org (lists.gnu.org [208.118.235.17])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xkPbb4DGCz9t1t\n\tfor ;\n\tSat, 2 Sep 2017 02:20:11 +1000 (AEST)","from localhost ([::1]:47356 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1dnofx-0006A9-GS\n\tfor incoming@patchwork.ozlabs.org; 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Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.3.0","MIME-Version":"1.0","In-Reply-To":"<20170901154850.GP7570@localhost.localdomain>","Content-Type":"text/plain; charset=utf-8; format=flowed","Content-Language":"en-US","Content-Transfer-Encoding":"8bit","X-detected-operating-system":"by eggs.gnu.org: Genre and OS details not\n\trecognized.","X-Received-From":"2607:f8b0:400d:c09::236","Subject":"Re: [Qemu-devel] [PATCH v2 0/7] QOMify MIPS cpu","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Peter Maydell , Thomas Huth ,\n\tqemu-devel@nongnu.org, Yongbok Kim ,\n\tMarcel Apfelbaum ,\n\tIgor Mammedov , \n\tAurelien Jarno ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"}},{"id":1762639,"web_url":"http://patchwork.ozlabs.org/comment/1762639/","msgid":"<5d7f7453-1303-7879-5437-73a79f2f0033@imgtec.com>","list_archive_url":null,"date":"2017-09-04T13:32:41","subject":"Re: [Qemu-devel] [PATCH v2 0/7] QOMify MIPS cpu","submitter":{"id":27570,"url":"http://patchwork.ozlabs.org/api/people/27570/","name":"Yongbok Kim","email":"yongbok.kim@imgtec.com"},"content":"On 01/09/2017 17:09, Philippe Mathieu-Daudé wrote:\n> On 09/01/2017 12:48 PM, Eduardo Habkost wrote:\n>> On Fri, Sep 01, 2017 at 12:44:42PM -0300, Philippe Mathieu-Daudé wrote:\n>>> On 09/01/2017 12:18 PM, Eduardo Habkost wrote:\n>>>> On Wed, Aug 30, 2017 at 07:52:18PM -0300, Philippe Mathieu-Daudé wrote:\n>>>>> Hi,\n>>>>>\n>>>>> This series is based on Igor's \"complete cpu QOMification\" [1] but\n>>>>> only modify\n>>>>> the MIPS part. Igor posted an updated series [2], both series should\n>>>>> apply\n>>>>> separately.\n>>>>>\n>>>>> Igor suggested on IRC this series could enter via the Machine core\n>>>>> tree, so\n>>>>> I added Eduardo and Marcel.\n>>>>\n>>>> I would do that only if the MIPS maintainers (CCed) aren't\n>>>> willing to merge the series themselves.\n>>>\n>>> Aurelien told me he looked at the series but isn't comfortable with\n>>> reviewing QOM code. Anyway since all patches are reviewed/tested and\n>>> this is\n>>> MIPS only series it also makes sens to me this enters via their tree.\n>>>\n>>> Eduardo can you Ack this series from the QOM part to help Aurelien?\n>>\n>> Absolutely:\n>>\n>> Acked-by: Eduardo Habkost \n>>\n>> I will try to review the QOM code more closely and send\n>> Reviewed-by lines too.\n> \n> Thank you!\n> \n\nI can take the series too. Please carry on reviewing.\n\nRegards,\nYongbok","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xm9pK2Fxtz9sR9\n\tfor ;\n\tMon, 4 Sep 2017 23:35:37 +1000 (AEST)","from localhost ([::1]:41941 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1dorXL-0006Pf-Bc\n\tfor incoming@patchwork.ozlabs.org; Mon, 04 Sep 2017 09:35:35 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:52297)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1dorVl-0005o1-VJ\n\tfor qemu-devel@nongnu.org; Mon, 04 Sep 2017 09:34:41 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from ) id 1dorUm-00052N-UD\n\tfor qemu-devel@nongnu.org; Mon, 04 Sep 2017 09:33:57 -0400","from mailapp01.imgtec.com ([195.59.15.196]:26005)\n\tby eggs.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1dorUm-0004pr-Ob\n\tfor qemu-devel@nongnu.org; Mon, 04 Sep 2017 09:32:56 -0400","from hhmail02.hh.imgtec.org (unknown [10.100.10.20])\n\tby Forcepoint Email with ESMTPS id 465B416792A9E;\n\tMon, 4 Sep 2017 14:32:38 +0100 (IST)","from [192.168.169.52] (192.168.169.52) by hhmail02.hh.imgtec.org\n\t(10.100.10.21) with Microsoft SMTP Server (TLS) id 14.3.294.0;\n\tMon, 4 Sep 2017 14:32:41 +0100"],"To":"=?utf-8?q?Philippe_Mathieu-Daud=C3=A9?=\n\t, Eduardo Habkost \t","References":"<20170830225225.27925-1-f4bug@amsat.org>\n\t<20170901151850.GD17184@localhost.localdomain>\n\t\n\t<20170901154850.GP7570@localhost.localdomain>\n\t","From":"Yongbok Kim ","Message-ID":"<5d7f7453-1303-7879-5437-73a79f2f0033@imgtec.com>","Date":"Mon, 4 Sep 2017 14:32:41 +0100","User-Agent":"Mozilla/5.0 (Windows NT 6.1; WOW64; rv:45.0) Gecko/20100101\n\tThunderbird/45.8.0","MIME-Version":"1.0","In-Reply-To":"","Content-Type":"text/plain; charset=\"utf-8\"","X-Originating-IP":"[192.168.169.52]","Content-Transfer-Encoding":"quoted-printable","X-detected-operating-system":"by eggs.gnu.org: GNU/Linux 3.x [fuzzy]","X-Received-From":"195.59.15.196","Subject":"Re: [Qemu-devel] [PATCH v2 0/7] QOMify MIPS cpu","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Peter Maydell , Thomas Huth ,\n\tqemu-devel@nongnu.org, Marcel Apfelbaum ,\n\tIgor Mammedov ,\n\tAurelien Jarno ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"}},{"id":1765980,"web_url":"http://patchwork.ozlabs.org/comment/1765980/","msgid":"","list_archive_url":null,"date":"2017-09-10T17:43:22","subject":"Re: [Qemu-devel] [PATCH v2 0/7] QOMify MIPS cpu","submitter":{"id":70924,"url":"http://patchwork.ozlabs.org/api/people/70924/","name":"Philippe Mathieu-Daudé","email":"f4bug@amsat.org"},"content":"Hi Eduardo,\n\n>>>>> On Wed, Aug 30, 2017 at 07:52:18PM -0300, Philippe Mathieu-Daudé wrote:\n>>>>>> Hi,\n>>>>>>\n>>>>>> This series is based on Igor's \"complete cpu QOMification\" [1] but\n>>>>>> only modify\n>>>>>> the MIPS part. Igor posted an updated series [2], both series should\n>>>>>> apply\n>>>>>> separately.\n>>>>>>\n>>>>>> Igor suggested on IRC this series could enter via the Machine core\n>>>>>> tree, so\n>>>>>> I added Eduardo and Marcel.\n>>>>>\n>>>>> I would do that only if the MIPS maintainers (CCed) aren't\n>>>>> willing to merge the series themselves.\n>>>>\n>>>> Aurelien told me he looked at the series but isn't comfortable with\n>>>> reviewing QOM code. Anyway since all patches are reviewed/tested and\n>>>> this is\n>>>> MIPS only series it also makes sens to me this enters via their tree.\n>>>>\n>>>> Eduardo can you Ack this series from the QOM part to help Aurelien?\n>>>\n>>> Absolutely:\n>>>\n>>> Acked-by: Eduardo Habkost \n>>>\n>>> I will try to review the QOM code more closely and send\n>>> Reviewed-by lines too.\n\nThis series with your Acked-by tag is available for you to review at:\n\n git://github.com/philmd/qemu.git tags/mips-qomify-20170910\n\nRegards,\n\nPhil.\n\n>>\n>> Thank you!\n>>\n> \n> I can take the series too. Please carry on reviewing.\n> \n> Regards,\n> Yongbok\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"upCLbZ/Z\"; dkim-atps=neutral"],"Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xqz1z6vYfz9rxm\n\tfor ;\n\tMon, 11 Sep 2017 03:43:51 +1000 (AEST)","from localhost ([::1]:53762 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1dr6Gs-0002pT-5H\n\tfor incoming@patchwork.ozlabs.org; Sun, 10 Sep 2017 13:43:50 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:33061)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from )\n\tid 1dr6GZ-0002pJ-CP\n\tfor qemu-devel@nongnu.org; Sun, 10 Sep 2017 13:43:32 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from )\n\tid 1dr6GW-00030q-9i\n\tfor qemu-devel@nongnu.org; Sun, 10 Sep 2017 13:43:31 -0400","from mail-qt0-x229.google.com ([2607:f8b0:400d:c0d::229]:34401)\n\tby eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16)\n\t(Exim 4.71) (envelope-from )\n\tid 1dr6GW-00030j-52\n\tfor qemu-devel@nongnu.org; Sun, 10 Sep 2017 13:43:28 -0400","by mail-qt0-x229.google.com with SMTP id m35so15360605qte.1\n\tfor ; Sun, 10 Sep 2017 10:43:28 -0700 (PDT)","from [192.168.1.10] ([181.93.89.178])\n\tby smtp.gmail.com with ESMTPSA id\n\tw134sm4831940qkw.38.2017.09.10.10.43.23\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tSun, 10 Sep 2017 10:43:26 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=sender:subject:to:cc:references:from:message-id:date:user-agent\n\t:mime-version:in-reply-to:content-language:content-transfer-encoding; \n\tbh=WZS0+VJmfot0ifIUhKhQkMwNHOnXBOPFmQsoM1mS8u4=;\n\tb=upCLbZ/ZkBHgMpr4d9gpnwnRf/030sjLey3GvYWjgWR0mI5vj74DhHnrsAP4qlccDN\n\tlMoJBcCa7TZs7m9qQike4wVmQfjo4FRoeucAasodbQbssNomrd90mCwEQzTduF1Ttj2u\n\t0DYRz+7ERPSLtewIg+A3I0mU7LbJlt5cUoQ+TcA/VTIywMYRqV08mUjjhDBO1/VG60sx\n\taJYcxugM+abba/zZAvCTZXVn1IpGynPILKCaWsLvjHa88uDun0Bq5ytu+plUmu01tfSB\n\tMhfAefoMIVIA/wFQXac7ctGZt95i0V2s6e3yfbS1u1BeJmoxpeDkR6B0SWFBKTMhYMWF\n\tF+2g==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:sender:subject:to:cc:references:from:message-id\n\t:date:user-agent:mime-version:in-reply-to:content-language\n\t:content-transfer-encoding;\n\tbh=WZS0+VJmfot0ifIUhKhQkMwNHOnXBOPFmQsoM1mS8u4=;\n\tb=R48yEhCuRYzd/HrRGhm6gBBTVMrbC2hkwRAZdRm0Urt0SRleB84cZiJ91aYfPlqN0x\n\txRR0uBkA/ibuUp3jT9iHZggIXJ6oua/VaYOhXIUKyjpg+vX/MNf2LHjkrzQ1k9sqBp6N\n\taDPqQyq8bE9GrGLaWkM2YZUDkdV8JCi+HLBp3t0TrnpNqXYFXLpQ9WWlGUqfPD+JYKKa\n\tZv7dut+3e1A4SpGpks7Jed9hgNp+DkPlY8+WG6sO+O/aBt2p7wU/nNZkTUP8B1jmKh1V\n\tntrCCpEyXK/2H6tURIA/0W1/VgWXfX/BAMnzHrzD4/iYTz+lnWnmH9RQ9QTP19UXNgRK\n\tpppw==","X-Gm-Message-State":"AHPjjUh94kU9mAeYwPXYTCov4GPtJsvuhTkDYcGFf48dDt2L4PUhVrF0\n\tUVX811+63A1R3g==","X-Google-Smtp-Source":"AOwi7QCUlm5kMICfJfCwwAkKrWbEjbJGnmyFoqI17JlrbzEVCbMjX9NV3SOIqvTNkGx54gZbUXVsug==","X-Received":"by 10.200.24.5 with SMTP id q5mr12913861qtj.293.1505065407550;\n\tSun, 10 Sep 2017 10:43:27 -0700 (PDT)","To":"Eduardo Habkost ","References":"<20170830225225.27925-1-f4bug@amsat.org>\n\t<20170901151850.GD17184@localhost.localdomain>\n\t\n\t<20170901154850.GP7570@localhost.localdomain>\n\t\n\t<5d7f7453-1303-7879-5437-73a79f2f0033@imgtec.com>","From":"=?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= ","Message-ID":"","Date":"Sun, 10 Sep 2017 14:43:22 -0300","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.3.0","MIME-Version":"1.0","In-Reply-To":"<5d7f7453-1303-7879-5437-73a79f2f0033@imgtec.com>","Content-Type":"text/plain; charset=utf-8; format=flowed","Content-Language":"en-US","Content-Transfer-Encoding":"8bit","X-detected-operating-system":"by eggs.gnu.org: Genre and OS details not\n\trecognized.","X-Received-From":"2607:f8b0:400d:c0d::229","Subject":"Re: [Qemu-devel] [PATCH v2 0/7] QOMify MIPS cpu","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Peter Maydell , Thomas Huth ,\n\tqemu-devel@nongnu.org, Marcel Apfelbaum ,\n\tYongbok Kim ,\n\tIgor Mammedov , \n\tAurelien Jarno ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"}}]