[{"id":1760586,"web_url":"http://patchwork.ozlabs.org/comment/1760586/","msgid":"<1504140598.4670.32.camel@neuling.org>","date":"2017-08-31T00:49:58","subject":"Re: [PATCH v3 00/17] powerpc: Do alignment fixups using\n\tanalyse_instr etc.","submitter":{"id":109,"url":"http://patchwork.ozlabs.org/api/people/109/","name":"Michael Neuling","email":"mikey@neuling.org"},"content":"Tested-by: Michael Neuling \n\nFWIW I've written a test case for alignment faults (which I'll convert to a\nselftest and upstream). It tests all load stores supported by POWER9 (results\nbelow).\n\nVSX: 2.06B\n\tDoing lxvd2x:\tPASSED\n\tDoing lxvw4x:\tPASSED\n\tDoing lxsdx:\tPASSED\n\tDoing lxvdsx:\tPASSED\n\tDoing stxvd2x:\tPASSED\n\tDoing stxvw4x:\tPASSED\n\tDoing stxsdx:\tPASSED\nVSX: 2.07B\n\tDoing lxsspx:\tPASSED\n\tDoing lxsiwax:\tPASSED\n\tDoing lxsiwzx:\tPASSED\n\tDoing stxsspx:\tPASSED\n\tDoing stxsiwx:\tPASSED\nVSX: 3.00B\n\tDoing lxsd:\tPASSED\n\tDoing lxsibzx:\tPASSED\n\tDoing lxsihzx:\tPASSED\n\tDoing lxssp:\tPASSED\n\tDoing lxv:\tPASSED\n\tDoing lxvb16x:\tPASSED\n\tDoing lxvh8x:\tPASSED\n\tDoing lxvx:\tPASSED\n\tDoing lxvwsx:\tPASSED\n\tDoing lxvl:\tPASSED\n\tDoing lxvll:\tPASSED\n\tDoing stxsd:\tPASSED\n\tDoing stxsibx:\tPASSED\n\tDoing stxsihx:\tPASSED\n\tDoing stxssp:\tPASSED\n\tDoing stxv:\tPASSED\n\tDoing stxvb16x:\tPASSED\n\tDoing stxvh8x:\tPASSED\n\tDoing stxvx:\tPASSED\n\tDoing stxvl:\tPASSED\n\tDoing stxvll:\tPASSED\nInteger\n\tDoing lbz:\tPASSED\n\tDoing lbzu:\tPASSED\n\tDoing lbzx:\tPASSED\n\tDoing lbzux:\tPASSED\n\tDoing lhz:\tPASSED\n\tDoing lhzu:\tPASSED\n\tDoing lhzx:\tPASSED\n\tDoing lhzux:\tPASSED\n\tDoing lha:\tPASSED\n\tDoing lhau:\tPASSED\n\tDoing lhax:\tPASSED\n\tDoing lhaux:\tPASSED\n\tDoing lhbrx:\tPASSED\n\tDoing lwz:\tPASSED\n\tDoing lwzu:\tPASSED\n\tDoing lwzx:\tPASSED\n\tDoing lwzux:\tPASSED\n\tDoing lwa:\tPASSED\n\tDoing lwax:\tPASSED\n\tDoing lwaux:\tPASSED\n\tDoing lwbrx:\tPASSED\n\tDoing ld:\tPASSED\n\tDoing ldu:\tPASSED\n\tDoing ldx:\tPASSED\n\tDoing ldux:\tPASSED\n\tDoing ldbrx:\tPASSED\n\tDoing lmw:\tPASSED\n\tDoing stb:\tPASSED\n\tDoing stbx:\tPASSED\n\tDoing stbu:\tPASSED\n\tDoing stbux:\tPASSED\n\tDoing sth:\tPASSED\n\tDoing sthx:\tPASSED\n\tDoing sthu:\tPASSED\n\tDoing sthux:\tPASSED\n\tDoing sthbrx:\tPASSED\n\tDoing stw:\tPASSED\n\tDoing stwx:\tPASSED\n\tDoing stwu:\tPASSED\n\tDoing stwux:\tPASSED\n\tDoing stwbrx:\tPASSED\n\tDoing std:\tPASSED\n\tDoing stdx:\tPASSED\n\tDoing stdu:\tPASSED\n\tDoing stdux:\tPASSED\n\tDoing stdbrx:\tPASSED\n\tDoing stmw:\tPASSED\nVMX\n\tDoing stvx:\tPASSED\n\tDoing stvebx:\tPASSED\n\tDoing stvehx:\tPASSED\n\tDoing stvewx:\tPASSED\n\tDoing stvxl:\tPASSED\nFloating point\n\tDoing lfd:\tPASSED\n\tDoing lfdx:\tPASSED\n\tDoing lfdp:\tPASSED\n\tDoing lfdpx:\tPASSED\n\tDoing lfdu:\tPASSED\n\tDoing lfdux:\tPASSED\n\tDoing lfs:\tPASSED\n\tDoing lfsx:\tPASSED\n\tDoing lfsu:\tPASSED\n\tDoing lfsux:\tPASSED\n\tDoing lfiwzx:\tPASSED\n\tDoing lfiwax:\tPASSED\n\tDoing stfd:\tPASSED\n\tDoing stfdx:\tPASSED\n\tDoing stfdp:\tPASSED\n\tDoing stfdpx:\tPASSED\n\tDoing stfdu:\tPASSED\n\tDoing stfdux:\tPASSED\n\tDoing stfs:\tPASSED\n\tDoing stfsx:\tPASSED\n\tDoing stfsu:\tPASSED\n\tDoing stfsux:\tPASSED\n\tDoing stfiwx:\tPASSED\n\n\nOn Wed, 2017-08-30 at 14:12 +1000, Paul Mackerras wrote:\n> This series extends the instruction emulation infrastructure in\n> arch/powerpc/lib/sstep.c and uses it for emulating instructions when\n> we get an alignment interrupt.  The advantage of this is that we only\n> have to add the new POWER9 instructions in one place, and it fixes\n> several bugs in alignment interrupt handling that have been identified\n> recently.\n> \n> With this, analyse_instr() and emulate_step() handle almost all load\n> and store instructions in Power ISA v3.00 -- all except the atomic\n> memory operations (lwat, stwat, etc.).  We now always use the largest\n> possible aligned memory accesses (up to 8 bytes) to emulate unaligned\n> accesses.  If we get a fault, the faulting address is accurately\n> recorded in regs->dar.  We also can now access FP/VMX/VSX registers\n> directly if they are live, without having to spill them all to the\n> thread_struct and the reload them all later.  There are also various\n> other fixes in the series.\n> \n> This version is based on the current powerpc next branch.\n> \n> Paul.\n> \n>  arch/powerpc/Kconfig                  |    4 -\n>  arch/powerpc/include/asm/ppc-opcode.h |   10 +-\n>  arch/powerpc/include/asm/sstep.h      |   90 +-\n>  arch/powerpc/kernel/align.c           |  774 +-----------\n>  arch/powerpc/lib/Makefile             |    3 +-\n>  arch/powerpc/lib/ldstfp.S             |  307 ++---\n>  arch/powerpc/lib/quad.S               |   62 +\n>  arch/powerpc/lib/sstep.c              | 2139 +++++++++++++++++++++++---------\n> -\n>  8 files changed, 1802 insertions(+), 1587 deletions(-)\n>","headers":{"Return-Path":"","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org","linuxppc-dev@ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xjP1y6QTKz9s83\n\tfor ;\n\tThu, 31 Aug 2017 10:51:02 +1000 (AEST)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xjP1y5XDKzDqjP\n\tfor ;\n\tThu, 31 Aug 2017 10:51:02 +1000 (AEST)","from ozlabs.org (ozlabs.org [IPv6:2401:3900:2:1::2])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xjP0k6SFQzDqR9\n\tfor ;\n\tThu, 31 Aug 2017 10:49:58 +1000 (AEST)","by ozlabs.org (Postfix)\n\tid 3xjP0k5ncxz9sNc; Thu, 31 Aug 2017 10:49:58 +1000 (AEST)","from localhost.localdomain (localhost [127.0.0.1])\n\tby ozlabs.org (Postfix) with ESMTP id 3xjP0k531tz9s83;\n\tThu, 31 Aug 2017 10:49:58 +1000 (AEST)","by localhost.localdomain (Postfix, from userid 1000)\n\tid A2F0EEEDE21; Thu, 31 Aug 2017 10:49:58 +1000 (AEST)"],"Message-ID":"<1504140598.4670.32.camel@neuling.org>","Subject":"Re: [PATCH v3 00/17] powerpc: Do alignment fixups using\n\tanalyse_instr etc.","From":"Michael Neuling ","To":"Paul Mackerras , linuxppc-dev@ozlabs.org","Date":"Thu, 31 Aug 2017 10:49:58 +1000","In-Reply-To":"<1504066360-30128-1-git-send-email-paulus@ozlabs.org>","References":"<1504066360-30128-1-git-send-email-paulus@ozlabs.org>","Content-Type":"text/plain; charset=\"UTF-8\"","Content-Transfer-Encoding":"quoted-printable","X-Mailer":"Evolution 3.22.6-1ubuntu1 ","Mime-Version":"1.0","X-BeenThere":"linuxppc-dev@lists.ozlabs.org","X-Mailman-Version":"2.1.23","Precedence":"list","List-Id":"Linux on PowerPC Developers Mail List\n\t","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Errors-To":"linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org","Sender":"\"Linuxppc-dev\"\n\t"}},{"id":1760588,"web_url":"http://patchwork.ozlabs.org/comment/1760588/","msgid":"<1504140897.4670.35.camel@neuling.org>","date":"2017-08-31T00:54:57","subject":"Re: [PATCH v3 00/17] powerpc: Do alignment fixups using\n\tanalyse_instr etc.","submitter":{"id":109,"url":"http://patchwork.ozlabs.org/api/people/109/","name":"Michael Neuling","email":"mikey@neuling.org"},"content":"On Thu, 2017-08-31 at 10:49 +1000, Michael Neuling wrote:\n> Tested-by: Michael Neuling \n> \n> FWIW I've written a test case for alignment faults (which I'll convert to a\n> selftest and upstream). It tests all load stores supported by POWER9 (results\n> below).\n\nSorry, this is not quite right. It doesn't test load/store quad or string\ninstructions.\n\nIt also doesn't test atomic memory options (AMO) since they can't be emulated\nanyway.\n\nMikey","headers":{"Return-Path":"","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org","linuxppc-dev@ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xjP7l50L1z9sNc\n\tfor ;\n\tThu, 31 Aug 2017 10:56:03 +1000 (AEST)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xjP7l3pBtzDqYc\n\tfor ;\n\tThu, 31 Aug 2017 10:56:03 +1000 (AEST)","from ozlabs.org (ozlabs.org [IPv6:2401:3900:2:1::2])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xjP6V3N9LzDqR9\n\tfor ;\n\tThu, 31 Aug 2017 10:54:58 +1000 (AEST)","by ozlabs.org (Postfix)\n\tid 3xjP6V2GLCz9sNc; Thu, 31 Aug 2017 10:54:58 +1000 (AEST)","from localhost.localdomain (localhost [127.0.0.1])\n\tby ozlabs.org (Postfix) with ESMTP id 3xjP6V06RTz9s83;\n\tThu, 31 Aug 2017 10:54:58 +1000 (AEST)","by localhost.localdomain (Postfix, from userid 1000)\n\tid EF062EEDE21; Thu, 31 Aug 2017 10:54:57 +1000 (AEST)"],"Message-ID":"<1504140897.4670.35.camel@neuling.org>","Subject":"Re: [PATCH v3 00/17] powerpc: Do alignment fixups using\n\tanalyse_instr etc.","From":"Michael Neuling ","To":"Paul Mackerras ,\n\tlinuxppc-dev ","Date":"Thu, 31 Aug 2017 10:54:57 +1000","In-Reply-To":"<1504140598.4670.32.camel@neuling.org>","References":"<1504066360-30128-1-git-send-email-paulus@ozlabs.org>\n\t<1504140598.4670.32.camel@neuling.org>","Content-Type":"text/plain; charset=\"UTF-8\"","Content-Transfer-Encoding":"quoted-printable","X-Mailer":"Evolution 3.22.6-1ubuntu1 ","Mime-Version":"1.0","X-BeenThere":"linuxppc-dev@lists.ozlabs.org","X-Mailman-Version":"2.1.23","Precedence":"list","List-Id":"Linux on PowerPC Developers Mail List\n\t","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Errors-To":"linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org","Sender":"\"Linuxppc-dev\"\n\t"}}]