[{"id":1759955,"web_url":"http://patchwork.ozlabs.org/comment/1759955/","msgid":"","list_archive_url":null,"date":"2017-08-30T08:27:12","subject":"Re: [PATCH 3/7] ARM: dts: sun8i: h3: Enable dwmac-sun8i on the\n\tNanopi M1 Plus","submitter":{"id":47154,"url":"http://patchwork.ozlabs.org/api/people/47154/","name":"Chen-Yu Tsai","email":"wens@csie.org"},"content":"On Wed, Aug 30, 2017 at 11:01 AM, Philipp Rossak wrote:\n> From: Philipp Rossak \n>\n> The dwmac-sun8i hardware is present on the Nanopi M1 Plus.\n\nSupport for this has been reverted. Please send this once it has\nbeen added again.\n\nChenYu\n\n> It uses an external PHY.\n>\n> Signed-off-by: Philipp Rossak \n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xhzCK6vXkz9t16\n\tfor ;\n\tWed, 30 Aug 2017 18:27:41 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751298AbdH3I1k (ORCPT\n\t);\n\tWed, 30 Aug 2017 04:27:40 -0400","from smtp.csie.ntu.edu.tw ([140.112.30.61]:53384 \"EHLO\n\tsmtp.csie.ntu.edu.tw\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751282AbdH3I1j (ORCPT\n\t); Wed, 30 Aug 2017 04:27:39 -0400","from mail-wm0-f45.google.com (mail-wm0-f45.google.com\n\t[74.125.82.45])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits))\n\t(No client certificate requested) (Authenticated sender: b93043)\n\tby smtp.csie.ntu.edu.tw (Postfix) with ESMTPSA id 902CC203B7;\n\tWed, 30 Aug 2017 16:27:37 +0800 (CST)","by mail-wm0-f45.google.com with SMTP id t201so5723231wmt.1;\n\tWed, 30 Aug 2017 01:27:37 -0700 (PDT)","by 10.223.133.253 with HTTP; Wed, 30 Aug 2017 01:27:12 -0700 (PDT)"],"X-Gm-Message-State":"AHYfb5gaGSDsrOFevm8yUJqKFzlBcYtuCAdFLKErRqB8mVXESYUM0axD\n\tT7Cqo6ziddpnfmzW1VG4dbRTc7hUUQ==","X-Google-Smtp-Source":"ADKCNb587X2ZqLqHkqRVuj2CpNJQTWVjYe6l4YDfyukMeFfcWGxHhzDj58wMIMRWbMQkbS2TQRw+lqnFkDZgWx9Nz9U=","X-Received":"by 10.28.94.84 with SMTP id s81mr757140wmb.3.1504081654185; Wed,\n\t30 Aug 2017 01:27:34 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<1504062070-13523-4-git-send-email-embed3d@gmail.com>","References":"<1504062070-13523-1-git-send-email-embed3d@gmail.com>\n\t<1504062070-13523-4-git-send-email-embed3d@gmail.com>","From":"Chen-Yu Tsai ","Date":"Wed, 30 Aug 2017 16:27:12 +0800","X-Gmail-Original-Message-ID":"","Message-ID":"","Subject":"Re: [PATCH 3/7] ARM: dts: sun8i: h3: Enable dwmac-sun8i on the\n\tNanopi M1 Plus","To":"Philipp Rossak ","Cc":"Rob Herring , Mark Rutland ,\n\tRussell King ,\n\tMaxime Ripard ,\n\tChen-Yu Tsai , devicetree ,\n\tlinux-arm-kernel ,\n\tlinux-kernel ","Content-Type":"text/plain; charset=\"UTF-8\"","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1760234,"web_url":"http://patchwork.ozlabs.org/comment/1760234/","msgid":"<20170830144954.iee4syh6btswxtzn@flea.lan>","list_archive_url":null,"date":"2017-08-30T14:49:54","subject":"Re: [PATCH 1/7] ARM: dts: sun8i: h3: nanopi-m1: Enable IR controller","submitter":{"id":12916,"url":"http://patchwork.ozlabs.org/api/people/12916/","name":"Maxime Ripard","email":"maxime.ripard@free-electrons.com"},"content":"On Wed, Aug 30, 2017 at 05:01:04AM +0200, Philipp Rossak wrote:\n> From: Philipp Rossak \n> \n> The Nanopi M1 has an onboard IR receiver.\n> This enables the onboard IR receiver subnode.\n> \n> Signed-off-by: Philipp Rossak \n\nQueued for 4.15, thanks!\nMaxime","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xj7hQ3N5gz9s9Y\n\tfor ;\n\tThu, 31 Aug 2017 00:49:58 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751361AbdH3Ot4 (ORCPT\n\t);\n\tWed, 30 Aug 2017 10:49:56 -0400","from mail.free-electrons.com ([62.4.15.54]:44758 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751345AbdH3Ot4 (ORCPT\n\t); Wed, 30 Aug 2017 10:49:56 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid E5E95208F7; Wed, 30 Aug 2017 16:49:53 +0200 (CEST)","from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr\n\t[90.63.216.87])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id BD69B20789;\n\tWed, 30 Aug 2017 16:49:53 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","Date":"Wed, 30 Aug 2017 16:49:54 +0200","From":"Maxime Ripard ","To":"Philipp Rossak ","Cc":"robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk,\n\twens@csie.org, devicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org","Subject":"Re: [PATCH 1/7] ARM: dts: sun8i: h3: nanopi-m1: Enable IR controller","Message-ID":"<20170830144954.iee4syh6btswxtzn@flea.lan>","References":"<1504062070-13523-1-git-send-email-embed3d@gmail.com>\n\t<1504062070-13523-2-git-send-email-embed3d@gmail.com>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha1;\n\tprotocol=\"application/pgp-signature\"; boundary=\"unvs7l4knclnh6x2\"","Content-Disposition":"inline","In-Reply-To":"<1504062070-13523-2-git-send-email-embed3d@gmail.com>","User-Agent":"NeoMutt/20170714 (1.8.3)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1760237,"web_url":"http://patchwork.ozlabs.org/comment/1760237/","msgid":"<20170830145056.mfl65p3fwo6vqiou@flea.lan>","list_archive_url":null,"date":"2017-08-30T14:50:56","subject":"Re: [PATCH 2/7] ARM: dts: sun8i: h3: nanopi-m1-plus: Enable IR\n\tcontroller","submitter":{"id":12916,"url":"http://patchwork.ozlabs.org/api/people/12916/","name":"Maxime Ripard","email":"maxime.ripard@free-electrons.com"},"content":"On Wed, Aug 30, 2017 at 05:01:05AM +0200, Philipp Rossak wrote:\n> From: Philipp Rossak \n> \n> The Nanopi M1 Plus has an onboard IR receiver.\n> This enables the onboard IR receiver subnode.\n> \n> Signed-off-by: Philipp Rossak \n\nQueued for 4.15, thanks!\nMaxime","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xj7jc0bBbz9sMN\n\tfor ;\n\tThu, 31 Aug 2017 00:51:00 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751405AbdH3Ou6 (ORCPT\n\t);\n\tWed, 30 Aug 2017 10:50:58 -0400","from mail.free-electrons.com ([62.4.15.54]:44859 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751372AbdH3Ou6 (ORCPT\n\t); Wed, 30 Aug 2017 10:50:58 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid AF8512096B; Wed, 30 Aug 2017 16:50:55 +0200 (CEST)","from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr\n\t[90.63.216.87])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id 8A099208EA;\n\tWed, 30 Aug 2017 16:50:55 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT\n\tshortcircuit=ham autolearn=disabled version=3.4.0","Date":"Wed, 30 Aug 2017 16:50:56 +0200","From":"Maxime Ripard ","To":"Philipp Rossak ","Cc":"robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk,\n\twens@csie.org, devicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org","Subject":"Re: [PATCH 2/7] ARM: dts: sun8i: h3: nanopi-m1-plus: Enable IR\n\tcontroller","Message-ID":"<20170830145056.mfl65p3fwo6vqiou@flea.lan>","References":"<1504062070-13523-1-git-send-email-embed3d@gmail.com>\n\t<1504062070-13523-3-git-send-email-embed3d@gmail.com>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha1;\n\tprotocol=\"application/pgp-signature\"; boundary=\"hfc3rp7et2dfsbd6\"","Content-Disposition":"inline","In-Reply-To":"<1504062070-13523-3-git-send-email-embed3d@gmail.com>","User-Agent":"NeoMutt/20170714 (1.8.3)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1760241,"web_url":"http://patchwork.ozlabs.org/comment/1760241/","msgid":"<20170830145211.snicbwdytobtd7ro@flea.lan>","list_archive_url":null,"date":"2017-08-30T14:52:11","subject":"Re: [PATCH 4/7] ARM: dts: sun8i: h3: Enable AP6212 WiFi on mmc1 on\n\tNanopi M1 Plus","submitter":{"id":12916,"url":"http://patchwork.ozlabs.org/api/people/12916/","name":"Maxime Ripard","email":"maxime.ripard@free-electrons.com"},"content":"Hi,\n\nOn Wed, Aug 30, 2017 at 05:01:07AM +0200, Philipp Rossak wrote:\n> From: Philipp Rossak \n> \n> The WiFi side of the AP6212 WiFi/BT combo module is connected to\n> mmc1. There are also GPIOs for enable and interrupts.\n> \n> Enable WiFi on this board by enabling mmc1 and adding the power\n> sequencing clocks and GPIO, as well as the chip's interrupt line.\n> \n> Signed-off-by: Philipp Rossak \n> ---\n> arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 35 +++++++++++++++++++++++++++\n> 1 file changed, 35 insertions(+)\n> \n> diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts\n> index b9c6c27..3054308 100644\n> --- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts\n> +++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts\n> @@ -48,6 +48,7 @@\n> \n> \taliases {\n> \t\tethernet0 = &emac;\n> +\t\tethernet1 = &ap6212;\n> \t};\n> \n> \treg_gmac_3v3: gmac-3v3 {\n> @@ -59,6 +60,14 @@\n> \t\tenable-active-high;\n> \t\tgpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;\n> \t};\n> +\n> +\twifi_pwrseq: wifi_pwrseq {\n> +\t\tcompatible = \"mmc-pwrseq-simple\";\n> +\t\tpinctrl-names = \"default\";\n> +\t\tpinctrl-0 = <&wifi_en_npi_m1p>;\n\nThere's no need for pinctrl nodes when the pin is set to a GPIO.\n\n> +\t\treset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */\n> +\t};\n> +\n> };\n> \n> &ehci1 {\n> @@ -93,6 +102,25 @@\n> \t};\n> };\n> \n> +&mmc1 {\n> +\tpinctrl-names = \"default\";\n> +\tpinctrl-0 = <&mmc1_pins_a>;\n> +\tvmmc-supply = <®_vcc3v3>;\n> +\tvqmmc-supply = <®_vcc3v3>;\n\nYou don't need vqmmc in this case.\n\n> +\tmmc-pwrseq = <&wifi_pwrseq>;\n> +\tbus-width = <4>;\n> +\tnon-removable;\n> +\tstatus = \"okay\";\n> +\n> +\tap6212: sdio_wifi@1 {\n\nYou're sure you need a label here?\n\nThanks!\nMaxime","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xj7l33Y5Tz9s9Y\n\tfor ;\n\tThu, 31 Aug 2017 00:52:15 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751404AbdH3OwN (ORCPT\n\t);\n\tWed, 30 Aug 2017 10:52:13 -0400","from mail.free-electrons.com ([62.4.15.54]:44949 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751387AbdH3OwN (ORCPT\n\t); Wed, 30 Aug 2017 10:52:13 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid 0B6842096B; Wed, 30 Aug 2017 16:52:11 +0200 (CEST)","from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr\n\t[90.63.216.87])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id D5A5E20865;\n\tWed, 30 Aug 2017 16:52:10 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","Date":"Wed, 30 Aug 2017 16:52:11 +0200","From":"Maxime Ripard ","To":"Philipp Rossak ","Cc":"robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk,\n\twens@csie.org, devicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org","Subject":"Re: [PATCH 4/7] ARM: dts: sun8i: h3: Enable AP6212 WiFi on mmc1 on\n\tNanopi M1 Plus","Message-ID":"<20170830145211.snicbwdytobtd7ro@flea.lan>","References":"<1504062070-13523-1-git-send-email-embed3d@gmail.com>\n\t<1504062070-13523-5-git-send-email-embed3d@gmail.com>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha1;\n\tprotocol=\"application/pgp-signature\"; boundary=\"cf6ljkg5cxmwxnqv\"","Content-Disposition":"inline","In-Reply-To":"<1504062070-13523-5-git-send-email-embed3d@gmail.com>","User-Agent":"NeoMutt/20170714 (1.8.3)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1760524,"web_url":"http://patchwork.ozlabs.org/comment/1760524/","msgid":"<89e3d5f8-1b31-bf86-4a6b-aee454c0b85f@gmail.com>","list_archive_url":null,"date":"2017-08-30T21:51:37","subject":"Re: [PATCH 4/7] ARM: dts: sun8i: h3: Enable AP6212 WiFi on mmc1 on\n\tNanopi M1 Plus","submitter":{"id":72018,"url":"http://patchwork.ozlabs.org/api/people/72018/","name":"Philipp Rossak","email":"embed3d@gmail.com"},"content":"Hi,\nthanks for the feedback I will rework the patch.\nShould I also update the sun8i-h3-bananapi-m2-plus.dts? It uses also the \nAP6212 and it is done in the same way like in this patch.\n\nAm 30.08.2017 um 16:52 schrieb Maxime Ripard:\n> Hi,\n> \n> On Wed, Aug 30, 2017 at 05:01:07AM +0200, Philipp Rossak wrote:\n>> From: Philipp Rossak \n>>\n>> The WiFi side of the AP6212 WiFi/BT combo module is connected to\n>> mmc1. There are also GPIOs for enable and interrupts.\n>>\n>> Enable WiFi on this board by enabling mmc1 and adding the power\n>> sequencing clocks and GPIO, as well as the chip's interrupt line.\n>>\n>> Signed-off-by: Philipp Rossak \n>> ---\n>> arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 35 +++++++++++++++++++++++++++\n>> 1 file changed, 35 insertions(+)\n>>\n>> diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts\n>> index b9c6c27..3054308 100644\n>> --- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts\n>> +++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts\n>> @@ -48,6 +48,7 @@\n>> \n>> \taliases {\n>> \t\tethernet0 = &emac;\n>> +\t\tethernet1 = &ap6212;\n>> \t};\n>> \n>> \treg_gmac_3v3: gmac-3v3 {\n>> @@ -59,6 +60,14 @@\n>> \t\tenable-active-high;\n>> \t\tgpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;\n>> \t};\n>> +\n>> +\twifi_pwrseq: wifi_pwrseq {\n>> +\t\tcompatible = \"mmc-pwrseq-simple\";\n>> +\t\tpinctrl-names = \"default\";\n>> +\t\tpinctrl-0 = <&wifi_en_npi_m1p>;\n> \n> There's no need for pinctrl nodes when the pin is set to a GPIO.\n> \n>> +\t\treset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */\n>> +\t};\n>> +\n>> };\n>> \n>> &ehci1 {\n>> @@ -93,6 +102,25 @@\n>> \t};\n>> };\n>> \n>> +&mmc1 {\n>> +\tpinctrl-names = \"default\";\n>> +\tpinctrl-0 = <&mmc1_pins_a>;\n>> +\tvmmc-supply = <®_vcc3v3>;\n>> +\tvqmmc-supply = <®_vcc3v3>;\n> \n> You don't need vqmmc in this case.\n> \n>> +\tmmc-pwrseq = <&wifi_pwrseq>;\n>> +\tbus-width = <4>;\n>> +\tnon-removable;\n>> +\tstatus = \"okay\";\n>> +\n>> +\tap6212: sdio_wifi@1 {\n> \n> You're sure you need a label here?\n> \n> Thanks!\n> Maxime\n> \n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; 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a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=subject:to:cc:references:from:message-id:date:user-agent\n\t:mime-version:in-reply-to:content-language:content-transfer-encoding; \n\tbh=h9kCHwG+Iq2LNtLiL5QN7yB5egFXVoiaVyKd4/LDn34=;\n\tb=lyYUvLpEhTtjoIW2gJF43m7DWu4JGnQjUmdMH8aiWWHr+y2f88AYBIhrhqbZfxmtbK\n\tBOzNJW4AmTMZ4oob1Wz3JakNvqr7dOxTTiOwFWNZfafJ6mhEJVlP0ygdOzpmosB9NY++\n\tv3/VpGo5v9oD/e8YSAswNulR7drKWADJLD3K5fWZ/2gnov5mn9zMvxC/Z1p1nh+tpx9N\n\tX91wRU9DTNR274L5Doj861Q+o+47b3k+fkgbzCoE0TJBrDFHHtPrmgIGbjYnzWFogsVG\n\tzTTMPDX0hOlXaY4Gf3dIpvubBKeRbp8wR7ioorNV3Scqh7XzPZxT3ao3kb5sP70csFnx\n\tv3Vw==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:subject:to:cc:references:from:message-id:date\n\t:user-agent:mime-version:in-reply-to:content-language\n\t:content-transfer-encoding;\n\tbh=h9kCHwG+Iq2LNtLiL5QN7yB5egFXVoiaVyKd4/LDn34=;\n\tb=dneF46RAbHMNQ4VM4LZK0hUh36rJv/ClM8XhaAOYtU2JZIDSyis8YewZ2fg1IuZdfJ\n\tjJ1tRhftm9NW7vx9XuFPGKvwUBJrTFSdMJMRE/44JxZsF9KnZa/4yEUHZD/vDSuSYNDG\n\t+x3ojZl1Yh0Hkyn6lG+kTP4YM/+mmBBMw2wRZ9c86izuEzYyO7M1b0ZvpFOjZ+KL3eam\n\t/e/JMxsIZfrPjWTmMgP9nWJS/66vRj28HJcuGJSGMEvCwyphvxul0SCW1yZumOsvxrZ+\n\tISPwt7fGOJYt6UNJF02JnoqUK4Ecv2kIuxUIfUEJY/ergQ8gnRv8LWGkOL4J7k0uALOV\n\to/SA==","X-Gm-Message-State":"AHYfb5hvnNYoVOBMTyhKX92beAuSxBPwYut8nzRqFHRjflde4VN47Lfd\n\tKy/t60iLhEOZXA==","X-Received":"by 10.223.183.7 with SMTP id l7mr1864721wre.270.1504129903265;\n\tWed, 30 Aug 2017 14:51:43 -0700 (PDT)","Subject":"Re: [PATCH 4/7] ARM: dts: sun8i: h3: Enable AP6212 WiFi on mmc1 on\n\tNanopi M1 Plus","To":"Maxime Ripard ","Cc":"robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk,\n\twens@csie.org, devicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,\n\tlinux-sunxi@googlegroups.com","References":"<1504062070-13523-1-git-send-email-embed3d@gmail.com>\n\t<1504062070-13523-5-git-send-email-embed3d@gmail.com>\n\t<20170830145211.snicbwdytobtd7ro@flea.lan>","From":"Philipp Rossak ","Message-ID":"<89e3d5f8-1b31-bf86-4a6b-aee454c0b85f@gmail.com>","Date":"Wed, 30 Aug 2017 23:51:37 +0200","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.2.1","MIME-Version":"1.0","In-Reply-To":"<20170830145211.snicbwdytobtd7ro@flea.lan>","Content-Type":"text/plain; charset=windows-1252; format=flowed","Content-Language":"en-US","Content-Transfer-Encoding":"7bit","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1761660,"web_url":"http://patchwork.ozlabs.org/comment/1761660/","msgid":"<20170901125911.cyyyq36s5dx5fz6k@flea>","list_archive_url":null,"date":"2017-09-01T12:59:11","subject":"Re: [PATCH 6/7] ARM: dts: sun8i: h3: Adding UART3 RTS and CTS Pins","submitter":{"id":12916,"url":"http://patchwork.ozlabs.org/api/people/12916/","name":"Maxime Ripard","email":"maxime.ripard@free-electrons.com"},"content":"On Wed, Aug 30, 2017 at 05:01:09AM +0200, Philipp Rossak wrote:\n> From: Philipp Rossak \n> \n> This node adds the definition for the UART3 RTS and CTS Pins\n> \n> That makes it able to use UART3 with RTS and CTS.\n> \n> Signed-off-by: Philipp Rossak \n\nQueued for 4.15, thanks\n\nMaxime","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xkK7x2nZGz9t1t\n\tfor ;\n\tFri, 1 Sep 2017 22:59:25 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751888AbdIAM7X (ORCPT\n\t);\n\tFri, 1 Sep 2017 08:59:23 -0400","from mail.free-electrons.com ([62.4.15.54]:51850 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751778AbdIAM7X (ORCPT\n\t); Fri, 1 Sep 2017 08:59:23 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid F24E12090B; Fri, 1 Sep 2017 14:59:20 +0200 (CEST)","from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr\n\t[90.63.216.87])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id CCDFE208A6;\n\tFri, 1 Sep 2017 14:59:10 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT\n\tshortcircuit=ham autolearn=disabled version=3.4.0","Date":"Fri, 1 Sep 2017 14:59:11 +0200","From":"Maxime Ripard ","To":"Philipp Rossak ","Cc":"robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk,\n\twens@csie.org, devicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org","Subject":"Re: [PATCH 6/7] ARM: dts: sun8i: h3: Adding UART3 RTS and CTS Pins","Message-ID":"<20170901125911.cyyyq36s5dx5fz6k@flea>","References":"<1504062070-13523-1-git-send-email-embed3d@gmail.com>\n\t<1504062070-13523-7-git-send-email-embed3d@gmail.com>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha1;\n\tprotocol=\"application/pgp-signature\"; boundary=\"3vdk2jqfsvs4pv5t\"","Content-Disposition":"inline","In-Reply-To":"<1504062070-13523-7-git-send-email-embed3d@gmail.com>","User-Agent":"NeoMutt/20170714 (1.8.3)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1761662,"web_url":"http://patchwork.ozlabs.org/comment/1761662/","msgid":"<20170901125959.6ae37ez34vb7mh6d@flea>","list_archive_url":null,"date":"2017-09-01T12:59:59","subject":"Re: [PATCH 7/7] ARM: dts: sun8i: h3: Enable AP6212 BT on uart3 on\n\tNanopi M1 Plus","submitter":{"id":12916,"url":"http://patchwork.ozlabs.org/api/people/12916/","name":"Maxime Ripard","email":"maxime.ripard@free-electrons.com"},"content":"On Wed, Aug 30, 2017 at 05:01:10AM +0200, Philipp Rossak wrote:\n> From: Philipp Rossak \n> \n> The BT side of the AP6212 WiFi/BT combo module is connected to\n> uart3.\n> \n> Enable BT on this board by enabling uart3 with using additionally\n> the cts and rts pins.\n> \n> Signed-off-by: Philipp Rossak \n\nI've queued this patch for 4.15, but...\n\n> ---\n> arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 7 +++++++\n> 1 file changed, 7 insertions(+)\n> \n> diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts\n> index 3054308..8c12419 100644\n> --- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts\n> +++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts\n> @@ -49,6 +49,7 @@\n> \taliases {\n> \t\tethernet0 = &emac;\n> \t\tethernet1 = &ap6212;\n> +\t\tserial1 = &uart3;\n\nYou'll also need an alias for serial 0 here. Can you send a follow up\npatch to do so?\n\nThanks!\nMaxime","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xkK9607cgz9t2d\n\tfor ;\n\tFri, 1 Sep 2017 23:00:26 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1752008AbdIANAM (ORCPT\n\t);\n\tFri, 1 Sep 2017 09:00:12 -0400","from mail.free-electrons.com ([62.4.15.54]:51864 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751778AbdIANAK (ORCPT\n\t); Fri, 1 Sep 2017 09:00:10 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid C1CAC20A20; Fri, 1 Sep 2017 15:00:08 +0200 (CEST)","from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr\n\t[90.63.216.87])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id 9638120A10;\n\tFri, 1 Sep 2017 14:59:58 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","Date":"Fri, 1 Sep 2017 14:59:59 +0200","From":"Maxime Ripard ","To":"Philipp Rossak ","Cc":"robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk,\n\twens@csie.org, devicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org","Subject":"Re: [PATCH 7/7] ARM: dts: sun8i: h3: Enable AP6212 BT on uart3 on\n\tNanopi M1 Plus","Message-ID":"<20170901125959.6ae37ez34vb7mh6d@flea>","References":"<1504062070-13523-1-git-send-email-embed3d@gmail.com>\n\t<1504062070-13523-8-git-send-email-embed3d@gmail.com>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha1;\n\tprotocol=\"application/pgp-signature\"; boundary=\"a7a6tnzfhxfntd4z\"","Content-Disposition":"inline","In-Reply-To":"<1504062070-13523-8-git-send-email-embed3d@gmail.com>","User-Agent":"NeoMutt/20170714 (1.8.3)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1761664,"web_url":"http://patchwork.ozlabs.org/comment/1761664/","msgid":"<20170901130032.2zifl3hsxabzsxrc@flea>","list_archive_url":null,"date":"2017-09-01T13:00:32","subject":"Re: [PATCH 4/7] ARM: dts: sun8i: h3: Enable AP6212 WiFi on mmc1 on\n\tNanopi M1 Plus","submitter":{"id":12916,"url":"http://patchwork.ozlabs.org/api/people/12916/","name":"Maxime Ripard","email":"maxime.ripard@free-electrons.com"},"content":"On Wed, Aug 30, 2017 at 11:51:37PM +0200, Philipp Rossak wrote:\n> Hi,\n> thanks for the feedback I will rework the patch.\n> Should I also update the sun8i-h3-bananapi-m2-plus.dts? It uses also the\n> AP6212 and it is done in the same way like in this patch.\n\nYes, please.\n\nMaxime","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xkK9T6CBzz9t2d\n\tfor ;\n\tFri, 1 Sep 2017 23:00:45 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1752035AbdIANAo (ORCPT\n\t);\n\tFri, 1 Sep 2017 09:00:44 -0400","from mail.free-electrons.com ([62.4.15.54]:51904 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751778AbdIANAn (ORCPT\n\t); Fri, 1 Sep 2017 09:00:43 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid 5B5BF2090B; Fri, 1 Sep 2017 15:00:41 +0200 (CEST)","from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr\n\t[90.63.216.87])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id 34374208A6;\n\tFri, 1 Sep 2017 15:00:31 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","Date":"Fri, 1 Sep 2017 15:00:32 +0200","From":"Maxime Ripard ","To":"Philipp Rossak ","Cc":"robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk,\n\twens@csie.org, devicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,\n\tlinux-sunxi@googlegroups.com","Subject":"Re: [PATCH 4/7] ARM: dts: sun8i: h3: Enable AP6212 WiFi on mmc1 on\n\tNanopi M1 Plus","Message-ID":"<20170901130032.2zifl3hsxabzsxrc@flea>","References":"<1504062070-13523-1-git-send-email-embed3d@gmail.com>\n\t<1504062070-13523-5-git-send-email-embed3d@gmail.com>\n\t<20170830145211.snicbwdytobtd7ro@flea.lan>\n\t<89e3d5f8-1b31-bf86-4a6b-aee454c0b85f@gmail.com>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha1;\n\tprotocol=\"application/pgp-signature\"; boundary=\"54qqj7ynyucnsi6d\"","Content-Disposition":"inline","In-Reply-To":"<89e3d5f8-1b31-bf86-4a6b-aee454c0b85f@gmail.com>","User-Agent":"NeoMutt/20170714 (1.8.3)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}}]