[{"id":1758847,"web_url":"http://patchwork.ozlabs.org/comment/1758847/","msgid":"","list_archive_url":null,"date":"2017-08-28T21:18:25","subject":"Re: [PATCH 1/2] mtd: spi-nor: add an option to force 3byte adressing\n\tmode","submitter":{"id":703,"url":"http://patchwork.ozlabs.org/api/people/703/","name":"Geert Uytterhoeven","email":"geert@linux-m68k.org"},"content":"On Mon, Aug 28, 2017 at 11:14 PM, Marcin Wojtas wrote:\n> Hitherto code set 4B addressing mode for all SPI flashes whose\n> size exceeds 16MB. However, changing the default 3B access\n> in some cases may be harmful - it may happen that the Boot ROM\n> is not capable of handling non-default state of the SPI NOR\n> (e.g. after soft reset). Some flash devices allow to access the\n> memory above 128Mib without changing mode to 4byte thanks\n> to special op codes (see SPI_NOR_4B_OPCODES flag). Unfortunately\n> for those which don't support them, the problem persists.\n>\n> This patch adds optional property that can be added to the\n> SPI flash node and which will force to use 3B addressing mode,\n> limiting the accessible memory size to 16MiB.\n> Binding documentation is updated accordingly.\n>\n> Signed-off-by: Marcin Wojtas \n> ---\n> Documentation/devicetree/bindings/spi/spi-bus.txt | 2 ++\n> drivers/mtd/spi-nor/spi-nor.c | 12 +++++++++++-\n> 2 files changed, 13 insertions(+), 1 deletion(-)\n>\n> diff --git a/Documentation/devicetree/bindings/spi/spi-bus.txt b/Documentation/devicetree/bindings/spi/spi-bus.txt\n> index 1f6e86f..f13b773 100644\n> --- a/Documentation/devicetree/bindings/spi/spi-bus.txt\n> +++ b/Documentation/devicetree/bindings/spi/spi-bus.txt\n> @@ -77,6 +77,8 @@ All slave nodes can contain the following optional properties:\n> Defaults to 1 if not present.\n> - spi-rx-delay-us - Microsecond delay after a read transfer.\n> - spi-tx-delay-us - Microsecond delay after a write transfer.\n> +- spi-3byte-addressing - Empty property indicating device access to be done\n> + only in 3byte addressing mode.\n\nspi-force-3byte-addressing?\n\n> Some SPI controllers and devices support Dual and Quad SPI transfer mode.\n> It allows data in the SPI system to be transferred using 2 wires (DUAL) or 4\n> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c\n> index 1413828..029c87d 100644\n> --- a/drivers/mtd/spi-nor/spi-nor.c\n> +++ b/drivers/mtd/spi-nor/spi-nor.c\n> @@ -2002,7 +2002,17 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,\n> if (JEDEC_MFR(info) == SNOR_MFR_SPANSION ||\n> info->flags & SPI_NOR_4B_OPCODES)\n> spi_nor_set_4byte_opcodes(nor, info);\n> - else\n> + else if (of_property_read_bool(np, \"spi-3byte-addressing\")) {\n> + /*\n> + * Do not enter 4byte mode in order to prevent\n> + * the early bootloader to come up on non-default\n> + * SPI NOR memory during boot. Limit accessible\n> + * size to 16MiB.\n> + */\n> + nor->addr_width = 3;\n> + mtd->size = 0x1000000;\n\nWhat if the device is smaller than 16 MiB?\n\nmtd->size = min(mtd->size, 0x1000000);\n\n> + dev_info(dev, \"Force 3B addressing mode\\n\");\n> + } else\n> set_4byte(nor, info, 1);\n> } else {\n> nor->addr_width = 3;\n\nGr{oetje,eeting}s,\n\n Geert\n\n--\nGeert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org\n\nIn personal conversations with technical people, I call myself a hacker. But\nwhen I'm talking to journalists I just say \"programmer\" or something like that.\n -- Linus Torvalds","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org header.b=\"Bhi/XJtW\"; \n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"gmkAWXnz\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xh4Q70wnqz9rxl\n\tfor ;\n\tTue, 29 Aug 2017 07:18:53 +1000 (AEST)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dmRQo-0000Z4-Py; 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\n\tMon, 28 Aug 2017 14:18:26 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<1503954854-30963-2-git-send-email-mw@semihalf.com>","References":"<1503954854-30963-1-git-send-email-mw@semihalf.com>\n\t<1503954854-30963-2-git-send-email-mw@semihalf.com>","From":"Geert Uytterhoeven ","Date":"Mon, 28 Aug 2017 23:18:25 +0200","X-Google-Sender-Auth":"Owbxew6mopeVTw6APcuIKOYq2B8","Message-ID":"","Subject":"Re: [PATCH 1/2] mtd: spi-nor: add an option to force 3byte adressing\n\tmode","To":"Marcin Wojtas ","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170828_141847_795684_408623FE ","X-CRM114-Status":"GOOD ( 22.06 )","X-Spam-Score":"-1.7 (-)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-1.7 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/,\n\tno\n\ttrust [2607:f8b0:400e:c00:0:0:0:243 listed in] [list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail\n\tprovider (geert.uytterhoeven[at]gmail.com)\n\t0.0 HEADER_FROM_DIFFERENT_DOMAINS From and EnvelopeFrom 2nd level\n\tmail domains are different\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t-0.1 DKIM_VALID Message has at least one valid DKIM or DK signature\n\t0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n\tnot necessarily valid\n\t0.2 FREEMAIL_FORGED_FROMDOMAIN 2nd level domains in From and\n\tEnvelopeFrom freemail headers are different","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Mark Rutland ,\n\tThomas Petazzoni ,\n\tGrzegorz Jaszczyk , Mark Brown ,\n\tomrii@marvell.com, Will Deacon ,\n\t\"linux-kernel@vger.kernel.org\" ,\n\tlinux-spi ,\n\tNadav Haklai , \n\tMarek Vasut , Rob Herring ,\n\tMTD Maling List ,\n\tCyrille Pitchen ,\n\tGregory Clement , neta@marvell.com,\n\tHanna Hawa , \"linux-arm-kernel@lists.infradead.org\"\n\t, tn@semihalf.com","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1758870,"web_url":"http://patchwork.ozlabs.org/comment/1758870/","msgid":"","list_archive_url":null,"date":"2017-08-28T21:54:03","subject":"Re: [PATCH 1/2] mtd: spi-nor: add an option to force 3byte adressing\n\tmode","submitter":{"id":66998,"url":"http://patchwork.ozlabs.org/api/people/66998/","name":"Marcin Wojtas","email":"mw@semihalf.com"},"content":"Hi Geert,\n\n>> +- spi-3byte-addressing - Empty property indicating device access to be done\n>> + only in 3byte addressing mode.\n>\n> spi-force-3byte-addressing?\n\nI can change it, no problem. I thought of this, but was affraid if the\nproperty wouldn't be too long.\n\n>\n>> Some SPI controllers and devices support Dual and Quad SPI transfer mode.\n>> It allows data in the SPI system to be transferred using 2 wires (DUAL) or 4\n>> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c\n>> index 1413828..029c87d 100644\n>> --- a/drivers/mtd/spi-nor/spi-nor.c\n>> +++ b/drivers/mtd/spi-nor/spi-nor.c\n>> @@ -2002,7 +2002,17 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,\n>> if (JEDEC_MFR(info) == SNOR_MFR_SPANSION ||\n>> info->flags & SPI_NOR_4B_OPCODES)\n>> spi_nor_set_4byte_opcodes(nor, info);\n>> - else\n>> + else if (of_property_read_bool(np, \"spi-3byte-addressing\")) {\n>> + /*\n>> + * Do not enter 4byte mode in order to prevent\n>> + * the early bootloader to come up on non-default\n>> + * SPI NOR memory during boot. Limit accessible\n>> + * size to 16MiB.\n>> + */\n>> + nor->addr_width = 3;\n>> + mtd->size = 0x1000000;\n>\n> What if the device is smaller than 16 MiB?\n>\n> mtd->size = min(mtd->size, 0x1000000);\n\nNot needed - this code is executed only for mtd->size > 0x1000000. See\nbigger context:\n\n if (info->addr_width)\n nor->addr_width = info->addr_width;\n else if (mtd->size > 0x1000000) {\n /* enable 4-byte addressing if the device exceeds 16MiB */\n nor->addr_width = 4;\n if (JEDEC_MFR(info) == SNOR_MFR_SPANSION ||\n info->flags & SPI_NOR_4B_OPCODES)\n spi_nor_set_4byte_opcodes(nor, info);\n else if (of_property_read_bool(np, \"spi-3byte-addressing\")) {\n /*\n * Do not enter 4byte mode in order to prevent\n * the early bootloader to come up on non-default\n * SPI NOR memory during boot. Limit accessible\n * size to 16MiB.\n */\n nor->addr_width = 3;\n mtd->size = 0x1000000;\n dev_info(dev, \"Force 3B addressing mode\\n\");\n } else\n set_4byte(nor, info, 1);\n } else {\n nor->addr_width = 3;\n }\n\n\nBest regards,\nMarcin","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org header.b=\"h6eCHdsf\"; \n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=semihalf-com.20150623.gappssmtp.com\n\theader.i=@semihalf-com.20150623.gappssmtp.com header.b=\"vLcmFbZB\"; \n\tdkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xh5CW67kdz9s8w\n\tfor ;\n\tTue, 29 Aug 2017 07:54:47 +1000 (AEST)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dmRzY-0001I3-6y; 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charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1758928,"web_url":"http://patchwork.ozlabs.org/comment/1758928/","msgid":"<37be90e4-c43b-26f8-7551-45ab107e2a4d@gmail.com>","list_archive_url":null,"date":"2017-08-28T23:24:13","subject":"Re: [PATCH 1/2] mtd: spi-nor: add an option to force 3byte adressing\n\tmode","submitter":{"id":1124,"url":"http://patchwork.ozlabs.org/api/people/1124/","name":"Marek Vasut","email":"marek.vasut@gmail.com"},"content":"On 08/28/2017 11:14 PM, Marcin Wojtas wrote:\n> Hitherto code set 4B addressing mode for all SPI flashes whose\n> size exceeds 16MB. However, changing the default 3B access\n> in some cases may be harmful - it may happen that the Boot ROM\n> is not capable of handling non-default state of the SPI NOR\n> (e.g. after soft reset).\n\nNo, this happens when your hardware is broken and does NOT reset the\nflash while reseting the CPU as well. If the flash is in some funny\nstate (ie. middle of page program or erase cycle, which takes long OR\n4byte addressing mode) and the CPU resets , then if the SPI NOR is not\nreset, your system will still get stuck . You need to fix your hardware\nsuch that you use the reset output of your CPU to detect when the CPU\nrestarted and add logic to reset your storage as well.\n\nThis stuff below is a poor workaround and has it's known problems which\ncan only be solved by fixing the hardware. This problem keeps coming up\nrepeatedly, just skim through the Linux MTD and U-Boot lists for other\nvictims of bad HW design. I don't think I want to see it in the kernel\nas that would motivate people to use it rather than fixing their HW .\n\n> Some flash devices allow to access the\n> memory above 128Mib without changing mode to 4byte thanks\n> to special op codes (see SPI_NOR_4B_OPCODES flag). Unfortunately\n> for those which don't support them, the problem persists.\n> \n> This patch adds optional property that can be added to the\n> SPI flash node and which will force to use 3B addressing mode,\n> limiting the accessible memory size to 16MiB.\n> Binding documentation is updated accordingly.\n> \n> Signed-off-by: Marcin Wojtas \n> ---\n> Documentation/devicetree/bindings/spi/spi-bus.txt | 2 ++\n> drivers/mtd/spi-nor/spi-nor.c | 12 +++++++++++-\n> 2 files changed, 13 insertions(+), 1 deletion(-)\n> \n> diff --git a/Documentation/devicetree/bindings/spi/spi-bus.txt b/Documentation/devicetree/bindings/spi/spi-bus.txt\n> index 1f6e86f..f13b773 100644\n> --- a/Documentation/devicetree/bindings/spi/spi-bus.txt\n> +++ b/Documentation/devicetree/bindings/spi/spi-bus.txt\n> @@ -77,6 +77,8 @@ All slave nodes can contain the following optional properties:\n> \t\t Defaults to 1 if not present.\n> - spi-rx-delay-us - Microsecond delay after a read transfer.\n> - spi-tx-delay-us - Microsecond delay after a write transfer.\n> +- spi-3byte-addressing - Empty property indicating device access to be done\n> +\t\t only in 3byte addressing mode.\n> \n> Some SPI controllers and devices support Dual and Quad SPI transfer mode.\n> It allows data in the SPI system to be transferred using 2 wires (DUAL) or 4\n> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c\n> index 1413828..029c87d 100644\n> --- a/drivers/mtd/spi-nor/spi-nor.c\n> +++ b/drivers/mtd/spi-nor/spi-nor.c\n> @@ -2002,7 +2002,17 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,\n> \t\tif (JEDEC_MFR(info) == SNOR_MFR_SPANSION ||\n> \t\t info->flags & SPI_NOR_4B_OPCODES)\n> \t\t\tspi_nor_set_4byte_opcodes(nor, info);\n> -\t\telse\n> +\t\telse if (of_property_read_bool(np, \"spi-3byte-addressing\")) {\n> +\t\t\t/*\n> +\t\t\t * Do not enter 4byte mode in order to prevent\n> +\t\t\t * the early bootloader to come up on non-default\n> +\t\t\t * SPI NOR memory during boot. Limit accessible\n> +\t\t\t * size to 16MiB.\n> +\t\t\t */\n> +\t\t\tnor->addr_width = 3;\n> +\t\t\tmtd->size = 0x1000000;\n> +\t\t\tdev_info(dev, \"Force 3B addressing mode\\n\");\n> +\t\t} else\n> \t\t\tset_4byte(nor, info, 1);\n> \t} else {\n> \t\tnor->addr_width = 3;\n>","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org header.b=\"lEVaPSBy\"; \n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"PSyVMkLQ\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xh7FX2HpJz9sP5\n\tfor ;\n\tTue, 29 Aug 2017 09:26:40 +1000 (AEST)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dmTQS-0001jz-QJ; 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Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.2.1","MIME-Version":"1.0","In-Reply-To":"<1503954854-30963-2-git-send-email-mw@semihalf.com>","Content-Language":"en-US","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170828_162620_185954_1A00DF12 ","X-CRM114-Status":"GOOD ( 24.36 )","X-Spam-Score":"-2.0 (--)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-2.0 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/,\n\tno\n\ttrust [2a00:1450:400c:c0c:0:0:0:243 listed in] [list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail\n\tprovider (marek.vasut[at]gmail.com)\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t-0.1 DKIM_VALID Message has at least one valid DKIM or DK signature\n\t0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n\tnot necessarily valid\n\t-0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n\tauthor's domain","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"mark.rutland@arm.com, thomas.petazzoni@free-electrons.com,\n\tjaz@semihalf.com, \n\thannah@marvell.com, omrii@marvell.com, will.deacon@arm.com,\n\trobh+dt@kernel.org, \n\tnadavh@marvell.com, broonie@kernel.org, neta@marvell.com,\n\tcyrille.pitchen@wedev4u.fr, gregory.clement@free-electrons.com,\n\ttn@semihalf.com","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1759085,"web_url":"http://patchwork.ozlabs.org/comment/1759085/","msgid":"","list_archive_url":null,"date":"2017-08-29T07:40:06","subject":"Re: [PATCH 1/2] mtd: spi-nor: add an option to force 3byte adressing\n\tmode","submitter":{"id":66998,"url":"http://patchwork.ozlabs.org/api/people/66998/","name":"Marcin Wojtas","email":"mw@semihalf.com"},"content":"Hi Marek,\n\n2017-08-29 1:24 GMT+02:00 Marek Vasut :\n> On 08/28/2017 11:14 PM, Marcin Wojtas wrote:\n>> Hitherto code set 4B addressing mode for all SPI flashes whose\n>> size exceeds 16MB. However, changing the default 3B access\n>> in some cases may be harmful - it may happen that the Boot ROM\n>> is not capable of handling non-default state of the SPI NOR\n>> (e.g. after soft reset).\n>\n> No, this happens when your hardware is broken and does NOT reset the\n> flash while reseting the CPU as well. If the flash is in some funny\n> state (ie. middle of page program or erase cycle, which takes long OR\n> 4byte addressing mode) and the CPU resets , then if the SPI NOR is not\n> reset, your system will still get stuck . You need to fix your hardware\n> such that you use the reset output of your CPU to detect when the CPU\n> restarted and add logic to reset your storage as well.\n>\n> This stuff below is a poor workaround and has it's known problems which\n> can only be solved by fixing the hardware. This problem keeps coming up\n> repeatedly, just skim through the Linux MTD and U-Boot lists for other\n> victims of bad HW design. I don't think I want to see it in the kernel\n> as that would motivate people to use it rather than fixing their HW .\n>\n\nUnderstood. I just only got impression that attempts to overcome the\nHW design faults in terms of keeping SPI NOR default state during boot\ncan be added - introducing SPI_NOR_4B_OPCODES seems to have no other\nreason, however it favors only a group of devices that support it.\n\nBest regards,\nMarcin","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org header.b=\"nDvEBKCL\"; \n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=semihalf-com.20150623.gappssmtp.com\n\theader.i=@semihalf-com.20150623.gappssmtp.com header.b=\"fzmaqTtw\"; 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a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:mime-version:in-reply-to:references:from:date\n\t:message-id:subject:to:cc;\n\tbh=UTDNaNkaxxbiktJ6Blt7IcfMDPyyMUke+LHTaqBilbs=;\n\tb=UHJsj0j6cBS0OjwG2c8Ar7IiWbbzgEnqaRBlbdzD2v2Ku3X8STMPxu+HirkkpTTdd+\n\tFC2/01NXaWZsV8PHWznKtssZQeFcKc1uuyece1RxdqxFYtPSEHcSBDX8aLyMrlx1CqOt\n\tF3w64ux2dRyisFgFcXjdKn1z1C+k0RrFCx14ddapWyEdxoOIDD1UWt4H9Ya5W14WsHaG\n\tFifZnkyKkiASK1Y6S+hj8HC/2TcClXODohPxAXDkLyNwDYibdqoNst6oy6JITIWQrvgb\n\tI7rQQwsZbaAzv6jSkTY9S/yPUeVqsOhkoY05xN89sBBRP/VI+h1uKBslbFAEt8ZfLBdO\n\tefrg==","X-Gm-Message-State":"AHPjjUjSwikZj8Pr/sJVgURQURPxlUraYpV2EIiSX/XefOwJ4LqioLNs\n\tRfFmiXiAVB3G1mZyud5XKOzIdy/kIHcJ","X-Received":"by 10.107.18.22 with SMTP id a22mr623210ioj.37.1503992407472;\n\tTue, 29 Aug 2017 00:40:07 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<37be90e4-c43b-26f8-7551-45ab107e2a4d@gmail.com>","References":"<1503954854-30963-1-git-send-email-mw@semihalf.com>\n\t<1503954854-30963-2-git-send-email-mw@semihalf.com>\n\t<37be90e4-c43b-26f8-7551-45ab107e2a4d@gmail.com>","From":"Marcin Wojtas ","Date":"Tue, 29 Aug 2017 09:40:06 +0200","Message-ID":"","Subject":"Re: [PATCH 1/2] mtd: spi-nor: add an option to force 3byte adressing\n\tmode","To":"Marek Vasut ","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170829_004023_734458_F466062F ","X-CRM114-Status":"GOOD ( 16.48 )","X-Spam-Score":"-1.9 (-)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-1.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/,\n\tno\n\ttrust [2607:f8b0:4001:c06:0:0:0:230 listed in] [list.dnswl.org]\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t-0.1 DKIM_VALID Message has at least one valid DKIM or DK signature\n\t0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n\tnot necessarily valid","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Mark Rutland , Thomas Petazzoni\n\t, \"jaz@semihalf.com\"\n\t, Mark Brown , Omri Itach\n\t, Will Deacon , \n\tlinux-kernel@vger.kernel.org, linux-spi , \n\tnadavh@marvell.com, Rob Herring , MTD Maling List\n\t, Cyrille Pitchen\n\t, =?utf-8?q?Gregory_Cl=C3=A9ment?=\n\t, Neta Zur Hershkovits\n\t, Hanna Hawa , \n\t\"linux-arm-kernel@lists.infradead.org\"\n\t, Tomasz Nowicki ","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1762763,"web_url":"http://patchwork.ozlabs.org/comment/1762763/","msgid":"<20170904162602.GC21849@amd>","list_archive_url":null,"date":"2017-09-04T16:26:02","subject":"Re: [PATCH 1/2] mtd: spi-nor: add an option to force 3byte adressing\n\tmode","submitter":{"id":2109,"url":"http://patchwork.ozlabs.org/api/people/2109/","name":"Pavel Machek","email":"pavel@ucw.cz"},"content":"Hi!\n\n> index 1413828..029c87d 100644\n> --- a/drivers/mtd/spi-nor/spi-nor.c\n> +++ b/drivers/mtd/spi-nor/spi-nor.c\n> @@ -2002,7 +2002,17 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,\n> \t\tif (JEDEC_MFR(info) == SNOR_MFR_SPANSION ||\n> \t\t info->flags & SPI_NOR_4B_OPCODES)\n> \t\t\tspi_nor_set_4byte_opcodes(nor, info);\n> -\t\telse\n> +\t\telse if (of_property_read_bool(np, \"spi-3byte-addressing\")) {\n> +\t\t\t/*\n> +\t\t\t * Do not enter 4byte mode in order to prevent\n> +\t\t\t * the early bootloader to come up on non-default\n> +\t\t\t * SPI NOR memory during boot. Limit accessible\n> +\t\t\t * size to 16MiB.\n> +\t\t\t */\n> +\t\t\tnor->addr_width = 3;\n> +\t\t\tmtd->size = 0x1000000;\n> +\t\t\tdev_info(dev, \"Force 3B addressing mode\\n\");\n\nI'd append \"limiting access to first 16MiB\" .. because otherwise\npeople will wonder where their flash went.\n\t\t\t\t\t\t\t\t\tPavel","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"PCAgS77R\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xmFbb1cMLz9t2c\n\tfor ;\n\tTue, 5 Sep 2017 02:26:35 +1000 (AEST)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1douCk-0000Pi-Mh; Mon, 04 Sep 2017 16:26:30 +0000","from atrey.karlin.mff.cuni.cz ([195.113.26.193])\n\tby bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux))\n\tid 1douCb-00009h-T4; Mon, 04 Sep 2017 16:26:27 +0000","by atrey.karlin.mff.cuni.cz (Postfix, from userid 512)\n\tid 3570F824AE; Mon, 4 Sep 2017 18:26:03 +0200 (CEST)"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:Content-Type:Cc:\n\tList-Subscribe:List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:\n\tIn-Reply-To:MIME-Version:References:Message-ID:Subject:To:From:Date:Reply-To:\n\tContent-Transfer-Encoding:Content-ID:Content-Description:Resent-Date:\n\tResent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner;\n\tbh=9yC8T3DVWvP4gyrd3zy73HIpzV6FMuUcjcojh0Hft3o=;\n\tb=PCAgS77Rr2tvYVC9RIrlgPc6r\n\t/CogFbz5GM5NBe+mbf5IgBBAzWrWBxz6sd2dDibz9bQaBZA5kQOF/ZcLMeLd5dN30im/kEcNL9mXQ\n\t/5ilu1enti+Q/T8Xs6oPzF76ArkFI0JOSlr1t3D5i+QmKjbuGAeXkcx8/sgWWH5n59Hg6U1NVHXCz\n\tj4BDrhV1+obstkJJvzmlrtHLoIBQ3EYmqxEKFDwYh8WMefAdCFkTm+jLuGTm+HDwJ8eOSKf08Q6nP\n\trPIm5SKK4Rz5aIzH8x5Ay2Ees2NLwZX/pSNBNB+slgZNlKm8Tr3TkncyeLomQcMBieJzEOHgHsHUi\n\twNU5FmTtg==;","Date":"Mon, 4 Sep 2017 18:26:02 +0200","From":"Pavel Machek ","To":"Marcin Wojtas ","Subject":"Re: [PATCH 1/2] mtd: spi-nor: add an option to force 3byte adressing\n\tmode","Message-ID":"<20170904162602.GC21849@amd>","References":"<1503954854-30963-1-git-send-email-mw@semihalf.com>\n\t<1503954854-30963-2-git-send-email-mw@semihalf.com>","MIME-Version":"1.0","In-Reply-To":"<1503954854-30963-2-git-send-email-mw@semihalf.com>","User-Agent":"Mutt/1.5.23 (2014-03-12)","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170904_092622_734466_FEB49327 ","X-CRM114-Status":"GOOD ( 13.48 )","X-Spam-Score":"-4.2 (----)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-4.2 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/,\n\tmedium trust [195.113.26.193 listed in list.dnswl.org]\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"mark.rutland@arm.com, thomas.petazzoni@free-electrons.com,\n\tjaz@semihalf.com, \n\tbroonie@kernel.org, omrii@marvell.com, will.deacon@arm.com,\n\tlinux-kernel@vger.kernel.org, linux-spi@vger.kernel.org,\n\tnadavh@marvell.com, marek.vasut@gmail.com, robh+dt@kernel.org,\n\tlinux-mtd@lists.infradead.org, \n\tcyrille.pitchen@wedev4u.fr, gregory.clement@free-electrons.com,\n\tneta@marvell.com, hannah@marvell.com,\n\tlinux-arm-kernel@lists.infradead.org, tn@semihalf.com","Content-Type":"multipart/mixed;\n\tboundary=\"===============4616039759673541431==\"","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}}]