[{"id":3685498,"web_url":"http://patchwork.ozlabs.org/comment/3685498/","msgid":"<0abcf804-f16f-43b6-a345-e14642e54718@kaod.org>","list_archive_url":null,"date":"2026-05-04T05:27:37","subject":"Re: [PATCH v6 00/11] hw/usb/ehci: Add 64-bit descriptor addressing\n support","submitter":{"id":68548,"url":"http://patchwork.ozlabs.org/api/people/68548/","name":"Cédric Le Goater","email":"clg@kaod.org"},"content":"On 5/4/26 04:53, Jamin Lin wrote:\n> EHCI supports 64-bit addressing through the CTRLDSSEGMENT register,\n> which provides the upper 32 bits of descriptor addresses when the\n> controller advertises 64-bit capability.\n> \n> Currently QEMU EHCI model only partially supports this functionality and\n> descriptor addresses are effectively treated as 32-bit. This becomes\n> problematic on systems where system memory is located above the 4GB\n> boundary.\n> \n> The Linux EHCI driver enables 64-bit addressing if the controller\n> advertises the capability. During initialization it programs the\n> segment register to zero:\n> \n> https://github.com/torvalds/linux/blob/master/drivers/usb/host/ehci-hcd.c#L600\n> \n> The driver also notes that descriptor structures allocated from the\n> DMA pool use segment zero semantics. Descriptor memory is allocated\n> using the DMA API and platforms may configure a 64-bit DMA mask,\n> allowing descriptor memory to be placed above 4GB.\n> \n> On AST2700 platforms, system DRAM is mapped at 0x400000000. As a\n> result, descriptor addresses constructed directly from the EHCI\n> registers do not match the actual system addresses used by the\n> controller when accessing queue heads (QH) and queue element transfer\n> descriptors (qTD).\n> \n> This patch series implements full 64-bit descriptor addressing support\n> in the EHCI emulation. Descriptor address handling is updated to use\n> 64-bit values and the descriptor structures (QH, qTD, iTD and siTD)\n> are extended to support the upper address bits provided by the segment\n> register.\n> \n> Add a ctrldssegment-default property so platforms can provide a\n> descriptor address offset when constructing descriptor addresses.\n> This allows systems where DRAM resides above 4GB to access EHCI\n> descriptors correctly.\n> \n> The AST2700 machine uses this property to account for its DRAM mapping\n> at 0x400000000 and enables 64-bit EHCI DMA addressing.\n> \n> Test Result:\n> 1. EHCI 32bits with ast2600-evb machine\n> Command line:\n> ./build/qemu-system-arm \\\n> -machine ast2600-evb \\\n> -m 1G \\\n> -drive file=image-bmc,if=mtd,format=raw \\\n> -nographic \\\n> -device usb-kbd,bus=usb-bus.1,id=mykbd \\\n> -drive id=usbdisk,if=none,file=image0.ext4,format=raw \\\n> -device usb-storage,bus=usb-bus.1,id=mystorage,drive=usbdisk\n> -snapshot \\\n> -nographic\n> Result:\n> unable to initialize usb specBus 001 Device 001: ID 1d6b:0002 Linux 6.18.3-v00.08.01-g172b7e27a30d ehci_hcd EHCI Host Controller\n> Bus 001 Device 002: ID 0627:0001 QEMU QEMU USB Keyboard\n> Bus 001 Device 003: ID 46f4:0001 QEMU QEMU USB HARDDRIVE\n> Bus 002 Device 001: ID 1d6b:0001 Linux 6.18.3-v00.08.01-g172b7e27a30d uhci_hcd Generic UHCI Host Controller\n> \n> 2. EHCI 64bits with ast2700a2-evb machine\n> Command line:\n> ./build/qemu-system-aarch64 -M ast2700a2-evb -nographic\\\n> -bios ast27x0_bootrom.bin \\\n> -drive file=image-bmc,format=raw,if=mtd \\\n> -snapshot \\\n> -device usb-kbd,bus=usb-bus.3,id=mykbd \\\n> -drive id=usbdisk,if=none,file=image0.ext4,format=raw \\\n> -device usb-storage,bus=usb-bus.3,id=mystorage,drive=usbdisk\n> Result:\n> root@ast2700-default:~# lsusb\n> unable to initialize usb specBus 001 Device 001: ID 1d6b:0001 Linux 6.18.3-v00.08.01-g172b7e27a30d uhci_hcd Generic UHCI Host Controller\n> Bus 002 Device 001: ID 1d6b:0002 Linux 6.18.3-v00.08.01-g172b7e27a30d ehci_hcd EHCI Host Controller\n> Bus 002 Device 002: ID 0627:0001 QEMU QEMU USB Keyboard\n> Bus 002 Device 003: ID 46f4:0001 QEMU QEMU USB HARDDRIVE\n> \n> v1\n> 1. Fix checkpatch coding style issues\n> 2. Implement 64-bit addressing for QH/qTD/iTD/siTD descriptors\n> 3. Add descriptor address offset property\n> 4. Enable 64-bit EHCI DMA addressing on AST2700\n> 5. Configure descriptor address offset for AST2700\n> \n> v2\n> 1. Remove unused EHCIfstn structure and dead code\n> 2. Replace fprintf(stderr, ...) with qemu_log_mask(LOG_GUEST_ERROR)\n> 3. Replace DPRINTF debug logs with trace events\n> 4. Add functional tests for USB EHCI on AST2600 and AST2700 A1/A2\n> 5. Fix review issue\n> \n> v3:\n> 1. Add Migration version test function\n> 2. Add EHCI 64-bit buffer pointer fields description in commit log\n> \n> v4:\n> 1. Reorder patches in the series\n> 2. Fix EHCI migration issues\n> 3. Introduce a common properties macro for both sysbus and PCI\n> 4. Drop the descriptor address offset property\n> 5. Add ctrldssegment-default property\n> 6. Address review comments\n> \n> v5:\n> 1. Add 11.0 machine compatibility properties\n> \n> v6:\n> 1. Update reviewer suggested improvements.\n> \n> Jamin Lin (11):\n> tests/functional/arm/test_aspeed_ast2600_sdk: Add USB EHCI test for\n> AST2600 SDK\n> hw/usb/hcd-ehci: Change descriptor addresses to 64-bit with migration\n> compatibility\n> hw/usb/hcd-ehci: Add property to advertise 64-bit addressing\n> capability\n> hw/usb/hcd-ehci: Implement 64-bit QH descriptor addressing\n> hw/usb/hcd-ehci: Implement 64-bit qTD descriptor addressing\n> hw/usb/hcd-ehci: Implement 64-bit iTD descriptor addressing\n> hw/usb/hcd-ehci: Implement 64-bit siTD descriptor addressing\n> hw/usb/hcd-ehci: Add ctrldssegment-default property\n> hw/arm/aspeed_ast27x0: Set EHCI ctrldssegment-default\n> hw/arm/aspeed_ast27x0: Enable 64-bit EHCI DMA addressing\n> tests/functional/aarch64/test_aspeed_ast2700: Add USB EHCI test for\n> AST2700 A1/A2\n> \n> hw/usb/hcd-ehci.h | 29 +++-\n> hw/arm/aspeed_ast27x0.c | 5 +\n> hw/core/machine.c | 5 +-\n> hw/usb/hcd-ehci.c | 162 +++++++++++++-----\n> hw/usb/trace-events | 26 +--\n> .../aarch64/test_aspeed_ast2700a1.py | 7 +\n> .../aarch64/test_aspeed_ast2700a2.py | 7 +\n> .../functional/arm/test_aspeed_ast2600_sdk.py | 7 +\n> 8 files changed, 185 insertions(+), 63 deletions(-)\n> \n\nApplied to\n\n https://github.com/legoater/qemu aspeed-next\n\nPlease base future contributions on this branch.\n\nThanks,\n\nC.","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kaod.org header.i=@kaod.org header.a=rsa-sha256\n header.s=ovhmo393970-selector1 header.b=PSG1kKWx;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)","garm.ovh; auth=pass\n (GARM-98R002f6cc7758-4e17-4e0f-a32e-5039ca775709,\n 6CC5FA71F9BBCB93EEE0D9DCB002DEB149E91A90) smtp.auth=clg@kaod.org"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g89DL3jYYz1yJV\n\tfor ; Mon, 04 May 2026 15:28:48 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wJlqP-0001AT-RQ; Mon, 04 May 2026 01:27:49 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from ) id 1wJlqN-00019h-Uo\n for qemu-devel@nongnu.org; Mon, 04 May 2026 01:27:48 -0400","from 7.mo533.mail-out.ovh.net ([54.36.140.182])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from ) id 1wJlqJ-0000P4-Ts\n for qemu-devel@nongnu.org; Mon, 04 May 2026 01:27:47 -0400","from director3.derp.mail-out.ovh.net\n (director3.derp.mail-out.ovh.net [152.228.215.222])\n by mo533.mail-out.ovh.net (Postfix) with ESMTPS id 4g89C00PKyz5wNd;\n Mon, 4 May 2026 05:27:40 +0000 (UTC)","from director3.derp.mail-out.ovh.net\n (director3.derp.mail-out.ovh.net. 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