[{"id":3685175,"web_url":"http://patchwork.ozlabs.org/comment/3685175/","msgid":"<20260501164219.GA490400@bhelgaas>","list_archive_url":null,"date":"2026-05-01T16:48:29","subject":"Re: [PATCH 0/4] PCI: dwc: designware-plat: Use common mode field in\n struct dw_pcie","submitter":{"id":67298,"url":"http://patchwork.ozlabs.org/api/people/67298/","name":"Bjorn Helgaas","email":"helgaas@kernel.org"},"content":"[cc: xrobh->robh@kernel.org]\n\nOn Sat, May 02, 2026 at 12:10:06AM +0800, Hans Zhang wrote:\n> Several DesignWare PCIe controller drivers (dra7xx, artpec6,\n> designware-plat, and keembay) duplicated the device mode field\n> in their private structures, while struct dw_pcie already contains\n> this field. This led to:\n> 1. Data redundancy and potential inconsistencies\n> 2. Increased maintenance complexity\n> 3. Error-prone device type checks\n> \n> This series fixes these issues by:\n> - Removing redundant mode fields from all four drivers\n> - Standardizing on dw_pcie->mode for device type detection\n> - Simplifying conditional logic in probe/suspend/resume paths\n> - Ensuring consistent error reporting\n> \n> The changes improve code maintainability and eliminate class of bugs\n> related to mode synchronization.\n> \n> Hans Zhang (4):\n> PCI: dra7xx: Use common mode field in struct dw_pcie\n> PCI: artpec6: Use common mode field in struct dw_pcie\n> PCI: dwc: Use common mode field in struct dw_pcie\n> PCI: keembay: Use common mode field in struct dw_pcie\n> \n> drivers/pci/controller/dwc/pci-dra7xx.c | 11 +++++------\n> drivers/pci/controller/dwc/pcie-artpec6.c | 9 ++++-----\n> drivers/pci/controller/dwc/pcie-designware-plat.c | 7 +++----\n> drivers/pci/controller/dwc/pcie-keembay.c | 9 ++++-----\n> 4 files changed, 16 insertions(+), 20 deletions(-)\n\nThanks for doing this!\n\nReviewed-by: Bjorn Helgaas ","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=CtbMc8WP;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; helo=sea.lore.kernel.org;\n envelope-from=linux-pci+bounces-53593-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=\"CtbMc8WP\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=10.30.226.201"],"Received":["from sea.lore.kernel.org (sea.lore.kernel.org\n [IPv6:2600:3c0a:e001:db::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g6cSV2zjMz1yHZ\n\tfor ; Sat, 02 May 2026 02:48:58 +1000 (AEST)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sea.lore.kernel.org (Postfix) with ESMTP id CF63F3009CF6\n\tfor ; Fri, 1 May 2026 16:48:34 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 80C7A413237;\n\tFri, 1 May 2026 16:48:33 +0000 (UTC)","from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org\n [10.30.226.201])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 2B6083F0AB0;\n\tFri, 1 May 2026 16:48:31 +0000 (UTC)","by smtp.kernel.org (Postfix) with ESMTPSA id 294D1C2BCC4;\n\tFri, 1 May 2026 16:48:31 +0000 (UTC)"],"ARC-Seal":"i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1777654112; cv=none;\n b=JDWJlOMHpNoo62T055uBPYe5yHnxNLQju/B532WFJwxHlG57F6d8zptGr08eyTQV+evBKDkzUtWxSvwdhtne1Pu2YVNh6ngR/8gkSuAZwLoYTrKJ73NJqRiPGnMTNHtlJmNqMeRJyxS3mbcJQk4VfQhFmIEJnZQ46kxPXUcwzeg=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1777654112; c=relaxed/simple;\n\tbh=AWm5k5rh61c8sKLm/bJ/DwjxxxfErE0vjMIsl1WJGZk=;\n\th=Date:From:To:Cc:Subject:Message-ID:MIME-Version:Content-Type:\n\t Content-Disposition:In-Reply-To;\n b=QehB9pHTCvlVbP4w22OIY59SG3Iy2SdnwZ/MDkvQWSmjTscKgkJEtilKlxvMPMwjkP5teI1wEcOeb9/vUSwmfWYze+A9ecmPcjIBEx/qBbjfkilVkPtGsfRyjwQ1K4ii0eNqX2vCjeGB+4Ggenne5fq5ivQ4r+NzitjAAlUHAD0=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=CtbMc8WP; arc=none smtp.client-ip=10.30.226.201","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n\ts=k20201202; t=1777654111;\n\tbh=AWm5k5rh61c8sKLm/bJ/DwjxxxfErE0vjMIsl1WJGZk=;\n\th=Date:From:To:Cc:Subject:In-Reply-To:From;\n\tb=CtbMc8WPNwDkH6/w15y7nRb2KmHvbc7kk0s0FYg/ocfwUlDQzcNK+LIlANXpEGrED\n\t cKqKUySfiRd8ClEZeUyvG9qXyRS8Kr1UyX2BNWFEgvBENizmC9+dg8KWdw6a+NSVoH\n\t EzqlYeDb0C3lEbkQICIgsMf7BmHL6ru7D83eesWzLQvPxJexl64qcqozfOM1LeHGBY\n\t HMzRGVeLaGTeJn4Y2ZDKydcwYL+e5AR3amOElaVMgWOvGvVmFU5pOS628K7btkGsCK\n\t Bbe+nXJlpjE1SK72dUvdZ2vgjGm6wVaIQ1p5d3GRwXVKpZj+T8bKcs33GaumQ8Yy4Q\n\t cwLEb5hW8lJEA==","Date":"Fri, 1 May 2026 11:48:29 -0500","From":"Bjorn Helgaas ","To":"Hans Zhang <18255117159@163.com>","Cc":"lpieralisi@kernel.org, kwilczynski@kernel.org, bhelgaas@google.com,\n\tjingoohan1@gmail.com, mani@kernel.org, vigneshr@ti.com,\n\tRob Herring , linux-pci@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org","Subject":"Re: [PATCH 0/4] PCI: dwc: designware-plat: Use common mode field in\n struct dw_pcie","Message-ID":"<20260501164219.GA490400@bhelgaas>","Precedence":"bulk","X-Mailing-List":"linux-pci@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20260501161010.71688-1-18255117159@163.com>"}}]