[{"id":3684361,"web_url":"http://patchwork.ozlabs.org/comment/3684361/","msgid":"","list_archive_url":null,"date":"2026-04-30T00:24:44","subject":"Re: [PATCH v3 00/47] target/arm: Implement FEAT_FP8","submitter":{"id":93152,"url":"http://patchwork.ozlabs.org/api/people/93152/","name":"Pierrick Bouvier","email":"pierrick.bouvier@oss.qualcomm.com"},"content":"On 4/29/2026 5:19 PM, Richard Henderson wrote:\n> Based-on: 20260430000524.56046-1-richard.henderson@linaro.org\n> (\"[PATCH v2 00/40] fpu: Export some internals for targets\")\n> \n> v2: https://lore.kernel.org/qemu-devel/20260424043014.46305-1-richard.henderson@linaro.org/\n> \n> Changes for v3:\n> - Rebase on softfloat-parts.h, which allows us to drop some\n> local changes to fpu/.\n> - Enable ID_AA64FPFR0.F8{E5M2,E4M3}.\n> - Implement FEAT_SME_LUTv2.\n> - Implement FEAT_FP8FMA, FEAT_SSVE_FP8FMA.\n> \n> I still haven't addressed the required firmware update for\n> \n> tests/functional/aarch64/test_rme_virt.py\n> tests/functional/aarch64/test_rme_sbsaref.py\n>\n\nFeel free to send me the needed TF-A (and TF-RMM if needed) patches, and\nI'll apply this, and send you update url for assets.\n\nRegards,\nPierrick","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=KHRPdymN;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=HGFunM0Q;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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