[{"id":3678853,"web_url":"http://patchwork.ozlabs.org/comment/3678853/","msgid":"","list_archive_url":null,"date":"2026-04-17T18:23:02","subject":"Re: [PATCH 0/9] bitfield: add FIELD_GET_SIGNED()","submitter":{"id":46495,"url":"http://patchwork.ozlabs.org/api/people/46495/","name":"Andy Shevchenko","email":"andriy.shevchenko@intel.com"},"content":"On Fri, Apr 17, 2026 at 01:36:11PM -0400, Yury Norov wrote:\n> The bitfields are designed in assumption that fields contain unsigned\n> integer values, thus extracting the values from the field implies\n> zero-extending.\n> \n> Some drivers need to sign-extend their fields, and currently do it like:\n> \n> \tdc_re += sign_extend32(FIELD_GET(0xfff000, tmp), 11);\n> \tdc_im += sign_extend32(FIELD_GET(0xfff, tmp), 11);\n> \n> It's error-prone because it relies on user to provide the correct\n> index of the most significant bit.\n> \n> This series adds a signed version of FIELD_GET(), which is the more\n> convenient and compiles (on x86_64) to just a couple instructions:\n> shl and sar.\n> \n> Patch #1 adds FIELD_GET_SIGNED(), and the rest of the series applies it\n> tree-wide.\n\nHere the example is missing.\n\nNevertheless, I looked at the implementation a bit and wondering how would it\nwork for 64-bit mask of say GENMASK_ULL(63, 60)? Wouldn't it give an overflow?","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-rtc@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=NeubjtwS;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c04:e001:36c::12fc:5321; helo=tor.lore.kernel.org;\n envelope-from=linux-rtc+bounces-6370-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com\n header.b=\"NeubjtwS\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=192.198.163.7","smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=intel.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=intel.com"],"Received":["from tor.lore.kernel.org (tor.lore.kernel.org\n [IPv6:2600:3c04:e001:36c::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fy3D45R1Jz1yDF\n\tfor ; Sat, 18 Apr 2026 04:23:32 +1000 (AEST)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby tor.lore.kernel.org (Postfix) with ESMTP id 87CEB303EFCF\n\tfor ; Fri, 17 Apr 2026 18:23:29 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 751653C6600;\n\tFri, 17 Apr 2026 18:23:19 +0000 (UTC)","from mgamail.intel.com (mgamail.intel.com [192.198.163.7])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 27FC834EF03;\n\tFri, 17 Apr 2026 18:23:13 +0000 (UTC)","from orviesa007.jf.intel.com ([10.64.159.147])\n by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 17 Apr 2026 11:23:13 -0700","from hrotuna-mobl2.ger.corp.intel.com (HELO localhost)\n ([10.245.245.78])\n by orviesa007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 17 Apr 2026 11:23:03 -0700"],"ARC-Seal":"i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1776450199; cv=none;\n b=cSQ+uSSgfrMkuLQXXhRGEkOYGztxcvvJRpcgprgH7/Rseo+eso7ZwIHEoQl8U80bfH45Jttr8v+5bmsbcTqpDx/mfabaEWkyCJMCgfAPewWu4UGWBuf9OfY95h0h/tEN1gkKAvETi2oZ2XMxRr4bDBpYjMSRAQ2una9Jg1KAo/s=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1776450199; c=relaxed/simple;\n\tbh=MVZDuYa3KkkMxVmkRpVZdc6FtKg37CpLVbjbacBMFao=;\n\th=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version:\n\t Content-Type:Content-Disposition:In-Reply-To;\n b=J1MJ3HhuTvdkAbNv7ZI/kipTT1FfplIVv4RzauNyN6iw5uYH4lhgGVLtuy032NM26xvLbdGajRFmNdhn6RjWu4E5XYmdJmoP0po3NlY5FgMo12kzrH0BTSz1m5sqf6eC7Zqx2R2M7Nw/DC6AnXKnWiD/h+px4w1fS7O0wgJ5ayI=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=intel.com;\n spf=pass smtp.mailfrom=intel.com;\n dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com\n header.b=NeubjtwS; arc=none smtp.client-ip=192.198.163.7","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1776450195; x=1807986195;\n h=date:from:to:cc:subject:message-id:references:\n mime-version:in-reply-to;\n bh=MVZDuYa3KkkMxVmkRpVZdc6FtKg37CpLVbjbacBMFao=;\n b=NeubjtwSfX5NFzM5S0VuP+IB+WtqYINGGpUeBI5jq86vUYqzUDLIOAkl\n bzXnk2TjtSm4zLUdbqly+BbrfVj3fknpKDVA/vMY+WT8ijaEHTLb/G4zD\n HKfwID/Q38f5mnEDj9J40Q4hTfsepd18yRBoKNyXR+QO2E4dyFRaouYDM\n cHViCaTRT56ZzzGuhBukF2htuUghTwsb0YlrbkSR51JNth0j+ZjAXvwtw\n /rrUA3gpTAhukFXTHtG/ZBCAeJ021C3tiOu1mZt70/urJS1lZ8ES0/vyM\n 0+Fx+QMnpb6lmLxLSVzfVgBhOPo5TYG6HucntFByp3lzmCwLCPs1+00hs\n A==;","X-CSE-ConnectionGUID":["s7pY2z+iQyOkqaS6oiknvg==","0seW7lPKRH6LPo/atTzGbg=="],"X-CSE-MsgGUID":["N+H6dAjNRyK6N7NKNmpODA==","kWw5IYGsRSyZql6XwHmZ+g=="],"X-IronPort-AV":["E=McAfee;i=\"6800,10657,11762\"; a=\"102931943\"","E=Sophos;i=\"6.23,184,1770624000\";\n d=\"scan'208\";a=\"102931943\"","E=Sophos;i=\"6.23,184,1770624000\";\n d=\"scan'208\";a=\"231376986\""],"X-ExtLoop1":"1","Date":"Fri, 17 Apr 2026 21:23:02 +0300","From":"Andy Shevchenko ","To":"Yury Norov ","Cc":"Thomas Gleixner , Ingo Molnar ,\n Borislav Petkov , Dave Hansen ,\n x86@kernel.org, \"H. Peter Anvin\" ,\n Andy Lutomirski , Peter Zijlstra ,\n Jonathan Cameron , David Lechner ,\n Nuno =?iso-8859-1?q?S=E1?= ,\n Andy Shevchenko , Ping-Ke Shih ,\n Richard Cochran ,\n Andrew Lunn , \"David S. Miller\" ,\n Eric Dumazet , Jakub Kicinski ,\n Paolo Abeni ,\n Alexandre Belloni ,\n Yury Norov ,\n Rasmus Villemoes ,\n Hans de Goede , Linus Walleij ,\n Sakari Ailus ,\n Salah Triki , Achim Gratz ,\n Ben Collins , linux-kernel@vger.kernel.org,\n linux-iio@vger.kernel.org, linux-wireless@vger.kernel.org,\n netdev@vger.kernel.org, linux-rtc@vger.kernel.org","Subject":"Re: [PATCH 0/9] bitfield: add FIELD_GET_SIGNED()","Message-ID":"","References":"<20260417173621.368914-1-ynorov@nvidia.com>","Precedence":"bulk","X-Mailing-List":"linux-rtc@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20260417173621.368914-1-ynorov@nvidia.com>","Organization":"Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6\n krs, Bertel Jungin Aukio 5, 02600 Espoo"}},{"id":3678865,"web_url":"http://patchwork.ozlabs.org/comment/3678865/","msgid":"","list_archive_url":null,"date":"2026-04-17T19:21:39","subject":"Re: [PATCH 0/9] bitfield: add FIELD_GET_SIGNED()","submitter":{"id":92516,"url":"http://patchwork.ozlabs.org/api/people/92516/","name":"Yury Norov","email":"ynorov@nvidia.com"},"content":"On Fri, Apr 17, 2026 at 09:23:02PM +0300, Andy Shevchenko wrote:\n> On Fri, Apr 17, 2026 at 01:36:11PM -0400, Yury Norov wrote:\n> > The bitfields are designed in assumption that fields contain unsigned\n> > integer values, thus extracting the values from the field implies\n> > zero-extending.\n> > \n> > Some drivers need to sign-extend their fields, and currently do it like:\n> > \n> > \tdc_re += sign_extend32(FIELD_GET(0xfff000, tmp), 11);\n> > \tdc_im += sign_extend32(FIELD_GET(0xfff, tmp), 11);\n> > \n> > It's error-prone because it relies on user to provide the correct\n> > index of the most significant bit.\n> > \n> > This series adds a signed version of FIELD_GET(), which is the more\n> > convenient and compiles (on x86_64) to just a couple instructions:\n> > shl and sar.\n> > \n> > Patch #1 adds FIELD_GET_SIGNED(), and the rest of the series applies it\n> > tree-wide.\n> \n> Here the example is missing.\n\nThis series is full of examples... I'll add one here if you prefer, if\nit comes to v2.\n \n> Nevertheless, I looked at the implementation a bit and wondering how would it\n> work for 64-bit mask of say GENMASK_ULL(63, 60)? Wouldn't it give an overflow?\n\nIn that case, the '<< __builtin_clzll(mask)' part becomes a NOP, and\nthe compiler only emits a single sar:\n\n long long foo(long long reg)\n {\n 10: f3 0f 1e fa endbr64\n return FIELD_GET_SIGNED(GENMASK_ULL(63, 60), reg);\n 14: 48 89 f8 mov %rdi,%rax\n 17: 48 c1 f8 3c sar $0x3c,%rax\n }\n\nJust tested it with a real kernel build with gcc-15.2, and it works as\nintended.","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-rtc@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=Nvidia.com header.i=@Nvidia.com header.a=rsa-sha256\n header.s=selector2 header.b=sSp/DMkn;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.232.135.74; helo=sto.lore.kernel.org;\n envelope-from=linux-rtc+bounces-6372-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com\n header.b=\"sSp/DMkn\"","smtp.subspace.kernel.org;\n arc=fail smtp.client-ip=52.101.48.34","smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=nvidia.com","smtp.subspace.kernel.org;\n spf=fail smtp.mailfrom=nvidia.com","dkim=none (message not signed)\n header.d=none;dmarc=none action=none header.from=nvidia.com;"],"Received":["from sto.lore.kernel.org (sto.lore.kernel.org [172.232.135.74])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fy4WQ0kDLz1yDF\n\tfor ; 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Peter Anvin\" ,\n Andy Lutomirski , Peter Zijlstra ,\n Jonathan Cameron , David Lechner ,\n Nuno =?iso-8859-1?q?S=E1?= ,\n Andy Shevchenko , Ping-Ke Shih ,\n Richard Cochran ,\n Andrew Lunn , \"David S. Miller\" ,\n Eric Dumazet , Jakub Kicinski ,\n Paolo Abeni ,\n Alexandre Belloni ,\n Yury Norov ,\n Rasmus Villemoes ,\n Hans de Goede , Linus Walleij ,\n Sakari Ailus ,\n Salah Triki , Achim Gratz ,\n Ben Collins , linux-kernel@vger.kernel.org,\n linux-iio@vger.kernel.org, linux-wireless@vger.kernel.org,\n netdev@vger.kernel.org, linux-rtc@vger.kernel.org","Subject":"Re: [PATCH 0/9] bitfield: add FIELD_GET_SIGNED()","Message-ID":"","References":"<20260417173621.368914-1-ynorov@nvidia.com>\n ","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"","X-ClientProxiedBy":"BN9PR03CA0087.namprd03.prod.outlook.com\n (2603:10b6:408:fc::32) To CY8PR12MB8300.namprd12.prod.outlook.com\n (2603:10b6:930:7d::16)","Precedence":"bulk","X-Mailing-List":"linux-rtc@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","X-MS-PublicTrafficType":"Email","X-MS-TrafficTypeDiagnostic":"CY8PR12MB8300:EE_|SJ1PR12MB6050:EE_","X-MS-Office365-Filtering-Correlation-Id":"4d447593-d8ac-41d9-44fb-08de9cb68e2d","X-MS-Exchange-SenderADCheck":"1","X-MS-Exchange-AntiSpam-Relay":"0","X-Microsoft-Antispam":"\n\tBCL:0;ARA:13230040|1800799024|366016|376014|7416014|10070799003|22082099003|56012099003|18002099003;","X-Microsoft-Antispam-Message-Info":"\n\tjYwD8NENaarZK6KJ/e1Hb3OT/hKCkDWw4eR5C9LNNh1fNZ26XHBHWikWLbucVRtPf8p45xsg2gVkbOlo4PLXvckg9VhxZPD5lqDnTlj6zqQNhBcLdIhmv+6g7UJV2s6ncLon9oSt5/uC7WxjwlhRDNk7od1u0r0VlRczo1fJ86CUYj4IpxPJieu3tKiQphSd2SELoqrx/wYwAspJFREI4sfKaEmhRQ2fnJLv8kY/YOzHCSuZBckIFp1+qpp2bN7PnJw2GmaI1i/IdLxcLFkZnPpY/gftP3rQGZIer1TzaVuV35gMjgEQiJW13uLwLGMSuMQqEDoSODms0Qydb5dhl5K3TypT4aEQCZSblU+W2g6CvvqM2ltrYvn/pNSCyoOmH1yUL8RzJX5pu7eLNSc2dPQXk0LVbz1I3xkKzUi0usx35JA1JrY/OSVxeTGOfEM94QS8o+X7GTZU1kIE7HMmoqMaveKBHdS58cWO9zu67QVccmbVkY3uhX643KL5O/JRAc0jTApkieiRy+zCyMo8YUDQwGv0hlHIr5wkex6lUojnFD9Tw+qvt2nUeCkXw4xtzedoQVhCGZy6Kd6fAaCWeqWfL0kU0b583axWqQjHLDExjU5wF7OvD635OH0H0+QY80uOfkwpiZ5Ci8eKCeh4mifMqRTYeKsTUBxHt5BUk6+aR4f+pFS/TMmCxMUjqOTzSqgyCnbyO/OqvvensNT+zwFpWeTdYMmXFlTzyq6jhNU=","X-Forefront-Antispam-Report":"\n\tCIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:CY8PR12MB8300.namprd12.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(1800799024)(366016)(376014)(7416014)(10070799003)(22082099003)(56012099003)(18002099003);DIR:OUT;SFP:1101;","X-MS-Exchange-AntiSpam-MessageData-ChunkCount":"1","X-MS-Exchange-AntiSpam-MessageData-0":"\n a1PJ/1EF6spCTg/rA8BMEsXHE6tAk1bWhhzB++Z3LQuAoqJ373/nUNUsAzQ19VkjXTrImh7R1KXWQbkZGj7ifPh5j4+V+/kByLsL3YCBJszKpVZwln5r4cCxMSbD1LgZe+zXpj7U609xB9pOrx0QCfZd+APFxZUX5twi7JSSwPlpArLA/mMzHp9e/pWrQ/Kf7NwfgCOeIgfoN1e2CaVms4OGEQnUqcfD2TXhY8LqWBjFQfoOhgzYn+aSkcXcoZbUBVpwRbmL5jM/9NDNLXLMKyPTknNe/uYgqMX2wC7ylw1dz22rKhdyS92tyILQ3sYbCuqY0xvrSM4iF05s2/Ek4/yY+b23sQKFnsJb5pv0ETte4rLhi6o4b8U0tkmQiTm57DhOWdU2Kupl51PsR0OQ5GGgIc1B/OeB2rINaamSWd7AQEDT9bZgtzzsRv63PWjZw7e4DwTd1IjtLYGd9qZUfD0YjCMnOAuo2vrgTCcI438HdisBTgEbh5yDNFnpyhMsnRGgCpww/Z1dPUpUt/pe6QJ4kPgN+doL9qX93kWvl0w37ofWTXDSLnUQk6DJAYL+O+vQ6CEtbbwtrzs3HD3mMpRWXEnek8Sp2V5op7anQpr8BvTnOyl7NOOIqjQZfnHQNBVSW8bXS0LXf8HixRCBmlzjahckM9WAN81aZU/8xZBrOAuDQoLXRAAiQz8KhiIcvLt1+BkW5Aa/29tF3zu2lSkfJH3laKeU98znpr/Nf3o/yh8qPyH186ERoLvOM6F8LRT8OzGyfTPhZEw3XfAnzaInSoIkkUdQeKtyeQM5sgDFaO+I6kdH32/bFg5sXpQNjLCbvFiueEtcgkHULdSUqIzb57nBuamq8p6o7P91IBGKk+lyaVy5ErG3gNIeXjOHgsa/rPKk41ayZa2I920NPBqGKlebCjaPBg3U4+E1h8wDJIcDC0blBo4k/rcu7J55PiwJ/S7TxMmOetMErRHeQEy4viPPSIf1SIBUckQ8TXTYGXmG/CIgZk8aHMHmUCHXSDxh1gemIbDw1ewrZXTY6plIPAyTC67d3JPc/IZ/1HVvU41XuY5isrT17ifj3A6tTejSQgCRS1ZUfD9evYYP8xjqa/IX6mwJJlqFmbxRTta6RRhPsIkle5TPa1pt0vYPJK8FXC798VeWLMLk21qmctZmqIMeILoPQbigwup3UX8HtfsHOGDExS1fPuNfoI2/SQy4m6bhcJ939NfG6sP9TTtN5IWxyaIuNdqVf1yJ403Zlr+hEkCSw4bvCGnyATpE4SIe6L9lnt6tu6Z0HANJJ4FWMWhsb2Gi1n1PjqFWKbkxQ34EiNLaeOjaelRgn3GvgGjdNb0MGo8+xoAfBTSd0WCCs6M5Pf+XlhAs5bxNmd2SlLowUTe/oUkbqkHjYZ9Mn3oFXcU0oUjgAb1WTfRE+DhrQcBffoWnirk3Tp9J4d4A+eBmOvXu9iF4mamX+J7yJuVRvnnvduD7jQXb2scCylTcWJODkOVMTqgbVG8TUvu7uihIeA452vjvl9o4fUMMDQQhHY6xdwn3D8aVcG0TVRAFwHMQgc1PIsmI3vr5e2aNmYXJFbN8aTjslipytZDdt6wu+DDdOkElsPLRC6MwGQMacHCmk4WO2WJyldlMwTWFShjc+1j1cc5AwxQS09C2o6UXeff+eW1dOgwNki4usyxiacctc84bfFja+EH9Q0mkaOt54RMpj5hpgAGp7mtcafpFhiYyMPzZhr4ajGEkjx3IO2jjwPiAo0w5lSpCmAWCnTSvMkIn904q0EqUyAJE","X-OriginatorOrg":"Nvidia.com","X-MS-Exchange-CrossTenant-Network-Message-Id":"\n 4d447593-d8ac-41d9-44fb-08de9cb68e2d","X-MS-Exchange-CrossTenant-AuthSource":"CY8PR12MB8300.namprd12.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Internal","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"17 Apr 2026 19:21:41.7856\n (UTC)","X-MS-Exchange-CrossTenant-FromEntityHeader":"Hosted","X-MS-Exchange-CrossTenant-Id":"43083d15-7273-40c1-b7db-39efd9ccc17a","X-MS-Exchange-CrossTenant-MailboxType":"HOSTED","X-MS-Exchange-CrossTenant-UserPrincipalName":"\n pROpNIe/Llw0c/w0rf6ySASWlx42VjquzYEcSbGxTRVAGQRZYZk7THt0manyt1JS7K007vzxwDZ0Uitg4jhZlg==","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"SJ1PR12MB6050"}}]