[{"id":3674948,"web_url":"http://patchwork.ozlabs.org/comment/3674948/","msgid":"<04dcf4fa-c596-45df-aae9-bd9879b8abc3@linaro.org>","list_archive_url":null,"date":"2026-04-08T19:01:12","subject":"Re: [PATCH v11 14/21] tcg/translator: add parameter to\n translator_loop for current addr type","submitter":{"id":85046,"url":"http://patchwork.ozlabs.org/api/people/85046/","name":"Philippe Mathieu-Daudé","email":"philmd@linaro.org"},"content":"On 8/4/26 17:18, Pierrick Bouvier wrote:\n> On 4/8/26 1:33 AM, Philippe Mathieu-Daudé wrote:\n>> On 8/4/26 00:22, Pierrick Bouvier wrote:\n>>> With TCG_ADDRESS_BITS mechanism, it's now possible to specify which\n>>> variant every source file is written for. Compared to before, it means\n>>> that addr_type will now vary per tb translation, where it was constant\n>>> for a given target previously.\n>>>\n>>> Thus, we add new a parameter to translator_loop().\n>>> This will allow us to convert targets one by one.\n>>>\n>>> Reviewed-by: Richard Henderson \n>>> Signed-off-by: Pierrick Bouvier \n>>> ---\n>>>    include/exec/translator.h        | 4 +++-\n>>>    accel/tcg/translate-all.c        | 1 -\n>>>    accel/tcg/translator.c           | 4 +++-\n>>>    target/alpha/translate.c         | 3 ++-\n>>>    target/arm/tcg/translate-a64.c   | 3 ++-\n>>>    target/arm/tcg/translate.c       | 2 +-\n>>>    target/avr/translate.c           | 3 ++-\n>>>    target/hexagon/translate.c       | 3 ++-\n>>>    target/hppa/translate.c          | 3 ++-\n>>>    target/i386/tcg/translate.c      | 3 ++-\n>>>    target/loongarch/tcg/translate.c | 3 ++-\n>>>    target/m68k/translate.c          | 3 ++-\n>>>    target/microblaze/translate.c    | 3 ++-\n>>>    target/mips/tcg/translate.c      | 3 ++-\n>>>    target/or1k/translate.c          | 3 ++-\n>>>    target/ppc/translate.c           | 3 ++-\n>>>    target/riscv/translate.c         | 3 ++-\n>>>    target/rx/translate.c            | 3 ++-\n>>>    target/s390x/tcg/translate.c     | 3 ++-\n>>>    target/sh4/translate.c           | 3 ++-\n>>>    target/sparc/translate.c         | 3 ++-\n>>>    target/tricore/translate.c       | 3 ++-\n>>>    target/xtensa/translate.c        | 3 ++-\n>>>    23 files changed, 45 insertions(+), 23 deletions(-)\n>>\n>> As per v10:\n>> Reviewed-by: Philippe Mathieu-Daudé \n> \n> I'm surprised it didn't apply, I ran a b4 trailer before sending v11.\n\nb4 fetches from lore.kernel.org which seems to be having issues.\n\n> \n> Regards,\n> Pierrick","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=fT0flxkZ;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=UTF-8; format=flowed","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=2a00:1450:4864:20::435;\n envelope-from=philmd@linaro.org; helo=mail-wr1-x435.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"}},{"id":3675373,"web_url":"http://patchwork.ozlabs.org/comment/3675373/","msgid":"","list_archive_url":null,"date":"2026-04-09T15:51:17","subject":"Re: [PATCH v11 00/21] target/arm: single-binary","submitter":{"id":5111,"url":"http://patchwork.ozlabs.org/api/people/5111/","name":"Peter Maydell","email":"peter.maydell@linaro.org"},"content":"On Tue, 7 Apr 2026 at 23:22, Pierrick Bouvier\n wrote:\n>\n> This series tackles (most of) the rest of target/arm, especially tcg folder.\n>\n> We extract tcg memory operation in a new header, with a new type representing\n> virtual addresses.\n>\n> Initially, I went down the way to have a dynamic definition of TCGv, which\n> required much more boilerplate and runtime checks. After discussing with\n> Richard, I realized it was not needed, and that could simply split 32 and 64 bit\n> properly in different files instead. This approach will not work with other\n> architectures, requiring something else, but it's enough for target/arm.\n>\n> Files left are:\n> - target/arm/tcg/mve_helper.c\n> - target/arm/tcg/m_helper.c\n> - target/arm/tcg/cpu32.c\n>\n> v11\n> ---\n>\n> - update comments\n\nIt looks like this is all fully reviewed, so I've applied it\nto what will become my target-arm queue once 11.1 reopens\nfor development.\n\nthanks\n-- PMM","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=ntv3J2E3;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fs4FL54pjz1xy1\n\tfor ; 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Thu, 09 Apr 2026\n 08:51:28 -0700 (PDT)","MIME-Version":"1.0","References":"<20260407222208.271838-1-pierrick.bouvier@linaro.org>","In-Reply-To":"<20260407222208.271838-1-pierrick.bouvier@linaro.org>","From":"Peter Maydell ","Date":"Thu, 9 Apr 2026 16:51:17 +0100","X-Gm-Features":"AQROBzBjfZ-OKubnGZzZsOsd0PaLIW362ws-YqKyzOItkm-WBeLFuU9c-iQaGh0","Message-ID":"\n ","Subject":"Re: [PATCH v11 00/21] target/arm: single-binary","To":"Pierrick Bouvier ","Cc":"qemu-devel@nongnu.org, philmd@linaro.org, jim.macarthur@linaro.org,\n Paolo Bonzini ,\n Richard Henderson , qemu-arm@nongnu.org","Content-Type":"text/plain; charset=\"UTF-8\"","Received-SPF":"pass client-ip=2607:f8b0:4864:20::1132;\n envelope-from=peter.maydell@linaro.org; helo=mail-yw1-x1132.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"}},{"id":3675374,"web_url":"http://patchwork.ozlabs.org/comment/3675374/","msgid":"","list_archive_url":null,"date":"2026-04-09T15:52:41","subject":"Re: [PATCH v11 00/21] target/arm: single-binary","submitter":{"id":85798,"url":"http://patchwork.ozlabs.org/api/people/85798/","name":"Pierrick Bouvier","email":"pierrick.bouvier@linaro.org"},"content":"On 4/9/26 8:51 AM, Peter Maydell wrote:\n> On Tue, 7 Apr 2026 at 23:22, Pierrick Bouvier\n> wrote:\n>>\n>> This series tackles (most of) the rest of target/arm, especially tcg folder.\n>>\n>> We extract tcg memory operation in a new header, with a new type representing\n>> virtual addresses.\n>>\n>> Initially, I went down the way to have a dynamic definition of TCGv, which\n>> required much more boilerplate and runtime checks. After discussing with\n>> Richard, I realized it was not needed, and that could simply split 32 and 64 bit\n>> properly in different files instead. This approach will not work with other\n>> architectures, requiring something else, but it's enough for target/arm.\n>>\n>> Files left are:\n>> - target/arm/tcg/mve_helper.c\n>> - target/arm/tcg/m_helper.c\n>> - target/arm/tcg/cpu32.c\n>>\n>> v11\n>> ---\n>>\n>> - update comments\n> \n> It looks like this is all fully reviewed, so I've applied it\n> to what will become my target-arm queue once 11.1 reopens\n> for development.\n>\n\nExcellent, thanks Peter!\n\n> thanks\n> -- PMM","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=ETNFJObv;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fs4G43rQxz1xy1\n\tfor ; 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