[{"id":3675062,"web_url":"http://patchwork.ozlabs.org/comment/3675062/","msgid":"","list_archive_url":null,"date":"2026-04-09T03:42:31","subject":"Re: [PATCH v5 0/6] target/riscv: Implement Smsdid and Smmpt extension","submitter":{"id":92265,"url":"http://patchwork.ozlabs.org/api/people/92265/","name":"Chao Liu","email":"chao.liu.zevorn@gmail.com"},"content":"Hi Zhiwei,\n\nOn Wed, Apr 08, 2026 at 10:06:29PM +0800, LIU Zhiwei wrote:\n> This patch set introduces support for the RISC-V Smmpt (Supervisor\n> Memory-tracking and Protection Table) extension. Smmpt provides a\n> hardware mechanism for fine-grained memory protection, checked after\n> address translation, which is particularly useful for supervisor-level\n> sandboxing and security monitoring.\n> \n> The rfc patch set:\n> https://mail.gnu.org/archive/html/qemu-riscv/2025-09/msg00216.html\n> \nMy review comments align with Daniel's, LGTM.\n\nReviewed-by: Chao Liu \n\nThanks,\nChao\n> v4->v5:\n> 1. Rebase to master. \n> v3->v4:\n> 1. Add missing review tags.\n> v2->v3:\n> 1. Fix build error in patch 2.\n> 2. Rebase to master.\n> \n> rfc->v2:\n> 1. When ext_smmpt is false or BARE mode, make other fields in mmpt\n> CSR zero.\n> 2. Add patch 5 to fix smrnmi ISA string order.\n> 3. Fix patch 6 smmpt and smsdid ISA string order.\n> 4. Make smmpt and smsdid experiment extensions.\n> 5. Add review tags.\n> \n> \n> LIU Zhiwei (6):\n> target/riscv: Add basic definitions and CSRs for SMMPT\n> target/riscv: Implement core SMMPT lookup logic\n> target/riscv: Integrate SMMPT checks into MMU and TLB fill\n> target/riscv: Implement SMMPT fence instructions\n> target/riscv: Fix smrnmi isa alphabetical order\n> target/riscv: Enable SMMPT extension\n> \n> target/riscv/cpu.c | 6 +-\n> target/riscv/cpu.h | 9 +-\n> target/riscv/cpu_bits.h | 27 ++\n> target/riscv/cpu_cfg_fields.h.inc | 2 +\n> target/riscv/cpu_helper.c | 81 +++++-\n> target/riscv/csr.c | 95 ++++++\n> target/riscv/insn32.decode | 2 +\n> .../riscv/insn_trans/trans_privileged.c.inc | 30 ++\n> target/riscv/meson.build | 1 +\n> target/riscv/pmp.h | 3 +\n> target/riscv/riscv_smmpt.c | 274 ++++++++++++++++++\n> target/riscv/riscv_smmpt.h | 36 +++\n> 12 files changed, 560 insertions(+), 6 deletions(-)\n> create mode 100644 target/riscv/riscv_smmpt.c\n> create mode 100644 target/riscv/riscv_smmpt.h\n> \n> -- \n> 2.43.0\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=VTOvoLfy;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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