[{"id":3669918,"web_url":"http://patchwork.ozlabs.org/comment/3669918/","msgid":"<20260326192520.GA1337681@bhelgaas>","list_archive_url":null,"date":"2026-03-26T19:25:20","subject":"Re: [PATCH 00/10] PCI: Improve head free space usage","submitter":{"id":67298,"url":"http://patchwork.ozlabs.org/api/people/67298/","name":"Bjorn Helgaas","email":"helgaas@kernel.org"},"content":"[+cc Xifer; thanks very much for reporting and testing!]\n\nOn Tue, Mar 24, 2026 at 06:56:23PM +0200, Ilpo Järvinen wrote:\n> Hi all,\n> \n> This series attempts to take advantage of free head space (the free\n> space before the aligned start address) in order to generally produce a\n> tighter packing of the resources/bridge windows.\n> \n> The recent changes to the resource fitting algorithm caused resource\n> allocation failures in some cases where a bridge window that is sized\n> to be gapless could no longer be assigned. The previous algorithm left\n> a huge gaps which allowed it to place the remainder (non-aligning part\n> of the size) before the start address of used for the gapless fit,\n> whereas the new gapless approach always had to place the remainder\n> after the aligning part of the resources. There is not always space\n> for the remainder triggering those failures (e.g., when the aligning\n> part must be placed at the top of the window).\n> \n> This series attempts to allow placing the remainder once again before\n> the aligning part, but now without leaving huge gaps to retain the\n> benefits of the gapless bridge windows. The approach is somewhat hacky\n> but should work thanks to PCI resources fundamentally consisting only\n> power-of-two atoms.\n> \n> There maybe cases where architecture would not want to do such\n> relocation. This series adds the relocation to arch\n> pcibios_align_resource() functions to allow all of them taking\n> advantage of the better resource packing but if somebody objects doing\n> this relocation for a particular arch, I can remove it, please just let\n> me know (this relocation doesn't seem critical unless there are\n> regressions).\n> \n> Ilpo Järvinen (10):\n> resource: Add __resource_contains_unbound() for internal contains\n> checks\n> resource: Pass full extent of empty space to resource_alignf CB\n> resource: Rename 'tmp' variable to 'full_avail'\n> ARM/PCI: Remove unnecessary second application of align\n> am68k/PCI: Remove unnecessary second application of align\n> MIPS: PCI: Remove unnecessary second application of align\n> parisc/PCI: Cleanup align handling\n> PCI: Rename window_alignment() to pci_min_window_alignment()\n> PCI: Align head space better\n> PCI: Fix alignment calculation for resource size larger than align\n> \n> arch/alpha/kernel/pci.c | 1 +\n> arch/arm/kernel/bios32.c | 9 ++++---\n> arch/m68k/kernel/pcibios.c | 8 +++++--\n> arch/mips/pci/pci-generic.c | 8 ++++---\n> arch/mips/pci/pci-legacy.c | 3 +++\n> arch/parisc/kernel/pci.c | 17 ++++++++------\n> arch/powerpc/kernel/pci-common.c | 6 ++++-\n> arch/s390/pci/pci.c | 1 +\n> arch/sh/drivers/pci/pci.c | 6 ++++-\n> arch/x86/pci/i386.c | 5 +++-\n> arch/xtensa/kernel/pci.c | 3 +++\n> drivers/pci/pci.h | 3 +++\n> drivers/pci/setup-bus.c | 15 ++++++++----\n> drivers/pci/setup-res.c | 40 +++++++++++++++++++++++++++++++-\n> drivers/pcmcia/rsrc_nonstatic.c | 3 ++-\n> include/linux/ioport.h | 22 +++++++++++++++---\n> include/linux/pci.h | 12 +++++++---\n> kernel/resource.c | 33 +++++++++++++-------------\n> 18 files changed, 149 insertions(+), 46 deletions(-)\n\nI added Xifer's tested-by, fixed the \"am68k\" and missing \"if\"\ntypos, and applied these to pci/resource for v7.1.\n\nIlpo, if you post a v2 with more changes, I'll update to it. I\napplied the series now to get a head start on 0-day building and into\nnext.","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=NfJ/oEz0;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c15:e001:75::12fc:5321; helo=sin.lore.kernel.org;\n envelope-from=linux-pci+bounces-51230-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=\"NfJ/oEz0\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=10.30.226.201"],"Received":["from sin.lore.kernel.org (sin.lore.kernel.org\n [IPv6:2600:3c15:e001:75::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fhYfG15vPz1y1G\n\tfor ; Fri, 27 Mar 2026 06:25:58 +1100 (AEDT)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sin.lore.kernel.org (Postfix) with ESMTP id 0716230157CC\n\tfor ; Thu, 26 Mar 2026 19:25:28 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 8C4A73A5437;\n\tThu, 26 Mar 2026 19:25:22 +0000 (UTC)","from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org\n [10.30.226.201])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 6196134FF40;\n\tThu, 26 Mar 2026 19:25:22 +0000 (UTC)","by smtp.kernel.org (Postfix) with ESMTPSA id 0AA1EC116C6;\n\tThu, 26 Mar 2026 19:25:22 +0000 (UTC)"],"ARC-Seal":"i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1774553122; cv=none;\n b=Bd/Sv5ym515xbZiIMF8BR2K6Q7fLP47OMDqquCAVC+RYYh4aKivv+TpodZf0wbslE2Lw5lyw7A55A0yLCgj5ACfg8OSJqu0HoLcPtZTB/w4DDW9yPskhGZ6UlT+7Vu6kIHFw/thYNhqEfEb8ItytN69R/ANY9d/KUI6+S+ViCX0=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1774553122; c=relaxed/simple;\n\tbh=A++szeKtnjRSEovDyZxLISgC62LFBBAIhs/d9OMRhfE=;\n\th=Date:From:To:Cc:Subject:Message-ID:MIME-Version:Content-Type:\n\t Content-Disposition:In-Reply-To;\n b=AUPrHkOfFLbUFbqTxoCtdjkJP+GQBAgusjfSwSWFu5fpV2rIQacPopX7ps8T6PfyA2Epn+TKlMjMxD/p4e3s7/ylB87IwoTbkDDFcw0vkhZZhTfEclftPL7L3y8RG3WW/g4vHnnljqfdKf3jFiwFqPgFjak1G6H6y8yIJUNvD+0=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=NfJ/oEz0; arc=none smtp.client-ip=10.30.226.201","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n\ts=k20201202; t=1774553122;\n\tbh=A++szeKtnjRSEovDyZxLISgC62LFBBAIhs/d9OMRhfE=;\n\th=Date:From:To:Cc:Subject:In-Reply-To:From;\n\tb=NfJ/oEz0LRYInVcrSbNN88ZD+MdyZe+E5wpkqpNyM7Ggrd+87xrTGdb2eRZTy87DI\n\t 3AEY3FowNt2dLBx5bUv4EG4eu546MewpNXZGCLDHkBfe8g3LZwJ102n7t7khlBaszz\n\t Lx4TnfZYWvuNCDHMwl+tUFBLw2zV1Ngq0Csg3zwt51tFeRwFrtv1uYON4+pXGzeX8B\n\t iMHKIRiCjG9dp3POhWU/XzfbitypWNW1N1GDKkwoAv/NyKcEekZl9lBiRmYoXapScF\n\t rKV+yPTbfY8C2bHC3ckb0AISfTndYlJ7pwkpyfMvmqNf9+9J1OGvYPuntH/jG+z1Hp\n\t YXvuT6LOCwG0g==","Date":"Thu, 26 Mar 2026 14:25:20 -0500","From":"Bjorn Helgaas ","To":"Ilpo =?utf-8?b?SsOkcnZpbmVu?= ","Cc":"linux-pci@vger.kernel.org, Bjorn Helgaas ,\n\tGuenter Roeck , linux-alpha@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tlinux-m68k@lists.linux-m68k.org, linux-mips@vger.kernel.org,\n\tlinux-parisc@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,\n\tlinux-s390@vger.kernel.org, linux-sh@vger.kernel.org,\n\tRussell King ,\n\tGeert Uytterhoeven ,\n\tThomas Bogendoerfer ,\n\t\"James E.J. Bottomley\" ,\n\tHelge Deller , Michael Ellerman ,\n\tThomas Gleixner , Ingo Molnar ,\n\tBorislav Petkov ,\n\tDave Hansen ,\n\t\"H. Peter Anvin\" , Chris Zankel ,\n\tMax Filippov ,\n\tMadhavan Srinivasan ,\n\tYoshinori Sato ,\n\tRich Felker ,\n\tJohn Paul Adrian Glaubitz ,\n\tlinux-kernel@vger.kernel.org, Xifer ","Subject":"Re: [PATCH 00/10] PCI: Improve head free space usage","Message-ID":"<20260326192520.GA1337681@bhelgaas>","Precedence":"bulk","X-Mailing-List":"linux-pci@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","Content-Type":"text/plain; charset=utf-8","Content-Disposition":"inline","Content-Transfer-Encoding":"8bit","In-Reply-To":"<20260324165633.4583-1-ilpo.jarvinen@linux.intel.com>"}},{"id":3670210,"web_url":"http://patchwork.ozlabs.org/comment/3670210/","msgid":"<7207cde7-d47e-f79c-afe9-9b1daa79140c@linux.intel.com>","list_archive_url":null,"date":"2026-03-27T10:28:56","subject":"Re: [PATCH 00/10] PCI: Improve head free space usage","submitter":{"id":83553,"url":"http://patchwork.ozlabs.org/api/people/83553/","name":"Ilpo Järvinen","email":"ilpo.jarvinen@linux.intel.com"},"content":"On Thu, 26 Mar 2026, Bjorn Helgaas wrote:\n\n> [+cc Xifer; thanks very much for reporting and testing!]\n> \n> On Tue, Mar 24, 2026 at 06:56:23PM +0200, Ilpo Järvinen wrote:\n> > Hi all,\n> > \n> > This series attempts to take advantage of free head space (the free\n> > space before the aligned start address) in order to generally produce a\n> > tighter packing of the resources/bridge windows.\n> > \n> > The recent changes to the resource fitting algorithm caused resource\n> > allocation failures in some cases where a bridge window that is sized\n> > to be gapless could no longer be assigned. The previous algorithm left\n> > a huge gaps which allowed it to place the remainder (non-aligning part\n> > of the size) before the start address of used for the gapless fit,\n> > whereas the new gapless approach always had to place the remainder\n> > after the aligning part of the resources. There is not always space\n> > for the remainder triggering those failures (e.g., when the aligning\n> > part must be placed at the top of the window).\n> > \n> > This series attempts to allow placing the remainder once again before\n> > the aligning part, but now without leaving huge gaps to retain the\n> > benefits of the gapless bridge windows. The approach is somewhat hacky\n> > but should work thanks to PCI resources fundamentally consisting only\n> > power-of-two atoms.\n> > \n> > There maybe cases where architecture would not want to do such\n> > relocation. This series adds the relocation to arch\n> > pcibios_align_resource() functions to allow all of them taking\n> > advantage of the better resource packing but if somebody objects doing\n> > this relocation for a particular arch, I can remove it, please just let\n> > me know (this relocation doesn't seem critical unless there are\n> > regressions).\n> > \n> > Ilpo Järvinen (10):\n> > resource: Add __resource_contains_unbound() for internal contains\n> > checks\n> > resource: Pass full extent of empty space to resource_alignf CB\n> > resource: Rename 'tmp' variable to 'full_avail'\n> > ARM/PCI: Remove unnecessary second application of align\n> > am68k/PCI: Remove unnecessary second application of align\n> > MIPS: PCI: Remove unnecessary second application of align\n> > parisc/PCI: Cleanup align handling\n> > PCI: Rename window_alignment() to pci_min_window_alignment()\n> > PCI: Align head space better\n> > PCI: Fix alignment calculation for resource size larger than align\n> > \n> > arch/alpha/kernel/pci.c | 1 +\n> > arch/arm/kernel/bios32.c | 9 ++++---\n> > arch/m68k/kernel/pcibios.c | 8 +++++--\n> > arch/mips/pci/pci-generic.c | 8 ++++---\n> > arch/mips/pci/pci-legacy.c | 3 +++\n> > arch/parisc/kernel/pci.c | 17 ++++++++------\n> > arch/powerpc/kernel/pci-common.c | 6 ++++-\n> > arch/s390/pci/pci.c | 1 +\n> > arch/sh/drivers/pci/pci.c | 6 ++++-\n> > arch/x86/pci/i386.c | 5 +++-\n> > arch/xtensa/kernel/pci.c | 3 +++\n> > drivers/pci/pci.h | 3 +++\n> > drivers/pci/setup-bus.c | 15 ++++++++----\n> > drivers/pci/setup-res.c | 40 +++++++++++++++++++++++++++++++-\n> > drivers/pcmcia/rsrc_nonstatic.c | 3 ++-\n> > include/linux/ioport.h | 22 +++++++++++++++---\n> > include/linux/pci.h | 12 +++++++---\n> > kernel/resource.c | 33 +++++++++++++-------------\n> > 18 files changed, 149 insertions(+), 46 deletions(-)\n> \n> I added Xifer's tested-by, fixed the \"am68k\" and missing \"if\"\n> typos, and applied these to pci/resource for v7.1.\n> \n> Ilpo, if you post a v2 with more changes, I'll update to it. I\n> applied the series now to get a head start on 0-day building and into\n> next.\n\nThanks.\n\nI don't have anything in addition to those.","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=SX0nzWlZ;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c04:e001:36c::12fc:5321; helo=tor.lore.kernel.org;\n envelope-from=linux-pci+bounces-51272-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com\n header.b=\"SX0nzWlZ\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=192.198.163.8","smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=linux.intel.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=linux.intel.com"],"Received":["from tor.lore.kernel.org (tor.lore.kernel.org\n [IPv6:2600:3c04:e001:36c::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fhxrS3bqsz1xy1\n\tfor ; Fri, 27 Mar 2026 21:36:08 +1100 (AEDT)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby tor.lore.kernel.org (Postfix) with ESMTP id EA96B302B21D\n\tfor ; Fri, 27 Mar 2026 10:29:17 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 42E5D3ACF17;\n\tFri, 27 Mar 2026 10:29:14 +0000 (UTC)","from mgamail.intel.com (mgamail.intel.com [192.198.163.8])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 52A443AA1B2;\n\tFri, 27 Mar 2026 10:29:12 +0000 (UTC)","from orviesa001.jf.intel.com ([10.64.159.141])\n by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 27 Mar 2026 03:29:11 -0700","from ijarvine-mobl1.ger.corp.intel.com (HELO localhost)\n ([10.245.244.186])\n by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 27 Mar 2026 03:29:01 -0700"],"ARC-Seal":"i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1774607354; cv=none;\n b=keG8S0eKOtsDy0M2UMRN9cCH5OcCbjOkusojCHtgdeKcW9FhoH+u0IPEBCsJqhHaAv7amQ9xRm2zpXgk/+9+fSyfA4TzzY/NuPwhj+n/DSykYbUyTunllF5QF5vzAQYZQjuRoVllfnAwPsr+yX6KVyp6JdEV1ZixPBetu9pYYeY=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1774607354; c=relaxed/simple;\n\tbh=AQrZsYS87uRLSAUzR2yt6e8HOvPMEsktxMC+0rqw0oY=;\n\th=From:Date:To:cc:Subject:In-Reply-To:Message-ID:References:\n\t MIME-Version:Content-Type;\n b=nVuYhg6gY5IMwE6tnlqy3yOoA4E2e+6tsyvnzitFBWc03tx1m2so0L45gAxs8Zxl1htN/84Xhr/YxkkpcsfiaD8d361Cf0Y3qlcWJ8tyr7BV1N+GDH5FpD7d1TrGotUtEoLjDsijTUnJx6ZXbBSUx3FxUSGSvKEnY6dvn/TuKW8=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=linux.intel.com;\n spf=pass smtp.mailfrom=linux.intel.com;\n dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com\n header.b=SX0nzWlZ; arc=none smtp.client-ip=192.198.163.8","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1774607353; x=1806143353;\n h=from:date:to:cc:subject:in-reply-to:message-id:\n references:mime-version;\n bh=AQrZsYS87uRLSAUzR2yt6e8HOvPMEsktxMC+0rqw0oY=;\n b=SX0nzWlZIY0Lg4fyXJy1hem2uUevSvI1nbx91bp0jZYYqRr93GaLksaE\n L6XLJWuLACGbs/Obo0LLfiusLKSxmX5HOfj2BR/OfzI5RUmPnAEbJxWGx\n H8arvWKQ7iOn+koxe3/GEJt4fFT8S6HWH9xg10wBXdgqPJanVKkEt1Qyx\n /7B2xb2jl7faADXEGMBpdI28tH79/++kh/ol8X0TPBLWYG1sA2mCqBcZa\n QJQsSA1iMaFdyaMsTkz2wpp39pZGfRPODNn6QqAM5cXjkgXj8CJ1e7gn9\n 0Li0W7WV2EDfk6lWNjEzVO4kFjsRIUYdrV6xXvg6gkCesf5RAzv+5UkW8\n Q==;","X-CSE-ConnectionGUID":["+KbLwjXESSqMmEPH1Yg2iA==","tBARr7F7SaCXrVZYlacT+g=="],"X-CSE-MsgGUID":["k3BStIGXSgiyo9+iueWvgA==","6iZuzsYWQBOngO/GpRvA3A=="],"X-IronPort-AV":["E=McAfee;i=\"6800,10657,11741\"; a=\"93259306\"","E=Sophos;i=\"6.23,144,1770624000\";\n d=\"scan'208\";a=\"93259306\"","E=Sophos;i=\"6.23,144,1770624000\";\n d=\"scan'208\";a=\"263218208\""],"X-ExtLoop1":"1","From":"=?utf-8?q?Ilpo_J=C3=A4rvinen?= ","Date":"Fri, 27 Mar 2026 12:28:56 +0200 (EET)","To":"Bjorn Helgaas ","cc":"linux-pci@vger.kernel.org, Bjorn Helgaas ,\n Guenter Roeck , linux-alpha@vger.kernel.org,\n linux-arm-kernel@lists.infradead.org, linux-m68k@lists.linux-m68k.org,\n linux-mips@vger.kernel.org, linux-parisc@vger.kernel.org,\n linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org,\n linux-sh@vger.kernel.org, Russell King ,\n Geert Uytterhoeven ,\n Thomas Bogendoerfer ,\n \"James E.J. Bottomley\" ,\n Helge Deller , Michael Ellerman ,\n Thomas Gleixner , Ingo Molnar ,\n Borislav Petkov , Dave Hansen ,\n \"H. Peter Anvin\" , Chris Zankel ,\n Max Filippov ,\n Madhavan Srinivasan ,\n Yoshinori Sato ,\n Rich Felker ,\n John Paul Adrian Glaubitz ,\n LKML , Xifer ","Subject":"Re: [PATCH 00/10] PCI: Improve head free space usage","In-Reply-To":"<20260326192520.GA1337681@bhelgaas>","Message-ID":"<7207cde7-d47e-f79c-afe9-9b1daa79140c@linux.intel.com>","References":"<20260326192520.GA1337681@bhelgaas>","Precedence":"bulk","X-Mailing-List":"linux-pci@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","Content-Type":"multipart/mixed; boundary=\"8323328-307680389-1774607336=:1037\""}}]