[{"id":3669687,"web_url":"http://patchwork.ozlabs.org/comment/3669687/","msgid":"","list_archive_url":null,"date":"2026-03-26T12:17:50","subject":"Re: [PATCH v9 0/5] I2C Mux per channel bus speed","submitter":{"id":46679,"url":"http://patchwork.ozlabs.org/api/people/46679/","name":"Marcus Folkesson","email":"marcus.folkesson@gmail.com"},"content":"On Tue, Mar 24, 2026 at 02:54:14PM +0100, Marcus Folkesson wrote:\n> This was a RFC on how to implement a feature to have different bus\n> speeds on different channels with an I2C multiplexer/switch.\n> As no major complaints on the design came up during the review, I\n> decided to submit the series without the RFC tag.\n> \n> The benefit with this feature is that you may group devices after\n> the fastest bus speed they can handle.\n> A real-world example is that you could have e.g. a display running @400kHz\n> and a smart battery running @100kHz using the same I2C controller.\n> \n> There are many corner cases where this may cause a problem for some\n> hardware topologies. I've tried to describe those I could think of\n> in the documentation, see Patch #5.\n> \n> E.g. one risk is that if the mux driver does not disconnect channels\n> when Idle, this may cause a higher frequency to \"leak\" through to\n> devices that are supposed to run at lower bus speed.\n> This is not only a \"problem\" for changing bus speed but could also be\n> an issue for potential address conflicts.\n> \n> This patchset has been used and tested heavily the last months\n> on a custom board based on a da850 (DaVinci) platform.\n> \n> The implementation is split up into several patches:\n> \n> Patch #1 Introduce a callback for the i2c controller to set bus speed\n> Patch #2 Introduce functionality to adjust bus speed depending on mux\n> channel.\n> Patch #3 Cleanup i2c-davinci driver a bit to prepare it for set_clk_freq\n> Parch #4 Implement set_clk_freq for the i2c-davinci driver\n> Parch #5 Update documentation with this feature\n> \n> Signed-off-by: Marcus Folkesson \n> ---\n\nPeter,\nDo you have any feedback on this new approach?\n\nThanks in advance,\nMarcus","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-i2c@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=jp71WrtV;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.105.105.114; helo=tor.lore.kernel.org;\n envelope-from=linux-i2c+bounces-16800-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com\n header.b=\"jp71WrtV\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=209.85.208.181","smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=gmail.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=gmail.com"],"Received":["from tor.lore.kernel.org (tor.lore.kernel.org [172.105.105.114])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fhN9s3Gmbz1y1x\n\tfor ; Thu, 26 Mar 2026 23:19:13 +1100 (AEDT)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby tor.lore.kernel.org (Postfix) with ESMTP id 92CA43048EEC\n\tfor ; Thu, 26 Mar 2026 12:17:59 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 5FBFD3F788F;\n\tThu, 26 Mar 2026 12:17:56 +0000 (UTC)","from mail-lj1-f181.google.com (mail-lj1-f181.google.com\n [209.85.208.181])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id B0CED317173\n\tfor ; Thu, 26 Mar 2026 12:17:54 +0000 (UTC)","by mail-lj1-f181.google.com with SMTP id\n 38308e7fff4ca-3870778358aso5764151fa.1\n for ; Thu, 26 Mar 2026 05:17:54 -0700 (PDT)","from gmail.com (83-233-6-197.cust.bredband2.com. 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charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20260324-i2c-mux-v9-0-5292b0608243@gmail.com>"}},{"id":3676522,"web_url":"http://patchwork.ozlabs.org/comment/3676522/","msgid":"","list_archive_url":null,"date":"2026-04-13T07:45:31","subject":"Re: [PATCH v9 0/5] I2C Mux per channel bus speed","submitter":{"id":46679,"url":"http://patchwork.ozlabs.org/api/people/46679/","name":"Marcus Folkesson","email":"marcus.folkesson@gmail.com"},"content":"On Tue, Mar 24, 2026 at 02:54:14PM +0100, Marcus Folkesson wrote:\n> This was a RFC on how to implement a feature to have different bus\n> speeds on different channels with an I2C multiplexer/switch.\n> As no major complaints on the design came up during the review, I\n> decided to submit the series without the RFC tag.\n> \n> The benefit with this feature is that you may group devices after\n> the fastest bus speed they can handle.\n> A real-world example is that you could have e.g. a display running @400kHz\n> and a smart battery running @100kHz using the same I2C controller.\n> \n> There are many corner cases where this may cause a problem for some\n> hardware topologies. I've tried to describe those I could think of\n> in the documentation, see Patch #5.\n> \n> E.g. one risk is that if the mux driver does not disconnect channels\n> when Idle, this may cause a higher frequency to \"leak\" through to\n> devices that are supposed to run at lower bus speed.\n> This is not only a \"problem\" for changing bus speed but could also be\n> an issue for potential address conflicts.\n> \n> This patchset has been used and tested heavily the last months\n> on a custom board based on a da850 (DaVinci) platform.\n> \n> The implementation is split up into several patches:\n> \n> Patch #1 Introduce a callback for the i2c controller to set bus speed\n> Patch #2 Introduce functionality to adjust bus speed depending on mux\n> channel.\n> Patch #3 Cleanup i2c-davinci driver a bit to prepare it for set_clk_freq\n> Parch #4 Implement set_clk_freq for the i2c-davinci driver\n> Parch #5 Update documentation with this feature\n> \n> Signed-off-by: Marcus Folkesson \n> ---\n\nAny more feedback on this patchset is very welcome.\n\nThank you in advance,\nMarcus","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-i2c@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=a4W5WVBL;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c15:e001:75::12fc:5321; helo=sin.lore.kernel.org;\n envelope-from=linux-i2c+bounces-17041-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com\n header.b=\"a4W5WVBL\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=209.85.167.42","smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=gmail.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=gmail.com"],"Received":["from sin.lore.kernel.org (sin.lore.kernel.org\n [IPv6:2600:3c15:e001:75::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fvKPv0b85z1yDF\n\tfor ; Mon, 13 Apr 2026 17:52:35 +1000 (AEST)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sin.lore.kernel.org (Postfix) with ESMTP id 5EE9F3052E8D\n\tfor ; Mon, 13 Apr 2026 07:46:27 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 38267397686;\n\tMon, 13 Apr 2026 07:45:39 +0000 (UTC)","from mail-lf1-f42.google.com (mail-lf1-f42.google.com\n [209.85.167.42])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 5070439EF12\n\tfor ; Mon, 13 Apr 2026 07:45:37 +0000 (UTC)","by mail-lf1-f42.google.com with SMTP id\n 2adb3069b0e04-5a2b636b944so4605897e87.1\n for ; Mon, 13 Apr 2026 00:45:37 -0700 (PDT)","from gmail.com (83-233-6-197.cust.bredband2.com. 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