[{"id":3389162,"web_url":"http://patchwork.ozlabs.org/comment/3389162/","msgid":"","list_archive_url":null,"date":"2024-10-04T16:39:43","subject":"Re: [PATCH v2 00/25] misc: Use explicit endian LD/ST API","submitter":{"id":85046,"url":"http://patchwork.ozlabs.org/api/people/85046/","name":"Philippe Mathieu-Daudé","email":"philmd@linaro.org"},"content":"On 4/10/24 18:30, Philippe Mathieu-Daudé wrote:\n> For targets (or HW) which are only built for a particular\n> endianness, the generic LD/ST helpers are defined as the\n> target endianness variant. For example, on big-endian\n> targets, stl_p() is equivalent of stl_be_p().\n> \n> This series replaces in bulk these LD/ST calls.\n\nThis is the first part where we only convert the targets\nbuilt for a single endianness.\n\nThe rest (MIPS, ARM, PPC, MicroBlaze and Xtensa) will be\nhandled in different series.\n\nI'm keeping hw/virtio/virtio-config-io.c last. Possibly\ncurrent API will then be restricted to user-emu & system/\nto avoid further uses.\n\n$ git grep -wlE '(ld|st)t?u?[wlq]_p'\nhw/mips/bootloader.c\nhw/mips/fuloong2e.c\nhw/mips/malta.c\nhw/ppc/spapr.c\nhw/ppc/spapr_vhyp_mmu.c\ntarget/arm/cpu.c\ntarget/arm/gdbstub.c\ntarget/arm/gdbstub64.c\ntarget/microblaze/gdbstub.c\ntarget/mips/gdbstub.c\ntarget/ppc/gdbstub.c\ntarget/ppc/mmu-hash64.h\ntarget/xtensa/gdbstub.c\n\naccel/tcg/user-exec.c\nhw/virtio/virtio-config-io.c\ninclude/exec/cpu-all.h\ninclude/gdbstub/helpers.h\nmonitor/hmp-cmds-target.c\nsystem/ioport.c\nsystem/memory_ldst.c.inc\n\n\n> This is helpful for the single binary project where we\n> want to build a single binary for multiple targets of\n> different endianness.\n> \n> Philippe Mathieu-Daudé (25):\n> gdbstub/helpers: Have ldtul_p() definition use ldn_p()\n> target/hexagon: Replace ldtul_p() -> ldl_p()\n> target/alpha: Replace ldtul_p() -> ldq_p()\n> target/s390x: Replace ldtul_p() -> ldq_p()\n> gdbstub/helpers: Introduce ldtul_$endian_p() helpers\n> target/alpha: Use explicit little-endian LD/ST API\n> target/hexagon: Use explicit little-endian LD/ST API\n> hw/i386: Use explicit little-endian LD/ST API\n> target/i386: Use explicit little-endian LD/ST API\n> target/avr: Use explicit little-endian LD/ST API\n> linux-user/i386: Use explicit little-endian LD/ST API\n> target/loongarch: Use explicit little-endian LD/ST API\n> target/sh4: Use explicit little-endian LD/ST API\n> target/tricore: Use explicit little-endian LD/ST API\n> target/rx: Use explicit little-endian LD/ST API\n> target/riscv: Use explicit little-endian LD/ST API\n> hw/m68k: Use explicit big-endian LD/ST API\n> target/m68k: Use explicit big-endian LD/ST API\n> hw/sparc: Use explicit big-endian LD/ST API\n> target/sparc: Use explicit big-endian LD/ST API\n> target/hppa: Use explicit big-endian LD/ST API\n> hw/s390x: Use explicit big-endian LD/ST API\n> target/s390x: Use explicit big-endian LD/ST API\n> target/openrisc: Use explicit big-endian LD/ST API\n> hw/ppc/e500: Use explicit big-endian LD/ST API\n> \n> hw/m68k/bootinfo.h | 28 ++---\n> include/gdbstub/helpers.h | 6 +-\n> hw/i386/multiboot.c | 36 +++---\n> hw/i386/x86-common.c | 26 ++---\n> hw/m68k/mcf5208.c | 2 +-\n> hw/m68k/next-cube.c | 2 +-\n> hw/m68k/q800.c | 4 +-\n> hw/ppc/ppce500_spin.c | 24 ++--\n> hw/s390x/ipl.c | 4 +-\n> hw/s390x/s390-pci-inst.c | 166 +++++++++++++--------------\n> hw/sparc/leon3.c | 42 +++----\n> hw/sparc/sun4m.c | 6 +-\n> hw/sparc64/sun4u.c | 6 +-\n> linux-user/i386/signal.c | 4 +-\n> target/alpha/gdbstub.c | 2 +-\n> target/avr/gdbstub.c | 4 +-\n> target/hexagon/gdbstub.c | 10 +-\n> target/hppa/gdbstub.c | 2 +-\n> target/i386/gdbstub.c | 30 ++---\n> target/i386/tcg/sysemu/excp_helper.c | 4 +-\n> target/i386/xsave_helper.c | 32 +++---\n> target/loongarch/gdbstub.c | 8 +-\n> target/m68k/gdbstub.c | 2 +-\n> target/m68k/helper.c | 10 +-\n> target/openrisc/gdbstub.c | 2 +-\n> target/riscv/gdbstub.c | 14 +--\n> target/rx/cpu.c | 2 +-\n> target/rx/gdbstub.c | 24 ++--\n> target/s390x/gdbstub.c | 34 +++---\n> target/s390x/ioinst.c | 2 +-\n> target/sh4/gdbstub.c | 36 +++---\n> target/sparc/gdbstub.c | 6 +-\n> target/tricore/gdbstub.c | 2 +-\n> 33 files changed, 292 insertions(+), 290 deletions(-)\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=ixBaspbj;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=UTF-8; format=flowed","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=2a00:1450:4864:20::230;\n envelope-from=philmd@linaro.org; helo=mail-lj1-x230.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"}},{"id":3389314,"web_url":"http://patchwork.ozlabs.org/comment/3389314/","msgid":"<5a1606e1-649f-4bda-83e9-aff8c9dfd9f4@linaro.org>","list_archive_url":null,"date":"2024-10-05T01:39:05","subject":"Re: [PATCH v2 00/25] misc: Use explicit endian LD/ST API","submitter":{"id":72104,"url":"http://patchwork.ozlabs.org/api/people/72104/","name":"Richard Henderson","email":"richard.henderson@linaro.org"},"content":"On 10/4/24 09:30, Philippe Mathieu-Daudé wrote:\n> Philippe Mathieu-Daudé (25):\n> gdbstub/helpers: Have ldtul_p() definition use ldn_p()\n> target/hexagon: Replace ldtul_p() -> ldl_p()\n> target/alpha: Replace ldtul_p() -> ldq_p()\n> target/s390x: Replace ldtul_p() -> ldq_p()\n> gdbstub/helpers: Introduce ldtul_$endian_p() helpers\n> target/alpha: Use explicit little-endian LD/ST API\n> target/hexagon: Use explicit little-endian LD/ST API\n> hw/i386: Use explicit little-endian LD/ST API\n> target/i386: Use explicit little-endian LD/ST API\n> target/avr: Use explicit little-endian LD/ST API\n> linux-user/i386: Use explicit little-endian LD/ST API\n> target/loongarch: Use explicit little-endian LD/ST API\n> target/sh4: Use explicit little-endian LD/ST API\n> target/tricore: Use explicit little-endian LD/ST API\n> target/rx: Use explicit little-endian LD/ST API\n> target/riscv: Use explicit little-endian LD/ST API\n> hw/m68k: Use explicit big-endian LD/ST API\n> target/m68k: Use explicit big-endian LD/ST API\n> hw/sparc: Use explicit big-endian LD/ST API\n> target/sparc: Use explicit big-endian LD/ST API\n> target/hppa: Use explicit big-endian LD/ST API\n> hw/s390x: Use explicit big-endian LD/ST API\n> target/s390x: Use explicit big-endian LD/ST API\n> target/openrisc: Use explicit big-endian LD/ST API\n> hw/ppc/e500: Use explicit big-endian LD/ST API\n\nThe sh4, rx, and riscv targets *can* support multiple endianness.\n\nWhile we removed sh4eb for system mode, we still support sh4eb-linux-user, and therefore \nthe target/sh4 patch affecting gdbstub is wrong.\n\nRX sets endianness via a pin sampled at reset; if we ever implement this, it would be via \na property on the cpu. RISCV sets endianness via a couple of bits in MSTATUS; system mode \nwould always use little-endian, but riscv64eb-user isn't out of the question.\n\nWhile we have never supported rx or riscv in big-endian, but there's no reason that we \ncan't, and those target/ patches make things harder. Since target/ will *always* have \nTARGET_BIG_ENDIAN available, I don't see that we're saving anything there.\n\n\nr~","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=xqrg7Va2;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4XL7Qf186Dz1xv1\n\tfor ; Sat, 5 Oct 2024 11:40:26 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1swtle-00070u-6Y; Fri, 04 Oct 2024 21:39:36 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1swtlO-0006zE-IY\n for qemu-devel@nongnu.org; Fri, 04 Oct 2024 21:39:19 -0400","from mail-pj1-x1035.google.com ([2607:f8b0:4864:20::1035])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from )\n id 1swtlL-0007dY-BY\n for qemu-devel@nongnu.org; Fri, 04 Oct 2024 21:39:18 -0400","by mail-pj1-x1035.google.com with SMTP id\n 98e67ed59e1d1-2e082f2a427so2063274a91.3\n for ; Fri, 04 Oct 2024 18:39:08 -0700 (PDT)","from [192.168.0.4] (174-21-81-121.tukw.qwest.net. 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charset=UTF-8; format=flowed","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=2607:f8b0:4864:20::1035;\n envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1035.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"}},{"id":3389791,"web_url":"http://patchwork.ozlabs.org/comment/3389791/","msgid":"","list_archive_url":null,"date":"2024-10-07T07:52:14","subject":"Re: [PATCH v2 00/25] misc: Use explicit endian LD/ST API","submitter":{"id":77478,"url":"http://patchwork.ozlabs.org/api/people/77478/","name":"Pierre Muller","email":"pierre@freepascal.org"},"content":"Le 05/10/2024 à 03:39, Richard Henderson a écrit :\n> On 10/4/24 09:30, Philippe Mathieu-Daudé wrote:\n>> Philippe Mathieu-Daudé (25):\n>> gdbstub/helpers: Have ldtul_p() definition use ldn_p()\n>> target/hexagon: Replace ldtul_p() -> ldl_p()\n>> target/alpha: Replace ldtul_p() -> ldq_p()\n>> target/s390x: Replace ldtul_p() -> ldq_p()\n>> gdbstub/helpers: Introduce ldtul_$endian_p() helpers\n>> target/alpha: Use explicit little-endian LD/ST API\n>> target/hexagon: Use explicit little-endian LD/ST API\n>> hw/i386: Use explicit little-endian LD/ST API\n>> target/i386: Use explicit little-endian LD/ST API\n>> target/avr: Use explicit little-endian LD/ST API\n>> linux-user/i386: Use explicit little-endian LD/ST API\n>> target/loongarch: Use explicit little-endian LD/ST API\n>> target/sh4: Use explicit little-endian LD/ST API\n>> target/tricore: Use explicit little-endian LD/ST API\n>> target/rx: Use explicit little-endian LD/ST API\n>> target/riscv: Use explicit little-endian LD/ST API\n>> hw/m68k: Use explicit big-endian LD/ST API\n>> target/m68k: Use explicit big-endian LD/ST API\n>> hw/sparc: Use explicit big-endian LD/ST API\n>> target/sparc: Use explicit big-endian LD/ST API\n>> target/hppa: Use explicit big-endian LD/ST API\n>> hw/s390x: Use explicit big-endian LD/ST API\n>> target/s390x: Use explicit big-endian LD/ST API\n>> target/openrisc: Use explicit big-endian LD/ST API\n>> hw/ppc/e500: Use explicit big-endian LD/ST API\n> \n> The sh4, rx, and riscv targets *can* support multiple endianness.\n> \n> While we removed sh4eb for system mode, we still support sh4eb-linux-user, and therefore\n> the target/sh4 patch affecting gdbstub is wrong.\n> \n> RX sets endianness via a pin sampled at reset; if we ever implement this, it would be via\n> a property on the cpu. RISCV sets endianness via a couple of bits in MSTATUS; system mode\n> would always use little-endian, but riscv64eb-user isn't out of the question.\n> \n> While we have never supported rx or riscv in big-endian, but there's no reason that we\n> can't, and those target/ patches make things harder. Since target/ will *always* have\n> TARGET_BIG_ENDIAN available, I don't see that we're saving anything there.\n\n Isn't this also true for the sparc CPU?\nAt least llvm seems to think so:\n\n$ ssh gcc421 /usr/bin/llvm-mc-18 --version\nDebian LLVM version 18.1.8\n Optimized build.\n\n Registered Targets:\n aarch64 - AArch64 (little endian)\n....\n sparc - Sparc\n sparcel - Sparc LE\n sparcv9 - Sparc V9\n systemz - SystemZ\n\n\nPierre Muller","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":"legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)","Received":["from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4XMWc86wWJz1xtV\n\tfor ; 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Mon, 7 Oct 2024 07:52:14 +0000 (UTC)"],"Message-ID":"","Date":"Mon, 7 Oct 2024 09:52:14 +0200","MIME-Version":"1.0","User-Agent":"Mozilla Thunderbird","Subject":"Re: [PATCH v2 00/25] misc: Use explicit endian LD/ST API","To":"qemu-devel@nongnu.org","References":"<20241004163042.85922-1-philmd@linaro.org>\n <5a1606e1-649f-4bda-83e9-aff8c9dfd9f4@linaro.org>","Content-Language":"en-US, fr","From":"Pierre Muller ","Autocrypt":"addr=pierre@freepascal.org; keydata=\n xsDNBGVuAQ4BDADp81SVCGHTliLmpeMJpRfm12/bCnTEe9us5Jcm9Vi7iLGYhwE8IwmXHM1e\n XzCGdcgsxcXjRTOU4bCnSzcQB4IPXPDNbPpGa42wQPHX8rvny+UACWsM2onk3bHEqFAdXhzm\n ZgPo0GYg3MfwvdntBEnmy9NhbGnGDH1VdJUCsoCZN2kJwxSO/GTMw9G1FBrx7rlM/tXimeZX\n SRMF1HfdBGO0qni+Jk6UzkBa+oUPrOzZcZkZmd3vAESP9LoQc8oakhBcfXncfvsL/8OdCmTv\n x4IvsrSFZ7jVcmREwF9Hpc1DRwB9kS/hzHI4ihL7D++3h3m56bUkoKW5jZruXFQqmvnuqUpa\n li0ro926K2ZqowW+7rEjqxnJauX26PlaxCcYjFHjX04OtXiEpKARPtB3ln2d0cSjr1zkfsg8\n 9C2TcqKXngjTRJSme0CRm5AscU7B/iZG5oMSOl+11UGZabRY6noDJLpvNv5Abdtv0iCIkIUB\n XeiBlDagL/663gQwFi9bj7kAEQEAAc0lUGllcnJlIE11bGxlciA8cGllcnJlQGZyZWVwYXNj\n YWwub3JnPsLBDQQTAQgANxYhBHwHPVFSlmvdIZZd19acCeO3uqjdBQJlbgETBQkFo5qAAhsD\n BAsJCAcFFQgJCgsFFgIDAQAACgkQ1pwJ47e6qN0+GwwAwm5z7FuUDOlKNh4yDgqcPo3NX3Gi\n QfN9Uw3q0BxbzWTz12XcU+cBDancOi2ygoCYe4fu3zkFpiE3oKSQFynaw2PlCcmoZYTK0D70\n iTUCiHm4Gn3Dmk5GlAVeXGvjByyssdXjNf+N0yu3IIbScF/Bna6e9oiYt7YyiqAP3mu04Zj1\n fHaGAvXTFMisPGeeqcK1lC2puoAfD27Chhtb8LaNAsi2304jdIDHBFMLKLmlnjJK52srJCAf\n tqaDpdCrlxYIHR57aSRX209R587fJ7p6cNmje5RVX/4sSCdnD3l1RGEpU+oDusEZmy0wpL0/\n iZH1XmkVsH0VWxwfevbI7k8mRGKx4PEd2eUCcEAgN0BGjb3UIABAOkYtzDlA0EKS3OIMZd0I\n gUznnZP6FXRAb3uqM0wtXEIYUtuT6E9Zugd0hWe6L/31VX1Ei+Vl+of625u2Bvwj+Swnjc8s\n Ox3jYf9OPT6C1ytBydLFUf66DCbyEA8fmJ54yzTehfrAujIbqoTYzsDNBGVuARMBDADSsPjW\n 94iguv4Mrr5POBDZWbm2Tt2ro1bBUrcasvQnpPUPfho/1D0j19ls9/FjvUnD2wAXCEFhhJh+\n 9NnQ1LIHg1YnVKmcavB3RVmH4o13DId1xz7YvAoQwWWBO/Fg5IKYEXxyC1nYFEy4gF7PN6ta\n NbI/IsPeQb3THsuHRH7Og3RreE6xcw2SH4Elgq1SU9WveXrxiE2x2NO49LViAipIG0Narf+j\n 43NV5fyz2pAOrpO4ZFoaYMHk0uX5p1/R2wT4NWRKAiJS3g/Y980F6PFjG1WyUGCok8VD+gWG\n RiGbXCYfZApVK8R3R2pKel17MRKCJy5x7qqmYnal5azQeHZvjrN70oN4T4nyn3L75FOEeOut\n 6NOx2WreqluFn2B+y9Z4nWfJHslnoeP6EDfGqucBdbJl8YfJCoGYaN+YzGDzNY4pg7+SxvET\n hoBVjU5Vx2UWgj6bgEBlMqdWPW4OKB5Ay4hCsp5sN6Hi8AXJ/GWB7pUS87K1Gjt0Yn+sr3ts\n sxUAEQEAAcLA/AQYAQgAJhYhBHwHPVFSlmvdIZZd19acCeO3uqjdBQJlbgEXBQkFo5qAAhsM\n AAoJENacCeO3uqjdlB4L/2oI7vJeR6FJk7TyAAfMZ9VVmz4lsmLk8/+ZI4J9VH9AVIPzj2uw\n 6UWFJdi9iM6ElYF+vHj3Czn0ZKFFxrvsaA7Ufo3/VBxCqHTyLBbYgzEcVtJaP4C+ffERwDYl\n ccbmIm8/uTuSdyZQv/NvffP5h6F151V6pugj6kFCnC7s4N6jgNwp38/25rjja+ZVP79/NBmX\n EMLmCfNVRjm2UB0BqxcHvL8riS+6Tfiq/9uhQSQ0lfzRP5yIOSa84Rr4W94KQ6Kfg4k3WTDz\n kpdDcigBksCxVVmYUGc2TU/Eb0tfnUyNqo/zPbweS+G6rwFH5InS0R6c53MsyfsE/ecPLnBr\n cOorcba4A9Q4ItBSPUaFZVGZttvM8XhTC1NLLpn7HfVrvXSUoD2nSWHEAhSC11eClBc2JCTX\n T0GBvRqfWrArg6HCIKVSYKUNTJU/KS67YIxUcKk03DbeyyhIEhRECfEa2nQxsuJ2ocS6IJ7P\n ahNt36rlsL9b9LfAbQgrNA4CfCLEAw==","In-Reply-To":"<5a1606e1-649f-4bda-83e9-aff8c9dfd9f4@linaro.org>","Content-Type":"text/plain; charset=UTF-8; format=flowed","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=178.33.235.90;\n envelope-from=pierre@freepascal.org;\n helo=mail.freepascal.org","X-Spam_score_int":"-18","X-Spam_score":"-1.9","X-Spam_bar":"-","X-Spam_report":"(-1.9 / 5.0 requ) BAYES_00=-1.9,\n RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001,\n RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001,\n SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Reply-To":"Pierre Muller ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"}},{"id":3390062,"web_url":"http://patchwork.ozlabs.org/comment/3390062/","msgid":"<17794b7c-c337-44be-96ed-d647a28864fc@linaro.org>","list_archive_url":null,"date":"2024-10-07T14:40:31","subject":"Re: [PATCH v2 00/25] misc: Use explicit endian LD/ST API","submitter":{"id":72104,"url":"http://patchwork.ozlabs.org/api/people/72104/","name":"Richard Henderson","email":"richard.henderson@linaro.org"},"content":"On 10/7/24 00:52, Pierre Muller wrote:\n>> While we have never supported rx or riscv in big-endian, but there's no reason that we\n>> can't, and those target/ patches make things harder. Since target/ will *always* have\n>> TARGET_BIG_ENDIAN available, I don't see that we're saving anything there.\n> \n>   Isn't this also true for the sparc CPU?\n\nYes, I'd forgotten about that. Indeed, Sparc v9 has a couple of PSTATE bits that set the \nendianness, exactly like Arm and Power, which qemu has not implemented for system mode.\n\n\nr~","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=qPUJBzKz;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4XMhfr4C8Gz1xvJ\n\tfor ; Tue, 8 Oct 2024 01:41:24 +1100 (AEDT)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1sxoue-00057W-6H; Mon, 07 Oct 2024 10:40:40 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1sxoub-000573-UJ\n for qemu-devel@nongnu.org; Mon, 07 Oct 2024 10:40:37 -0400","from mail-pg1-x52d.google.com ([2607:f8b0:4864:20::52d])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from )\n id 1sxoua-0003Yw-GL\n for qemu-devel@nongnu.org; Mon, 07 Oct 2024 10:40:37 -0400","by mail-pg1-x52d.google.com with SMTP id\n 41be03b00d2f7-7ea06275ef2so828525a12.0\n for ; Mon, 07 Oct 2024 07:40:35 -0700 (PDT)","from [192.168.0.4] (174-21-81-121.tukw.qwest.net. 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